CN112803931B - Tri-state switching value identification system - Google Patents
Tri-state switching value identification system Download PDFInfo
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- CN112803931B CN112803931B CN202011595985.9A CN202011595985A CN112803931B CN 112803931 B CN112803931 B CN 112803931B CN 202011595985 A CN202011595985 A CN 202011595985A CN 112803931 B CN112803931 B CN 112803931B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/06—Modifications for ensuring a fully conducting state
- H03K17/063—Modifications for ensuring a fully conducting state in field-effect transistor switches
Abstract
The invention discloses a three-state switching value identification system, belongs to the technical field of automobile instruments, and aims to solve the problem that a sampling circuit of a combination instrument in the prior art is single in signal acquisition. The device comprises resistors R1-R7, a triode KT1, a field effect tube KT2 and a diode RD1; the connecting end of the resistor R6 and the resistor R7 is used as a mi input end; the other end of the resistor R1 is used as an mo output end; the connecting end of the resistor R5 and the resistor R6 is used as a switching value identification output end; and identifying the on-light quantity identification state of the switching quantity identification output end according to different logics of the mi input end and the mo output end. The invention is used for sampling the automobile instrument.
Description
Technical Field
The invention relates to a three-state switching value identification system, and belongs to the technical field of automobile instruments.
Background
With the development of the whole automobile industry, the functions of the automobile body become more and more abundant, and signals entering the instrument are more diversified. The traditional instrument has relatively fixed and single accessed signals, but the existing host factory is more prone to one opening and multiple purposes, and can be directly switched to a new function and a new state without changing the original hard wire layout of a vehicle body.
Among the prior art, the combination meter sampling circuit is more fixed single, in case the system board is accomplished, can only be to the high-low level do single judgement, is difficult for changing more after the loading, to different motorcycle types, different collections, need match different circuits, in case the demand is more and complicated, just must redesign, get into the design and development process of new round, greatly increased design cost, so the urgent need a new collection mode, and the efficiency is promoted, improves the design flexibility.
Disclosure of Invention
The invention aims to solve the problem that a sampling circuit of a combination instrument in the prior art is single in signal acquisition, and provides a three-state switching value identification system.
The invention relates to a three-state switching value identification system, which comprises resistors R1-R7, a triode KT1, a field effect transistor KT2 and a diode RD1;
one end of the resistor R7 is connected with one end of the resistor R6, and the other end of the resistor R7 is connected with GND;
the connecting end of the resistor R6 and the resistor R7 is used as a mi input end;
the other end of the resistor R6 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with the cathode of a diode RD1, the anode of the diode RD1 is connected with the drain electrode of a field-effect tube KT2, the source electrode of the field-effect tube KT2 is connected with one end of a resistor R4, the source electrode of the field-effect tube KT2 is simultaneously connected with VCC, the grid electrode of the field-effect tube KT2 is simultaneously connected with the other end of the resistor R4 and one end of a resistor R3, the other end of the resistor R3 is connected with the collector electrode of a triode KT1, the emitter electrode of the triode KT1 and one end of the resistor R2 are simultaneously connected with GND, and the base electrode of the triode KT1 is simultaneously connected with the other end of the resistor R2 and one end of the resistor R1;
the other end of the resistor R1 is used as an mo output end;
the connecting end of the resistor R5 and the resistor R6 is used as a switching value identification output end;
and identifying the switching value identification state of the switching value identification output end according to different logics of the mi input end and the mo output end.
Preferably, the switching amount identification state includes: a floating state, a high state, and a low state.
Preferably, the identifying the switching value identification state of the switching value identification output terminal according to different logics of the mi input terminal and the mo output terminal specifically includes:
in a period range, when the mo output level is 11 and the mi input level is 10, the switching value identification state is a suspension state;
in a period range, when the mo output level is 10 and the mi input level is 11, the switching value identification state is a high level state;
in one cycle, when the mo output level is 10 and the mi input level is 00, the switching amount discrimination state is a low level state.
The invention has the advantages that: the tri-state switching value identification system provided by the invention can perfectly adapt to the switching value signals of the automobile body through the identification of the CPU to the logic without updating the instrument hardware on the basis of not changing the original layout and wiring of the automobile body. The adaptability, the configurability and the compatibility of the instrument are greatly improved.
Drawings
Fig. 1 is a schematic structural diagram of a three-state switching value identification system according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be obtained by a person skilled in the art without inventive efforts based on the embodiments of the present invention, shall fall within the scope of protection of the present invention.
It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The first embodiment is as follows: the present embodiment is described below with reference to fig. 1, and the tristate switching value identification system in the present embodiment includes resistors R1 to R7, a transistor KT1, a field effect transistor KT2, and a diode RD1;
one end of the resistor R7 is connected with one end of the resistor R6, and the other end of the resistor R7 is connected with GND;
the connecting end of the resistor R6 and the resistor R7 is used as a mi input end;
the other end of the resistor R6 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with the cathode of a diode RD1, the anode of the diode RD1 is connected with the drain electrode of a field-effect tube KT2, the source electrode of the field-effect tube KT2 is connected with one end of a resistor R4, the source electrode of the field-effect tube KT2 is simultaneously connected with a power supply VCC, the grid electrode of the field-effect tube KT2 is simultaneously connected with the other end of the resistor R4 and one end of a resistor R3, the other end of the resistor R3 is connected with the collector electrode of a triode KT1, the emitter electrode of the triode KT1 and one end of the resistor R2 are simultaneously connected with GND, and the base electrode of the triode KT1 is simultaneously connected with the other end of the resistor R2 and one end of the resistor R1;
the other end of the resistor R1 is used as an mo output end;
the connecting end of the resistor R5 and the resistor R6 is used as a switching value identification output end;
and identifying the switching value identification state of the switching value identification output end according to different logics of the mi input end and the mo output end.
Further, the switching amount identification state includes: a floating state, a high state, and a low state.
Still further, the identifying the switching value identification state of the switching value identification output end according to different logics of the mi input end and the mo output end specifically includes:
in a period range, when the mo output level is 11 and the mi input level is 10, the switching value identification state is a suspension state;
in a period range, when the mo output level is 10 and the mi input level is 11, the switching value identification state is a high level state;
in one cycle, when the mo output level is 10 and the mi input level is 00, the switching amount discrimination state is a low level state.
The working principle of the invention is explained in connection with fig. 1:
when the switching value is in a suspension state, the circuit acquires the logic as follows:
firstly, mo is the level signal output of the single chip microcomputer, when the output is high level, the voltage of a point A reaches the conduction voltage of a triode KT1, the emitter and the collector of the triode are conducted, a resistor R3 is in short circuit with the ground, so that the circuits of the resistor R3 and the resistor R4 have current circulation, and the R3 and the R4 have respective voltage drops, the voltage of a point B is the voltage drop borne by the R3, the KT2 selects a P-MOS, after the R4 bears the voltage drop, the G pole and the S pole of the MOS tube form negative voltage, when the voltage reaches the conduction threshold value of the MOS tube, the emitter and the source of the MOS tube are conducted, VCC is loaded on a diode RD1 to form a loop together with resistors R5, R6 and R7, mi is the acquisition level of the single chip microcomputer, and after the KT2 is conducted, the voltage drop is formed on the R7, mi is acquired at high level and is input to the single chip microcomputer as logic '1';
when the mo output is low level, the voltage at the point A is zero, the conduction voltage of a triode KT1 is not reached, the emitter and the collector of the triode cannot be conducted, and R3 is not connected to GND (ground), so that no current flows through the circuits of a resistor R3 and a resistor R4, the voltage value at the point B is equal to the voltage value of VCC at the moment, and no voltage drop is formed at the two ends of R4, so that the negative voltage is not formed between the G pole and the S pole of the MOS tube, the conduction threshold of the MOS tube cannot be reached, the emitter and the source of the MOS tube cannot be conducted, VCC is not loaded on RD1, resistors R5, R6 and R7 do not flow current, the level acquired by mi is equal to GND, and the input to the singlechip is logic '0';
when the switching value is in a high level state, the circuit acquires the logic as follows:
firstly, mo is the level signal output of the single chip microcomputer, when the output is high level, the voltage of a point A reaches the conduction voltage of a triode KT1, the emitter and the collector of the triode are conducted, a resistor R3 is in short circuit with the ground, so that the circuits of the resistor R3 and the resistor R4 have current circulation, and the R3 and the R4 have respective voltage drops, the voltage of a point B is the voltage drop borne by the R3, the KT2 selects a P-MOS, after the R4 bears the voltage drop, the G pole and the S pole of the MOS tube form negative voltage, when the voltage reaches the conduction threshold value of the MOS tube, the emitter and the source of the MOS tube are conducted, VCC is loaded on a diode RD1 to form a loop together with resistors R5, R6 and R7, mi is the acquisition level of the single chip microcomputer, and after the KT2 is conducted, the voltage drop is formed on the R7, mi is acquired at high level and is input to the single chip microcomputer as logic '1';
when the mo output is low level, the voltage at the point a is zero, the conduction voltage of the transistor KT1 is not reached, the emitter and the collector of the transistor cannot be conducted, and R3 is not connected to GND, so that no current flows through the circuits of the resistor R3 and R4, the voltage value at the point B is equal to the voltage value of VCC, and no voltage drop is formed at the two ends of R4, so that the negative voltage is not formed between the G pole and the S pole of the MOS transistor, the conduction threshold of the MOS transistor cannot be reached, the emitter and the source of the MOS transistor cannot be conducted, and VCC is not loaded on RD1, but because the switching value is high level, a path is still formed with the resistors R5, R6, and R7 to form current, the voltage drop mi formed on the resistor R7 is collected to high level, and is input to the single chip microcomputer to be logic '1';
when the switching value is in a low level state, the circuit acquires the logic as follows:
firstly, mo is the level signal output of the single chip microcomputer, when the output is high level, the voltage of a point A reaches the conduction voltage of a triode KT1, the emitter and the collector of the triode are conducted, a resistor R3 is in short circuit with the ground, so that the current flows through the circuits of the resistor R3 and the resistor R4, the voltage of the point B is the voltage drop borne by the resistor R3, KT2 selects a P-MOS, after the voltage drop borne by the resistor R4, the G pole and the S pole of the MOS tube form negative voltage, when the voltage reaches the conduction threshold of the MOS tube, the emitter and the source of the MOS tube are conducted, VCC is loaded on a diode RD1, but because the switching value is low level, the potential of the point C is zero, VCC forms a loop with the diode RD1 and a resistor R5, the resistors R6 and R7 do not flow current, mi acquires the low level, and inputs the logic '0' to the single chip microcomputer;
when the mo output is low level, the voltage at the point A is zero, the conduction voltage of the transistor KT1 is not reached, the emitter and the collector of the transistor cannot be conducted, and the R3 is not connected to GND (ground), so that no current flows through the circuits of the resistor R3 and the resistor R4, the voltage value at the point B is equal to the voltage value of VCC, no voltage drop is formed at two ends of the R4, so that negative voltage is not formed between the G pole and the S pole of the MOS tube, the conduction threshold of the MOS tube cannot be reached, the emitter and the source of the MOS tube cannot be conducted, VCC is not loaded on the RD1, no current flows through the resistors R5, R6 and R7, the level acquired by mi is equal to GND, and the input to the singlechip is logic '0'.
The above state of identifying the switching value according to the logic is shown in table 1:
TABLE 1
Although the invention herein has been described with reference to particular embodiments, it is to be understood that these embodiments are merely illustrative of the principles and applications of the present invention. It is therefore to be understood that numerous modifications may be made to the illustrative embodiments and that other arrangements may be devised without departing from the spirit and scope of the present invention as defined by the appended claims. It should be understood that various dependent claims and the features described herein may be combined in ways different from those described in the original claims. It is also to be understood that features described in connection with individual embodiments may be used in other described embodiments.
Claims (1)
1. A three-state switching value identification system is characterized by comprising resistors R1-R7, a triode KT1, a field effect transistor KT2 and a diode RD1;
one end of the resistor R7 is connected with one end of the resistor R6, and the other end of the resistor R7 is connected with GND;
the connecting end of the resistor R6 and the resistor R7 is used as a mi input end;
the other end of the resistor R6 is connected with one end of a resistor R5, the other end of the resistor R5 is connected with the cathode of a diode RD1, the anode of the diode RD1 is connected with the drain electrode of a field-effect tube KT2, the source electrode of the field-effect tube KT2 is connected with one end of a resistor R4, the source electrode of the field-effect tube KT2 is simultaneously connected with a power supply VCC, the grid electrode of the field-effect tube KT2 is simultaneously connected with the other end of the resistor R4 and one end of a resistor R3, the other end of the resistor R3 is connected with the collector electrode of a triode KT1, the emitter electrode of the triode KT1 and one end of the resistor R2 are simultaneously connected with GND, and the base electrode of the triode KT1 is simultaneously connected with the other end of the resistor R2 and one end of the resistor R1;
the other end of the resistor R1 is used as an mo output end;
the connecting end of the resistor R5 and the resistor R6 is used as a switching value identification output end;
identifying the switching value identification state of the switching value identification output end according to different logics of the mi input end and the mo output end;
the switching value recognition state includes: a suspended state, a high level state and a low level state;
the switching value recognition state of the switching value recognition output end according to different logics of the mi input end and the mo output end specifically comprises the following steps:
in a period range, when the mo output level is 10 and the mi input level is 10, the switching value identification state is a suspension state;
in a period range, when the mo output level is 10 and the mi input level is 11, the switching value identification state is a high level state;
in one cycle, when the mo output level is 10 and the mi input level is 00, the switching amount discrimination state is a low level state.
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| TWI337000B (en) * | 2007-12-11 | 2011-02-01 | Rdc Semiconductor Co Ltd | Tri-state i/o port |
| JP5574845B2 (en) * | 2010-06-22 | 2014-08-20 | 株式会社東芝 | Power converter |
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| CN207851546U (en) * | 2017-10-30 | 2018-09-11 | 北京航天万源科技有限公司 | A kind of I/O switch amount expanded circuit |
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| CN203133188U (en) * | 2012-11-09 | 2013-08-14 | 苏州海格新能源汽车电控系统科技有限公司 | A circuit for detecting three states of an automobile switch signal value |
| CN104808561A (en) * | 2015-04-25 | 2015-07-29 | 航天科技控股集团股份有限公司 | Multi-state switch state collection device and method |
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