CN112803871B

CN112803871B - Motor driving circuit and method for controlling the same

Info

Publication number: CN112803871B
Application number: CN202110392569.7A
Authority: CN
Inventors: 边疆; 张适
Original assignee: Shenzhen Tuoer Microelectronics Co Ltd
Current assignee: Shenzhen Tuoer Microelectronics Co Ltd
Priority date: 2021-04-13
Filing date: 2021-04-13
Publication date: 2021-07-30
Anticipated expiration: 2041-04-13
Also published as: CN112803871A

Abstract

The application relates to the field of circuits, and provides a motor driving circuit, which comprises: a first logic module; the delay circuit is connected with the output end of the first logic module; the voltage stabilizer is respectively connected with the input voltage and the output end of the delay circuit; the motor control module obtains power supply through the voltage stabilizer; the delay circuit is used for: when the first logic module outputs a first control signal, the time delay circuit starts timing, and the first control signal is used for triggering the time delay circuit to close the voltage stabilizer; when the timing time does not exceed the time threshold, triggering a detection module to detect a first current input to the voltage stabilizer; when the timing time exceeds a time threshold, the delay circuit closes the voltage stabilizer based on the first control signal, the trigger detection module detects a second current input to the voltage stabilizer, and the first current and the second current are used for determining the working state of the voltage stabilizer, so that the low power consumption state of the motor driving circuit during the standby state of the motor can be realized.

Description

Motor driving circuit and method for controlling the same

Technical Field

The present disclosure relates to the field of circuits, and more particularly, to a motor driving circuit and a method of controlling the motor driving circuit.

Background

As is well known, motor driving technology has been widely used in various fields, such as automobile brakes, various electric appliances, transmissions, and the like. With the diversification of the application field of the motor driving technology, the structure of the motor driving circuit is more and more complex, so that the standby power consumption of the motor driving circuit is higher and higher. In practical applications, although low power consumption in the motor standby state can be achieved by turning off other operating modules in the motor driving circuit when the motor stops operating (i.e., is in standby), technicians cannot determine whether the driving circuit completely turns off other operating modules at all when the motor is in standby. In many cases, the motor driving circuit cannot turn off other working modules according to the motor standby instruction due to external environment interference, so that the motor driving circuit is still in a high power consumption state when the motor is in a standby state. Therefore, how to realize the low power consumption state of the motor driving circuit when the motor is in standby is a problem which needs to be solved urgently at present.

Disclosure of Invention

The present application provides a motor driving circuit and a method of controlling the same, which can realize a low power consumption state of the motor driving circuit when a motor is in a standby state.

In a first aspect, there is provided a motor driving circuit comprising:

a first logic module for outputting a first control signal based on an input signal;

the delay circuit is connected with the output end of the first logic module;

the voltage stabilizer is respectively connected with the input voltage and the output end of the delay circuit;

the motor control module is connected with the voltage stabilizer and obtains power supply through the voltage stabilizer;

the delay circuit is configured to:

when the first logic module outputs a first control signal, the time delay circuit starts timing, and the first control signal is used for triggering the time delay circuit to close the voltage stabilizer;

when the timing time does not exceed the time threshold, triggering a detection module to detect a first current input to the voltage stabilizer;

when the timing time exceeds the time threshold, the time delay circuit turns off the voltage stabilizer based on the first control signal, and triggers the detection module to detect a second current input to the voltage stabilizer, wherein the first current and the second current are used for determining the working state of the voltage stabilizer.

Optionally, the motor driving circuit further includes a current mirror module, which is used for connecting the output end of the delay circuit and the input end of the voltage stabilizer.

The current mirror module outputs or turns off a bias current based on an output result of the delay circuit, and the bias current can accurately control the voltage stabilizer to provide stable working voltage for the motor control module.

Optionally, the first control signal is a low level signal, and the delay circuit includes: the timing module is connected with the output end of the first logic module and used for starting timing according to the first control signal; the first OR gate is respectively connected with the output end of the first logic module and the output end of the timing module; the inverter is connected with the output end of the first OR gate;

when the timing time of the timing module does not exceed the time threshold, the timing module outputs a high level signal, the first or gate outputs a high level signal, the inverter converts the high level signal output by the first or gate into a low level signal, and the low level signal output by the inverter is used for starting the voltage stabilizer;

when the timing time of the timing module exceeds the time threshold, the timing module outputs a low level signal, the first OR gate outputs a low level signal, the inverter converts the low level signal output by the first OR gate into a high level signal, and the high level signal output by the inverter is used for closing the voltage stabilizer.

Optionally, the motor control module comprises: the circuit protection module is connected with the output end of the voltage stabilizer and used for detecting the state of the motor driving circuit;

the band-gap reference module is respectively connected with the output end of the voltage stabilizer and the input end of the circuit protection module and is used for controlling the start or the stop of the circuit protection module;

the second logic module is connected with the output end of the circuit protection module;

the driving module is connected with the output end of the second logic module;

when the signal output by the circuit protection module indicates that the motor driving circuit is in a safe working state, the second logic module controls the driving module to output a motor control signal; when the signal output by the circuit protection module indicates that the motor driving circuit is in an abnormal working state, the second logic module does not control the driving module to output a motor control signal.

The circuit protection module can effectively detect some abnormal conditions occurring in the working process of the motor driving circuit and output the abnormal conditions to the second logic module, and at the moment, the second logic module indicates the driving module not to output the motor control signal, so that the condition that the motor fails is avoided. Therefore, under the matched work of the circuit protection module and the second logic module, the driving module can drive the motor to work safely and stably.

Optionally, the circuit protection module includes an under-voltage locking module, and is connected to the input end of the delay circuit, and the delay circuit is specifically configured to: when the signal output by the under-voltage locking module indicates that the motor driving circuit is in a normal working state, the delay circuit starts to work.

When the motor driving circuit is powered on, the under-voltage locking module starts to detect whether the motor driving circuit is in an under-voltage state, and if the under-voltage locking module detects that the motor driving circuit is in the under-voltage state, the situation that each module of the motor driving circuit cannot work normally is shown; if the undervoltage locking module detects that the motor driving circuit is in a normal voltage state, the undervoltage locking module indicates that each module of the motor driving circuit can work normally, at the moment, the undervoltage locking module transmits a detection result of the normal voltage state to the delay circuit, and the delay circuit starts to work. Therefore, the undervoltage locking module detects the voltage state of the motor driving circuit to ensure that the delay circuit can work normally.

In a second aspect, a method for controlling the motor driving circuit is provided, and is applied to the motor driving circuit comprising any one of the first aspect.

According to the motor driving circuit and the method for controlling the motor driving circuit, when input signals are all low (namely when the motor is in standby), the motor control module is turned off after preset delay time (namely preset time threshold), so that the power consumption of the motor driving circuit is reduced, and before and after the motor control module is powered off, the current flowing through the voltage stabilizer can change, so that whether the motor control module is powered off or not in standby can be judged by utilizing the characteristic. When the motor standby command is transmitted to the first logic module, the first logic module outputs a first control signal (e.g., a low level signal). The time delay circuit starts timing work when receiving the first control signal, and when the timing time does not exceed a time threshold, the detection module starts to detect a first current input to the voltage stabilizer based on a signal input by the time delay circuit; when the timing time exceeds the time threshold, the detection module detects the second current input to the voltage stabilizer again. The motor driving circuit determines the working state of the voltage stabilizer according to the first current and the second current, namely determines whether the voltage stabilizer provides stable working voltage for the motor control module or not, wherein when the first current is larger than the second current, the voltage stabilizer stops providing the stable working voltage for the motor control module, which indicates that the motor driving circuit successfully controls the motor control module to stop working, and the motor control module is in a low power consumption state; when the first current is less than or equal to the second current, the voltage stabilizer still provides stable working voltage for the motor control module, which indicates that the motor driving circuit does not successfully turn off the motor control module, thereby causing the motor driving circuit to be still in a high power consumption state. Compared with a motor driving circuit without a motor standby power consumption detection function, the motor driving circuit can accurately detect the low power consumption state of the motor driving circuit when the motor is in standby.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments or the prior art descriptions will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive exercise.

FIG. 1 is a schematic diagram of a motor driving circuit according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of a motor driving circuit according to an embodiment of the present invention;

FIG. 3 is a schematic diagram of a delay circuit according to an embodiment of the present invention;

FIG. 4 is a diagram illustrating an output clock signal T of the timing module according to an embodiment of the present invention;

fig. 5 is a schematic flow chart illustrating the operation principle of the motor driving circuit according to the embodiment of the present invention.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not to be construed as limiting the invention. In addition, only a part, not all of the structures related to the present invention are shown in the drawings.

Fig. 1 is a schematic structural diagram of a motor driving circuit according to an embodiment of the present invention, as shown in fig. 1, the motor driving circuit includes:

a first logic module 101 for outputting a first control signal based on an input signal;

the delay circuit 102 is connected with the output end of the first logic module 101;

the voltage stabilizer 103 is respectively connected with the input voltage and the output end of the delay circuit 102;

the motor control module 104 is connected with the voltage stabilizer 103 and obtains power supply through the voltage stabilizer 103;

the delay circuit 102 is configured to:

when the first logic module 101 outputs a first control signal, the circuit 102 starts timing, and the first control signal is used for triggering the delay circuit 102 to turn off the voltage stabilizer 103;

when the timing time does not exceed the time threshold, the trigger detection module 105 detects a first current input to the voltage regulator 103;

when the timing time exceeds the time threshold, the delay circuit 102 turns off the voltage regulator 103 based on the first control signal, and the trigger detection module 105 detects a second current input to the voltage regulator 103, where the first current and the second current are used to determine an operating state of the voltage regulator 103.

Since the current flowing through the voltage stabilizer 103 changes before and after the motor control module 104 is powered off, this feature can be used to determine whether the motor control module 104 is powered off during the standby state of the motor.

Illustratively, when a motor standby command is transmitted to the first logic module 101, the first logic module 101 processes the motor standby command and outputs a first control signal, wherein the first logic module 101 includes an input end and an output end, the input end of the first logic module 101 is used for receiving a motor action command (e.g., a motor standby command), and the output end of the first logic module 101 is connected to the delay circuit 102 for outputting the first control signal, and the first control signal includes a high level signal or a low level signal. Further, the first logic block 101 may be an or gate.

For example, as shown IN FIG. 2, the first logic block 101 is an OR gate (i.e., a second OR gate (OR 2)), the OR2 having two inputs denoted IN1 and IN2, respectively, for controlling various output states of the motor; for example, when the motor is rotated forward by 01, rotated backward by 10, and kept standby by 00, 0 is a low signal and 1 is a high signal, the motor is kept IN a standby state when both the inputs IN1 and IN2 are low signals, i.e., 0 is input IN1 and 0 is input IN2, and the OR2 is output as a low signal (i.e., the first control signal).

Through setting up first logic module 101 in this application, can make accurate judgement to the motor drive of multichannel input, output low level when its input is the low level and as first control signal for turn off the stabiliser, make the motor get into low-power consumption standby mode.

The first logic module 101 transmits the output first control signal to the delay circuit 102, and starts timing operation when the delay circuit 102 receives the first control signal. The delay circuit 102 includes an input terminal and an output terminal, the input terminal of the delay circuit 102 is configured to receive a first control signal, a result output by a first output terminal of the delay circuit 102 is configured to control the operation of the voltage regulator 103, and a result output by a second output terminal of the delay circuit 102 is configured to control the detection module 105 to detect a current input to the voltage regulator 103. For example, as shown in fig. 2, the delay circuit 102 includes 3 inputs and 2 outputs, wherein the output input to the detection module 105 is not shown in the figure, referring to fig. 3, a first input terminal of the delay circuit 102 is connected to the output terminal of the first logic module 101, a second input terminal of the delay circuit 102 is connected to the output terminal of the under-voltage locking module 10411, a third input terminal of the delay circuit 102 is connected to the output terminal of the voltage regulator 103, and a first output terminal of the delay circuit 102 is connected to the first input terminal of the voltage regulator 103. It should be noted that if a black circle solid point is formed at the intersection of the cross lines in fig. 2, the black circle solid point indicates that the cross lines are connected at this point; if no black solid circle is formed at the intersection of the cross lines, it indicates that the cross lines are not connected at the intersection.

Alternatively, as shown in fig. 3, the delay circuit 102 includes a timing module, OR a gate (i.e., a first OR gate (OR 1)), and an inverter, wherein the timing module includes two inputs and one output, a first input of the timing module is connected to the output of the first logic module 101, a second input of the timing module is connected to the output of the voltage regulator 103, an output of the timing module is connected to a second input of the first OR gate (OR 1), and an output of the timing module is used as a second output of the delay circuit 102 and is also connected to an input of a detection module 105, and in an embodiment of the present application, the timing module is configured to start timing when the output first control signal is low level, the timing time of the timing module outputs high level within a time threshold, the detection module 105 is configured to detect the current input to the voltage regulator 103 according to the high level output by the timing module, obtaining a first current; the timing module outputs a low level when the timing time exceeds a time threshold, the detection module 105 detects the current currently input to the voltage regulator 103 according to the low level output by the timing module to obtain a second current, and the low level output by the timing module outputs a high level signal after passing through the OR1 and the inverter, and the high level signal is used for turning off the voltage regulator 103.

For example, when the timing module receives the first control signal, the timing module outputs a clock signal T as shown in fig. 4, where the abscissa T in fig. 4 represents time, 0 represents time 0 (i.e., the time when the timing module starts timing), and T represents time₁Represents t₁Time of day; ordinate 1 represents high level, and ordinate 0 represents low level; as can be seen from fig. 4, the high level signal is output from time 0 to time t1, and the low level signal is output after time t 1; time 0 to t₁The time interval of the time is called a time threshold, denoted Δ t, where t₁May be 1ms or 2ms, where for t₁The value is not limited, e.g., t₁Is 1ms, the time threshold Δ t is 1ms (Δ)t =1ms-0ms =1 ms). When the timing time of the timing module does not exceed the time threshold (for example, within 1 ms), the timing module outputs a high level signal, where the high level signal is used to turn on the voltage regulator 103 or keep the voltage regulator 103 in an on state; when the timing time of the timing module exceeds a time threshold (e.g., exceeds 1 ms), the timing module outputs a low level signal, which is used to turn off the voltage regulator 103.

The OR gate (i.e., the first OR gate (OR 1)) of the delay circuit 102 includes two inputs and one output, a first input terminal of the first OR gate (OR 1) is connected to the output terminal of the first logic module 101, and a second input terminal of the first OR gate (OR 1) is connected to the output terminal of the timing module; the inverter comprises an input and an output, the input of the inverter is connected to the output of the first OR gate (OR 1), and the output of the inverter is connected to the first input of the regulator 103.

For example, 00 denotes a motor standby command, the time threshold is 1ms, when the motor standby command is transmitted to the first logic module 101 (i.e. IN1 inputs 0, IN2 inputs 0), the first logic module outputs a first control signal (i.e. 0) to the delay circuit 102, the timing module IN the delay circuit 102 receives the first control signal and starts to output a clock signal T as shown IN fig. 4, when the timing time of the timing module does not exceed the time threshold (i.e. within 1 ms), the clock signal T output by the timing module is a high level signal, the high level signal is used to turn on the voltage regulator 103, and when the voltage regulator 103 is currently IN the on state, the high level signal is used to keep the voltage regulator 103 IN the on state, which includes the following specific procedures: the high level signal triggers the detection module 105 to detect the current (i.e. the first current) at the second input terminal of the voltage regulator 103, and at the same time, the high level signal (i.e. 1) and the first control signal (i.e. 0) output the high level signal (i.e. 1) through an or gate (e.g. a first or gate), and the inverter converts the high level signal output by the or gate into a low level signal, which is input to the voltage regulator 103, and when the voltage regulator 103 receives the low level signal, a stable operating voltage is normally provided for the motor control module 104.

When the timing time of the timing module exceeds the time threshold (i.e. exceeds 1 ms), the delay circuit 102 turns off the voltage regulator 103 based on the first control signal, which is as follows: the first logic module outputs a first control signal (i.e. 0) to the delay circuit 102, and when the timing time of the timing module reaches or exceeds the time threshold, the clock signal T output by the timing module changes from a high level to a low level signal, and the low level signal is used for turning off the voltage regulator 103, which includes the following specific processes: the low level signal triggers the detection module 105 to detect the second input current (i.e. the second current) of the voltage regulator 103 again, and at the same time, the low level signal (i.e. 0) and the first control signal (i.e. 0) output the low level signal (i.e. 0) through an or gate (e.g. a first or gate), and the inverter converts the low level signal output by the or gate into a high level signal, which is input to the voltage regulator 103, and when the voltage regulator 103 receives the high level signal, the supply of the stable operating voltage to the motor control module 104 is stopped.

For another example, the time threshold is 1ms, the motor standby command is represented by 11, the first control signal is 1 (i.e., a high level signal), at this time, the delay circuit 102 includes a timing module, an and gate and a phase inverter, where the timing module includes two inputs and one output, a first input of the timing module is connected to the output of the first logic module 101, a second input of the timing module is connected to the output of the voltage stabilizer 103, an output of the timing module is connected to a second input of the and gate, a first input of the and gate is connected to the output of the first logic module 101, an output of the and gate is connected to the input of the phase inverter, and an output of the phase inverter is connected to the first input of the voltage stabilizer 103. In addition, the output end of the timing module is further connected to the input end of the detection module 105, the timing module is configured to start timing according to the first control signal, and the detection module 105 is configured to detect the current input to the voltage regulator 103 according to the clock signal T output by the timing module.

When the timing time of the timing module does not exceed the time threshold (i.e., within 1 ms), the clock signal T output by the timing module is a high level signal, the high level signal is used to turn on the voltage regulator 103, and when the voltage regulator 103 is currently in an on state, the high level signal is used to keep the voltage regulator 103 in the on state, which includes the following specific processes: the high level signal trigger detection module 105 detects a current (i.e. a first current) at a second input terminal of the voltage regulator 103, and at the same time, the high level signal (i.e. 1) and a first control signal (i.e. 1) output a high level signal (i.e. 1) through an and gate, and an inverter converts the high level signal output by the and gate into a low level signal, and the low level signal is input to the voltage regulator 103; when the voltage regulator 103 receives the low level signal, it normally provides a stable operating voltage for the motor control module 104.

When the timing module exceeds the time threshold (i.e. exceeds 1 ms) at the timing time, the delay circuit 102 turns off the voltage regulator 103 based on the first control signal, which is as follows: the first logic module outputs a first control signal (i.e. 1) to the delay circuit 102, and when the timing time of the timing module reaches or exceeds a time threshold, the clock signal T output by the timing module changes from a high level to a low level signal, and the low level signal is used for turning off the voltage regulator 103, which includes the following specific processes: the low level signal trigger detection module 105 detects the second input end current (i.e. the second current) of the voltage stabilizer 103 again, the low level signal and the first control signal (i.e. the high level signal) output the low level signal through the and gate, and the inverter converts the high level signal output by the and gate into the high level signal, the high level signal is input to the voltage stabilizer 103, and when the voltage stabilizer 103 receives the high level signal, the supply of the stable working voltage to the motor control module 104 is stopped.

The motor driving circuit determines whether the voltage stabilizer 103 provides a stable working voltage for the motor control module 104 according to the first current and the second current, and if the first current is greater than the second current, it indicates that the voltage stabilizer 103 has stopped providing a stable working voltage for the motor control module 104, that is, the motor driving circuit has successfully controlled the motor control module 104 to stop working, and at this time, the motor control module 104 is in a standby low power consumption state; if the first current is less than or equal to the second current, it means that the voltage regulator 103 is still providing a stable operating voltage for the motor control module 104, i.e. the motor driving circuit fails to turn off the motor control module 104, and at this time, the motor driving circuit is still in a normal operating state (i.e. a high power consumption state). Therefore, compared with the motor driving circuit without the motor standby power consumption detection function, the motor driving circuit can accurately detect the low power consumption state of the motor driving circuit when the motor is in standby.

The voltage regulator 103 includes an input terminal and an output terminal for providing a stable operating voltage to the delay circuit 102. The input end of the voltage stabilizer is connected with the output end of the delay circuit, and the output end of the voltage stabilizer 103 is connected with the third input end of the delay circuit. For example, when the voltage regulator 103 is a voltage regulator with a built-in reference power supply for supplying a bias current and a bias voltage to internal modules of the voltage regulator 103, the signal output from the delay circuit 102 is input as an enable signal to the control voltage regulator 103 for controlling the on and off of the voltage regulator 103.

The Voltage stabilizer 103 includes two inputs and one output, a first Input end of the Voltage stabilizer 103 is connected to an output end of the delay circuit 102 (i.e., a first Input end of the Voltage stabilizer 103 is connected to an output end of the inverter), a second Input end of the Voltage stabilizer 103 is connected to an Input Voltage (Vin), and an output end of the Voltage stabilizer 103 is respectively connected to an Input end of the motor control module 104 and a second Input end of the timing module.

For another example, when the voltage regulator 103 is a voltage regulator without a built-in reference power supply, the motor driving circuit further includes a current mirror module 106, and the current mirror module 106 is configured to convert the output result of the delay circuit module 102 into a bias current of the voltage regulator 103. For example, the current mirror module 106 processes the output result of the delay circuit 102 to obtain a bias current (bias current), and it should be noted that, in fig. 2, the bias current output by the current mirror module 106 is denoted by IBIAS, and the bias current can accurately control the voltage regulator 103 to provide a stable operating voltage to the motor control module 104, as shown in fig. 2 and fig. 3, the current mirror module 106 includes two inputs and one output, a first input end of the current mirror module 106 is connected to the output end of the inverter, and a second input end of the current mirror module 106 is connected to the output end of the voltage regulator 103. For example, the voltage Regulator 103 is a Low Dropout Regulator (LDO), and the LDO includes two inputs and one output, a first input terminal of the voltage Regulator 103 is connected to the output terminal of the current mirror module 106, a second input terminal of the voltage Regulator 103 is connected to Vin, and output terminals of the voltage Regulator 103 are respectively connected to the input terminal of the motor control module 104, the second input terminal of the current mirror module 106, and the second input terminal of the timing module, as shown in fig. 2 and fig. 3. For example, the current mirror module 106 receives the output result (e.g., a high level signal or a low level signal) from the delay module 102 and processes the output result to output a bias current, which can accurately control the voltage regulator 103 to provide a stable operating voltage to the motor control module 104.

In addition, the motor control module 104 includes a circuit protection module 1041, connected to the output terminal of the voltage regulator 103, for detecting the state of the motor driving circuit;

the band gap reference module 1042 is connected to the output end of the voltage regulator 103 and the input end of the circuit protection module 1041, respectively, and is configured to control the circuit protection module 1041 to start or close;

the second logic module 1043 connected to the output end of the circuit protection module 1042;

a driving module 1044 connected to the output end of the second logic module 1043;

when the signal output by the circuit protection module 1041 indicates that the motor driving circuit is in a safe working state, the second logic module 1043 controls the driving module 1044 to output a motor control signal;

when the signal output by the circuit protection module 1041 indicates that the motor driving circuit is in an abnormal operating state, the second logic module 1043 does not control the driving module 1044 to output the motor control signal.

Illustratively, as shown in fig. 2, the circuit protection module 1041 includes an under-voltage locking module 10411 for detecting whether the motor driving circuit is in an under-voltage state, where the under-voltage locking module 10411 includes three inputs and one output, a first input of the under-voltage locking module 10411 is connected to the output of the voltage regulator 103, a second input of the under-voltage locking module 10411 is connected to the input voltage (Vin), a third input of the under-voltage locking module 10411 is connected to the output of the bandgap reference module 1042, and an output of the under-voltage locking module 10411 is respectively connected to the third input of the delay circuit 102 and the input of the second logic module 1043.

For example, if the under-voltage locking module 10411 detects that the motor driving circuit is in an under-voltage state and transmits a detection result of the under-voltage state to the delay circuit 102, the delay circuit 102 cannot be normally turned on, if the under-voltage locking module 10411 detects that the motor driving circuit is in the under-voltage state and transmits the detection result of the under-voltage state to the second logic module 1043, the second logic module 1043 controls the driving module 1044 not to output the motor control signal according to the detection result, and at this time, the motor does not perform any action.

For another example, if the under-voltage locking module 10411 detects that the motor driving circuit is in a normal voltage state and transmits a detection result of the normal voltage state to the delay circuit 102, the delay circuit 102 may be normally turned on to operate, and thus it can be seen that the under-voltage locking module 10411 may ensure that the delay circuit 102 operates under a normal voltage; if the under-voltage locking module 10411 detects that the motor driving circuit is in a normal voltage state, and transmits a detection result of the normal voltage state to the second logic module 1043, the second logic module 1043 controls the driving module 1044 to output a motor control signal according to the detection result, and at this time, the motor executes a corresponding action (for example, forward rotation of the motor) according to the motor control signal.

Optionally, the circuit protection module 1041 further comprises at least one of an overvoltage protection module 10412, an over-temperature protection module 10413 and an overcurrent protection module 10414. For example, the circuit protection module 1041 includes an overvoltage protection module 10412, as shown in fig. 2, the overvoltage protection module 10412 includes three inputs and one output for detecting whether the motor driving circuit is in an overvoltage state, wherein a first input terminal of the overvoltage protection module 10412 is connected to the output terminal of the voltage regulator 103, a second input terminal of the overvoltage protection module 10412 is connected to the input voltage (Vin), and a third input terminal of the overvoltage protection module 10412 is connected to the second output terminal of the bandgap reference module 1042. For example, if the overvoltage protection module 10412 detects that the motor driving circuit is in an overvoltage state and outputs a detection result of the overvoltage state to the second logic module 1043, the second logic module 1043 controls the driving module 1044 not to output the motor control signal according to the detection result, and at this time, the motor does not perform any action. For another example, if the overvoltage protection module 10412 detects that the motor driving circuit is in a normal voltage state and outputs a detection result of the normal voltage state to the second logic module 1043, the second logic module 1043 controls the driving module 1044 to output a motor control signal according to the detection result, and at this time, the motor performs a corresponding action (for example, motor reverse rotation) according to the motor control signal.

Illustratively, the circuit protection module 1041 includes an overheating protection module 10413, and as shown in fig. 2, the overheating protection module 10413 includes two inputs and one output for detecting whether the motor driving circuit is in an overheating state, wherein a first input of the overheating protection module 10413 is connected to the output of the voltage regulator 103, and a second input of the overheating protection module 10413 is connected to the third output of the bandgap reference module 1042. For example, if the overheat protection module 10413 detects that the motor driving circuit is in an overheat state and outputs the detection result of the overheat state to the second logic module 1043, the second logic module 1043 controls the driving module 1044 not to output the motor control signal according to the detection result, and at this time, the motor does not perform any action. For another example, if the overheating protection module 10413 detects that the motor driving circuit is in a normal temperature state and outputs the detection result of the normal temperature state to the second logic module 1043, the second logic module 1043 controls the driving module 1044 to output the motor control signal according to the detection result, and at this time, the motor performs a corresponding action (for example, forward rotation of the motor) according to the motor control signal.

Illustratively, the circuit protection module 1041 includes an overcurrent protection module 10414, as shown in fig. 2, the overcurrent protection module 10414 includes two inputs and one output, and is configured to detect whether the motor driving circuit is in an overcurrent state, where a first input terminal of the overcurrent protection module 10414 is connected to the output terminal of the voltage regulator 103, and a second input terminal of the overcurrent protection module 10414 is connected to the fourth output terminal of the bandgap reference module 1042. For example, if the over-current protection module 10414 detects that the motor driving circuit is in an over-current state and outputs a detection result of the over-current state to the second logic module 1043, the second logic module 1043 controls the driving module 1044 not to output the motor control signal according to the detection result, and at this time, the motor does not perform any action. For another example, if the over-current protection module 10413 detects that the motor driving circuit is in a normal current state and outputs the detection result of the normal current state to the second logic module 1043, the second logic module 1043 controls the driving module 1044 to output the motor control signal according to the detection result, and at this time, the motor performs a corresponding action (for example, motor reverse rotation) according to the motor control signal.

The bandgap reference module 1042 is configured to provide a bias current signal to the circuit protection module 1041 and the second logic module 1043, where the bias current signal is used to control the circuit protection module 1041 and the driving module 1044 to operate, as shown in fig. 2, the bandgap reference module 1042 includes one input and five outputs, where a first input of the bandgap reference module 1042 is connected to an output of the voltage regulator 103 and is configured to receive the stable operating voltage output by the voltage regulator 103, and the five bias current signals output by the bandgap reference module 1042 are respectively represented by IBIAS1, IBIAS2, IBIAS3, IBIAS4, and IBIAS5, and a first output of the bandgap reference module 1042 outputs a first bias current signal (IBIAS 1), and the IBIAS1 is configured to control the start and the close of the under-voltage lock module 10411; a second output terminal of the bandgap reference module 1042 outputs a second bias current signal (IBIAS 2), the IBIAS2 is used for controlling the overvoltage protection module 10412 to be turned on and off; a third output terminal of the bandgap reference module 1042 outputs a third bias current signal (IBIAS 3), the IBIAS3 is configured to control the overheating protection module 10413 to be turned on and off; a fourth output terminal of the bandgap reference module 1042 outputs a fourth bias current signal (IBIAS 4), the IBIAS4 is configured to control the overcurrent protection module 10414 to turn on and off; a fifth output terminal of the bandgap reference module 1042 outputs a fifth bias current signal (IBIAS 5), and IBIAS5 is used to control the driving module 1044 to operate normally. For example, when the voltage regulator 103 outputs a stable operating voltage to the bandgap reference module 1042, the bandgap reference module 1042 starts to operate and outputs a bias current signal, for example, the bandgap reference module 1042 outputs a second bias current signal (IBIAS 2), and the IBIAS2 enables the overvoltage protection module 10412 to start detecting whether the motor driving circuit is in an overvoltage state. For another example, the bandgap reference module 1042 outputs a fifth bias current signal (IBIAS 5), and IBIAS5 is used to start the driving module 1044.

The second logic module 1043 includes an input end and an output end, and is configured to receive a detection result of the protection circuit module 1041, and output an instruction signal for controlling the driving module 1044 to operate after processing the detection result, where the instruction signal is used to control whether the driving module 1044 outputs a motor control signal. For example, as shown in fig. 2, the protection circuit module 1041 includes an under-voltage lockout module 10411, an over-voltage protection module 10412, an over-temperature protection module 10413 and an over-current protection module 10414, the second logic module 1043 includes four inputs and one output, a first input end of the second logic module 1043 is connected to an output end of the under-voltage lockout module 10411, a second input end of the second logic module 1043 is connected to an output end of the over-voltage protection module 10412, a third input end of the second logic module 1043 is connected to an output end of the over-temperature protection module 10413, a fourth input end of the second logic module 1043 is connected to an output end of the over-current protection module 10414, and an output end of the second logic module 1043 is connected to a first input end of the driving module 1044.

For example, if the second logic module 1043 receives a detection result of the overvoltage protection module 10412 outputting that the motor driving circuit is in an overvoltage state, the detection result is processed and an instruction signal is output, the instruction signal instructs the driving module 1044 not to output a motor control signal, and at this time, the motor does not perform any action; if the second logic module 1043 receives the detection result of the overvoltage protection module 10412 that the motor driving circuit is in the normal voltage state, the detection result is processed and an instruction signal is output, the instruction signal instructs the driving module 1044 to output a motor control signal, and at this time, the motor executes a corresponding action (for example, the motor rotates forward) according to the motor control signal. It should be understood that the operation principles of the second logic module 1043 and the under-voltage lockout module 10411, the second logic module 1043 and the over-temperature protection module 10413, and the second logic module 1043 and the over-current protection module 10414 are similar to the operation principles of the second logic module 1043 and the over-voltage protection module 10412, and are not described herein again.

The driving module 1044 includes an input end and an output end, and is configured to receive the instruction signal output by the second logic module 1043, and further determine whether to output a motor control signal according to the instruction signal, where the motor control signal is used to control the motor to execute actions of different instructions. For example, as shown in fig. 2, the driving module 1044 includes two inputs and one output, where a first input of the driving module 1044 is connected to an output of the second logic module 1043, a second input of the driving module 1044 is connected to a fifth output of the bandgap reference module 1042, and an output of the driving module 1044 is connected to a load (i.e., a motor).

For example, if the driving module 1044 receives the command signal outputted by the second logic module 1043, and the command signal is to prohibit the driving module 1044 from outputting the motor control signal, the driving module 1044 stops outputting the motor control signal, and at this time, the motor does not perform any action. If the driving module 1044 receives the command signal outputted by the second logic module 1043, and the command signal is to allow the driving module 1044 to normally output the motor control signal, the driving module 1044 outputs the motor control signal, and at this time, the motor performs a corresponding action (for example, motor reverse rotation) according to the motor control signal.

For ease of understanding, the overall workflow of the motor drive circuit provided in the present application is exemplified below with reference to fig. 5. The working flow of the motor driving circuit is as follows:

the power supply (Vin) powers on the motor driving circuit (i.e. the motor driving chip, which is called chip for short), i.e. the chip is powered on.

The circuit protection module 1041 detects whether the chip is powered on normally, for example, if the undervoltage locking module 10411 detects that the chip belongs to an undervoltage state, the chip does not work; if the under-voltage locking module 10411 detects that the chip belongs to the normal voltage state, the chip is in the normal working state.

If the chip is in a normal operating state, the first logic module 101 of the chip may receive an external motor command, and the input of the first logic module 101 may be a single channel or multiple channels. For example, the input of the first logic module 101 is two channels, and the chip determines that the two-channel input command controls the motor to perform a corresponding action, for example, the input of the first logic module 101 is a motor standby command, and the chip controls the motor to stop (i.e., to be standby) according to the motor standby command, thereby reducing the power consumption of the chip when the motor is in standby.

For example, when the external motor standby command is transmitted to the first logic module 101, the first logic module 101 outputs a first control signal, the first control signal triggers the delay circuit 102 to start timing, for example, the time threshold is 1ms, and when the timing time does not exceed the time threshold (i.e., within 1 ms), the clock signal T output by the timing module is a high level signal, the high level signal triggers the detection module 105 to detect the first current input to the voltage regulator 103; when the clock signal T output by the timing module is a low level signal after the timing time is 1ms, the low level signal triggers the detection module 105 to detect the second current input to the voltage regulator 103; the chip determines whether the voltage stabilizer 103 provides a stable working voltage for the motor control module 104 according to the first current and the second current, wherein when the first current is greater than the second current, the voltage stabilizer 103 stops providing the stable working voltage for the motor control module 104, which indicates that the chip has successfully controlled the motor control module 104 to stop working, and the motor control module 104 is in a low power consumption standby mode; when the first current is less than or equal to the second current, the voltage regulator 103 still provides a stable operating voltage for the motor control module 104, which indicates that the chip does not successfully turn off the motor control module 104, and the chip is in a normal operating mode.

The above-mentioned embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same. Although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: it is to be understood that modifications may be made to the above-described embodiments, or equivalents may be substituted for some of the features of the embodiments, and such modifications or substitutions are not to be construed as essential to the spirit and scope of the embodiments of the present invention.

Claims

1. A motor drive circuit, comprising:

the delay circuit is connected with the output end of the first logic module;

the delay circuit is configured to:

2. The motor drive circuit of claim 1, further comprising a current mirror module for connecting an output of the delay circuit and an input of the voltage regulator.

3. The motor drive circuit according to claim 1, wherein the first control signal is a low level signal, and the delay circuit comprises:

the timing module is connected with the output end of the first logic module and used for starting timing according to the first control signal;

the first OR gate is respectively connected with the output end of the first logic module and the output end of the timing module;

the inverter is connected with the output end of the first OR gate;

when the timing time of the timing module does not exceed the time threshold, the timing module outputs a high level signal, and the high level signal is used for starting the voltage stabilizer;

when the timing time of the timing module exceeds the time threshold, the timing module outputs a low level signal, and the low level signal is used for closing the voltage stabilizer.

4. The motor drive circuit according to any one of claims 1 to 3, wherein the motor control module includes:

the circuit protection module is connected with the output end of the voltage stabilizer and used for detecting the state of the motor driving circuit;

the driving module is connected with the output end of the second logic module;

when the signal output by the circuit protection module indicates that the motor driving circuit is in a safe working state, the second logic module controls the driving module to output a motor control signal;

when the signal output by the circuit protection module indicates that the motor driving circuit is in an abnormal working state, the second logic module does not control the driving module to output a motor control signal.

5. The motor drive circuit of claim 4, wherein the circuit protection module comprises an under-voltage lockout module coupled to an input of the delay circuit,

the delay circuit is specifically configured to:

when the signal output by the under-voltage locking module indicates that the motor driving circuit is in a normal working state, the delay circuit starts to work.

6. A method of controlling a motor drive circuit, characterized by being applied to a motor drive circuit comprising:

the delay circuit is connected with the output end of the first logic module;

the method comprises the following steps:

7. The method of claim 6, wherein the motor drive circuit further comprises a current mirror module for converting the output of the delay circuit module into a bias current of the voltage regulator.

8. The method of claim 6, wherein the first control signal is a low signal, and wherein the delay circuit comprises:

the inverter is connected with the output end of the first OR gate;

the method further comprises the following steps:

9. The method of any of claims 6 to 8, wherein the motor control module comprises:

the driving module is connected with the output end of the second logic module;

the method further comprises the following steps:

10. The method of claim 9, wherein the circuit protection module comprises an under-voltage lockout module coupled to an input of the delay circuit,

the method further comprises the following steps: