CN112803769B - Dual-output DC-DC converter - Google Patents
Dual-output DC-DC converter Download PDFInfo
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- CN112803769B CN112803769B CN202110206110.3A CN202110206110A CN112803769B CN 112803769 B CN112803769 B CN 112803769B CN 202110206110 A CN202110206110 A CN 202110206110A CN 112803769 B CN112803769 B CN 112803769B
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- 239000003990 capacitor Substances 0.000 claims abstract description 69
- 230000009977 dual effect Effects 0.000 claims description 7
- 239000004065 semiconductor Substances 0.000 claims description 6
- 229910044991 metal oxide Inorganic materials 0.000 claims description 5
- 150000004706 metal oxides Chemical class 0.000 claims description 5
- 230000001105 regulatory effect Effects 0.000 abstract description 4
- 238000000034 method Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 3
- 230000001808 coupling effect Effects 0.000 description 2
- 230000010354 integration Effects 0.000 description 2
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- HBBGRARXTFLTSG-UHFFFAOYSA-N Lithium ion Chemical compound [Li+] HBBGRARXTFLTSG-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 229910001416 lithium ion Inorganic materials 0.000 description 1
- 229910052987 metal hydride Inorganic materials 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 230000002035 prolonged effect Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1582—Buck-boost converters
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
- H02M1/143—Arrangements for reducing ripples from dc input or output using compensating arrangements
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
Abstract
The invention belongs to the technical field of power electronics, and discloses a dual-output DC-DC converter which comprises a voltage source, a first inductor, a boost converter, a buck converter and a first capacitor, wherein the boost converter comprises a first MOS tube, a second inductor, a third inductor and a PWM controller, and the buck converter comprises a PFM controller and a plurality of switch capacitor converters. The two converters of the boost converter and the buck converter are mixed, the respective advantages of the two converters can be well integrated, the respective disadvantages are overcome, two voltage-stabilizing output voltages can be provided from a single-input power supply with large variation, in the structure, the input of the buck converter is regulated by the boost converter, the influence of the variation of a primary input feeder line is avoided, the buck stage always works under the fixed input voltage, and the design is further optimized, and the power is improved.
Description
Technical Field
The invention belongs to the technical field of power electronics, and relates to a double-output DC-DC converter.
Background
Over the past twenty years, the unprecedented development of semiconductor technology has enabled a significant emergence of portable solutions in the consumer electronics and wireless electronics markets, with device dimensions continually shrinking below a few hundred nanometers, enabling various subsystems to be integrated on a single chip, resulting in a compact system-on-a-chip. However, such tightly packaged mixed signal integration on a single silicon die presents several design requirements and related challenges, one of which is the need for multiple on-chip power domains.
Currently, these portable devices are mainly powered by rechargeable batteries, and the output voltage of fully charged batteries drops slowly over time, which puts special demands on the DC-DC converter of the portable battery powered system, for example, requiring good regulation characteristics for widely varying input voltages. Typical nickel-metal hydride batteries generally vary in voltage from 1.5V to 1.0V, with typical lithium ion batteries having a maximum voltage of 4.1V and a minimum voltage of 3.0V. Similarly, the voltage change of lithium titanate or LTO batteries is typically 2.7V to 1.5V. Therefore, the converter must be able to regulate its output voltage for widely varying input supply voltages. On the other hand, in mixed mode and mixed voltage socs, multiple on-chip supply voltages are critical, and the power efficiency of the converter should also be as high as possible to support the extended run time of the system. Another important design consideration is the geometry of the converter, which is primarily determined by the dimensions of the passive components. For compact design solutions, it is preferable to integrate the passive components so that the complete converter unit and its application circuitry can be implemented within the same chip.
However, the present on-chip DC-DC converter can only provide one power supply voltage from a relatively stable input voltage, and cannot effectively meet the requirement of providing a plurality of power supply voltages from widely varying input voltages, which is critical to low-power consumption, battery-powered portable devices.
Disclosure of Invention
The present invention is directed to a dual-output DC-DC converter, which overcomes the disadvantage that the prior art DC-DC converter can only provide one power supply voltage from a relatively stable input voltage, and cannot effectively meet the requirement of providing a plurality of power supply voltages from a widely varying input voltage.
In order to achieve the purpose, the invention is realized by adopting the following technical scheme:
The double-output DC-DC converter comprises a voltage source, a first inductor, a boost converter, a buck converter and a first capacitor, wherein the boost converter comprises a first MOS tube, a second inductor, a third inductor and a PWM controller; the first end of the first inductor is connected with the positive electrode of the voltage source, and the second end of the first inductor is connected with the drain electrode of the first MOS tube and the drain electrode of the second MOS tube; the first ends of the second inductor and the third inductor are both connected with the negative electrode of the voltage source, the first end of the third inductor is grounded, the second end of the second inductor is connected with the source electrode of the first MOS tube and grounded, the second end of the third inductor is both connected with the PWM controller and the second end of the first load, and the second end of the first load is grounded; the source electrode of the second MOS tube is connected with the PWM controller and the first end of the first load; the grid electrode of the first MOS tube and the grid electrode of the second MOS tube are connected with the PWM controller; the switch capacitor converter comprises a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube and a second capacitor; the source electrode of the third MOS tube is connected with the first end of the first load, the grid electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube and then is connected with the PFM controller, and the drain electrode of the third MOS tube is connected with the first end of the second capacitor and the drain electrode of the fifth MOS tube; the second end of the second capacitor is connected with the drain electrode of the fourth MOS tube and the drain electrode of the sixth MOS tube; the grid electrode of the fifth MOS tube is connected with the first end of the first load, the source electrode of the fifth MOS tube is connected with the source electrode of the sixth MOS tube and then is connected with the PFM controller, the first end of the first capacitor and the first end of the second load, the second end of the first load is sequentially connected with the source electrode of the fourth MOS tube, the grid electrode of the sixth MOS tube, the second end of the first capacitor and the second end of the second load, and the second end of the first capacitor is grounded; the sources of all the third MOS transistors are connected with each other, and the sources of all the fifth MOS transistors are connected with each other.
The invention is further improved in that:
the boost converter further comprises a third capacitor, a fourth capacitor and a fourth inductor;
The first end of the third capacitor is connected with the source electrode of the second MOS tube, and the second end of the third capacitor is connected with the second end of the second inductor; the first end of the fourth inductor is connected with the source electrode of the second MOS tube and the first end of the third capacitor, the second end of the fourth inductor is connected with the first end of the first load, the first end of the fourth capacitor is connected with the end, far away from the second MOS tube, of the fourth inductor, and the second end of the fourth inductor is connected with the second end of the first load.
The fourth inductor is a bonding wire inductor.
The third capacitor and the fourth capacitor are both metal oxide semiconductor capacitors.
The number of the switched capacitor converters is eleven.
The first MOS tube and the second MOS tube are respectively TK7S10N1Z type MOS tubes, and the third MOS tube, the fourth MOS tube, the fifth MOS tube and the sixth MOS tube are respectively SSM3K336R type MOS tubes.
The switching frequency of the first MOS tube and the second MOS tube is 250khz.
The switching frequency of the third MOS tube, the fourth MOS tube, the fifth MOS tube and the sixth MOS tube is 10mhz.
Compared with the prior art, the invention has the following beneficial effects:
The dual-output DC-DC converter well combines the advantages of the boost converter and the buck converter by mixing the two converters, overcomes the defects of the two converters, and further realizes the provision of two regulated output voltages from a single-input power supply with great variation. In this configuration, the input of the buck converter is regulated by the boost converter, and therefore is not affected by the primary input feed line variation, and the buck converter always operates at a fixed input voltage, which helps to optimize the design and increase power. At the same time, providing the first, second and third inductors, the inductor-based converter provides power efficiency regulation to combat widely varying line voltages and load currents. By connecting the step-up stage and the step-down stage in series, a stable input voltage is provided for the step-down converter, and the step-down converter adopts an integrated topological unit with a switched capacitor converter architecture, so that the size of the whole converter is reduced, and the superiority of the whole device is improved. Meanwhile, the design scheme is compact, and a complete DC-DC converter unit and an application circuit thereof can be realized in the same die.
Further, a pi filter consisting of a third capacitor, a fourth capacitor and a fourth inductor is used to modulate the switching ripple to an acceptable value, which also helps to isolate the internal ground from the high noise supply ground connected to the boost converter power stage.
Furthermore, the fourth inductor is a bonding wire inductor, and is realized by using six bonding wires in series, and the zigzag arrangement of the bonding wires and the alternating current direction passing through the adjacent bonding wires can generate a magnetic coupling effect, so that the overall inductance is effectively increased.
Drawings
Fig. 1 is a topology of a dual output DC-DC converter of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The invention is described in further detail below with reference to the attached drawing figures:
Referring to fig. 1, the dual-output DC-DC converter of the present invention includes a voltage source V 1, a first inductor L 1, a boost converter, a buck converter and a first capacitor C 1, where the boost converter includes a first MOS transistor M 1, a second MOS transistor M 2, a second inductor L 2, a third inductor L 3 and a PWM controller, and the buck converter includes a PFM controller and a plurality of switched capacitor converters.
The first end of the first inductor L 1 is connected with the positive electrode of the voltage source V 1, and the second end of the first inductor L 1 is connected with the drain electrode of the first MOS tube M 1 and the drain electrode of the second MOS tube M 2; the first ends of the second inductor L 2 and the third inductor L 3 are both connected with the negative electrode of the voltage source V 1, the first end of the third inductor L 3 is grounded, the second end of the second inductor L 2 is connected with the source electrode of the first MOS tube M 1 and grounded, the second end of the third inductor L 3 is both connected with the PWM controller and the second end of the first load, and the second end of the first load is grounded; the source electrode of the second MOS tube M 2 is connected with the PWM controller and the first end of the first load; the grid electrode of the first MOS tube M 1 and the grid electrode of the second MOS tube M 2 are connected with the PWM controller.
The buck converter comprises a switched capacitor converter architecture using time-interleaved, series-parallel topology units, and specifically, the switched capacitor converter comprises a third MOS tube M 3, a fourth MOS tube M 4, a fifth MOS tube M 5, a sixth MOS tube M 6 and a second capacitor; the source electrode of the third MOS tube M 3 is connected with the first end of the first load, the grid electrode of the third MOS tube M 4 is connected with the PFM controller after being connected with the grid electrode of the fourth MOS tube M 4, and the drain electrode of the third MOS tube M 3 is connected with the first end of the second capacitor and the drain electrode of the fifth MOS tube M 5; the second end of the second capacitor is connected with the drain electrode of the fourth MOS tube M 4 and the drain electrode of the sixth MOS tube M 6; the grid electrode of the fifth MOS tube M 5 is connected with the first end of the first load, the source electrode of the fifth MOS tube M 5 is connected with the source electrode of the sixth MOS tube M 6 and then is connected with the PFM controller, the first end of the first capacitor C 1 and the first end of the second load, the second end of the first load is sequentially connected with the source electrode of the fourth MOS tube M 4, the grid electrode of the sixth MOS tube M 6, the second end of the first capacitor C 1 and the second end of the second load, and the second end of the first capacitor C 1 is grounded; sources of all third MOS transistors M 3 are connected to each other, and sources of all fifth MOS transistors M 5 are connected to each other.
The voltage source V 1 is input into the boost converter through the first inductor L 1, then outputs V O1 and I O1, and the output V O1 is input into the buck converter formed by the switched capacitor converter architecture using time staggered, series-parallel topology units, and outputs V O2 and I O2, thus obtaining the desired output voltage.
Preferably, in another embodiment of the present invention, eleven switched capacitor converters are selected, and the switching modes of the eleven switched capacitor converters are controlled by a non-overlapping rotation time switching scheme, and the voltage reduction stage selects a switchable architecture composed of eleven switched capacitor converters, which is conducive to realizing smaller device specifications.
Preferably, in another embodiment of the present invention, the boost converter further comprises a third capacitor C 3, a fourth capacitor C 4, and a fourth inductor L 4, the third capacitor C 3, the fourth capacitor C 4, and the fourth inductor L 4 form a pi filter, and instead a pi filter is used to modulate the switching ripple to an acceptable value, the filter further helps to isolate the internal ground from the high noise power supply connected to the boost converter power stage.
Preferably, in another embodiment of the present invention, the fourth inductor L 4 is a bond wire inductor, and is implemented by using six bond wires in series, and the zigzag arrangement of the bond wires and the alternating current direction passing through the adjacent bond wires generate a magnetic coupling effect, so that the overall inductance is effectively increased.
Preferably, in another embodiment of the present invention, the third capacitor C 3 and the fourth capacitor C 4 are both metal oxide semiconductor capacitors, implemented on a chip using high density metal oxide semiconductor capacitors, implemented in a 0.18 micron complementary metal oxide semiconductor process, with a footprint of 0.82mm 2, with an input voltage in the range of 1.2V to 2.7V and an output voltage of 1.45V and 3.2V at an efficiency of greater than 52% (77% max) under all load conditions.
In summary, the inventive dual output DC-DC converter has a significantly reduced switching noise caused by the switched capacitor in its supply rail due to the time interleaved switching pattern, which makes the switched capacitor an equivalent static load of the boost stage. In a mixed mode and mixed voltage SoC, multiple on-chip supply voltages are necessary, the converter has the capability of regulating its output voltage in the event of a large variation in input supply voltage, the power efficiency of the converter is also high, and the prolonged running time of the system can be supported; the design scheme is compact, and the complete converter unit and the application circuit thereof can be realized in the same die. The feasibility of fully integrating a switched capacitor based converter with a load circuit on the same die, using on-chip MOS capacitors, shows very good quality factors and capacitance densities. The design method avoids external inductance, eliminates adverse effects caused by package parasitics, and particularly eliminates grounding rebound caused by large current peaks. Furthermore, it is easier to implement a time-interleaved version of the switched-capacitor topology on the chip, with switched-capacitor based converters leading in on-chip integration, and inductance-based converters providing power efficiency regulation to combat widely varying line voltages and load currents. Therefore, after mixing the two converters, the advantages of the two converters can be well combined, the disadvantages of the two converters can be overcome, and two stable output voltages can be provided from a single input power supply with large variation.
The following illustrates a dual output DC-DC converter of the present invention by way of example:
In this embodiment, the voltage source V 1 is 1.5-2.7V, the output V O1 is 3.3V, the output V O1 is 1.5V, the pi filter frequency is 120MHz, the first inductance L 1 is 78nH, the second inductance L 2 is 1nH, the third inductance L 3 is 5nH, the fourth inductance L 4 is 20nH, the first capacitance C 1 =0.1 nF, the second capacitance C 2 =0.66 nF, the third capacitance C 3 =fourth capacitance C 4 =0.54 nF, the first load=35kΩ, the second load=20kΩ, the first MOS transistor M 1 and the second MOS transistor M 2 are respectively TK7S10N1Z type MOS transistors, the third MOS transistor M 3, the fourth MOS transistor M 4, the fifth MOS transistor M 5 and the sixth MOS transistor M 6 are respectively SSM3K336R type MOS transistors, the switching frequencies of the first MOS transistor M 1 and the second MOS transistor M 2 are respectively 250khz, the switching frequencies of the third MOS tube M 3, the fourth MOS tube M 4, the fifth MOS tube M 5 and the sixth MOS tube M 6 are all 10mhz. The voltage source V 1 outputs the input voltage through the boost converter, the output V O1 is stabilized at 3.3V, and the output V O1 outputs the output voltage of 1.45-3.2V through the buck converter.
Therefore, the boost converter and the buck converter are connected in series, a stable input voltage is provided for the buck converter, and the buck converter adopts an integrated topological unit with a special architecture, so that the size of the whole buck converter is reduced, and the superiority of the whole device is improved.
The above is only for illustrating the technical idea of the present invention, and the protection scope of the present invention is not limited by this, and any modification made on the basis of the technical scheme according to the technical idea of the present invention falls within the protection scope of the claims of the present invention.
Claims (6)
1. The double-output DC-DC converter is characterized by comprising a voltage source, a first inductor, a boost converter, a buck converter and a first capacitor, wherein the boost converter comprises a first MOS tube, a second inductor, a third inductor and a PWM controller;
The first end of the first inductor is connected with the positive electrode of the voltage source, and the second end of the first inductor is connected with the drain electrode of the first MOS tube and the drain electrode of the second MOS tube; the first ends of the second inductor and the third inductor are both connected with the negative electrode of the voltage source, the first end of the third inductor is grounded, the second end of the second inductor is connected with the source electrode of the first MOS tube and grounded, the second end of the third inductor is both connected with the PWM controller and the second end of the first load, and the second end of the first load is grounded; the source electrode of the second MOS tube is connected with the PWM controller and the first end of the first load; the grid electrode of the first MOS tube and the grid electrode of the second MOS tube are connected with the PWM controller;
The switch capacitor converter comprises a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube and a second capacitor; the source electrode of the third MOS tube is connected with the first end of the first load, the grid electrode of the third MOS tube is connected with the grid electrode of the fourth MOS tube and then is connected with the PFM controller, and the drain electrode of the third MOS tube is connected with the first end of the second capacitor and the drain electrode of the fifth MOS tube; the second end of the second capacitor is connected with the drain electrode of the fourth MOS tube and the drain electrode of the sixth MOS tube; the grid electrode of the fifth MOS tube is connected with the first end of the first load, the source electrode of the fifth MOS tube is connected with the source electrode of the sixth MOS tube and then is connected with the PFM controller, the first end of the first capacitor and the first end of the second load, the second end of the first load is sequentially connected with the source electrode of the fourth MOS tube, the grid electrode of the sixth MOS tube, the second end of the first capacitor and the second end of the second load, and the second end of the first capacitor is grounded; the sources of all the third MOS transistors are connected with each other, and the sources of all the fifth MOS transistors are connected with each other;
the boost converter further comprises a third capacitor, a fourth capacitor and a fourth inductor;
The first end of the third capacitor is connected with the source electrode of the second MOS tube, and the second end of the third capacitor is connected with the second end of the second inductor;
the first end of the fourth inductor is connected with the source electrode of the second MOS tube and the first end of the third capacitor, the second end of the fourth inductor is connected with the first end of the first load, the first end of the fourth capacitor is connected with one end of the fourth inductor far away from the second MOS tube, and the second end of the fourth inductor is connected with the second end of the first load;
the number of the switched capacitor converters is eleven.
2. The dual output DC-DC converter of claim 1 wherein the fourth inductor is a bond wire inductor.
3. The dual output DC-DC converter of claim 1 wherein the third capacitor and the fourth capacitor are both metal oxide semiconductor capacitors.
4. The dual-output DC-DC converter according to claim 1, wherein the first MOS transistor and the second MOS transistor are respectively TK7S10N1Z type MOS transistors, and the third MOS transistor, the fourth MOS transistor, the fifth MOS transistor, and the sixth MOS transistor are respectively SSM3K336R type MOS transistors.
5. The dual output DC-DC converter of claim 4 wherein the switching frequency of the first and second MOS transistors is 250khz.
6. The dual output DC-DC converter of claim 4 wherein the switching frequencies of the third MOS transistor, the fourth MOS transistor, the fifth MOS transistor, and the sixth MOS transistor are all 10mhz.
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