CN112802975B - Display panel, display device and manufacturing method of array substrate - Google Patents
Display panel, display device and manufacturing method of array substrate Download PDFInfo
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- CN112802975B CN112802975B CN202011627064.6A CN202011627064A CN112802975B CN 112802975 B CN112802975 B CN 112802975B CN 202011627064 A CN202011627064 A CN 202011627064A CN 112802975 B CN112802975 B CN 112802975B
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/80—Constructional details
- H10K50/86—Arrangements for improving contrast, e.g. preventing reflection of ambient light
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
- H10K59/1315—Interconnections, e.g. wiring lines or terminals comprising structures specially adapted for lowering the resistance
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
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- Electroluminescent Light Sources (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The invention describes a display panel, a display device and a manufacturing method of an array substrate. The display panel includes: a substrate base plate; the array layer, the anode, the pixel defining layer, the light emitting layer and the cathode are arranged on one side of the substrate in sequence, and the pixel defining layer comprises a first opening exposing the anode; the light emitting layer is at least partially positioned in the first opening; the cathode includes a first gap located at a non-first open region; wherein, the display panel also includes the first electric conductor covering the first interval; the resistivity of the first electrical conductor is less than the resistivity of the cathode. The invention also provides a display device comprising the display panel structure and a manufacturing method of the array substrate applicable to the display panel. In the invention, the difference between the current quantity transmitted to the center of the cathode driving signal and the current quantity transmitted to the edge is smaller, thereby solving the problem of uneven display caused by low brightness of the central area of the screen and ensuring that the display panel has better display effect.
Description
Technical Field
The present invention relates to the field of display technologies, and in particular, to a display panel, a display device including the display panel, and a method for manufacturing an array substrate applicable to the display panel.
Background
The organic light emitting diode display device has the advantages of white light emission, low driving voltage, high luminous efficiency, short response time, high definition and contrast, large viewing angle, wide use temperature range, flexible large-area display full-color display and the like, and is the mainstream display technology at present.
The top-emitting OLED is the mainstream OLED panel display technology at present, and the unique microcavity structure of the top-emitting OLED has the advantages of high aperture ratio, high color purity, wide color gamut and the like. The top-emitting OLED consists of a total reflection anode (RE) and a semi-transparent semi-reflection cathode (TCE), the cathode is usually prepared by evaporation of Mg and Ag alloy with the size of 10-20nm, the sheet resistance of the cathode is about 20 omega-sq < -1 >, and the problem of high cathode resistivity exists. When the size of the OLED display screen is small, the voltage drop of the cathode of the OLED display screen can be ignored; however, when the display screen is large in size, the voltage drop of the cathode is not negligible and is directly reflected on the screen body, which causes the problem of uneven display brightness.
Disclosure of Invention
In view of the foregoing, the present invention provides a display panel, a display device including the display panel, and a method for manufacturing an array substrate. The present invention provides a display panel, comprising: a substrate base plate; the array layer, the anode, the pixel definition layer, the light-emitting layer and the cathode are positioned on one side of the substrate and arranged in sequence, and the pixel definition layer comprises a first opening exposing the anode; the light emitting layer is at least partially positioned in the first opening; the cathode includes a first gap located at a non-first open region; the display panel also comprises a first conductor covering the first gap; the resistivity of the first electrical conductor is less than the resistivity of the cathode.
The invention also provides a display device comprising the display panel.
The present invention also provides a method for manufacturing an array substrate applicable to the display panel, including: providing a substrate base plate; sequentially forming an array layer, an anode, a pixel definition layer, a light-emitting layer and a cathode on a substrate, wherein the pixel definition layer comprises a first opening for exposing the anode; the light emitting layer is at least partially positioned in the first opening; before forming the cathode, arranging a preset conductor on one side of the pixel definition layer, which is far away from the substrate; presetting a conductor in a non-first opening area; the cathode forms a first gap in the non-first opening area through a preset conductor; and heating the array substrate, and presetting a first electric conductor which is formed by the collapse of the electric conductor in the heating process and is contacted with the cathode.
Compared with the prior art, the invention has at least the following advantages: when the cathode driving signal is conducted from the edge to the center of the display panel, because the first conductor has better conductive performance, the difference between the current quantity transmitted to the center and the current quantity transmitted to the edge is smaller, thereby solving the problem of uneven display caused by low brightness of the central area of the screen and ensuring that the display panel has better display effect.
Drawings
FIG. 1 is a top view of a prior art display panel;
FIG. 2 isbase:Sub>A partial cross-sectional view of the display panel shown in FIG. 1 taken along the direction A-A';
FIG. 3 is a top view of a display panel according to an embodiment of the present invention;
FIG. 4 isbase:Sub>A partial cross-sectional view of the display panel of FIG. 3 taken along the line A-A';
FIG. 5 isbase:Sub>A partial cross-sectional view of the display panel shown in FIG. 3 taken along line A-A';
FIG. 6 isbase:Sub>A partial cross-sectional view of the display panel shown in FIG. 3 taken along the line A-A';
FIG. 7 isbase:Sub>A partial cross-sectional view of the display panel shown in FIG. 3 taken along line A-A';
FIG. 8 isbase:Sub>A partial cross-sectional view of the display panel shown in FIG. 3 along A-A';
FIG. 9 is a schematic structural diagram of a display device according to an embodiment of the invention;
fig. 10 is a flowchart illustrating a method for manufacturing an array substrate according to an embodiment of the invention;
fig. 11 is a schematic structural diagram of an array substrate according to an embodiment of the invention;
fig. 12 is a schematic structural diagram of another array substrate according to an embodiment of the invention;
fig. 13 is a schematic structural diagram of another array substrate according to an embodiment of the invention;
fig. 14 is a schematic structural diagram of another array substrate according to an embodiment of the invention;
fig. 15 is a schematic structural diagram of another array substrate according to an embodiment of the invention;
fig. 16 is a schematic structural diagram of another array substrate according to an embodiment of the invention;
fig. 17 is a schematic structural diagram illustrating another array substrate according to an embodiment of the invention;
fig. 18 is a schematic structural diagram of another array substrate according to an embodiment of the invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, the present invention is further described with reference to the accompanying drawings and examples.
It should be noted that in the following description, specific details are set forth in order to provide a thorough understanding of the present invention. The invention can be implemented in a number of ways different from those described herein and similar generalizations can be made by those skilled in the art without departing from the spirit of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed below.
The terminology used in the embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the examples of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be noted that the terms "upper", "lower", "left", "right", and the like used in the description of the embodiments of the present invention are used in the angle shown in the drawings, and should not be construed as limiting the embodiments of the present invention. In addition, in this context, it is also to be understood that when an element is referred to as being "on" or "under" another element, it can be directly formed on "or" under "the other element or be indirectly formed on" or "under" the other element through an intermediate element.
Also, example embodiments may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and thus their repetitive description will be omitted. The words expressing the position and direction described in the present invention are illustrated in the accompanying drawings, but may be changed as required and still be within the scope of the present invention. The drawings of the present invention are only for illustrating the relative positional relationship, the layer thicknesses of some parts are exaggerated in a drawing manner for easy understanding, and the layer thicknesses in the drawings do not represent the proportional relationship of the actual layer thicknesses. And the embodiments and features of the embodiments may be combined with each other without conflict. The figures of the various embodiments in this application follow the same reference numerals. In addition, the same parts of the embodiments are not described again.
Referring to fig. 1 and fig. 2, fig. 1 isbase:Sub>A top view ofbase:Sub>A display panel in the prior art, and fig. 2 isbase:Sub>A partial cross-sectional view of the display panel shown in fig. 1 alongbase:Sub>A directionbase:Sub>A-base:Sub>A'. The display panel 10 includes a substrate 11, a driving circuit layer 12, a light emitting element 13, and a pixel defining layer 14. The light-emitting element 13 includes an anode 131, a light-emitting layer 132, and a cathode 133.
As shown in fig. 1, the cathode 133 is entirely disposed on the substrate 11, and in the current OLED device of the top light, the cathode 133 is usually made of transparent or translucent material, such as: IZO, ITO, AZO, and the like, or a composite material composed of Mg, al, ag and one or more of IZO, ITO, and AZO, and the conductivity of such materials is general. When the cathode driving signal is applied to a large-size display, the cathode driving signal is transmitted from the edge of the cathode 133 to the center, and the amount of current transmitted to the center is lower than that of the edge due to the voltage drop of the cathode 133, so that the brightness of the central area of the screen is lower, which causes the problem of non-uniform display.
Referring to fig. 3 and 4, fig. 3 isbase:Sub>A top view ofbase:Sub>A display panel according to an embodiment of the invention, and fig. 4 isbase:Sub>A partial cross-sectional view of the display panel shown in fig. 3 alongbase:Sub>A directionbase:Sub>A-base:Sub>A'. The display panel 100 includes: a base substrate 110; an array layer 120, an anode 210, a pixel defining layer 130, a light emitting layer 200 and a cathode 220 sequentially disposed on one side of the substrate base plate 110; the pixel defining layer 130 includes a first opening 134 exposing the anode 210; the light emitting layer 200 is at least partially located within the first opening 134; cathode 220 includes a first gap 170 located at a non-first open area; the display panel 100 further includes a first conductive body 140 covering the first gap 170.
Alternatively, the substrate base 110 may be a flexible substrate base or a rigid base. The flexible substrate may be a polyimide resin or the like, and the rigid substrate may be a glass substrate.
The array layer 120 includes devices such as a driving circuit, specifically, a thin film transistor, a capacitor, a trace, and the like, for driving the display of the light emitting device.
Optionally, the array layer 120 includes a buffer layer 121, an active layer 122, a gate insulating layer 123, a gate layer 124, an interlayer dielectric layer 125, a source/drain electrode 126, and a planarization layer 127, which are sequentially stacked along a direction away from the substrate base plate 110, and the source/drain electrode 126 is connected to the anode 210 through a via 128. In detail, the active layer 122 is disposed on the buffer layer 121, and the material of the active layer 122 may be Indium Gallium Zinc Oxide (IGZO), which may make the thin film transistor in a transparent and flexible state; the gate insulating layer 123 is positioned on the active layer 122; the gate layer 124 is disposed on the gate insulating layer 123, and the material of the gate layer 124 may be molybdenum; the interlayer dielectric layer 125 covers the gate layer 124, and the interlayer dielectric layer 125 may be a single-layer structure or a multi-layer stacked structure, in this embodiment, the interlayer dielectric layer 125 is a double-layer structure, such as a silicon nitride/silicon oxide stacked layer; the source and drain electrodes 126 are arranged on the interlayer dielectric layer 125, and the source and drain electrodes 126 are connected to the active layer 122 through via holes; the planarization layer 127 covers the source/drain 126 and the interlayer dielectric layer 125 to planarize the film, and the material of the planarization layer 127 may be silicon nitride or silicon oxide.
It should be noted that the phrase "one layer is located on" another layer in this paragraph means that one layer is located on the side of the other layer away from the substrate 110.
Alternatively, the pixel defining layer 130 has a thickness gradually increasing in a direction perpendicular to and directed toward the substrate base substrate 110, and the material of the pixel defining layer 130 may include at least one of silicon oxide, silicon nitride, polyimide, or teflon.
Optionally, the melting point of the first electrical conductor 140 is not higher than 100 ℃. The material of the first conductive member 140 may be a low melting point metal or alloy, such as alloys with various content ratios of Sn, pb, bi, cd, etc., or other low melting point metal ratios. Optionally, the melting point of the first electrical conductor 140 is not higher than 90 ℃. Alternatively, the melting point of the first electrical conductor 140 is not higher than 80 ℃. Optionally, the melting point of the first electrical conductor 140 is not higher than 70 ℃.
Specifically, the light-emitting layer 200 is an organic light-emitting layer in an OLED, and the light-emitting layer 200 located in the first opening 134 is generally a light-emitting material with high light-emitting efficiency, preferably with electron or hole transport properties, or both, and the light-emitting process is performed at this layer.
Alternatively, the cathode 220 may be a single layer material composed of IZO, ITO, AZO, or the like, or a composite material composed of Mg, al, ag, or the like and one or more of IZO, ITO, AZO.
It should be noted that the first gap 170 of the cathode 220 is located in a non-first open region, and the first conductor 140 covering the first gap 170 represents that the first conductor 140 is also located in the non-first open region. I.e., the cathodes 220 on either side of the first gap 170 are overlapped by the first conductor 140. The first conductor 140 covering the first gap 170 may be such that a perpendicular projection of the first conductor 140 onto the substrate 110 completely coincides with a perpendicular projection of the first gap 170 onto the substrate 110; it may also be that there is a distance greater than zero between the edge of the perpendicular projection of the first conductive body 140 on the substrate base 110 and the edge of the perpendicular projection of the first gap 170 on the substrate base 110, that is, there is a partial overlap between the perpendicular projection of the first conductive body 140 on the substrate base 110 and the perpendicular projection of the cathode 220 on the substrate base 110, and the more the portion of the first conductive body 140 overlapping the cathode 220, for example, the width of the overlapped portion is between 0-1.5 μm, because the first conductive body 140 has better conductivity, the higher the conductivity efficiency is, and the better the display effect of the display panel is.
Referring to fig. 3 and 4 in combination, in the embodiment of the present invention, the resistivity of the first conductive body 140 is smaller than the resistivity of the cathode 220, and the relationship between the conductivity and the resistivity is: r =1/S, which means that the first conductive body 140 has better conductive performance than the cathode 220, when the cathode driving signal is conducted from the edge of the substrate to the center, since the first conductive body 140 has better conductive performance, the difference between the amount of current transmitted to the center and the amount of current transmitted to the edge is smaller, thereby solving the problem of display non-uniformity caused by lower brightness in the center area of the screen and enabling the display panel to have better display effect.
As shown in fig. 4, the first conductive body 140 is located on the surface of the pixel defining layer 130 on the side away from the substrate 110, that is, the first gap 170 is also located on the surface of the pixel defining layer 130 on the side away from the substrate 110, the cathode 220 is disconnected on the surface of the pixel defining layer 130 on the side away from the substrate 110 to form a plurality of cathode sub-units, and the pixel defining layer 130 is used as a carrying substrate of the first conductive body 140, which is more simple and convenient in process.
Fig. 5 isbase:Sub>A partial cross-sectional view of the display panel shown in fig. 3 taken along the directionbase:Sub>A-base:Sub>A', as shown in fig. 5. The difference from the embodiment shown in fig. 4 is that the side of the pixel defining layer 130 facing away from the substrate 110 further includes a second opening 136, the first conductor 140 is located in the second opening 136, the first gap 170 is also located in the second opening 136, and the cathode 220 is disconnected at the second opening 136 to form a plurality of cathode sub-units.
Optionally, the second opening 136 is smaller than the first opening 134. The second opening 136 is smaller than the first opening 134 means that the vertical projection area of the second opening 136 on the plane of the substrate 110 is larger than the vertical projection area of the first opening 134 on the plane of the substrate 110, the first conductive body 140 is located in the second opening 136, and the first opening 134 and the second opening 136 are similarly prepared by multiplexing pixel definition layers, so that the opening size of the second opening 136 will affect the settable number of the first opening 134, the first opening 134 is used for preparing a pixel unit, and the opening size of the second opening 136 will affect the settable number of the pixel unit, thereby further affecting the resolution of the display panel, when the second opening 136 is set as small as possible, the settable number of the first opening 136 is increased, that is, the settable number of the pixel unit is increased, thereby increasing the resolution of the display panel; on the other hand, the first conductive body 140 forms a flowable melt when heated, and the first conductive body 140 is disposed in the second opening 136, and the second opening 136 can be used to carry the flowable melt so that it does not flow into other film layers (e.g., the first opening 134).
In the embodiment of the invention, the second opening is made by multiplexing the pixel defining layer, the pixel defining layer is not a film layer which is additionally made, the first conductor is made in the second opening, the thickness of the display panel is not additionally increased, and in addition, the second opening can limit that the melt formed by heating the first conductor cannot flow into the first opening, so that the light emission of the display panel is influenced.
In some embodiments of the invention, as shown in fig. 4 and 5, the display panel 100 further includes an auxiliary subunit 150 located on a side of the first conductive body 140 away from the substrate 110, and the auxiliary subunit 150 and the cathode 220 are made of the same material in the same layer. It should be noted that the same layer of the auxiliary sub-unit 150 and the cathode 220 is made of the same material, which means that the auxiliary sub-unit 150 and the cathode 220 are manufactured together in the same process flow and use the same material, thereby reducing the operation difficulty of performing process improvement on the entire cathode layer. Since the cathode 220 is generally formed by full-surface evaporation, the first conductor 140 is provided on the pixel defining layer 130, the auxiliary sub-unit 150 made of the same material as the cathode 220 is deposited on the first conductor 140, and a gap is formed between the auxiliary sub-unit 150 and the cathode 220 after the first conductor 140 collapses because of a difference in height between the first conductor 140 and the cathode 220 before heating.
Referring to fig. 6, fig. 6 isbase:Sub>A partial cross-sectional view of the display panel of fig. 3 taken along the directionbase:Sub>A-base:Sub>A'. The display panel 100 further includes a first signal line 180 and a first insulating layer 190 between the first signal line 180 and the first conductor 140, and the first conductor 140 is electrically connected to the first signal line 180 through a via hole in the first insulating layer 190.
Here, the first signal line refers to a cathode driving signal line, i.e., PVEE, which transmits a signal to a cathode.
Alternatively, as shown in fig. 6, the first insulating layer 190 may be the planarization layer 127, that is, the first signal line 180 provides an electrical signal to the first conductive body 140 through a via in the planarization layer 127, so that the first signal line 180 can provide an electrical signal to the first conductive body 140 without bypassing various barriers, thereby further simplifying the process flow.
The first insulating layer 190 may also be the pixel defining layer 130, i.e. the first signal line 180 provides an electrical signal to the first electrical conductor 140 through a via hole in the pixel defining layer 130. The first insulating layer 190 may also be any insulating layer in the array layer 120, and the first insulating layer 190 may also be a packaging layer, which is not limited herein.
Referring to fig. 7, fig. 7 isbase:Sub>A partial cross-sectional view of the display panel shown in fig. 3 taken along the directionbase:Sub>A-base:Sub>A'. The display panel 100 further includes an auxiliary metal layer 230 between the first conductor 140 and the first signal line 180, and the first conductor 140 is electrically connected to the first signal line 180 through the auxiliary metal layer 230. In the embodiment of the present invention, a metal with a better conductivity, such as Ag, is disposed between the first conductive body 140 and the first signal line 180, so as to improve the conductive efficiency between the first conductive body 140 and the first signal line 180, so that the first conductive body 140 has a better current amount, and further reduce the problem of display non-uniformity caused by a large difference between the center current amount and the edge current amount generated when the cathode driving signal is transmitted from the cathode edge to the center.
Optionally, the display panel further includes a driving circuit electrically connected to the anode and transmitting a driving signal to the anode, specifically, as shown in fig. 7, the driving signal is transmitted to the anode 210 by the thin film transistor 12.
Alternatively, as shown in fig. 7, the auxiliary metal layer 230 is on the same layer as the anode 210, so that when the first conductive body 140 is located in the second opening 136, the auxiliary metal layer 230 can also serve as a carrier substrate for the first conductive body 140 besides enabling the first conductive body 140 to have a better current amount. When the first signal line 180 is located on the planarization layer 127 and electrically connected to the auxiliary metal layer 230 through the via hole, the first conductor 140 is disposed on the surface of the auxiliary metal layer 230 and can be electrically connected to the first signal line 180.
Optionally, the auxiliary metal layer 230 and the anode 210 are made of the same material, and in the top-emitting OLED, the material of the anode 210 may be a single-layer metal material or a composite material composed of metal and ITO, and the auxiliary metal layer 230 and the anode 210 may be manufactured in the same process flow, which further simplifies the process flow and reduces the process cost.
In the embodiment of the invention, the auxiliary metal layer with better conductivity is arranged between the first conductor and the first signal line, so that the conductivity efficiency between the first conductor and the first signal line is improved, the current difference between the edge and the center is further reduced, and the display effect is improved.
Referring to fig. 8, fig. 8 isbase:Sub>A partial cross-sectional view of the display panel of fig. 3 taken along the directionbase:Sub>A-base:Sub>A'. The display panel 100 further includes an auxiliary display layer 240 between the cathode 220 and the light emitting layer 200; the auxiliary display layer 240 includes a second gap 241 located at a non-first opening region, and a perpendicular projection of the second gap 241 on the substrate 110 at least partially overlaps a perpendicular projection of the first conductive body 140 on the substrate 110.
The auxiliary display layer 240 refers to an electron transport layer, a hole transport layer, and the like, and the hole transport layer is made of organic material molecules, such as poly (p-phenylene vinylenes) (PPv), polythiophenes, polysilanes, tritanes, triarylamines, hydrazones, pyrazolines, masticazoles, carbazoles, butadienes, and the like, which transport "holes" from the anode 210; an electron transport layer, which is typically an organic molecule containing nitrogen atoms and strong electron withdrawing groups, transports "electrons" from cathode 220.
The films such as the cathode, the electron transport layer, the hole transport layer and the like are generally manufactured by using a photoetching mask, so that when the cathode driving signal line is electrically connected with the cathode, the cathode driving signal line firstly passes through the films such as the electron transport layer, the hole transport layer and the like, the resistivity of the organic materials of the films is relatively high, and the amount of current transferred to the cathode is reduced. Due to the shielding effect of the first conductive body 140, the auxiliary display layer 240, such as an electron transport layer or a hole transport layer, generates a second gap 241, so that the auxiliary display layer 240 is disconnected at the second gap 241. The perpendicular projection of the second gap 241 on the substrate 110 at least partially overlaps the perpendicular projection of the first conductive body 140 on the substrate 110, and the first conductive body 140 covers the first gap 170, so that an overlapping region also exists between the first gap 170 and the second gap 241. The first conductive body 140 can be directly electrically connected to the cathode driving circuit through the overlapping region between the first gap 170 and the second gap 241, without passing through the auxiliary display layer 240 with high resistivity and the cathode 220, thereby further reducing the loss of current. In the embodiment of the invention, the auxiliary display layer is disconnected due to the shielding effect of the first conductor, a second gap is generated, and the first conductor is directly and electrically connected with the cathode driving circuit through the second gap, so that the current loss caused by high resistivity of the auxiliary display layer is reduced.
The invention also provides a display device which comprises the display panel provided by the invention. Fig. 9 is a schematic structural diagram of a display device according to an embodiment of the invention. The display device 1000 includes the display panel provided in any of the above embodiments of the present invention. The embodiment of fig. 9 only takes a mobile phone as an example to describe the display device 1000, and it should be understood that the display device provided in the embodiment of the present invention may be other display devices with a display function, such as a computer, a television, a vehicle-mounted display device, and the present invention is not limited thereto. The display device provided in the embodiment of the present invention has the beneficial effects of the display panel provided in the embodiment of the present invention, and specific reference may be made to the specific description of the display panel in each embodiment above, and this embodiment is not described herein again.
Based on the same inventive concept, the embodiment of the invention also provides a preparation method of the array substrate, which can be applied to the display panel. Fig. 10 is a schematic flow chart of a method for manufacturing a display panel according to an embodiment of the present invention. As shown in fig. 10, the preparation method may include:
s1: providing a substrate base plate;
s2: sequentially forming an array layer, an anode, a pixel definition layer, a light-emitting layer and a cathode on a substrate, wherein the pixel definition layer comprises a first opening for exposing the anode; the light emitting layer is at least partially positioned in the first opening;
fig. 11 is a partial cross-sectional view of an array substrate according to an embodiment of the invention, as shown in fig. 11. An array layer 120, an anode 210, and a pixel defining layer 130 are sequentially formed on the base substrate 110.
S3: before forming the cathode, arranging a preset conductor on one side of the pixel defining layer, which is far away from the substrate base plate; presetting a conductor in a non-first opening area; the cathode forms a first gap in the non-first opening area through a preset conductor;
fig. 12 is a partial cross-sectional view of another array substrate according to an embodiment of the invention, as shown in fig. 12. Before the cathode is formed, a layer of metal 140 "is prepared on the side of the pixel defining layer 130 far away from the substrate 110 by evaporation or sputtering, the thickness of the metal 140" is 0-3 μm, and the metal 140 "can be selected from alloys with various content ratios such as Sn, pb, bi, cd and the like or alloy materials with other metal ratios. It should be noted that the specific values of the materials and the content ratios of the metal or the alloy are not limited herein, and only the low melting point temperature is required. Optionally, the melting point temperature of the metal 140 "is not higher than 100 ℃; optionally, the melting point temperature of the metal 140 "is not higher than 90 ℃; alternatively, the melting point temperature of the metal 140 "is not higher than 80 ℃.
The prepared metal 140 ″ is patterned to form a predetermined conductor 140', as shown in fig. 13, fig. 13 is a partial cross-sectional view of another array substrate according to an embodiment of the invention, a surface of the predetermined conductor 140' away from the substrate 110 is a first surface 141, a surface of the predetermined conductor 140' close to the substrate 110 is a second surface 142, and a vertical projection of the second surface 142 on the substrate 110 is located within a vertical projection of the first surface 141 on the substrate 110.
Optionally, if the predetermined conductor is located on the surface of the pixel defining layer, the width of the second surface is between 10-20 μm, and if the predetermined conductor is located in the second opening, the width of the second surface is between 2-10 μm.
Alternatively, as shown in fig. 13, the predetermined conductive body 140' has an inverted trapezoid shape. Compared with other patterns with the first surface 141 larger than the second surface 142, the inverted trapezoid shape is easier and more efficient to manufacture in terms of process.
Alternatively, as shown in fig. 14, fig. 14 is a partial cross-sectional view of another array substrate according to an embodiment of the invention. The pre-set electrical conductor 140' has an hourglass shape with inner curved sidewalls. Since the conductive body 140 'only needs to be preset to generate a shielding effect when the cathode 220 and the auxiliary display layer 240 are evaporated, the pattern of the conductive body 140' is not limited herein as long as the first surface 141 is larger than the second surface 142.
In the present invention, to achieve the shielding effect of the predetermined conductor 140' when the cathode 220 and the auxiliary display layer 240 are evaporated, the first surface 141 of the predetermined conductor 140' is larger than the second surface 142 of the predetermined conductor 140', so that the cathode 220 and the auxiliary display layer 240 cannot be evaporated on the sidewall of the predetermined conductor 140' due to the shielding effect of the first surface 141, and thus the cathode 220 and the auxiliary display layer 240 are disconnected in the non-first opening region, leaving a gap, and thus the cathode 220 and the predetermined conductor 140' are not overlapped; while at the same time the pre-arranged conductor 140' is to be supporting, the first surface 141 is not as large as the second surface 142. In the first direction, the first surface 141 is preferably 1.5-3 times larger than the second surface 142. It should be noted that the first direction here refers to a direction parallel to the plane of the substrate base plate 110 and pointing to the adjacent pixel unit along the pixel unit.
Referring to fig. 15 and 16 in combination, fig. 15 is a partial cross-sectional view of another array substrate according to an embodiment of the invention, and fig. 16 is a partial cross-sectional view of another array substrate according to an embodiment of the invention. Before the cathode 220 is deposited, an auxiliary display layer 240 is typically deposited, wherein the auxiliary display layer 240 refers to an electron transport layer, a hole transport layer, and the like. Since the first surface 141 of the predetermined conductive body 140' is larger than the second surface 142 of the predetermined conductive body 140', the auxiliary display layer 240 cannot be deposited on the sidewall of the predetermined conductive body 140', and thus the second gap 241 is formed, so that the auxiliary display layer 240 is broken at the second gap 241.
As shown in fig. 16, like the auxiliary display layer 240, the cathode 220 forms a first gap 170 in a non-first open region due to a shielding effect of the predetermined conductive body 140', such that the cathode 220 is disconnected at the first gap 170, thereby forming a plurality of cathode sub-units.
S4: and heating the array substrate, and presetting a first electric conductor which is formed by the collapse of the electric conductor in the heating process and is contacted with the cathode.
The array substrate 1 is transferred into a high vacuum baking chamber, and the temperature is adjusted to be near the melting point temperature of the predetermined conductive body 140', for example, the melting point temperature of the predetermined conductive body 140' is 100 ℃, so that the heating temperature of the baking chamber can be set to be 100 ± 5 ℃. Due to the action of heat, as shown in fig. 17, fig. 17 is a partial cross-sectional view of another array substrate according to an embodiment of the invention, and the predetermined conductive body 140' is collapsed by heat to form the first conductive body 140, and contacts the evaporated cathode 220.
The first conductor 140 formed after the predetermined conductor 140' collapses covers the first gap 170 of the cathode 220, which means that the first conductor 140 serves as a connecting bridge for cathode subunits on both sides of the first gap 170, and the whole cathode is turned on again by overlapping the first conductor 140, thereby not affecting the light emission of the display panel.
Fig. 18 is a partial cross-sectional view of another array substrate according to an embodiment of the invention, the manufacturing process of the array substrate in fig. 18 is similar to that of the array substrate in fig. 16, and is not repeated herein, except that the predetermined conductive body 140 'shown in fig. 16 is disposed on the surface of the pixel defining layer 230, and the predetermined conductive body 140' shown in fig. 18 is disposed in the second opening 136; in fig. 18, optionally, an auxiliary metal layer 230 on the same layer as the anode 210 may be disposed between the predetermined conductor 140' and the cathode driving circuit (the first signal line 180), the auxiliary metal layer 230 may be used as a carrier substrate of the predetermined conductor 140', and the predetermined conductor 140' is manufactured by using the auxiliary metal layer 230 as a substrate, which may keep the flatness of the predetermined conductor 140', so that the process is simpler and more convenient, and the auxiliary metal layer 230 with better conductivity may improve the conductivity efficiency between the predetermined conductor 140' and the cathode driving circuit (the first signal line 180). The predetermined conductor 140' shown in fig. 16 can be electrically connected to the cathode driving circuit (the first signal line 180) through the via hole in the pixel definition layer 130 to realize cathode signal transmission, without passing through the auxiliary display layer 240 and the cathode 220 with high resistivity, thereby reducing the loss of current. Referring to fig. 7 and 18 in combination, the first conductive body 140 shown in fig. 7 is formed after the predetermined conductive body 140' in fig. 18 is collapsed, the first conductive body 140 is fabricated in the second opening 136, and the first conductive body 140 can be directly electrically connected to the cathode driving circuit 180 through the overlapping region between the first gap 170 and the second gap 241, or as shown in fig. 7, one side of the auxiliary metal layer 230 is in contact with the first conductive body 140, and the other side is electrically connected to the cathode driving circuit (the first signal line 180), so that the electrical signal transmission between the first conductive body 140 and the cathode driving circuit (the first signal line 180) is realized, and the auxiliary display layer 240 with high resistivity and the cathode 220 do not need to pass through, and thus the loss of current can be further reduced.
The predetermined conductive body 140 'is heated to melt and becomes a flowable melt, which generates a force that reduces the surface as much as possible, i.e. a surface tension, and under the action of the surface tension, as shown in fig. 17 and 18, the width of the first conductive body 140 is gradually reduced along the direction away from the substrate base plate 110 when the predetermined conductive body 140' is collapsed, which is the first conductive body 140. If the predetermined conductive body 140' is an inverted trapezoid, the upper surface of the first conductive body 140 formed after melting is a convex arc surface.
The foregoing is a more detailed description of the invention in connection with specific preferred embodiments and it is not intended that the invention be limited to these specific details. For those skilled in the art to which the invention pertains, several simple deductions or substitutions can be made without departing from the spirit of the invention, and all shall be considered as belonging to the protection scope of the invention.
Claims (19)
1. A display panel, comprising: a base substrate;
an array layer, an anode, a pixel defining layer, a light emitting layer and a cathode which are arranged on one side of the substrate,
the pixel defining layer includes a first opening exposing the anode;
the light emitting layer is at least partially positioned in the first opening;
the cathode includes a first gap located at a non-first open area;
wherein the display panel further comprises a first conductor covering the first gap; the resistivity of the first electrical conductor is less than the resistivity of the cathode;
the first gap is covered by a first electric conductor which is formed by the collapse of a preset electric conductor in the heating process, and the first electric conductor connects the cathode subunits at two sides of the first gap.
2. The display panel according to claim 1, wherein the first conductive body is located on a surface of the pixel defining layer on a side away from the base substrate.
3. The display panel of claim 1, wherein the side of the pixel defining layer facing away from the substrate base plate further comprises a second opening, and the first conductor is located in the second opening.
4. The display panel of claim 3, wherein the second opening is smaller than the first opening.
5. The display panel according to claim 1, wherein a width of the first conductor is gradually reduced in a direction away from the base substrate.
6. The display panel according to claim 5, wherein an upper surface of the first conductor is a convex curved surface.
7. The display panel of claim 1, wherein the first electrical conductor has a melting point temperature of not higher than 100 ℃.
8. The display panel of claim 1, further comprising an auxiliary subunit located on a side of the first conductor away from the substrate, the auxiliary subunit being of the same layer of material as the cathode.
9. The display panel according to claim 1, wherein the display panel further comprises a first signal line and a first insulating layer between the first signal line and the first conductor, and wherein the first conductor is electrically connected to the first signal line through a via in the first insulating layer.
10. The display panel according to claim 9, wherein the display panel further comprises an auxiliary metal layer between the first conductor and the first signal line, and wherein the first conductor is electrically connected to the first signal line through the auxiliary metal layer.
11. The display panel of claim 10, wherein the auxiliary metal layer is the same layer as the anode.
12. The display panel of claim 11, wherein the auxiliary metal layer is the same material as the anode.
13. The display panel according to claim 1, further comprising an auxiliary display layer between the cathode and the light emitting layer; the auxiliary display layer comprises a second gap located in the non-first opening area, and the vertical projection of the second gap on the substrate base plate at least partially overlaps with the vertical projection of the first conductor on the substrate base plate.
14. A display device characterized by comprising the display panel according to claims 1 to 13.
15. A method for manufacturing an array substrate applied to the display panel of any one of claims 1 to 13,
providing a substrate base plate;
sequentially forming an array layer, an anode, a pixel definition layer, a light-emitting layer and a cathode on the substrate, wherein the pixel definition layer comprises a first opening exposing the anode; the light emitting layer is at least partially positioned in the first opening;
before the cathode is formed, a preset conductor is arranged on one side, away from the substrate, of the pixel defining layer; the preset electric conductor is positioned in the non-first opening area; the cathode forms a first gap in the non-first opening region through the preset conductor;
and heating the array substrate, wherein the preset conductor collapses to form a first conductor in the heating process and is in contact with the cathode.
16. The method for manufacturing an array substrate according to claim 15, wherein the step of providing a predetermined conductor on a side of the pixel defining layer away from the substrate before forming the cathode comprises:
before the cathode is formed, preparing a layer of metal on one side of the pixel defining layer, which is far away from the substrate base plate, by an evaporation or sputtering method;
patterning the prepared metal to form the preset conductor, wherein the surface of the preset conductor far away from the substrate is a first surface, the surface of the preset conductor close to the substrate is a second surface, and the vertical projection of the second surface on the substrate is positioned in the vertical projection of the first surface on the substrate.
17. The method of claim 16, wherein the predetermined conductive body has an inverted trapezoid shape, and the first surface is 1.5-3 times larger than the second surface along the first direction.
18. The method of manufacturing an array substrate of claim 17, wherein the step of forming a cathode on the substrate base plate comprises:
and forming a cathode through thermal evaporation, wherein under the shielding effect of the inverted trapezoidal preset conductor, the cathode is disconnected, and the cathode is not overlapped with the preset conductor.
19. The method of claim 18, wherein heating the array substrate, wherein the step of collapsing the pre-set conductors into first conductors and contacting the cathodes during heating comprises: and transferring the array substrate into a high-vacuum baking chamber, adjusting the temperature to be near the melting point temperature of the preset conductor, and heating and collapsing the preset conductor to form a first conductor under the action of heat and contacting the first conductor with the evaporated cathode.
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| CN113471260A (en) * | 2021-06-28 | 2021-10-01 | 京东方科技集团股份有限公司 | Array substrate, display panel and method for manufacturing array substrate |
| CN113809134B (en) * | 2021-08-26 | 2024-06-28 | 湖北长江新型显示产业创新中心有限公司 | Display panel and display device |
| CN114203788B (en) * | 2021-12-10 | 2023-06-30 | 深圳市华星光电半导体显示技术有限公司 | Display panel, display device and preparation method of display panel |
| US20240244924A1 (en) * | 2022-01-29 | 2024-07-18 | Hefei Xinsheng Optoelectronics Technology Co., Ltd. | Display panel, manufacturing method thereof and display device |
| CN115000146A (en) * | 2022-06-29 | 2022-09-02 | 云谷（固安）科技有限公司 | Display panel, display device and preparation method of display panel |
| WO2024198939A1 (en) * | 2023-03-31 | 2024-10-03 | 维信诺科技股份有限公司 | Display panel, display device, and manufacturing method for display panel |
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