CN112799942B - Keil C51-based software source code and target code coverage rate analysis method and system - Google Patents

Keil C51-based software source code and target code coverage rate analysis method and system Download PDF

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CN112799942B
CN112799942B CN202110120629.XA CN202110120629A CN112799942B CN 112799942 B CN112799942 B CN 112799942B CN 202110120629 A CN202110120629 A CN 202110120629A CN 112799942 B CN112799942 B CN 112799942B
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CN112799942A (en
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魏冬冬
申臻
于清华
高赛军
薛垒
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Shanghai aerospace computer technology research institute
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3676Test management for coverage analysis
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3684Test management for test design, e.g. generating new test cases
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3688Test management for test execution, e.g. scheduling of test suites
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3692Test management for test results analysis
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

The application discloses a software source code and target code coverage rate analysis method and system based on Keil C51, wherein the method comprises the following steps: s1: loading information files including software source codes, target codes and M51 files; s2: analyzing the loaded information file to generate a corresponding relation file of the association of the software source code and the target code PC address; s3: executing the test case by using a software executable environment of the Keil platform, and generating a target code execution result file of the current case by a Keil command; when executing a plurality of test cases, generating a plurality of target code execution result files; s4: and merging and summarizing the execution condition of each instruction of the target codes in the one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file. According to the method, the corresponding relation between the software source codes and the target codes is utilized, so that the coverage rate analysis file of the software source codes can be generated, and target code differences caused by pile insertion are avoided.

Description

Keil C51-based software source code and target code coverage rate analysis method and system
Technical Field
The application relates to the field of software testing, in particular to a Keil C51-based software source code and target code coverage rate analysis method and system.
Background
In the computer software test, the traditional test method needs to perform instrumentation on the software source code or the target code when the coverage rate analysis is performed, recompile the running software after the output information is inserted, and acquire the coverage rate of the software by analyzing the output information. The inventor finds that the traditional test mode has the following defects in the software test process:
(1) The compiling software needs to be modified, and the target code after pile insertion and the original software target code are inevitably different, so that hidden danger can be caused.
(2) When multiple test cases are executed and need to be subjected to pile inserting analysis for multiple times, because the target codes after each pile inserting are different, great difficulty is brought to the statistics and summarization of the software coverage rate after the multiple test cases are executed.
Disclosure of Invention
In order to solve the problems, the embodiment of the application provides the coverage rate analysis method and the coverage rate analysis system for the software source code and the target code based on the Keil C51, which acquire coverage rate information on the premise of not modifying the software target code, and can generate a source code coverage rate analysis file and a target code coverage rate analysis file of execution results of a plurality of test cases by using the target code execution condition analysis summarizing method of different test cases.
In a first aspect, an embodiment of the present application provides a Keil C51-based software source code and target code coverage analysis method, where the method includes:
s1: constructing a Keil platform-based software executable environment, and loading information files including software source codes, target codes and M51 files;
s2: analyzing the loaded information files including the software source code, the target code and the M51 file to generate a corresponding relation file of the association of the software source code and the target code PC address;
s3: executing the test case by using a software executable environment of the Keil platform, and generating a target code execution result file of the current case by a Keil command; when executing a plurality of test cases, generating a plurality of target code execution result files;
s4: and merging and summarizing the execution conditions of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
Preferably, in the step S2, mapping information including the code segment address of each entry of the marker instruction, the corresponding source code file name, and the source code line number is parsed for the M51 file.
Preferably, in the step S3, the step of generating the target code execution result file of the current use case by the Keil command includes: and calling instructions including COVERAGE and COVERAGE ASM in the Keil platform, and setting Keil command result redirection files.
Preferably, in the step S3, the object code execution result file includes state information in each entry of the object code instruction, wherein the state information indicates that the instruction does not execute NE, the instruction has executed EX, the instruction is just jump-executed JO for jump branch, the instruction is just not jump-executed JN for jump branch, the instruction is jump branch, and the JF is completely executed.
Preferably, in the step S4, the method for merging and summarizing the execution condition of each instruction of the target code includes: analyzing a plurality of target code execution files, and carrying out pairwise comparison analysis and summarization on the execution conditions of the target codes with the same addresses.
Preferably, after the step S4, the method further includes distinguishing the coverage condition of the corresponding instruction by using different text colors or text background colors from the target code coverage analysis file and the software source code coverage analysis file, and displaying the coverage analysis of the software source code and the target code in a mixed mode.
In a second aspect, an embodiment of the present application provides a Keil C51 software source code and target code coverage analysis system, where the system includes:
the loading unit is used for constructing a Keil platform-based software executable environment and loading information files including software source codes, target codes and M51 files;
the analysis unit is used for analyzing the loaded information files including the software source code, the target code and the M51 file and generating a corresponding relation file of the association of the software source code and the target code PC address;
the execution case unit is used for executing the test case by utilizing the software executable environment of the Keil platform and generating a target code execution result file of the current case through Keil commands; when executing a plurality of test cases, generating a plurality of target code execution result files;
and the merging and summarizing unit is used for merging and summarizing the execution condition of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
Preferably, the system further comprises a display unit, wherein the display unit is used for respectively distinguishing the coverage condition of the corresponding instruction by different text colors or text background colors from the target code coverage analysis file and the software source code coverage analysis file, and analyzing and displaying the coverage rate of the software source code and the target code in a mixed mode.
In a third aspect, an embodiment of the present application provides a computer device, including a memory and a processor, where the memory stores computer readable instructions, where the computer readable instructions, when executed by the processor, cause the processor to perform the steps of the Keil C51-based software source code and target code coverage analysis method according to the first aspect.
In a fourth aspect, embodiments of the present application provide a storage medium storing computer readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of the Keil C51-based software source code and target code coverage analysis method of the first aspect.
The Keil C51-based software source code and target code coverage rate analysis method and system provided by the embodiment of the application have at least the following technical effects:
1, because the application does not need to modify compiling software, the target code after pile insertion and the original software target code do not generate difference, and hidden danger caused by the difference is avoided.
2, because of the software executable environment realized by configuring the Keil C51, executing the test case for multiple times to obtain a plurality of target code execution result files, merging and integrating the target code execution result files of the test case to obtain the target code coverage rate information of the software, and generating the coverage rate information file of the software source code according to the corresponding relation between the software source code and the target code.
Drawings
FIG. 1 is a flowchart of a Keil C51-based software source code and target code coverage analysis method in a first embodiment of the application;
FIG. 2 is a flowchart of another Keil C51-based software source code and target code coverage analysis method according to the first embodiment of the present application;
fig. 3 is a block diagram of a software source code and target code coverage rate analysis system based on Keil C51 in a second embodiment of the present application.
Detailed Description
In order to better understand the above technical solutions, the following detailed description will refer to the accompanying drawings and specific embodiments.
Example 1
1-2, the present embodiment provides a Keil C51-based software source code and target code coverage analysis method, which is characterized in that the method includes:
step S1: and constructing a software executable environment based on the Keil platform, and loading information files including software source codes, target codes and M51 files.
In this embodiment, based on the Keil platform, the Keil platform is a well-known software company Keil development microcontroller software development platform, and is generally used as a tool for developing an ARM kernel singlechip. The Keil platform provides a complete development scheme including C compilers, macro compilations, connectors, library management, and a powerful emulation debugger, which are combined together by an integrated development environment (uVision). Therefore, in the software executable environment based on the Keil platform, the mu Vision4 integrated development environment can be understood to be built, and the software executable environment comprises a high-efficiency compiler, a project manager and a MAKE tool, while Keil C51 is a high-efficiency C language compiler specially designed for a singlechip, accords with ANSI standards, generates a program code with extremely high running speed, requires extremely small memory space and can be completely comparable with assembly language.
Step S2: and analyzing the loaded information files including the software source code, the target code and the M51 file to generate a corresponding relation file of the association of the software source code and the target code PC address.
Further, the correspondence file in this embodiment includes a plurality of data records, and each data record includes the following information:
the information extracted from the source code file comprises the information of the source code file name, the source code line number, the source code text and the like of the current data record; the information extracted from the M51 file comprises information such as a source code LINE number, a type ("LINE#") and a target code address of the current data record; the information extracted from the target code file comprises information such as target code addresses, target code instruction codes, target code instruction contents and the like.
Of course, in the correspondence file, there may be a case where one source code instruction corresponds to a multi-entry tag code instruction, or there may be a case where a plurality of source code instructions corresponds to one-entry tag code instruction.
As shown in table 1, the corresponding relation file of the software source code and the target code PC address is associated.
TABLE 1
In step S2, the mapping information including the code segment address of each entry of the index instruction, the corresponding source code file name, and the source code line number is parsed for the M51 file.
Step S3: executing the test case by using a software executable environment of the Keil platform, and generating a target code execution result file of the current case by a Keil command; and when executing a plurality of test cases, generating a plurality of target code execution result files.
In step S3, the step of generating the target code execution result file of the current use case by the Keil command includes: and calling instructions including COVERAGE and COVERAGE ASM in the Keil platform, and setting Keil command result redirection files.
In step S3, the object code execution result file includes state information in each entry of the object code instruction, which indicates that the instruction does not execute NE, that the instruction has executed EX, that the instruction only jumps to execute JO for a jump branch, that the instruction only does not jump to execute JN for a jump branch, that the instruction is a jump branch, and that JF is executed completely.
Step S4: and merging and summarizing the execution condition of each instruction of the target codes in the one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
As in table 2, the target code execution case incorporates the analysis decision table.
TABLE 2
In step S4, the method for merging and summarizing the execution condition of each instruction of the target code includes: analyzing a plurality of target code execution files, and carrying out pairwise comparison analysis and summarization on the execution conditions of the target codes with the same addresses.
After step S4, the method further includes distinguishing the coverage condition of the corresponding instruction by using different text colors or text background colors from the target code coverage analysis file and the software source code coverage analysis file, and displaying the coverage analysis of the software source code and the target code in a mixed mode.
Example two
Referring to fig. 3, this embodiment provides a coverage analysis system based on Keil C51 software source code and target code, and the analysis method of the first embodiment is adopted. The system in this embodiment includes:
and the loading unit 10 is used for constructing a software executable environment based on the Keil platform and loading information files including software source codes, target codes and M51 files.
The parsing unit 20 is configured to parse the loaded information file including the software source code, the target code and the M51 file, and generate a corresponding relationship file associated with the software source code and the target code PC address.
The execution case unit 30 is configured to execute the test case by using a software executable environment of the Keil platform, and generate a target code execution result file of the current case through a Keil command; and when executing a plurality of test cases, generating a plurality of target code execution result files.
And the merging and summarizing unit 40 is used for merging and summarizing the execution condition of each instruction of the target codes in the one or more target code execution result files, generating a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
The system also comprises a display unit, wherein the display unit is used for respectively distinguishing the coverage conditions of the corresponding instructions by using different text colors or text background colors from the target code coverage analysis file and the software source code coverage analysis file, and displaying the coverage analysis of the software source code and the target code in a mixed mode.
Example III
The present embodiment provides a computer device including a memory and a processor, the memory storing computer readable instructions that, when executed by the processor, cause the processor to perform the following steps. Step S1: and constructing a software executable environment based on the Keil platform, and loading information files including software source codes, target codes and M51 files. Step S2: and analyzing the loaded information files including the software source code, the target code and the M51 file to generate a corresponding relation file of the association of the software source code and the target code PC address. Step S3: executing the test case by using a software executable environment of the Keil platform, and generating a target code execution result file of the current case by a Keil command; and when executing a plurality of test cases, generating a plurality of target code execution result files. Step S4: and merging and summarizing the execution condition of each instruction of the target codes in the one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
The present embodiments provide a storage medium storing computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of:
step S1: and constructing a software executable environment based on the Keil platform, and loading information files including software source codes, target codes and M51 files. Step S2: and analyzing the loaded information files including the software source code, the target code and the M51 file to generate a corresponding relation file of the association of the software source code and the target code PC address. Step S3: executing the test case by using a software executable environment of the Keil platform, and generating a target code execution result file of the current case by a Keil command; and when executing a plurality of test cases, generating a plurality of target code execution result files. Step S4: and merging and summarizing the execution condition of each instruction of the target codes in the one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file. Those of ordinary skill in the art will appreciate that all or part of the steps in the various methods of the above embodiments may be implemented by a program to instruct related hardware, the program may be stored in a computer readable storage medium, and the storage medium may include: read Only Memory (ROM), random access Memory (RAM, random Access Memory), magnetic or optical disk, and the like.
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the application.
It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.

Claims (6)

1. A KeilC 51-based software source code and target code coverage rate analysis method is characterized by comprising the following steps:
s1: constructing a Keil platform-based software executable environment, and loading information files including software source codes, target codes and M51 files;
s2: analyzing the loaded information files including the software source code, the target code and the M51 file to generate a corresponding relation file of the association of the software source code and the target code PC address; the information of the source code file comprises a source code file name, a source code line number and a source code text of the current data record; the information of the M51 file comprises a source code line number, a type and a target code address of the current data record; the information of the target code comprises a target code address, a target code instruction code and target code instruction content; in the step S2, the M51 file is parsed to include the code segment address of each entry of the index code instruction, the corresponding source code file name, and the mapping information including the source code line number;
s3: executing the test case by using a software executable environment of the Keil platform, and generating a target code execution result file of the current case by a Keil command; when executing a plurality of test cases, generating a plurality of target code execution result files;
in the step S3, the step of generating the target code execution result file of the current use case by the Keil command includes: calling instructions including COVERAGE, COVERAGEASM in the Keil platform, and setting a Keil command result redirection file;
in the step S3, the target code execution result file includes state information in each entry of the target code instruction, where the state information indicates that the instruction does not execute NE, the instruction has executed EX, the instruction is jump-executed JO only for a jump branch, the instruction is jump-executed JN only for a jump branch, the instruction is jump-executed JF completely;
s4: merging and summarizing the execution conditions of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file; in the step S4, the method for merging and summarizing the execution condition of each instruction of the target code includes: analyzing a plurality of target code execution files, and carrying out pairwise comparison analysis and summarization on the execution conditions of the target codes with the same addresses.
2. The method of claim 1, further comprising, after the step S4, differentiating the coverage of the corresponding instruction with different text colors or text background colors from the object code coverage analysis file and displaying the coverage analysis of the software source code and the object code in a mixed mode.
3. A KeilC51 software source code and object code coverage analysis system, the system comprising:
the loading unit is used for constructing a Keil platform-based software executable environment and loading information files including software source codes, target codes and M51 files;
the analysis unit is used for analyzing the loaded information files including the software source code, the target code and the M51 file and generating a corresponding relation file of the association of the software source code and the target code PC address; the information of the source code file comprises a source code file name, a source code line number and a source code text of the current data record; the information of the M51 file comprises a source code line number, a type and a target code address of the current data record; the information of the target code comprises a target code address, a target code instruction code and target code instruction content; in the step S2, the M51 file is parsed to include the code segment address of each entry of the index code instruction, the corresponding source code file name, and the mapping information including the source code line number;
the execution case unit is used for executing the test case by utilizing the software executable environment of the Keil platform and generating a target code execution result file of the current case through Keil commands; when executing a plurality of test cases, generating a plurality of target code execution result files; the step of generating the target code execution result file of the current use case through the Keil command comprises the following steps: calling instructions including COVERAGE, COVERAGEASM in the Keil platform, and setting a Keil command result redirection file; the target code execution result file comprises state information which indicates that an instruction does not execute NE, an instruction has executed EX, an instruction is a jump branch and only jumps to execute JO, an instruction is a jump branch and only does not jump to execute JN, and an instruction is a jump branch and completely executes JF in each item of target code instruction;
the merging and summarizing unit is used for merging and summarizing the execution condition of each instruction of the target code in one or more target code execution result files, generating a target code coverage rate analysis file, generating a software source code coverage rate analysis file according to the corresponding relation file, and merging and summarizing the execution condition of each instruction of the target code, wherein the method comprises the following steps: analyzing a plurality of target code execution files, and carrying out pairwise comparison analysis and summarization on the execution conditions of the target codes with the same addresses.
4. The system of claim 3, further comprising a display unit configured to distinguish coverage of corresponding instructions by different text colors or text background colors from the object code coverage analysis file and to display coverage analysis of the software source code and object code in a mixed mode.
5. A computer device comprising a memory and a processor, the memory having stored therein computer readable instructions that, when executed by the processor, cause the processor to perform the steps of the KeilC51 based software source code and object code coverage analysis method of any one of claims 1 to 2.
6. A storage medium storing computer readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of the KeilC 51-based software source code and object code coverage analysis method of any one of claims 1 to 2.
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