CN112799942A - Software source code and target code coverage rate analysis method and system based on Keil C51 - Google Patents
Software source code and target code coverage rate analysis method and system based on Keil C51 Download PDFInfo
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- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3668—Software testing
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Abstract
The invention discloses a software source code and target code coverage rate analysis method and system based on Keil C51, wherein the method comprises the following steps: s1: loading an information file comprising software source code, object code and an M51 file; s2: analyzing the loaded information file to generate a corresponding relation file of the correlation between the software source code and the target code PC address; s3: executing the test case by using a software executable environment of a Keil platform, and generating a target code execution result file of the current case through a Keil command; when a plurality of test cases are executed, a plurality of target code execution result files are generated; s4: and merging and summarizing the execution conditions of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file. According to the invention, the coverage rate analysis file of the software source code can be generated by utilizing the corresponding relation between the software source code and the target code, so that the target code difference caused by pile insertion is avoided.
Description
Technical Field
The invention relates to the field of software testing, in particular to a method and a system for analyzing coverage rate of software source codes and target codes based on Keil C51.
Background
In computer software testing, when coverage analysis is performed in a traditional testing method, software source codes or object codes need to be instrumented, output information is inserted, then software is compiled again and operated, and the coverage of the software is obtained by analyzing the output information. In the software testing process, the inventor of the application finds that the traditional testing mode has the following defects:
(1) the compiled software needs to be modified, and the instrumented object code and the original software object code inevitably have difference, which may cause hidden danger.
(2) When multiple instrumentation analysis is required for executing multiple test cases, because target codes after instrumentation at each time are different, great difficulty is brought when software coverage rate statistics and summary are carried out after the multiple test cases are executed.
Disclosure of Invention
In order to solve the above problems, embodiments of the present application provide a method and a system for analyzing coverage of source codes and target codes of software based on Keil C51, obtain coverage information without modifying software target codes, and generate a source code coverage analysis file and a target code coverage analysis file of multiple test case execution results by using a method for analyzing and summarizing target code execution conditions of different test cases.
In a first aspect, an embodiment of the present application provides a software source code and target code coverage analysis method based on Keil C51, where the method includes:
s1: building a software executable environment based on a Keil platform, and loading information files comprising software source codes, object codes and M51 files;
s2: analyzing the loaded information files including the software source codes, the target codes and the M51 file to generate a corresponding relation file of the correlation between the software source codes and the target codes PC addresses;
s3: executing the test case by using a software executable environment of a Keil platform, and generating a target code execution result file of the current case through a Keil command; when a plurality of test cases are executed, a plurality of target code execution result files are generated;
s4: and merging and summarizing the execution conditions of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
Preferably, in the step S2, the M51 file is parsed with mapping information including a code segment address, a corresponding source code file name, and a source code line number of each object code instruction.
Preferably, in step S3, the step of generating the object code execution result file of the current use case by the Keil command includes: and calling instructions including COVERAGE and COVERAGE ASM in the Keil platform, and setting a Keil command result redirection file.
Preferably, in step S3, the object code execution result file includes state information indicating that the instruction does not execute NE, the instruction has executed EX, the instruction is jump-branch-only-jump-execute JO, the instruction is jump-branch-only-jump-execute JN, and the instruction is jump-branch-only-complete-execute JF in each object code instruction.
Preferably, in step S4, the method for merging and summarizing the execution condition of each instruction of the object code includes: and analyzing the plurality of target code execution files, and performing pairwise comparison analysis and summarization on the execution conditions of the target codes with the same address.
Preferably, after the step S4, the method further includes distinguishing the coverage of the corresponding instruction by the target code coverage analysis file and the software source code coverage analysis file in different text colors or text background colors, and displaying the software source code and the target code in a mixed mode of coverage analysis.
In a second aspect, an embodiment of the present application provides a source code and target code coverage analysis system based on Keil C51 software, the system including:
the loading unit is used for building a software executable environment based on a Keil platform and loading information files comprising software source codes, object codes and an M51 file;
the analysis unit is used for analyzing the loaded information files including the software source codes, the target codes and the M51 file to generate a corresponding relation file of the correlation between the software source codes and the target codes PC addresses;
the execution case unit is used for executing the test case by utilizing a software executable environment of a Keil platform and generating a target code execution result file of the current case through a Keil command; when a plurality of test cases are executed, a plurality of target code execution result files are generated;
and the merging and summarizing unit is used for merging and summarizing the execution condition of each instruction of the target code in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
Preferably, the system further comprises a display unit, which is used for distinguishing the coverage condition of the corresponding instruction by the target code coverage analysis file and the software source code coverage analysis file respectively in different text colors or text background colors, and analyzing and displaying the software source code and the target code in a mixed mode of coverage.
In a third aspect, the present application provides a computer device, including a memory and a processor, where the memory stores computer readable instructions, and the computer readable instructions, when executed by the processor, cause the processor to execute the steps of the software source code and target code coverage analysis method based on Keil C51 according to the first aspect.
In a fourth aspect, embodiments of the present application provide a storage medium storing computer-readable instructions, which when executed by one or more processors, cause the one or more processors to perform the steps of the Keil C51-based software source code and target code coverage analysis method of the first aspect.
The software source code and target code coverage rate analysis method and system based on Keil C51 provided by the embodiment of the application have at least the following technical effects:
1, because the compiling software does not need to be modified, the instrumented object code and the original software object code do not generate difference, and hidden danger caused by the difference is avoided.
2, because the software executable environment is realized by configuring Keil C51, multiple test cases are executed to obtain multiple target code execution result files, after the target code execution result files of the test cases are merged and aggregated, the target code coverage rate information of the software can be obtained, and a coverage rate information file of the software source codes is generated according to the corresponding relation between the software source codes and the target codes.
Drawings
FIG. 1 is a flowchart of a software source code and target code coverage analysis method based on Keil C51 according to a first embodiment of the present application;
FIG. 2 is a flowchart of another software source code and target code coverage analysis method based on Keil C51 according to a first embodiment of the present application;
fig. 3 is a block diagram of a software source code and target code coverage analysis system based on Keil C51 in embodiment two of the present application.
Detailed Description
In order to better understand the technical solution, the technical solution will be described in detail with reference to the drawings and the specific embodiments.
Example one
Referring to fig. 1-2, the present embodiment provides a software source code and target code coverage analysis method based on Keil C51, where the method includes:
step S1: and (4) building a software executable environment based on a Keil platform, and loading an information file comprising software source code, object code and an M51 file.
In this embodiment, based on the Keil platform, further, the Keil platform is a microcontroller software development platform developed by Keil of a well-known software company, and is generally used as a tool for developing an ARM core single chip microcomputer. The Keil platform provides a complete development solution including C compiler, macro assembly, linker, library management and a powerful emulated debugger, which combines these functions together through an integrated development environment (uVision). Therefore, in the software executable environment based on the Keil platform, the method can be understood to be the establishment of a mu Vision4 integrated development environment, the others comprise an efficient compiler, a project manager and a MAKE tool, and the Keil C51 is a high-efficiency C language compiler specially designed for a single chip microcomputer, conforms to the ANSI standard, generates program codes with extremely high running speed, requires extremely small memory space and can be completely comparable to assembly language.
Step S2: and analyzing the loaded information files including the software source codes, the target codes and the M51 file to generate a corresponding relation file of the correlation between the software source codes and the PC addresses of the target codes.
Further, the correspondence relation file of this embodiment includes a plurality of data records, and each data record includes the following information:
the information extracted from the source code file comprises information such as a source code file name, a source code line number, a source code text and the like of the current data record; information extracted from the M51 file, including information such as the source code LINE number, type ("LINE #"), destination code address, etc. of the current data record; the information extracted from the target code file comprises information such as a target code address, a target code instruction code, target code instruction content and the like.
Of course, in the correspondence file, there may be a case where one source code instruction corresponds to a plurality of object code instructions, and there may also be a case where a plurality of source code instructions correspond to one object code instruction.
As shown in table 1, the corresponding relationship file of the software source code and the target code PC address is associated.
TABLE 1
In step S2, the M51 file is parsed into mapping information including a code segment address, a corresponding source code file name, and a source code line number of each object code instruction.
Step S3: executing the test case by using a software executable environment of a Keil platform, and generating a target code execution result file of the current case through a Keil command; and when a plurality of test cases are executed, a plurality of object code execution result files are generated.
In step S3, the step of generating the object code execution result file of the current use case by the Keil command includes: and calling instructions including COVERAGE and COVERAGE ASM in the Keil platform, and setting a Keil command result redirection file.
In step S3, the object code execution result file includes state information indicating that the instruction has not executed NE, the instruction has executed EX, the instruction has jumped only JO for jump branch, the instruction has jumped only JN for jump branch, and the instruction has jumped branch and fully executed JF in each object code instruction.
Step S4: and merging and summarizing the execution conditions of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
As shown in table 2, the object code execution case merging analysis decision table.
TABLE 2
In step S4, the method for merging and summarizing the execution condition of each instruction of the target code includes: and analyzing the plurality of target code execution files, and performing pairwise comparison analysis and summarization on the execution conditions of the target codes with the same address.
After step S4, the method further includes distinguishing the coverage of the corresponding instructions by the target code coverage analysis file and the software source code coverage analysis file in different text colors or text background colors, and displaying the software source code and the target code in a mixed mode coverage analysis.
Example two
Referring to fig. 3, the present embodiment provides a source code and target code coverage analysis system based on Keil C51 software, and the analysis method of the first embodiment is adopted. The system in this embodiment includes:
and the loading unit 10 is used for building a software executable environment based on a Keil platform and loading information files comprising software source codes, object codes and an M51 file.
And the analysis unit 20 is configured to analyze the loaded information file including the software source code, the object code and the M51 file, and generate a corresponding relationship file in which the software source code and the object code PC address are associated.
The execution case unit 30 is used for executing the test case by using the software executable environment of the Keil platform and generating a target code execution result file of the current case through a Keil command; and when a plurality of test cases are executed, a plurality of object code execution result files are generated.
And the merging and summarizing unit 40 is configured to merge and summarize the execution conditions of each instruction of the target codes in the one or more target code execution result files to generate a target code coverage analysis file, and generate a software source code coverage analysis file according to the corresponding relationship file.
The system also comprises a display unit which is used for distinguishing the coverage condition of the corresponding instruction by the target code coverage rate analysis file and the software source code coverage rate analysis file respectively according to different character colors or character background colors, and analyzing and displaying the software source code and the target code according to the coverage rate of a mixed mode.
EXAMPLE III
The present embodiments provide a computer device comprising a memory and a processor, the memory having stored therein computer readable instructions which, when executed by the processor, cause the processor to perform the following steps. Step S1: and (4) building a software executable environment based on a Keil platform, and loading an information file comprising software source code, object code and an M51 file. Step S2: and analyzing the loaded information files including the software source codes, the target codes and the M51 file to generate a corresponding relation file of the correlation between the software source codes and the PC addresses of the target codes. Step S3: executing the test case by using a software executable environment of a Keil platform, and generating a target code execution result file of the current case through a Keil command; and when a plurality of test cases are executed, a plurality of object code execution result files are generated. Step S4: and merging and summarizing the execution conditions of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
The present embodiments provide a storage medium having stored thereon computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of:
step S1: and (4) building a software executable environment based on a Keil platform, and loading an information file comprising software source code, object code and an M51 file. Step S2: and analyzing the loaded information files including the software source codes, the target codes and the M51 file to generate a corresponding relation file of the correlation between the software source codes and the PC addresses of the target codes. Step S3: executing the test case by using a software executable environment of a Keil platform, and generating a target code execution result file of the current case through a Keil command; and when a plurality of test cases are executed, a plurality of object code execution result files are generated. Step S4: and merging and summarizing the execution conditions of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file. Those skilled in the art will appreciate that all or part of the steps in the methods of the above embodiments may be implemented by associated hardware instructed by a program, which may be stored in a computer-readable storage medium, and the storage medium may include: read Only Memory (ROM), Random Access Memory (RAM), magnetic or optical disks, and the like.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, if such modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include such modifications and variations.
Claims (10)
1. A software source code and target code coverage rate analysis method based on KeilC51 is characterized by comprising the following steps:
s1: building a software executable environment based on a Keil platform, and loading information files comprising software source codes, object codes and M51 files;
s2: analyzing the loaded information files including the software source codes, the target codes and the M51 file to generate a corresponding relation file of the correlation between the software source codes and the target codes PC addresses;
s3: executing the test case by using a software executable environment of a Keil platform, and generating a target code execution result file of the current case through a Keil command; when a plurality of test cases are executed, a plurality of target code execution result files are generated;
s4: and merging and summarizing the execution conditions of each instruction of the target codes in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
2. The method as claimed in claim 1, wherein in the step S2, the M51 file is parsed with mapping information including a code segment address, a corresponding source code file name, and a source code line number of each object code instruction.
3. The method as claimed in claim 1, wherein the step of generating the object code execution result file of the current use case by the Keil command in the step S3 comprises: and calling instructions including COVERAGE and COVERAGE ASM in the Keil platform, and setting a Keil command result redirection file.
4. The method as claimed in claim 3, wherein the object code execution result file includes state information indicating an instruction non-execution NE, an instruction already executed EX, an instruction jump-only execution JO for jump branch, an instruction jump-only non-jump execution JN for jump branch, an instruction jump branch and full execution JF in each object code instruction at step S3.
5. The method as claimed in claim 1, wherein in step S4, the method for merging and summarizing the execution condition of each instruction of the object code comprises: and analyzing the plurality of target code execution files, and performing pairwise comparison analysis and summarization on the execution conditions of the target codes with the same address.
6. The KeilC51 software source code and object code coverage analysis method as claimed in claim 5, wherein after the step S4, the method further comprises the steps of distinguishing the coverage of the corresponding instructions by the object code coverage analysis file and the software source code coverage analysis file respectively in different text colors or text background colors, and displaying the software source code and the object code in a mixed mode of coverage analysis.
7. A Keil C51-based software source code and target code coverage analysis system, characterized in that the system comprises:
the loading unit is used for building a software executable environment based on a Keil platform and loading information files comprising software source codes, object codes and an M51 file;
the analysis unit is used for analyzing the loaded information files including the software source codes, the target codes and the M51 file to generate a corresponding relation file of the correlation between the software source codes and the target codes PC addresses;
the execution case unit is used for executing the test case by utilizing a software executable environment of a Keil platform and generating a target code execution result file of the current case through a Keil command; when a plurality of test cases are executed, a plurality of target code execution result files are generated;
and the merging and summarizing unit is used for merging and summarizing the execution condition of each instruction of the target code in one or more target code execution result files to generate a target code coverage rate analysis file, and generating a software source code coverage rate analysis file according to the corresponding relation file.
8. The system of claim 7, further comprising a display unit, configured to distinguish coverage of the corresponding instructions by the target code coverage analysis file and the software source code coverage analysis file in different text colors or text background colors, respectively, and display the software source code and the target code in a mixed mode coverage analysis.
9. A computer device comprising a memory and a processor, the memory having stored therein computer readable instructions which, when executed by the processor, cause the processor to perform the steps of the Keil C51-based software source code and target code coverage analysis method of any one of claims 1 to 6.
10. A storage medium storing computer readable instructions which, when executed by one or more processors, cause the one or more processors to perform the steps of the Keil C51-based software source code and target code coverage analysis method of any one of claims 1 to 6.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2335155A1 (en) * | 2008-10-09 | 2011-06-22 | Siemens Aktiengesellschaft | Method and apparatus for test coverage analysis |
| CN104063321A (en) * | 2014-06-27 | 2014-09-24 | 北京控制工程研究所 | Test verifying system and test verifying method for microblaze soft-core program |
| CN104657263A (en) * | 2015-02-10 | 2015-05-27 | 上海创景计算机系统有限公司 | System and method for realizing universal type target code coverage rate testing based on JTAG (Joint Test Action Group) debug mode |
| US20160299835A1 (en) * | 2015-04-08 | 2016-10-13 | Opshub, Inc. | Method and system for providing delta code coverage information |
| CN109388566A (en) * | 2018-09-27 | 2019-02-26 | 北京城市网邻信息技术有限公司 | A kind of code coverage rate analysis method, apparatus, equipment and storage medium |
| CN111813672A (en) * | 2020-07-03 | 2020-10-23 | 北京计算机技术及应用研究所 | Non-invasive coverage rate statistical method for various processor architectures |
| CN111813670A (en) * | 2020-07-03 | 2020-10-23 | 北京计算机技术及应用研究所 | Non-invasive MC/DC coverage statistical analysis method |
-
2021
- 2021-01-28 CN CN202110120629.XA patent/CN112799942B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP2335155A1 (en) * | 2008-10-09 | 2011-06-22 | Siemens Aktiengesellschaft | Method and apparatus for test coverage analysis |
| CN104063321A (en) * | 2014-06-27 | 2014-09-24 | 北京控制工程研究所 | Test verifying system and test verifying method for microblaze soft-core program |
| CN104657263A (en) * | 2015-02-10 | 2015-05-27 | 上海创景计算机系统有限公司 | System and method for realizing universal type target code coverage rate testing based on JTAG (Joint Test Action Group) debug mode |
| US20160299835A1 (en) * | 2015-04-08 | 2016-10-13 | Opshub, Inc. | Method and system for providing delta code coverage information |
| CN109388566A (en) * | 2018-09-27 | 2019-02-26 | 北京城市网邻信息技术有限公司 | A kind of code coverage rate analysis method, apparatus, equipment and storage medium |
| CN111813672A (en) * | 2020-07-03 | 2020-10-23 | 北京计算机技术及应用研究所 | Non-invasive coverage rate statistical method for various processor architectures |
| CN111813670A (en) * | 2020-07-03 | 2020-10-23 | 北京计算机技术及应用研究所 | Non-invasive MC/DC coverage statistical analysis method |
Non-Patent Citations (7)
| Title |
|---|
| "基于目标码的测试覆盖不可达分析方法", 《测控技术》, pages 100 - 103 * |
| "基于目标码的测试覆盖不可达分析方法", pages 100 - 103 * |
| THOMAS REINBACHER: "Motivating Model Checking of Embedded Systems Software", pages 1 - 6, Retrieved from the Internet <URL:《2008 IEEE/ASME International Conference on Mechtronic and Embedded Systems and Applications》> * |
| 严俊: "JUTA: 一个Java自动化单元测试工具", 《计算机研究与发展》, pages 1840 - 1848 * |
| 严俊: "JUTA: 一个Java自动化单元测试工具", pages 1840 - 1848 * |
| 佚名: "НОВЫЕ ВОЗМОЖНОСТИ В ИНТЕГРИРОВАННОЙ СРЕДЕ РАЗРАБОТКИ KEIL μVISION4", pages 1 - 7, Retrieved from the Internet <URL:《https://cyberleninka.ru/article/n/novye-vozmozhnosti-v-integrirovannoy-srede-razrabotki-keil-vision4》> * |
| 小小城御园: "keil的code coverage输出到txt或者html中", pages 1 - 4, Retrieved from the Internet <URL:《https://blog.csdn.net/qq_37600027/article/details/78956309》> * |
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