CN112768481A - Packaging method of camera module chip and camera module - Google Patents

Packaging method of camera module chip and camera module Download PDF

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Publication number
CN112768481A
CN112768481A CN202110057603.5A CN202110057603A CN112768481A CN 112768481 A CN112768481 A CN 112768481A CN 202110057603 A CN202110057603 A CN 202110057603A CN 112768481 A CN112768481 A CN 112768481A
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China
Prior art keywords
chip
pad
bare
pads
camera module
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CN202110057603.5A
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Chinese (zh)
Inventor
王浩宾
高成虎
郝清山
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Shanghai Yicun Core Semiconductor Co ltd
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Shanghai Yicun Core Semiconductor Co ltd
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Priority to CN202110057603.5A priority Critical patent/CN112768481A/en
Publication of CN112768481A publication Critical patent/CN112768481A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14634—Assemblies, i.e. Hybrid structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/1469—Assemblies, i.e. hybrid integration
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/50—Constructional details

Abstract

The invention provides a camera module chip packaging method and a camera module, wherein the packaging method comprises the following steps: s0, providing a bare chip to be packaged; s1, adhering the bare chip to be packaged on a PCB or other module chips; s2, connecting the bonding pad of the bare chip with the bonding pad of the PCB or the bonding pads of other module chips through a metal bonding wire, wherein the camera module comprises the PCB, a photosensitive chip and a functional chip, and the functional chip is packaged on the PCB by adopting the packaging method.

Description

Packaging method of camera module chip and camera module
Technical Field
The invention relates to the technical field of chip manufacturing, in particular to a camera module chip packaging method and a camera module.
Background
The camera module generally mainly comprises four main parts: lens, sensor, soft board, image processing chip, the important part of deciding a camera quality is: camera lens, image processing chip, sensor, the key technology of camera module is: optical design technology, aspherical mirror manufacturing technology and optical coating technology.
The working principle of the camera is that light collected by an object through a lens is converted into an electrical signal through a complementary metal oxide semiconductor integrated circuit, and the electrical signal is converted into a digital image signal through an internal image processor and then output to a digital signal processor for processing, and the digital image signal is converted into standard RGB (red, green, blue) and YUV (Luma, Luma.
For a Chip of a current camera module, the Chip generally includes two functional chips, namely a storage Chip and a driving Chip, or includes a Chip having both a storage function and a driving function, while in the prior art, a Wafer is generally packaged by Wafer Level Chip Scale Packaging (WLCSP), in which the functional Chip is packaged on a Printed Circuit Board (PCB) or other chips of the camera module, specifically, a bump is fabricated on the functional Chip to be packaged, and then the functional Chip is connected to a pad of the PCB or a pad of another Chip by melting the bump at a high temperature in a solder pot.
However, the chip packaging method needs to manufacture the bumps for the packaged functional chips, and then needs to perform operations such as roll-up and roll-off, which results in a longer production cycle of the camera module chip on one hand, and on the other hand, the chip is packaged by adopting the bump mode, so that the thickness of the chip is difficult to compress due to the heights of the bumps and the back film, and the overall design height of the camera mold is affected.
Therefore, there is a need to provide a novel method for packaging a camera module chip and a camera module to solve the above-mentioned problems in the prior art.
Disclosure of Invention
The invention aims to provide a camera module chip packaging method and a camera module, which can effectively reduce the thickness of a packaged chip.
In order to achieve the above object, the method for packaging a camera module chip according to the present invention includes the following steps:
s0, providing a bare chip to be packaged;
s1, adhering the bare chip to be packaged on a PCB or other module chips;
and S2, connecting the bonding pads of the bare chip and the bonding pads of the PCB or the other module chips together through metal bonding wires.
The invention has the beneficial effects that: the bare chip to be packaged is adhered to a PCB or other module chips, the bonding pad of the bare chip is connected with the bonding pad of the PCB or the bonding pads of the other module chips through the metal welding wire, a back film is not required to be pasted on the chip, and a bump is not required to be manufactured, so that the thickness of the packaged chip is effectively reduced, the packaging process of the chip is reduced, the production cost of the camera module is reduced, and the production cycle of the chip and the camera module is effectively shortened.
Further, the bare chip comprises at least one of a memory chip, a driver chip and a combination chip, wherein the combination chip has both memory function and driver function. The beneficial effects are that: the storage chip, the drive chip and the combined chip are packaged in the camera module by adopting the packaging method, so that the thickness of the chip in the whole camera module after the storage chip, the drive chip and the combined chip are packaged is reduced, and the designability of the whole camera module is effectively improved.
Further, the pads of the die are randomly distributed on the die. The beneficial effects are that: make the pad overall arrangement of bare chip unrestricted, can carry out the rational selection according to the inside chip overall arrangement of camera module, be favorable to the bonding wire overall arrangement of the inside chip of camera module.
Further, the pads of the PCB are distributed on the PCB randomly. The beneficial effects are that: the layout of the bonding pads of the PCB is more flexible.
Further, the pads of the other module chips are randomly distributed on the other module chips. The beneficial effects are that: the pad layout of other module chips is more flexible.
Further, the bare chip includes any one of a storage chip, a driving chip and a combined chip, and the bonding pad of the storage chip, the bonding pad of the driving chip or the bonding pad of the combined chip are connected with the bonding pad of the PCB board or the bonding pad of the other module chip through the metal bonding wire.
Further, the bare chip comprises a storage chip and a drive chip, a bonding pad of the storage chip is connected with a bonding pad of the drive chip through the metal bonding wire, and the bonding pad of the storage chip or the bonding pad of the drive chip is connected with a bonding pad of the PCB or a bonding pad of the other module chip through the metal bonding wire.
Furthermore, the bare chip comprises a storage chip and a driving chip, a bonding pad of the driving chip is connected with a first connecting bonding pad of the PCB through the metal bonding wire, a bonding pad of the storage chip is connected with a second connecting bonding pad of the PCB through the metal bonding wire, and the first connecting bonding pad and the second connecting bonding pad are the same or completely different.
Further, the bare chip comprises a storage chip and a driving chip, a bonding pad of the driving chip is connected with a third connecting bonding pad of the other module chip through a metal bonding wire, a bonding pad of the storage chip is connected with a fourth connecting bonding pad of the other module chip through a metal bonding wire, and the third connecting bonding pad and the fourth connecting bonding pad are partially the same or completely different.
Further, the bare chip comprises a storage chip and a drive chip, a bonding pad of the drive chip is connected with a fifth connection bonding pad of the PCB through the metal bonding wire, a bonding pad of the storage chip is connected with a sixth connection bonding pad of the other module chip through the metal bonding wire, and the fifth connection bonding pad and the sixth connection bonding pad are partially the same or completely different.
Further, the bare chip comprises a storage chip and a driving chip, a bonding pad of the driving chip is connected with a seventh connecting bonding pad of the other module chips through the metal bonding wire, a bonding pad of the storage chip is connected with an eighth connecting bonding pad of the PCB through the metal bonding wire, and the seventh connecting bonding pad and the eighth connecting bonding pad are partially the same or completely different.
Further, the bare chip is mounted on the other module chip, and the pad of the bare chip is connected to the pad of the PCB board through the pad of the other module chip, or the pad of the bare chip is directly connected to the pad of the PCB board.
Further, the method for preparing the bare chip comprises the following steps:
sa1, providing a wafer, and cutting the wafer according to the parameters of the cutting channels of the wafer;
sa2, grinding the wafer to a preset thickness;
sa3, cutting the wafer along the cutting streets to obtain a plurality of bare dies, and forming the bare chip with at least one of the bare dies. The beneficial effects are that: the preparation method is adopted to prepare the wafer to be packaged to obtain the bare chip, so that the bare chip can be directly subjected to the subsequent packaging process.
Further, the preset thickness is 50-400 μm. The beneficial effects are that: so as to meet the design requirements of the camera module under different conditions.
Furthermore, the parameters of the cutting path at least comprise the width, and the width is 10-200 μm. The beneficial effects are that: the method meets different cutting requirements, and designs more chips in the same area as much as possible so as to reduce the cost.
Further, in the step Sa3, after the wafer is cut along the cutting streets to obtain a plurality of bare dies, the method further includes a step of picking the bare dies to remove unqualified bare dies.
Further, before the wafer is ground in the step Sa2, the wafer testing is further included. The beneficial effects are that: through testing the wafer, screening test defective products improve the packaging quality of subsequent chips, reduce the packaging defective products.
The invention also discloses a camera module which comprises a PCB, a photosensitive chip and a functional chip, wherein the functional chip is packaged on the PCB by adopting the packaging method.
Further, the functional chip includes at least one of a storage chip, a driving chip and a combination chip, wherein the combination chip has both a storage function and a driving function.
Drawings
FIG. 1 is a general flow chart of a packaging method according to an embodiment of the present invention;
FIG. 2 is a flow chart of a method of fabricating a bare wafer according to an embodiment of the present invention;
fig. 3 is a top view structural diagram of a chip packaged by the conventional WLCSP packaging method according to the embodiment of the present invention;
fig. 4 is a side view structural diagram of a chip in a first case after being packaged by the conventional WLCSP packaging method according to the embodiment of the present invention;
fig. 5 is a schematic side view of a chip in a second case after being packaged by the conventional WLCSP packaging method according to the embodiment of the invention;
FIG. 6 is a schematic diagram of a side view of a chip packaged by the packaging method according to the embodiment of the invention;
FIG. 7 is a schematic top view of a chip packaged by the packaging method according to the embodiment of the invention;
FIG. 8 is a schematic diagram illustrating a wafer after dicing according to an embodiment of the present invention;
fig. 9 is a schematic diagram illustrating an overall structure of bumps packaged by the conventional WLCSP packaging method according to the embodiment of the present invention;
fig. 10 is a schematic structural diagram of a WLCSP packaging method according to the conventional method after the bumps are melted;
FIG. 11 is a schematic diagram of a layout structure of a pad of a PCB board according to an embodiment of the invention;
fig. 12 is a schematic view of an overall structure of a chip packaged by the packaging method according to the embodiment of the invention.
Fig. 13 is a schematic view of an overall structure of the camera module according to the embodiment of the present invention;
fig. 14 is a schematic structural diagram of a camera module according to an embodiment of the present invention, which employs a storage chip;
fig. 15 is a schematic structural diagram of a camera module according to an embodiment of the present invention, which employs a driver chip;
fig. 16 is a schematic structural diagram of a camera module according to an embodiment of the present invention, which employs a combined chip.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used herein, the word "comprising" and similar words are intended to mean that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.
To solve the problems in the prior art, an embodiment of the present invention provides a method for packaging a camera module chip, as shown in fig. 1, including the following steps:
s0, providing a bare chip to be packaged;
s1, adhering the bare chip to be packaged on a PCB or other module chips;
and S2, connecting the bonding pads of the bare chip and the bonding pads of the PCB or the other module chips together through metal bonding wires.
In the packaging method, a bare chip to be packaged is directly adhered to a PCB or other module chips, and a bonding pad of the bare chip is connected with a bonding pad of the PCB or bonding pads of the other module chips through a metal bonding wire; while the chip of the camera module is packaged in the prior art, the common packaging method is a wafer level chip packaging method, which is different from the conventional chip packaging method, in the latest technology, a whole wafer is packaged and tested first, and then the wafer is cut into individual Integrated Circuit (IC) particles, so that the packaged volume is equal to the original size of the IC bare chip, but the chip of the packaging method has metal bumps, the metal bumps are melted at high temperature by a tin furnace subsequently so that the chip is connected to a bonding pad of a PCB board or a bonding pad of other module chips, after the chip is prepared, the processes of reeling and unreeling the chip, surface mount technology (surface mount technology) and Reflow soldering (Reflow soldering) are further included, and since the above processes are all common processes in the chip packaging process, and will not be described in detail herein.
In the packaging method of the embodiment, because the bare chip 1 is directly packaged on the PCB 3 or other module chips of the camera module through the metal bonding wire 2, the bare chip 1 is directly packaged, the thickness of the packaged chip in the whole camera module is effectively reduced, the processes of the roll loading, the roll unloading, the SMT chip mounting and the reflow soldering are not needed to be carried out on the chip, the packaging process of the chip is reduced, the production cost of the whole camera module is reduced, and the production cycle of the chip in the camera module and the whole camera module is also shortened.
Because two types of functional chips are commonly used in the existing camera module, including storage type chip and drive type chip, play storage effect and drive effect respectively in the camera module, or have the chip of storage and drive function concurrently again, play storage and drive effect simultaneously in the camera module, in some embodiments, bare chip 1 includes at least one of storage type chip, drive type chip and combination chip, and wherein the combination chip has storage function and drive function concurrently.
It should be noted that, in this embodiment, the number of the bare chips is at least one, and different selections are performed on the bare chips according to the usage requirements of the camera module, so that at least one storage chip, at least one driving chip, or at least one combination chip may be independently selected, and meanwhile, in consideration of the usage performance of the camera module, the number of the storage chips, the driving chips, or the combination chips is greater than one, for example, two storage chips and two driving chips, two storage chips and two combination chips, two driving chips and two combination chips, which are not listed here, and may be selected according to actual situations, so as to meet different requirements of the camera module.
Furthermore, because the bare chip comprises at least one of a storage chip, a drive chip and a combined chip, the packaging method is adopted to package the bare chip in the camera module, so that the thickness of the chip in the whole camera module after the storage chip, the drive chip and the combined chip are packaged is effectively reduced, and the designability of the whole camera module is enhanced.
In other embodiments, as shown in fig. 2, a method of fabricating a die includes:
sa1, providing a wafer, and cutting the wafer according to the parameters of the cutting channels of the wafer;
sa2, grinding the wafer to a preset thickness;
sa3, cutting the wafer along the cutting streets to obtain a plurality of bare dies, and forming the bare chip with at least one of the bare dies.
According to the required bare chip, the bare chips with different functions are prepared by the preparation method, and after the required wafer 4 is provided, the wafer 4 is ground, so that the ground thickness of the wafer 4 reaches the preset thickness.
In some embodiments, the predetermined thickness is 50 to 400 μm, so as to satisfy the design requirements of the camera module under different conditions.
Compared with the prior art, the process steps of wafer providing, bump making, wafer testing, wafer grinding, back film making, wafer cutting, back seal processing, grain picking processing and roll loading processing are generally included when the chips are produced in the prior art, and are not repeated here.
In some embodiments, a structure obtained by packaging a chip in a conventional WLCSP packaging manner includes, as shown in fig. 3 in a top view, as shown in fig. 4 in a side view, a bump 9, a die and a back film 11 from top to bottom, while in this embodiment, as shown in fig. 7 in a top view, and as shown in fig. 6 in a side view, compared with the above-mentioned two embodiments, the packaging method of the present embodiment directly packages a die to obtain a die, so that the chip processed by the packaging method of the present embodiment has a thickness that is significantly smaller than the thickness of the chip in the conventional packaging method, and at least the bump 9 and the back film 11 are removed; the three are structures in the WLCSP packaging mode, and since the bump 9 and the backing film 11 are not needed, the thickness of the packaged chip in this embodiment is reduced by the height of the bump 9 and the thickness of the backing film 11, so that the thickness of the bare chip after packaging is obviously smaller than that of the chip obtained by the conventional packaging method, the thickness of the packaged chip is effectively reduced, and different chip design requirements are met.
In still other embodiments, a top view of a structure obtained by packaging a chip in a conventional WLCSP packaging manner is shown in fig. 5, wherein the chip includes a bump 9, an under bump metallurgy 10(UBM), a bare chip and a back film 11, wherein the UBM generally has three layers, namely, chromium-copper and copper, mainly preventing oxidation of the copper metal, the flange is made of a lead-tin alloy, and a eutectic compound or other components can be selected according to different application requirements; compared with the prior art, the method for packaging the bare chip directly obtains the bare chip by packaging the bare chip, and at least removes the bump 9, the UBM layer 10 and the back film 11, namely, the thickness of the packaged chip in the embodiment is reduced by the height of the bump 9, the thickness of the UBM layer 10 and the thickness of the back film 11, so that the thickness of the packaged bare chip is obviously smaller than that of the chip obtained by the traditional packaging method, the thickness of the packaged chip is effectively reduced, and different chip design requirements are met conveniently.
In a further embodiment, after the chip is packaged in a WLCSP packaging manner, the height of the bump 9 (the bump is generally a sphere, and the height refers to a distance between a top end of the bump and a surface of the chip) is 55um, the thickness of the UBM layer 10 is 5um, the ground thickness of the chip is 195um, and the thickness of the back film 11 is 25 um.
As shown in fig. 8, the ground wafer is then cut to obtain a plurality of cutting streets 5, including the cutting streets 5 in the horizontal direction and the vertical direction, the bare die 6 is separated from the wafer 4 after the wafer 4 is cut along the cutting streets 5, and then the single bare die 6 or the plurality of bare dies 6 are formed into the bare chip 1 according to the required bare chip 1, so as to meet different preparation requirements.
In still other embodiments, the parameters of the scribe line at least include a width, and the width is 10 to 200 μm, so that more chips can be arranged in the same area to reduce the cost and ensure the quality of the subsequent bare die 6 under the condition of meeting different cutting requirements.
In other embodiments, before the wafer is ground in the step Sa2, the wafer testing method further includes testing the wafer, so as to avoid a defective product of a subsequently obtained bare die and improve the packaging efficiency of a subsequent chip.
In some embodiments, in the step Sa3, after the wafer is cut along the cutting streets to obtain a plurality of bare dies, the method further includes a step of picking the bare dies to remove unqualified bare dies, so that the bare dies do not need to be picked again in the subsequent packaging process, and the packaging efficiency is improved.
It should be noted that, the processes of testing the wafer and selecting the bare die in the above processes are processes in the prior art, and the present solution does not involve improvement thereof, and is not described herein again.
In some embodiments, when the bare chip is adhered to a PCB or other module chips, a Die Attach Film (DAF) is selected, wherein the DAF is referred to as a Die Attach Film, and is used for cutting and separating the chips together during laser cutting, and peeling off the chips, so that the chips after cutting are not scattered due to cutting, and the process of adhering the bare chip to the PCB or other module chips is a common Die adhering process in the prior art, and is not repeated herein.
Further, in step S2 of the packaging method, when the pads of the bare chip and the pads of the PCB or the other module chips are connected by the metal bonding wires, in order to meet the routing layout requirements under different conditions, the pads of the bare chip are distributed at any position of the bare chip, and the pads of the PCB or the other module chips are also distributed randomly, for example, at any side or several sides around the bare chip.
In some embodiments, since the bare chip 1 includes any one or more of a memory-like chip, a driver-like chip, and a combined chip, the combined chip has both memory function and driver function.
Preferably, the pads of the die 1 are randomly distributed on the die, the number of the first pads 101 of the die 1 is generally four, and the four pads may be distributed on the same side of the surface of the die 1, or may be distributed on different positions on multiple sides of the surface of the die 1 singly or in multiple ways.
In some embodiments, as shown in fig. 11, the bonding pads of the PCB board and the bonding pads of the other module chips are referred to as second bonding pads 301, the bonding pads of the PCB board are randomly distributed on the PCB board, and the bonding pads of the other module chips are also randomly distributed on the other module chips.
Further preferably, in this embodiment, the PCB 3 and the second pads 301 of other module chips are pads connected to the first pads 101 of the bare chip by the metal bonding wires 2, and the pad distribution mode can be favorable for reducing the routing length and the routing difficulty when the pads are connected by the metal bonding wires 2, so as to facilitate the layout design of the pads of the chip.
Furthermore, the pad layout mode enables the PCB pads and the chip pads to have high customizability, and the size of the camera module can be reduced as much as possible under the condition that the overall layout of the camera module is not changed; meanwhile, the adaptability of the camera module is high, under the condition that different chips (different pad layouts) are used, the corresponding chips can be used by changing the PCB pad layouts in a small scale, the chips are not required to be additionally changed, and the chip layouts are more flexible.
In still other embodiments, when the bare chip 1 is connected to the PCB 3 or other module chips through the metal bonding wires 2, the pads of the bare chip 1 may be connected to the pads of the PCB 3 or other module chips, or the pads of the bare chip 1 may be directly connected to other module chips.
In some embodiments, the bare chip includes any one of a memory chip, a driver chip and a combination chip, and the bonding pad of the memory chip or the bonding pad of the driver chip or the bonding pad of the combination chip is connected to the bonding pad of the PCB or the bonding pad of the other module chip through the metal bonding wire 2. For example, the bare chip is a memory chip, the number of pads of the memory chip is usually four, and the pads of the memory chip are connected to the pads of the PCB 3 or the pads of other module chips through the metal bonding wires 2.
In still other embodiments, the bare chip includes a memory chip and a driver chip, since the number of pads of the memory chip is usually four, and the number of pads of the driver chip is usually six, the pads of the memory chip and the pads of the driver chip are connected by the metal bonding wires 2, and the pads of the memory chip or the pads of the driver chip are connected by the metal bonding wires to the pads of the PCB board or the pads of the other module chips.
Furthermore, the four bonding pads of the storage chip can be all independently connected with any four of the six bonding pads of the drive chip, namely the four bonding pads of the storage chip are correspondingly connected with four of the six bonding pads of the drive chip one by one, at this time, the four bonding pads of the storage chip are all connected with the bonding pads of the PCB, and the other two bonding pads of the drive chip which are not connected with the bonding pads of the storage chip are connected with the bonding pads of the PCB; and the four bonding pads of the storage chip can be completely connected with the six bonding pads of the drive chip, namely the four bonding pads of the storage chip are correspondingly connected with the six bonding pads of the drive chip, and at the moment, the four bonding pads of the storage chip are all connected with the bonding pads of the PCB.
On the other hand, part of the four bonding pads of the storage chip are all connected with six bonding pads of the driving chip, that is, part of the bonding pads of the storage chip are correspondingly connected with six bonding pads of the driving chip, and at this time, the four bonding pads of the storage chip are all connected with the bonding pads of the PCB.
Furthermore, the six bonding pads of the driving chip are all connected with the four bonding pads of the storage chip, that is, the six bonding pads of the driving chip are correspondingly connected with the four bonding pads of the storage chip, and at this time, the six bonding pads of the driving chip are connected with the bonding pads of the PCB; or a part of bonding pads of the driving chip are connected with all four bonding pads of the storage chip, and all bonding pads of the driving chip are connected with bonding pads of the PCB through metal bonding wires 2.
Still further, a part of the bonding pads of the storage chip are connected with a part of the bonding pads of the driving chip, and all the bonding pads of the storage chip or all the bonding pads of the driving chip are connected with the bonding pads of the PCB.
It should be noted that, in the above scheme, when the pad of the storage chip is connected to the pad of the driving chip, and the pad of the storage chip or the pad of the driving chip is connected to the pad of the PCB, the connection method of the pad of the storage chip or the pad of the driving chip to the pads of the other module chips is further included, and the connection method of the pad of the storage chip or the pad of the driving chip to the pads of the other module chips is the same as the connection method of the pad of the storage chip or the pad of the driving chip to the pad of the PCB 3, and is not described here again.
In some embodiments, the bare chip includes a memory chip and a driver chip, the pad of the driver chip is connected to the first connection pad of the PCB 3 through the metal bonding wire, the pad of the memory chip is connected to the second connection pad of the PCB 3 through the metal bonding wire, and the first connection pad and the second connection pad are partially the same or completely different.
The number of the bonding pads of the storage chip is four, the number of the bonding pads of the driving chip is six, the bonding pads of the storage chip and the bonding pads of the driving chip are respectively connected with the first connection bonding pads and the second connection bonding pads of the PCB board 3, wherein the bonding pads of the driving chip and the bonding pads of the storage chip can be independently connected with the bonding pads of the PCB board 3 in a one-to-one correspondence manner, and the bonding pads of the storage chip and the bonding pads of the driving chip can be connected with the same bonding pads of the PCB board 3 or different bonding pads of the PCB board 3, which is not particularly limited in this scheme.
In some other embodiments, the bare chip includes a memory chip and a driver chip, a pad of the driver chip is connected to the third connection pad of the other module chip through a metal bonding wire, a pad of the memory chip is connected to the fourth connection pad of the other module chip through a metal bonding wire, and the third connection pad and the fourth connection pad are partially the same or completely different.
Since the connection manner of the bonding pads of the storage chips and the driving chips and the bonding pads of the PCB board 3 is substantially the same as the connection manner of the bonding pads of the storage chips and the driving chips and the bonding pads of the other module chips in the embodiment herein, no further description is given here.
In still other embodiments, the bare chip includes a memory chip and a driver chip, the pad of the driver chip is connected to the fifth connection pad of the PCB through the metal bonding wire, the pad of the memory chip is connected to the sixth connection pad of the other module chip through the metal bonding wire, and the fifth connection pad and the sixth connection pad are partially the same or completely different.
Further, the bare chip comprises a storage chip and a driving chip, a bonding pad of the driving chip is connected with a seventh connecting bonding pad of the other module chips through the metal bonding wire, a bonding pad of the storage chip is connected with an eighth connecting bonding pad of the PCB through the metal bonding wire, and the seventh connecting bonding pad and the eighth connecting bonding pad are partially the same or completely different.
Similarly, the pad connection manner of the bare chip is similar to that described above, and is selected under different conditions, and is not described herein again.
Through the installation mode, the connection modes of the storage chip, the drive chip and the combined chip with a PCB or other module chips are richer and more flexible, so that different packaging connection requirements are met.
In still other embodiments, the bare chip is mounted on the other module chip, and the pads of the bare chip are connected to the pads of the PCB board through the pads of the other module chip, or the pads of the bare chip are connected to the pads of the PCB board, wherein the bare chip includes at least one of a memory-type chip, a driver-type chip, and a combination chip, i.e., includes any one or more of them.
And when the above-mentioned bare chip is installed on the other module chips, the pad of the bare chip is connected with the pad of the PCB board 3 through the pad of the other module chips, so that the installation mode of the bare chip, the other module chips and the PCB board 3 is more compact, and the volume of the whole packaging structure is effectively reduced.
It should be noted that the number of the bare chips includes at least one, so as to meet the requirements of different conditions.
Preferably, the chip package structure obtained after the packaging method of the present embodiment is completed is as shown in fig. 12.
The invention also discloses a camera module, which comprises a PCB (printed circuit board) 3, a photosensitive chip 7 and a functional chip 8, wherein the functional chip 8 is packaged on the PCB by adopting the packaging method, as shown in figure 13.
The functional chip 8 in this embodiment is a bare chip in the packaging method described above.
According to the camera module, the packaging method in the embodiment is adopted to package the chip, so that the thickness of the packaged chip in the whole camera module is effectively reduced, the packaging process of the chip is reduced, the production cost of the whole camera module is reduced, and the production period of the chip in the camera module and the whole camera module is shortened.
Further, the functional chip 8 includes at least one of a storage chip 81, a driving chip 82 and a combination chip 83, wherein the combination chip has both a storage function and a driving function.
In some embodiments, as shown in fig. 14, the camera module includes a PCB 3, a photosensitive chip 7, and a storage chip 81, and the storage chip 81 is packaged on the PCB 3 by the above-mentioned packaging method.
In some embodiments, as shown in fig. 15, the camera module includes a PCB 3, a photosensitive chip 7 and a driving chip 82, and the storage chip 81 is packaged on the PCB 3 by the above-mentioned packaging method.
In still other embodiments, as shown in fig. 16, the camera module includes a PCB 3, a photo sensor chip 7, and a combined chip 83, and the combined chip 83 is packaged on the PCB 3 by the above-mentioned packaging method.
Although the embodiments of the present invention have been described in detail hereinabove, it is apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it is to be understood that such modifications and variations are within the scope and spirit of the present invention as set forth in the following claims. Moreover, the invention as described herein is capable of other embodiments and of being practiced or of being carried out in various ways.

Claims (19)

1. A packaging method of a camera module chip is characterized by comprising the following steps:
s0, providing a bare chip to be packaged;
s1, adhering the bare chip to be packaged on a PCB or other module chips;
and S2, connecting the bonding pads of the bare chip and the bonding pads of the PCB or the other module chips together through metal bonding wires.
2. The method for packaging a camera module chip according to claim 1, wherein the bare chip comprises at least one of a memory chip, a driver chip and a combination chip, wherein the combination chip has both a memory function and a driver function.
3. The method of claim 1, wherein the pads of the die are randomly distributed on the die.
4. The method for packaging a camera module chip according to claim 1, wherein the pads of the PCB are randomly distributed on the PCB.
5. The method for packaging a camera module chip as recited in claim 1, wherein the pads of the other module chips are randomly distributed on the other module chips.
6. The method for packaging a camera module chip according to claim 1, wherein the bare chip includes any one of a memory chip, a driver chip and a combination chip, and the bonding pad of the memory chip or the bonding pad of the driver chip or the bonding pad of the combination chip is connected to the bonding pad of the PCB or the bonding pad of the other module chip through the metal bonding wire.
7. The method for packaging a camera module chip according to claim 1, wherein the bare chip includes a memory chip and a driver chip, the pads of the memory chip and the pads of the driver chip are connected by the metal bonding wires, and the pads of the memory chip or the pads of the driver chip are connected by the metal bonding wires to the pads of the PCB or the pads of the other module chips.
8. The method for packaging a camera module chip of claim 1, wherein the bare chip comprises a memory chip and a driver chip, the pad of the driver chip is connected to the first connection pad of the PCB through the metal bonding wire, the pad of the memory chip is connected to the second connection pad of the PCB through the metal bonding wire, and the first connection pad and the second connection pad are partially the same or completely different.
9. The method for packaging a camera module chip as recited in claim 1, wherein the bare chip includes a memory chip and a driver chip, the pads of the driver chip are connected to the third connection pads of the other module chips by metal bonding wires, the pads of the memory chip are connected to the fourth connection pads of the other module chips by metal bonding wires, and the third connection pads and the fourth connection pads are partially identical or completely different.
10. The method for packaging a camera module chip according to claim 1, wherein the bare chip comprises a memory chip and a driver chip, the pad of the driver chip is connected to the fifth connection pad of the PCB board through the metal bonding wire, the pad of the memory chip is connected to the sixth connection pad of the other module chip through the metal bonding wire, and the fifth connection pad and the sixth connection pad are partially the same or completely different.
11. The method for packaging a camera module chip according to claim 1, wherein 10, the bare chip includes a memory chip and a driver chip, the pad of the driver chip is connected to the seventh connection pad of the other module chip through the metal bonding wire, the pad of the memory chip is connected to the eighth connection pad of the PCB through the metal bonding wire, and the seventh connection pad and the eighth connection pad are partially the same or completely different.
12. The method for packaging a camera module chip according to claim 2, wherein the bare chip is mounted on the other module chip, and the pad of the bare chip is connected to the pad of the PCB board through the pad of the other module chip, or the pad of the bare chip is directly connected to the pad of the PCB board.
13. The method for packaging a camera module chip according to claim 1, wherein the method for preparing the bare chip comprises:
sa1, providing a wafer, and cutting the wafer according to the parameters of the cutting channels of the wafer;
sa2, grinding the wafer to a preset thickness;
sa3, cutting the wafer along the cutting streets to obtain a plurality of bare dies, and forming the bare chip with at least one of the bare dies.
14. The method for packaging a camera module chip according to claim 13, wherein the predetermined thickness is 50 to 400 μm.
15. The method for packaging a camera module chip according to claim 13, wherein the parameters of the scribe lines at least include a width, and the width is 10 to 200 μm.
16. The method for packaging a camera module chip according to claim 13, wherein, in the step Sa3, after the wafer is diced along the dicing streets to obtain a plurality of bare dies, the method further includes a step of picking up the bare dies to remove unqualified bare dies.
17. The method for packaging a camera module chip according to claim 13, further comprising testing the wafer before grinding the wafer in step Sa 2.
18. A camera module, comprising a PCB board, a photosensitive chip and a functional chip, wherein the functional chip is packaged on the PCB board by the packaging method according to any one of claims 1 to 17.
19. The camera module according to claim 18, wherein the functional chip comprises at least one of a memory chip, a driver chip and a combination chip, wherein the combination chip has both a memory function and a driver function.
CN202110057603.5A 2021-01-15 2021-01-15 Packaging method of camera module chip and camera module Pending CN112768481A (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090166774A1 (en) * 2007-12-27 2009-07-02 Fujifilm Corporation Wire bonding method and semiconductor device
CN102074559A (en) * 2010-11-26 2011-05-25 天水华天科技股份有限公司 SiP (Session Initiation Protocol) system integrated-level IC (Integrated Circuit) chip packaging part and manufacturing method thereof
CN103563081A (en) * 2011-04-22 2014-02-05 半导体解法株式会社 Sensor-integrated chip for ccd camera
CN111081687A (en) * 2019-12-16 2020-04-28 东莞记忆存储科技有限公司 Stacked chip packaging structure and packaging method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090166774A1 (en) * 2007-12-27 2009-07-02 Fujifilm Corporation Wire bonding method and semiconductor device
CN102074559A (en) * 2010-11-26 2011-05-25 天水华天科技股份有限公司 SiP (Session Initiation Protocol) system integrated-level IC (Integrated Circuit) chip packaging part and manufacturing method thereof
CN103563081A (en) * 2011-04-22 2014-02-05 半导体解法株式会社 Sensor-integrated chip for ccd camera
CN111081687A (en) * 2019-12-16 2020-04-28 东莞记忆存储科技有限公司 Stacked chip packaging structure and packaging method thereof

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