CN112768438B - Crimping type power module and preparation method thereof - Google Patents
Crimping type power module and preparation method thereof Download PDFInfo
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- CN112768438B CN112768438B CN201911068924.4A CN201911068924A CN112768438B CN 112768438 B CN112768438 B CN 112768438B CN 201911068924 A CN201911068924 A CN 201911068924A CN 112768438 B CN112768438 B CN 112768438B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
- H01L25/071—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next and on each other, i.e. mixed assemblies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
Abstract
A compression-bonded power module comprising: the power module layer comprises a first power module layer and a second power module layer which are arranged from top to bottom; the second power module layer comprises a substrate and n x m bosses arranged on the substrate, and each boss is provided with a subunit chip; the second power module layer further comprises n signal transmission strips for connecting the grid electrodes of the sub-unit chips in each row, the signal transmission strips comprise m layers of stacked and integrated signal transmission sub-strips, and each signal transmission sub-strip is used for transmitting a signal of one sub-unit chip; n >1, m > 1. The invention solves the technical problem that the sub-unit chip in the traditional crimping type power module is difficult to independently remove the fault, and can realize independent control and detection of the sub-unit chip in the power module.
Description
Technical Field
The field of semiconductors, in particular to the preparation of power electronic devices
Background
The invention designs a crimping type device which is convenient to detect based on a multilayer PCB, and the device can conveniently test the position of a failure subunit chip of the crimping type device.
In the interior of a traditional welding type IGBT, stray parameters of a circuit are large, and a large voltage spike is generated in the turn-off process and is accompanied with certain electromagnetic interference. When a power system puts higher requirements on power levels and requires more chips to be connected in parallel, parasitic parameters and differences of gates, emitters and collectors of the chips are further increased, voltage overshoot is increased, switching loss is increased, current is greatly unbalanced, and reliability of the device is reduced. Compared with a welding type IGBT, the crimping type IGBT has the advantages of high voltage, large current, low stray inductance, high switching speed, double-sided heat dissipation and the like, so that the crimping type IGBT becomes a mainstream choice of a semiconductor device in high-voltage direct-current power transmission.
The crimping type IGBT is characterized in that all the sub-unit chips are connected in parallel and crimped together through pressure, short circuit failure often occurs in the using process, however, according to the traditional device, all the chips are connected in parallel, and once the chips are short-circuited inside, the whole device fails. The traditional crimping type device is very difficult to remove the failed chips, each chip needs to be taken out independently for wafer level test, and the whole test process is very complicated.
Disclosure of Invention
In order to overcome the defects of the prior art and solve the technical problem that the sub-unit chip in the crimping type power module is difficult to independently remove the fault, the invention provides a crimping type power module structure capable of realizing independent control and detection in the power module and a preparation method thereof.
A compression-bonded power module comprising: the power module layer comprises a first power module layer and a second power module layer which are arranged from top to bottom;
the second power module layer comprises a substrate and n × m bosses arranged on the substrate, and each boss is provided with a subunit chip; the second power module layer further comprises n signal transmission strips for connecting the grid electrodes of the sub-unit chips in each row, the signal transmission strips comprise m layers of stacked and integrated signal transmission sub-strips, and each signal transmission sub-strip is used for transmitting a signal of one sub-unit chip; n >1, m > 1.
Preferably, the widths of the m layers of stacked and integrated signal transmission sub-strips are equal, and the length of each layer of integrated signal transmission sub-strip is gradually decreased from top to bottom according to the position of the sub-unit chip.
Preferably, the m layers of stacked and integrated signal transmission sub-strips comprise thimbles, and the thimbles are connected with the sub-unit chips; and the m layers of stacked and integrated signal transmission sub-strips are connected by adopting an insulating material.
Preferably, the first power module layer includes an upper metal end cap layer and a lower metal end cap layer, and the lower metal end cap layer includes an insulating outer frame and n × m metal blocks corresponding to the sub-unit chips.
Preferably, the subunit chip comprises a power chip and an FRD chip, and the power chip comprises a MOSFET chip or an IGBT chip; the insulating material is one or a combination of more of organic silica gel, phenolic resin glue, urea-formaldehyde resin glue, temperature-resistant epoxy glue and polyimide glue.
A preparation method of a compression joint type power module comprises the following steps:
s1: preparing m layers of stacked and integrated signal transmission sub-strips and a first power module layer; m is greater than 1;
s2: preparing a second power module layer by adopting n signal transmission sub-strips stacked and integrated by the m layers; the second power module layer comprises a substrate and n x m bosses arranged on the substrate, and each boss is provided with a subunit chip; the signal transmission strip comprises m layers of stacked and integrated signal transmission sub-strips, and each signal transmission sub-strip is used for transmitting a signal of one sub-unit chip; n is greater than 1;
s3: placing the first power module layer on the top of the second power module layer, and preparing the power module layer by crimping;
s4: and vertically placing at least one power module layer, and crimping to form a power module.
Preferably, the S1 preparing the m-layer stacked integrated signal transmission sub-strip includes:
s1.1: n signal transmission sub-strips with the length of xi are obtained by cutting on a printed circuit board, wherein 1< i < m;
s1.2: and m signal transmission sub-strips with the length of xi are selected, are stacked according to the sequence from short to long in length and are bonded by adopting insulating materials, and 1< i < m, so that m layers of stacked and integrated signal transmission sub-strips are formed.
Preferably, during the bonding, a contact position of the thimble with the signal transmission sub-strip is reserved in advance and is not bonded, and the contact position of the thimble is determined according to a grid signal connection position of the sub-unit chip.
Preferably, the first power module layer includes a metal end cover upper layer and a metal end cover lower layer, and the metal end cover lower layer includes an insulating outer frame and n × m metal blocks disposed corresponding to the subunit chips.
Preferably, the subunit chip comprises a power chip and an FRD chip, and the power chip comprises a MOSFET chip or an IGBT chip; the insulating material is one or a combination of more of organic silica gel, phenolic resin glue, urea-formaldehyde resin glue, temperature-resistant epoxy glue and polyimide glue.
The present invention proposes to change the traditional mounting method by separating the upper cap into two layers, the lower one being embedded in an FR4 board with a separate copper block connected to the gate of each chip, and the upper one being still covered with a copper end cap. The grid is led out by using a plurality of layers of signal transmission strips, and copper-clad surfaces of the laminates at the external test end sequentially leak out, so that the special signal transmission strips can realize the drive of a specified chip in the device. When a device fails, the upper copper plate of the upper end cover is removed, the grid of a single device is driven independently, and the CE end of the chip is communicated, so that the effect of detecting the single chip can be achieved.
Drawings
Fig. 1 is a schematic diagram of a stacked crimped power module according to an embodiment
FIG. 2 is a top view of a stacked crimped power module according to an embodiment
FIG. 3 is a top view of a stacked crimped power module with end caps removed according to an embodiment
FIG. 4 is a schematic diagram of a multilayer signal transmission strip according to an embodiment
FIG. 5 is a schematic diagram of a layer for preparing a multilayer signal transmission strip according to one embodiment
FIG. 6 is a schematic diagram of two layers for preparing a multilayer signal transmission strip according to the first embodiment
FIG. 7 is a schematic diagram of three layers for preparing a multilayer signal transmission strip according to one embodiment
FIG. 8 is a schematic diagram of five layers for preparing a multilayer signal transmission strip according to the first embodiment
Detailed Description
Reference will now be made in detail to the embodiments of the present invention, the following examples of which are intended to be illustrative only and are not to be construed as limiting the scope of the invention.
Example one
The present embodiment provides a stacked crimping type power module and a method of manufacturing the same, as shown in fig. 1 to 8.
As shown in fig. 1-2, the stacked compression-bonding power module provided in this embodiment includes a chip, an FR4 board, a copper block, and a copper plate, which are sequentially disposed from top to bottom, and an upper end cap is separated into two layers; the lower layer is embedded into an FR4 board by using a single copper block and is connected with the C level of each chip, an insulating outer frame is sleeved on the end cover, and the copper plate is used as the end cover and is arranged at the top layer; the lead-out of the grid electrode uses a plurality of layers of PCB boards, copper-clad surfaces of all layers of PCB boards at the external connection testing end are sequentially leaked, and the special PCB board can realize the drive of a designated chip in a device.
As shown in fig. 3, the multilayer signal transmission strip provided in this embodiment is formed by cutting a single PCB as required, bonding a plurality of PCBs in a staggered manner, and during bonding, the connection portion with the chip gate signal and the outermost lead-out portion are exposed and not bonded, so that the contact of the thimble is facilitated and the subsequent polishing process is avoided. The glue can be organic silicon glue, phenolic resin glue, urea-formaldehyde resin glue, temperature-resistant epoxy glue, polyimide glue and the like, and the required number of layers can be determined according to the number of the subunit chips in the row or the column of the compression joint type power chip.
When a device fails, each subunit chip needs to be controlled independently, and when maintenance test and the like are carried out, the upper copper plate of the upper end cover is removed, as shown in fig. 3, the grid of a single device is driven independently and is communicated with the CE end of the chip, so that the effect of detecting the single chip can be achieved.
A method of manufacturing a compression-type power module, as shown in fig. 5 to 8, comprising:
firstly, manufacturing a plurality of layers of signal transmission strips; and cutting five single strips with lengths corresponding to the distances one by one on the PCB according to the distances from the five subunit chips in each row to the outer edge of the power module. If the number of the sub-unit chips in each row is other number, or each signal transmission strip is used for transmitting signals of the sub-unit chips in each column, the number of the single PCB strips is determined according to the number of the sub-unit chips in each column or row of the pressure welding type power chip. A single layer PCB was prepared as shown in fig. 5. The PCB is staggered and bonded through glue, and the connection part of the PCB and the outermost lead-out part of the grid signal of the chip are leaked during bonding, so that the thimble can be contacted conveniently. Fig. 6 shows two layers of single signal transmission strips of PCBs with different lengths that are bonded together, fig. 7 shows three layers of single signal transmission strips of PCBs with different lengths that are bonded together, and fig. 8 shows five layers of single signal transmission strips of PCBs with different lengths that are bonded together.
Secondly, manufacturing two layers of end covers according to structural characteristics, embedding a separate copper block into an FR4 board at the bottom layer to be connected with the C level of each chip, and placing a copper plate as an end cover at the top layer; the end cover is sleeved with an insulator shell; the upper copper plate of the end cover can be detached, when a device breaks down, the upper copper plate of the end cover is removed, the grid electrode of a single device is driven independently, the CE end of the chip is communicated, and the effect of detecting the single chip can be achieved.
And thirdly, after the parallel connection of all the subunit chips is completed, the subunit chips are crimped to form a power module and packaged. Alternatively, a plurality of the power modules may be prepared, and vertically crimped to form stacked crimped power modules.
The method is simple to prepare, and the step of obtaining the multilayer signal transmission strips by cutting the PCB substrate is only added on the basis of the conventional preparation method of the crimping type power module, so that the module which is easy to independently detect short circuit failure can be manufactured by adopting the crimping type power module manufacturing method, a specified subunit chip in a crimping type IGBT device can be driven, and when the device fails, the failed subunit chip can be conveniently detected.
Although exemplary embodiments of the present invention have been described for illustrative purposes, those skilled in the art will appreciate that various modifications, additions, substitutions and the like can be made in form and detail without departing from the scope and spirit of the invention as disclosed in the accompanying claims, all of which are intended to fall within the scope of the appended claims, and that various steps in the various departments and methods of the claimed product can be combined together in any combination. Therefore, the description of the embodiments disclosed in the present invention is not intended to limit the scope of the present invention, but to describe the present invention. Accordingly, the scope of the present invention is not limited by the above embodiments, but is defined by the claims or their equivalents.
Claims (10)
1. A crimp-style power module, comprising: the power module layer comprises a first power module layer and a second power module layer which are arranged from top to bottom;
the second power module layer comprises a substrate and n × m bosses arranged on the substrate, and each boss is provided with a subunit chip; the second power module layer further comprises n signal transmission strips for connecting the grid electrodes of the sub-unit chips in each row, the signal transmission strips comprise m layers of stacked and integrated signal transmission sub-strips, and each signal transmission sub-strip is used for transmitting a signal of one sub-unit chip; n >1, m > 1.
2. The crimped power module of claim 1, wherein the m layers of stacked integrated signal transmission sub-strips have the same width, and the length of each layer of integrated signal transmission sub-strip decreases from top to bottom in sequence according to the position of the sub-unit chip.
3. The compression-type power module of claim 2, wherein the m-layer stack integrated signal transmission sub-strip comprises ejector pins, the ejector pins being connected with sub-unit chips; and the m layers of stacked and integrated signal transmission sub-strips are connected by adopting an insulating material.
4. The press-fit power module according to claim 1, wherein the first power module layer comprises an upper metal end cover layer and a lower metal end cover layer, and the lower metal end cover layer comprises an insulating outer frame and n x m metal blocks arranged corresponding to the sub-unit chips.
5. The crimp-type power module of claim 3, wherein the subunit chips comprise power chips and FRD chips, and the power chips comprise MOSFET chips or IGBT chips; the insulating material is one or a combination of more of organic silica gel, phenolic resin glue, urea-formaldehyde resin glue, temperature-resistant epoxy glue and polyimide glue.
6. A method for manufacturing a compression joint type power module is characterized by comprising the following steps:
s1: preparing m layers of stacked and integrated signal transmission sub-strips and a first power module layer; m is greater than 1;
s2: preparing a second power module layer by adopting n signal transmission sub-strips stacked and integrated by the m layers; the second power module layer comprises a substrate and n x m bosses arranged on the substrate, and each boss is provided with a subunit chip; the second power module layer further comprises n signal transmission strips for connecting the grid electrodes of the sub-unit chips in each row, the signal transmission strips comprise m layers of stacked and integrated signal transmission sub-strips, and each signal transmission sub-strip is used for transmitting a signal of one sub-unit chip; n is greater than 1;
s3: placing the first power module layer on the top of the second power module layer, and preparing the power module layer by crimping;
s4: and vertically placing at least one power module layer, and crimping to form a power module.
7. The method for preparing a crimped power module according to claim 6, wherein the S1 is used for preparing an m-layer stacked integrated signal transmission sub-strip and comprises the following steps:
s1.1: cutting on printed circuit board to obtain n pieces of x lengthiSignal transmission sub-strip of (1)<i<m；
S1.2: and m signal transmission sub-strips with the length of xi are selected, are stacked according to the sequence from short to long in length and are bonded by adopting insulating materials, and 1< i < m, so that m layers of stacked and integrated signal transmission sub-strips are formed.
8. The method for manufacturing a press-fit power module according to claim 7, wherein during the bonding, a contact position with a thimble is reserved on the signal transmission sub-strip in advance and is not bonded, and the contact position of the thimble is determined according to a gate signal connection position of the sub-unit chip.
9. The method for manufacturing a compression-type power module according to claim 6, wherein the first power module layer comprises an upper metal end cover layer and a lower metal end cover layer, and the lower metal end cover layer comprises an insulating outer frame and n × m metal blocks arranged corresponding to the subunit chips.
10. The method for manufacturing a compression joint type power module according to claim 7, wherein the subunit chip comprises a power chip and an FRD chip, the power chip comprises a MOSFET chip or an IGBT chip; the insulating material is one or a combination of more of organic silica gel, phenolic resin glue, urea-formaldehyde resin glue, temperature-resistant epoxy glue and polyimide glue.
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911068924.4A CN112768438B (en) | 2019-11-05 | 2019-11-05 | Crimping type power module and preparation method thereof |
| PCT/CN2019/123833 WO2021088186A1 (en) | 2019-11-05 | 2019-12-06 | Silicon carbide schottky clamped transistor and preparation method therefor |
| PCT/CN2020/103123 WO2021088414A1 (en) | 2019-11-05 | 2020-07-20 | Crimping power module and method for preparing same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN201911068924.4A CN112768438B (en) | 2019-11-05 | 2019-11-05 | Crimping type power module and preparation method thereof |
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| CN112768438A CN112768438A (en) | 2021-05-07 |
| CN112768438B true CN112768438B (en) | 2022-07-15 |
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| WO (2) | WO2021088186A1 (en) |
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| JP4218479B2 (en) * | 2003-09-24 | 2009-02-04 | 富士電機デバイステクノロジー株式会社 | Semiconductor device |
| CN101855726B (en) * | 2007-11-09 | 2015-09-16 | 克里公司 | There is mesa structure and comprise the power semiconductor of resilient coating of table top step |
| US20120097974A1 (en) * | 2010-10-20 | 2012-04-26 | Universitetssenteret På Kjeller (Unik) | Power semiconductor device |
| CN102881589B (en) * | 2012-09-24 | 2015-05-13 | 株洲南车时代电气股份有限公司 | Crimping IGBT (insulated gate bipolar transistor) module and method for manufacturing same |
| CN102984881B (en) * | 2012-11-21 | 2015-07-08 | 华为技术有限公司 | Circuit board connection structure |
| TWI489922B (en) * | 2013-07-15 | 2015-06-21 | Mpi Corp | Multilayer circuit boards |
| CN103400831B (en) * | 2013-07-22 | 2016-04-20 | 国家电网公司 | A kind of total head connects IGBT module and assembly method thereof |
| CN103515365B (en) * | 2013-10-14 | 2016-04-20 | 国家电网公司 | A kind of high-power compression joint type IGBT device |
| CN104465549B (en) * | 2014-12-15 | 2017-11-03 | 株洲南车时代电气股份有限公司 | A kind of power semiconductor modular |
| CN205752165U (en) * | 2016-06-24 | 2016-11-30 | 中国南方电网有限责任公司电网技术研究中心 | A kind of chip module encapsulation structure |
| CN105957886B (en) * | 2016-06-28 | 2019-05-14 | 中国科学院微电子研究所 | A kind of silicon carbide bipolar junction transistor |
| CN107845617B (en) * | 2017-09-19 | 2020-12-15 | 全球能源互联网研究院有限公司 | Chip sintered product, subunit, IGBT packaging module and preparation method |
| CN108110002B (en) * | 2017-12-18 | 2020-06-26 | 西安理工大学 | Complementary SiC bipolar integrated transistor and manufacturing method thereof |
| CN109887995B (en) * | 2019-01-30 | 2022-06-03 | 西安理工大学 | Double-layer base region SiC NPN integrated transistor and manufacturing method thereof |
| CN110752256B (en) * | 2019-10-22 | 2021-04-06 | 深圳第三代半导体研究院 | Silicon carbide Schottky clamp transistor and preparation method thereof |
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2019
- 2019-11-05 CN CN201911068924.4A patent/CN112768438B/en active Active
- 2019-12-06 WO PCT/CN2019/123833 patent/WO2021088186A1/en active Application Filing
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2020
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| Publication number | Publication date |
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| CN112768438A (en) | 2021-05-07 |
| WO2021088186A1 (en) | 2021-05-14 |
| WO2021088414A1 (en) | 2021-05-14 |
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