CN112748756B - Power supply voltage ripple suppression method, device and control circuit - Google Patents
Power supply voltage ripple suppression method, device and control circuit Download PDFInfo
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- CN112748756B CN112748756B CN202011515611.1A CN202011515611A CN112748756B CN 112748756 B CN112748756 B CN 112748756B CN 202011515611 A CN202011515611 A CN 202011515611A CN 112748756 B CN112748756 B CN 112748756B
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/14—Arrangements for reducing ripples from dc input or output
Abstract
The invention provides a method, a device and a control circuit for suppressing power supply voltage ripple, wherein the method comprises the following steps: acquiring a voltage ripple suppression requirement of a target power supply, wherein the target power supply is a switching power supply; determining a power supply voltage ripple target peak value according to the voltage ripple suppression requirement; judging whether the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value; and when the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value, adjusting the serial port scanning frequency of the main control chip according to the power supply voltage ripple target peak value, the relation between the preset power supply voltage ripple peak value and the output current and the relation between the preset serial port scanning frequency and the output current. By improving the serial port scanning frequency of the main control chip, the serial port scanning time is shortened to ensure that the load is in the load capacity range of the target power supply, so that the purpose of inhibiting the power supply voltage ripple is achieved, the circuit design is not required to be changed, the cost is saved, and the simplified design of the circuit is facilitated.
Description
Technical Field
The invention relates to the technical field of household appliances, in particular to a method and a device for suppressing power supply voltage ripple and a control circuit.
Background
With the increasing sophistication of small household electrical appliances, the space limitation inside the product structure and the pressure of cost, a simplified control circuit design is urgently needed to meet the design requirements of the product with the simplest circuit design. The design of the main control circuit and the display circuit is often involved in small household appliances, and the power supply voltage ripple in the circuit design is one of the important reasons which plague the simplification design of the circuit. The ripple component of the power supply voltage is complex, the form of the ripple component is generally divided into a harmonic wave with frequency higher than power frequency and similar sine wave and a pulse wave with narrow width, the ripple requirements are different in different application products, when a main control circuit is involved, the narrow pulse reaches a certain amplitude value and interferes with a digital or logic control component, so that the reliability of equipment operation is reduced, therefore, the ripple of the narrow pulse power supply voltage needs to be limited, and the interference on the control component is generally not negligible due to the low amplitude of the ripple wave with similar sine wave.
In the prior art, in the design of the main control circuit and the display circuit, the suppression of the narrow pulse power supply voltage ripple is usually realized by adopting an optimized circuit design, for example: a full-wave or three-phase full-wave rectification circuit is additionally arranged, the capacitance capacity in a filter circuit is increased, a more complex LC filter circuit or a voltage stabilizing circuit is adopted, and an analog voltage stabilizing power supply is used for replacing a switching power supply and the like at a place with a high requirement on ripple suppression. However, the circuit optimization method inevitably affects the periodicity of product design, increases circuit components or increases circuit cost, and is not favorable for the simplified design of the circuit.
Disclosure of Invention
In view of this, embodiments of the present invention provide a method, an apparatus, and a control circuit for suppressing supply voltage ripple to overcome the problem in the prior art that the circuit structure is complicated and the cost is increased by changing the circuit design to suppress the supply voltage ripple.
According to a first aspect, an embodiment of the present invention provides a power supply voltage ripple suppression method, which is applied to a main control chip of a control circuit, where the control circuit includes the main control chip and a load circuit, and the main control chip drives the load circuit through serial port scanning, and the method includes:
acquiring a voltage ripple suppression requirement of a target power supply, wherein the target power supply is a switching power supply;
determining a power supply voltage ripple target peak value according to the voltage ripple suppression requirement;
judging whether the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value;
and when the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value, adjusting the serial port scanning frequency of the main control chip according to the power supply voltage ripple target peak value, the relation between the preset power supply voltage ripple peak value and the output current and the relation between the preset serial port scanning frequency and the output current.
Optionally, the adjusting the serial port scanning frequency of the main control chip according to the power supply voltage ripple target peak value, the relationship between a preset power supply voltage ripple peak value and the output current, and the relationship between a preset serial port scanning frequency and the output current includes:
calculating a target output current value according to the power supply voltage ripple target peak value and the relation between a preset power supply voltage ripple peak value and the output current;
calculating a target serial port scanning frequency according to the target output current value and the relation between the preset serial port scanning frequency and the output current;
and adjusting the serial port scanning frequency of the main control chip to the target serial port scanning frequency.
Optionally, the relationship between the preset power supply voltage ripple peak value and the output current is expressed by the following formula:
and the voltage Vo _ ripp _ pp is a ripple peak value of the power supply, r is a current ripple coefficient of the target power supply, Io is output current, f is working frequency of the target power supply, and the output capacitor of the Co target power supply.
Optionally, the calculating a target serial port scanning frequency according to the target output current value and the relationship between the preset serial port scanning frequency and the output current includes:
acquiring the output voltage of a target power supply;
calculating target serial port scanning time according to the target output current value, the output voltage and the relation between preset load power consumption and serial port scanning time;
and determining the scanning frequency of the target serial port according to the scanning time of the target serial port.
Optionally, the relationship between the preset load power consumption and the serial port scanning time is expressed by the following formula:
wherein, W (t) is load power consumption, i (ξ) is output current, u (ξ) is output voltage, and t-t0 represents serial port scanning time.
Optionally, the determining a supply voltage ripple target peak value according to the voltage ripple suppression requirement includes:
determining the maximum value of the power supply voltage ripple peak value according to the voltage ripple suppression requirement;
and calculating the power supply voltage ripple target peak value according to a preset power supply voltage ripple peak value threshold value and the maximum value of the power supply voltage ripple peak value.
According to a second aspect, an embodiment of the present invention provides a power supply voltage ripple suppression device, which is applied to a main control chip of a control circuit, where the control circuit includes the main control chip and a load circuit, and the main control chip drives the load circuit through serial port scanning, and the device includes:
the device comprises an acquisition module, a storage module and a control module, wherein the acquisition module is used for acquiring the voltage ripple suppression requirement of a target power supply, and the target power supply is a switching power supply;
the first processing module is used for determining a power supply voltage ripple target peak value according to the voltage ripple suppression requirement;
the second processing module is used for judging whether the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value or not;
and the third processing module is used for adjusting the serial port scanning frequency of the main control chip according to the relation among the power supply voltage ripple target peak value, a preset power supply voltage ripple peak value and output current and the relation between a preset serial port scanning frequency and output current when the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value.
According to a third aspect, an embodiment of the present invention provides a control circuit, including: a main control chip and a load circuit, wherein,
the main control chip drives the load circuit through serial port scanning;
the main control chip comprises: a memory and a processor, the memory and the processor being communicatively coupled to each other, the memory having stored therein computer instructions, and the processor performing the method of the first aspect, or any one of the optional embodiments of the first aspect, by executing the computer instructions.
According to a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium storing computer instructions for causing a computer to perform the method of the first aspect, or any one of the optional implementation manners of the first aspect.
The technical scheme of the invention has the following advantages:
according to the power supply voltage ripple suppression method, the device and the control circuit provided by the embodiment of the invention, the voltage ripple suppression requirement of the target power supply is obtained, and the target power supply is a switching power supply; determining a power supply voltage ripple target peak value according to the voltage ripple suppression requirement; judging whether the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value; and when the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value, adjusting the serial port scanning frequency of the main control chip according to the power supply voltage ripple target peak value, the relation between the preset power supply voltage ripple peak value and the output current and the relation between the preset serial port scanning frequency and the output current. Therefore, the serial port scanning time is shortened in a mode of improving the serial port scanning frequency of the main control chip, namely, the load of the target power supply is reduced in a short time, so that the load is ensured to be within the load carrying capacity range of the target power supply, the purpose of inhibiting the power supply voltage ripple is achieved, the circuit design is not required to be changed, the cost is saved, and the simplified design of the circuit is facilitated.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic structural diagram of an electrical product according to an embodiment of the present invention;
FIG. 2 is a flow chart of a power supply voltage ripple suppression method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a specific structure of a control circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an LED display circuit according to an embodiment of the present invention;
FIG. 5 is a schematic structural diagram of a supply voltage ripple suppression device according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a main control chip according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The technical features mentioned in the different embodiments of the invention described below can be combined with each other as long as they do not conflict with each other.
In the prior art, in the design of the main control circuit and the display circuit, the suppression of the narrow pulse power supply voltage ripple is usually realized by adopting an optimized circuit design, for example: a full-wave or three-phase full-wave rectification circuit is additionally arranged, the capacitance capacity in a filter circuit is increased, a more complex LC filter circuit or a voltage stabilizing circuit is adopted, and an analog voltage stabilizing power supply is used for replacing a switching power supply and the like at a place with a high requirement on ripple suppression. However, the circuit optimization method inevitably affects the periodicity of product design, increases circuit components or increases circuit cost, and is not favorable for the simplified design of the circuit.
Specifically, as shown in fig. 1, in the electrical product, when the power circuit and the display circuit are on the same PCB, the display circuit is directly driven by the main control chip MCU in a manner of scanning a serial port (i.e., COM port), and at this time, the COM port is used as a current sink port, when a peak current provided by an internal AC-DC chip cannot satisfy a current of a load, that is, a capacity with a load is insufficient, a ripple of the power supply is large, and especially a sharp pulse (peak value exceeds 200mV) worth is generated greatly, such a sharp pulse has a great influence on the main control chip MCU and a logic control unit, and when the electrical product is operated for a long time in such an environment with an excessively large ripple of the power supply, reliability of the product is reduced, and a service life of the product is affected, so how to suppress a ripple of the power supply voltage under a condition that design of other circuits is not changed is very important.
Based on the above problem, an embodiment of the present invention provides a power supply voltage ripple suppression method, which is applied to a main control chip MCU shown in fig. 1, and as shown in fig. 2, the power supply voltage ripple suppression method mainly includes the following steps:
step S101: and acquiring the voltage ripple suppression requirement of a target power supply, wherein the target power supply is a switching power supply. Specifically, the voltage ripple rejection requirements vary among different circuit products, such as: in the product circuit shown in fig. 1, the MCU power supply is 5V, and the peak ripple value of the power supply voltage corresponding to the MCU chip is required to be less than 85Mv, that is, when the peak ripple value of the power supply voltage exceeds 85Mv, the performance and the service life of the MCU chip are affected.
Step S102: and determining a power supply voltage ripple target peak value according to the voltage ripple suppression requirement.
Specifically, the step S102 specifically includes: determining the maximum value of the power supply voltage ripple peak value according to the voltage ripple suppression requirement; and calculating a power supply voltage ripple target peak value according to a preset power supply voltage ripple peak value threshold value and the maximum value of the power supply voltage ripple peak value. The preset power supply voltage peak threshold may be determined according to other load consumption conditions in the actual circuit, for example: in the product circuit shown in fig. 1, the power supply of the MCU is 5V, the ripple peak value of the power supply voltage corresponding to the MCU chip is required to be less than 85Mv, that is, the maximum value of the ripple peak value of the power supply voltage is 85Mv, and when the consumption of loads such as a remote controller and a buzzer is considered, the preset power supply voltage peak threshold is set to 10Mv, the corresponding target peak value of the power supply voltage ripple is 75 Mv.
Step S103: and judging whether the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value. Specifically, the peak value of the current power voltage of the target power supply may be obtained through an oscilloscope or other professional voltage measuring equipment, which is not limited to this. If the current power supply voltage ripple peak value of the target power supply is not greater than the power supply voltage ripple target peak value, the current power supply voltage ripple meets the voltage ripple suppression requirement corresponding to the circuit product, and the current power supply voltage ripple is continuously monitored.
Step S104: and when the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value, adjusting the serial port scanning frequency of the main control chip according to the power supply voltage ripple target peak value, the relation between the preset power supply voltage ripple peak value and the output current and the relation between the preset serial port scanning frequency and the output current.
Specifically, in an embodiment, the step S104 specifically includes the following steps:
step S401: and calculating a target output current value according to the power supply voltage ripple target peak value and the relation between the preset power supply voltage ripple peak value and the output current. Specifically, the relationship between the preset power supply voltage ripple peak value and the output current is expressed by the following formula (1):
and the voltage Vo _ ripp _ pp is a ripple peak value of the power supply, r is a current ripple coefficient of the target power supply, Io is output current, f is working frequency of the target power supply, and the output capacitor of the Co target power supply. It should be noted that, since the observable voltage ripple is generated based on the stored energy, i.e. related to the capacitive stored energy, other factors affecting the voltage ripple are small and are ignored in the embodiment of the present invention. The formula (1) shows that the peak value of the power supply voltage ripple can be reduced by increasing the working frequency of the switching power supply chip and increasing the output capacitance of the power supply; however, these switching power supply chips with increased output capacitance and higher operating frequency are all implemented by hardware to reduce or suppress the output ripple of the power supply voltage, which inevitably increases the development cost. According to the embodiment of the invention, under the condition that the circuit structure is not changed, the suppression of the power supply voltage ripple is realized in a mode of reducing the output current, and the specific implementation mode is described in detail below and is not described in detail herein.
In practical application, the power supply voltage ripple of the target power supply may not be directly monitored, but as shown in fig. 1, according to the relationship between the power supply voltage ripple and the output current of formula (1), the actual output current of the target power supply is directly detected through the sampling circuit, and is compared with the target output current value corresponding to the power supply voltage ripple target peak value meeting the voltage ripple suppression requirement through the comparison circuit, if the actual output current is greater than the target output current, it is indicated that the current power supply voltage ripple does not meet the voltage ripple suppression requirement, step S402 is directly executed, otherwise, the actual output current is continuously monitored.
Step S402: and calculating the target serial port scanning frequency according to the target output current value and the relation between the preset serial port scanning frequency and the output current. Specifically, by acquiring an output voltage of a target power supply; calculating target serial port scanning time according to the target output current value, the output voltage and the relation between preset load power consumption and serial port scanning time; and determining the scanning frequency of the target serial port according to the scanning time of the target serial port.
The relationship between the preset load power consumption and the serial port scanning time is expressed by the following formula (2):
wherein, W (t) is load power consumption, i (ξ) is output current, u (ξ) is output voltage, and t-t0 represents serial port scanning time. Because the production of mains voltage ripple is mainly based on the influence of energy storage, and load circuit's consumption exceeds the on-load ability of target power promptly, and load consumption is too big promptly, can know by above-mentioned formula (2), load power and the time difference of unit be serial ports scan time and become positive correlation to can be on the basis that does not change circuit structure, through improving serial ports scanning frequency, reduce the scan time of main control chip to the serial ports, reduce output current and then reduce load consumption. The scanning frequency of the serial port and the scanning time of the serial port are reciprocal, so that the scanning frequency of the target serial port can be determined through the scanning time of the target serial port
Step S403: and adjusting the serial port scanning frequency of the main control chip to the target serial port scanning frequency. Specifically, through the mode of improving the serial port scanning frequency of the main control chip, the power supply voltage ripple is reduced, and the change of circuit design is avoided. In practical application, the number of times of entering the interrupt may be used to increase the scanning frequency of the serial port, where the smaller the number of times of entering the interrupt, the shorter the time required for scanning the serial port, the higher the scanning frequency, and assuming that the internal crystal oscillator of the main control chip is 32M, a frequency division mode (i.e., no frequency division is performed) is conventionally used, so that the time of one interrupt is 125uS, and therefore the number of times of interrupt is an integer when increasing the scanning frequency, and the corresponding scanning time may be 125uS, 250uS, 375uS, 500uS, 625uS, 750uS, 875uS, 1000uS, and the like.
By executing the steps, the power supply voltage ripple suppression method provided by the embodiment of the invention shortens the serial port scanning time in a mode of improving the serial port scanning frequency of the main control chip, which is equivalent to reducing the load of the target power supply in a short time so as to ensure that the load is within the load carrying capacity range of the target power supply, thereby achieving the purpose of suppressing the power supply voltage ripple, and the method does not need to change the circuit design, saves the cost and is beneficial to the simplified design of the circuit.
The following describes in detail specific application effects of the power supply voltage ripple suppression method provided by the embodiment of the present invention with reference to specific application examples.
Taking the structure usage diagram of the whole machine product shown in fig. 1 as an example, fig. 1 lists the distribution diagram of a power supply system and circuits of various functions, a power supply module is composed of 2 parts, a strong current power supply part and a weak current power supply part, strong current to weak current are realized through an AC-DC chip, a non-isolation scheme is adopted between the strong current and the weak current, the strong current (namely alternating current) supplies power to an asynchronous motor and a synchronous motor, and the weak current (+5V) supplies power to a main control chip which is an infrared receiving head and a buzzer; display circuit is by chip drive control completely, main control chip still need drive bee calling organ and silicon controlled rectifier, 5V power except synchronous machine and asynchronous machine (by mains supply) in complete machine system, all the other circuit structure are the load of 5V power, ripple through monitoring 5V power is too big, its root cause is because the special function that LED shows, and the very bright LED lamp of needs shows, so current in the twinkling of an eye is too big, and this is that main control chip directly drives LED, the driving force of chip has also used more than 50%, also be too big for load, when carrying out special display, for example: there are 4 timing display lamps, timing display lamp is the scintillation function when timing function, and the time of scintillation has 3 ~ 5 seconds, so when testing 5V power ripple when lighting all lamps, the electric current is than great, for other display circuit, and 4 timing lamps flicker, and adopt 1 mS's scan time, the environment for the power supply is extremely unstable, consequently when being in the condition of most LED lamps all electric quantities when testing the ripple, some spike pulse of 5V power ripple has certainly exceeded 200mV, consequently need solve the too big problem of power ripple through changing software logic.
Fig. 3 is a schematic structural diagram of a control circuit in the electrical product shown in fig. 1, and fig. 4 is a schematic diagram of an LED display circuit. When the main control chips COM1 and COM2 are used as current-sinking ports (100mA), when the main control chips SEC1, SEC2, SEC3, SEC4 and SEC5 are used as output ports (16mA), the COM1 and COM2 ports are in a scanning mode (active low), and the SEC1, SEC2, SEC3, SEC4 and SEC5 are logically assigned (active high) according to the functional effect of the display circuit. Because the LED lamp is required to achieve a brighter effect, the effective value current of the current LED lamp must be very large, the main control chip is inevitably required to have very large driving capability, the power supply of the chip is supplied by a +5V circuit, the current is inevitably increased when the LEDs are basically brighter, the current fluctuation range is larger by 4 regular flickering LEDs, the overlarge time of the fluctuation range is just the reason that the 5V power supply cannot be stabilized, and the ripple of the power supply is larger under the working environment, and the embodiment of the invention provides a mode of improving the scanning speed of the COM port to inhibit the voltage ripple of the power supply.
As shown in fig. 4, 10 LED lamps in the display circuit are grouped into 2 groups, and each 5 LED lamps share a common cathode, which are COM1 and COM 2; 2 LED lamps which do not share a cathode share an anode, and 5 groups are SEG1, SEG2, SEG3, SEG4 and SEG5 respectively; COM1 and COM2 scan, COM1 virtualizes 2 IO ports, COM2 virtualizes 2 IO ports, single-step scan, SEG1, SEG2, SEG3, SEG4 and SEG5 are assigned according to display conditions, because functions of display effects need to be assigned, and the logical setting of software is to virtualize 2 IO ports at COM 1. Since 2 COM ports are virtualized for each COM1 and COM2, there are 6 COM ports in total, so the duty ratio of one COM port is 1/6, and since there are 2 groups (3 COM ports) set low and lamps connected to the COM ports on both sides need to be turned on, the duty ratio when the COM port is maximum is 1/6+1/6 — 1/3; when the original scanning time setting is 1mS, namely the scanning frequency is 1K, when the LED is basically fully on, the ripple peak value (200mV) of the power supply is tested, the appearance of large ripple is that spike pulse exceeding 200mV exists, the frequency of the appearance of the spike pulse is just similar to the time of LED flicker scanning, the maximum value of the current of 5V power supply is tested, the current exists about 140mA, and the current is slow and dynamic. And when the frequency of the main control chip for scanning the COM port is increased, the scanning time is changed to 250Us, namely the scanning frequency is increased to 4K, the ripple of the test power supply is about 60mV when the basic LED lamps are all on, and the spike pulse disappears. Therefore, the mode for improving the serial port scanning frequency of the main control chip provided by the embodiment of the invention is effective for inhibiting the power supply voltage ripple.
The frequency of the LED lamp of the display circuit is scanned by the main control chip is improved, so that the load of the display circuit is relatively a relatively stable load, the load can be regarded as being reduced in a relatively short time, and the power supply is relatively a light load, so that the ripple of the power supply voltage is suppressed, namely the display circuit is a heavy load as the load in a hardware circuit under the condition that the original scanning frequency is 1K, and the mutation range is wide, so that the power supply load is unstable under the condition that the loading capacity of the power supply chip is relatively heavy; and the problem that the display circuit suddenly changes as a load is solved by increasing the scanning frequency to 4K, and the sudden change speed is too high to be matched with the load capacity of the power supply, so that the load consumption of the display circuit is reduced in a relatively short time, and finally the display circuit of the power supply is a light load, so that the load capacity is improved without changing hardware, and the suppression of the voltage ripple of the power supply is realized.
In summary, the embodiment of the invention provides an effect of increasing the frequency of the virtual COM port scanning LED lamp to suppress the power supply voltage ripple, and the original scanning frequency is increased from 1K (cycle is 1mS) to 4K (cycle is 250uS), and the 5V voltage ripple of the power supply is reduced from more than 220mV to 85 mV. Hardware is not changed, cost is reduced, and the product design period is shortened.
An embodiment of the present invention further provides a power supply voltage ripple suppression device, which is applied to a main control chip of a control circuit, where the control circuit includes the main control chip and a load circuit, and the main control chip scans and drives the load circuit through a serial port, as shown in fig. 5, the power supply voltage ripple suppression device includes:
the obtaining module 101 is configured to obtain a voltage ripple suppression requirement of a target power supply, where the target power supply is a switching power supply. For details, refer to the related description of step S101, and are not repeated herein.
The first processing module 102 is configured to determine a target peak value of a supply voltage ripple according to a voltage ripple suppression requirement. For details, refer to the related description of step S102, and are not repeated herein.
And the second processing module is used for judging whether the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value 103 or not. For details, refer to the related description of step S103, and are not repeated herein.
The third processing module 104 is configured to, when the current power supply voltage ripple peak value of the target power supply is greater than the power supply voltage ripple target peak value, adjust the serial port scanning frequency of the main control chip according to the power supply voltage ripple target peak value, a relationship between a preset power supply voltage ripple peak value and the output current, and a relationship between a preset serial port scanning frequency and the output current. For details, refer to the related description of step S104, and are not repeated herein.
The power supply voltage ripple suppression device provided in the embodiment of the present invention is configured to execute the power supply voltage ripple suppression method provided in the above embodiment, and the implementation manner and the principle thereof are the same, and details are referred to the related description of the above method embodiment and are not repeated.
Through the cooperative cooperation of the above components, the power supply voltage ripple suppression device provided by the embodiment of the invention shortens the serial port scanning time in a manner of improving the serial port scanning frequency of the main control chip, which is equivalent to reducing the load of the target power supply in a short time, so as to ensure that the load is within the load carrying capacity range of the target power supply, thereby achieving the purpose of suppressing the power supply voltage ripple, and the device does not need to change the circuit design, saves the cost, and is beneficial to the simplified design of the circuit.
An embodiment of the present invention further provides a control circuit, as shown in fig. 3, the control circuit includes: the load circuit comprises a main control chip MCU and a load circuit 2, wherein the main control chip MCU drives the load circuit 2 through serial port scanning, and in the embodiment of the invention, the load circuit 2 is an LED display circuit. As shown in fig. 6, the MCU includes: a processor 901 and a memory 902, wherein the processor 901 and the memory 902 may be connected by a bus or by other means, and fig. 6 illustrates an example of a connection by a bus.
The memory 902, which is a non-transitory computer-readable storage medium, may be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as program instructions/modules corresponding to the methods in the above-described method embodiments. The processor 901 executes various functional applications and data processing of the processor by executing non-transitory software programs, instructions and modules stored in the memory 902, that is, implements the methods in the above-described method embodiments.
The memory 902 may include a program storage area and a data storage area, wherein the program storage area may store an operating system, an application program required for at least one function; the storage data area may store data created by the processor 901, and the like. Further, the memory 902 may include high speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory 902 may optionally include memory located remotely from the processor 901, which may be connected to the processor 901 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
One or more modules are stored in the memory 902, which when executed by the processor 901 performs the methods in the above-described method embodiments.
The specific details of the control circuit may be understood by referring to the corresponding related descriptions and effects in the above method embodiments, and are not described herein again.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by a computer program, and the implemented program can be stored in a computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD) or a Solid State Drive (SSD), etc.; the storage medium may also comprise a combination of memories of the kind described above.
Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope defined by the appended claims.
Claims (9)
1. A power supply voltage ripple suppression method is applied to a main control chip of a control circuit, the control circuit comprises the main control chip and a load circuit, and the main control chip drives the load circuit through serial port scanning, and the method is characterized by comprising the following steps:
acquiring a voltage ripple suppression requirement of a target power supply, wherein the target power supply is a switching power supply;
determining a power supply voltage ripple target peak value according to the voltage ripple suppression requirement;
judging whether the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value;
when the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value, adjusting the serial port scanning frequency of the main control chip according to the power supply voltage ripple target peak value, the relation between the preset power supply voltage ripple peak value and the output current and the relation between the preset serial port scanning frequency and the output current;
the relationship between the preset power supply voltage ripple peak value and the output current is expressed by the following formula:
and the voltage Vo _ ripp _ pp is a ripple peak value of the power supply, r is a current ripple coefficient of the target power supply, Io is output current, f is working frequency of the target power supply, and the output capacitor of the Co target power supply.
2. The method according to claim 1, wherein the adjusting the serial port scan frequency of the main control chip according to the power supply voltage ripple target peak value, a relationship between a preset power supply voltage ripple peak value and an output current, and a relationship between a preset serial port scan frequency and an output current comprises:
calculating a target output current value according to the power supply voltage ripple target peak value and the relation between a preset power supply voltage ripple peak value and the output current;
calculating a target serial port scanning frequency according to the target output current value and the relation between the preset serial port scanning frequency and the output current;
and adjusting the serial port scanning frequency of the main control chip to the target serial port scanning frequency.
3. The method according to claim 2, wherein calculating a target serial port scanning frequency according to the target output current value and the relationship between the preset serial port scanning frequency and the output current comprises:
acquiring the output voltage of a target power supply;
calculating target serial port scanning time according to the target output current value, the output voltage and the relation between preset load power consumption and serial port scanning time;
and determining the scanning frequency of the target serial port according to the scanning time of the target serial port.
4. The method according to claim 3, wherein the relationship between the preset load power consumption and the serial port scanning time is expressed by the following formula:
wherein, W (t) is load power consumption, i (ξ) is output current, u (ξ) is output voltage, and t-t0 represents serial port scanning time.
5. The method of claim 1, wherein determining a supply voltage ripple target peak value based on the voltage ripple rejection requirement comprises:
determining the maximum value of the power supply voltage ripple peak value according to the voltage ripple suppression requirement;
and calculating the power supply voltage ripple target peak value according to a preset power supply voltage ripple peak value threshold value and the maximum value of the power supply voltage ripple peak value.
6. The utility model provides a mains voltage ripple suppression device, is applied to control circuit's main control chip, control circuit includes main control chip and load circuit, main control chip passes through serial ports scanning drive load circuit, its characterized in that, the device includes:
the device comprises an acquisition module, a storage module and a control module, wherein the acquisition module is used for acquiring the voltage ripple suppression requirement of a target power supply, and the target power supply is a switching power supply;
the first processing module is used for determining a power supply voltage ripple target peak value according to the voltage ripple suppression requirement;
the second processing module is used for judging whether the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value or not;
the third processing module is used for adjusting the serial port scanning frequency of the main control chip according to the relation among the power supply voltage ripple target peak value, a preset power supply voltage ripple peak value and output current and the relation between a preset serial port scanning frequency and output current when the current power supply voltage ripple peak value of the target power supply is larger than the power supply voltage ripple target peak value;
the relationship between the preset power supply voltage ripple peak value and the output current is expressed by the following formula:
and the voltage Vo _ ripp _ pp is a ripple peak value of the power supply, r is a current ripple coefficient of the target power supply, Io is output current, f is working frequency of the target power supply, and the output capacitor of the Co target power supply.
7. A control circuit, comprising: a main control chip and a load circuit, wherein,
the main control chip drives the load circuit through serial port scanning;
the main control chip comprises: a memory and a processor communicatively coupled to each other, the memory having stored therein computer instructions, the processor executing the computer instructions to perform the method of any of claims 1-5.
8. The control circuit of claim 7, wherein the load circuit is an LED light display circuit.
9. A computer-readable storage medium having stored thereon computer instructions for causing a computer to thereby perform the method of any one of claims 1-5.
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