CN112737977A - Data packet processing method and device - Google Patents
Data packet processing method and device Download PDFInfo
- Publication number
- CN112737977A CN112737977A CN202011578250.5A CN202011578250A CN112737977A CN 112737977 A CN112737977 A CN 112737977A CN 202011578250 A CN202011578250 A CN 202011578250A CN 112737977 A CN112737977 A CN 112737977A
- Authority
- CN
- China
- Prior art keywords
- storage space
- ports
- port
- data packets
- data packet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000003672 processing method Methods 0.000 title claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 51
- 238000004590 computer program Methods 0.000 claims description 21
- 230000000903 blocking effect Effects 0.000 claims description 6
- 238000001514 detection method Methods 0.000 claims description 2
- 230000003139 buffering effect Effects 0.000 claims 1
- 230000002452 interceptive effect Effects 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 15
- 230000006870 function Effects 0.000 description 11
- 230000005540 biological transmission Effects 0.000 description 3
- 238000004891 communication Methods 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000003287 optical effect Effects 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000013500 data storage Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F5/00—Methods or arrangements for data conversion without changing the order or content of the data handled
- G06F5/06—Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L47/00—Traffic control in data switching networks
- H04L47/50—Queue scheduling
- H04L47/62—Queue scheduling characterised by scheduling criteria
- H04L47/625—Queue scheduling characterised by scheduling criteria for service slots or service orders
- H04L47/6275—Queue scheduling characterised by scheduling criteria for service slots or service orders based on priority
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
The application provides a data packet processing method and a device, wherein the method comprises the following steps: receiving a data packet sent by each port in a plurality of ports; according to the header information of the data packet sent by each port, caching the data packet in a storage space corresponding to the header information; under the condition that the first storage space can be adjusted, expanding the first storage space, and continuously caching the data packets sent by the corresponding ports by using the first storage space; under the condition that the first storage space cannot be adjusted, preventing a port corresponding to the first storage space from continuously sending data packets; and according to the priority of the storage space for caching the data packets sent by each port, sending the data packets sent by each port of the plurality of ports to the server according to the sequence from high to low of the priority, so that the server processes the data packets sent by each port of the plurality of ports. In this way, the data packets of the ports can be prevented from interfering with each other.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a method and an apparatus for processing a data packet.
Background
The Avalon bus has two interfaces, Avalon-MM (memory map) and Avalon-ST (stream). The Avalon-MM type interface signals are divided into control signals and data signals, and data are read and written through addresses. The Avalon-ST interface is a unidirectional point-to-point high-speed interface, mainly aims at the transmission of high-speed data stream and reduces the bottleneck in data stream processing. When the network port transmits data to the server host through the Avalon _ st interface, the data need to be buffered through a buffer space (First in First out, FIFO).
For a single-port network port, a common FIFO can meet the requirement. However, for a multi-port network port (packets from multiple ports and different port numbers), the amount of data from each port is different. Some port packets are more and some port packets are less. And the packet priorities of the various ports are also different. At this time, mutual interference may occur when processing each port packet.
Disclosure of Invention
The application provides a data packet processing method and a data packet processing device, which are used for solving the problem that in the prior art, for a multi-port network port, mutual interference occurs when data packets of all ports are processed.
In a first aspect, the present invention provides a data packet processing method, including:
receiving a data packet sent by each port in a plurality of ports;
according to the header information of the data packet sent by each port, caching the data packet in a storage space corresponding to the header information;
detecting the occupation state of each storage space in a plurality of storage spaces corresponding to the plurality of ports;
under the condition that the occupation state of a first storage space in the plurality of storage spaces is detected to exceed a preset first threshold, judging whether the first storage space can be adjusted or not;
under the condition that the first storage space can be adjusted, expanding the first storage space, and continuously caching data packets sent by corresponding ports by using the first storage space;
under the condition that the first storage space cannot be adjusted, preventing a port corresponding to the first storage space from continuously sending data packets;
and according to the priority of the storage space for caching the data packets sent by each port, sending the data packets sent by each port of the plurality of ports to a server according to the sequence from high priority to low priority, so that the server processes the data packets sent by each port of the plurality of ports.
Optionally, before the step of receiving the data packet sent by each of the plurality of ports, the method further includes:
receiving storage space configuration information sent by the server;
setting the plurality of storage spaces according to the storage space configuration information;
setting a priority of each of the plurality of storage spaces, a space size of each of the plurality of storage spaces, and an adjustable state of each of the plurality of storage spaces.
Optionally, after the step of sending, according to the priority of the storage space for caching the data packet sent by each port, the data packet sent by each port of the plurality of ports to the server in the order from high to low, the method further includes:
and under the condition that the time length of waiting processing of the data packets in a second storage space in the plurality of storage spaces is detected to exceed a preset second threshold, sending a notification message to the server, so that the server terminates processing of the data packets in other storage spaces except the second storage space in the plurality of storage spaces according to the notification message, and processing the data packets in the second storage space.
Optionally, after the step of sending, according to the priority of the storage space for caching the data packet sent by each port, the data packet sent by each port of the plurality of ports to the server in the order from high to low, the method further includes:
detecting whether a data packet sent by each port in the plurality of ports is complete;
and sending an interrupt signal to the server under the condition that the data packet sent by a target port in the plurality of ports is detected to be incomplete, so that the server terminates processing of the incomplete data packet sent by the target port according to the interrupt signal.
Optionally, in a case that it is determined that the first storage space is adjustable and the first storage space is enlarged, the method further includes:
and reducing the other storage spaces except the first storage space in the plurality of storage spaces.
Optionally, the number of the plurality of storage spaces does not exceed 32.
Optionally, the plurality of ports is 4 ports.
In a second aspect, the present invention further provides a packet processing apparatus, including:
the receiving module is used for receiving a data packet sent by each port in the plurality of ports;
the first cache module is used for caching the data packets in a storage space corresponding to the header information according to the header information of the data packets sent by each port;
the detection module is used for detecting the occupation state of each storage space in a plurality of storage spaces corresponding to the plurality of ports;
the judging module is used for judging whether a first storage space in the plurality of storage spaces can be adjusted or not under the condition that the occupation state of the first storage space is detected to exceed a preset first threshold;
the second cache module is used for expanding the first storage space and continuously caching the data packets sent by the corresponding ports by using the first storage space under the condition that the first storage space is judged to be adjustable;
the blocking module is used for blocking a port corresponding to the first storage space from continuously sending data packets under the condition that the first storage space is judged not to be adjustable;
and the sending module is used for sending the data packets sent by each of the plurality of ports to a server according to the priority of the storage space for caching the data packets sent by each port and the sequence from high to low of the priority, so that the server processes the data packets sent by each of the plurality of ports.
In a third aspect, the present invention further provides an electronic device, which includes a memory and a processor, where the processor is configured to implement the steps of the data packet processing method according to the first aspect when executing the computer program stored in the memory.
In a fourth aspect, the present invention also provides a computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, implements the steps of the packet processing method according to the first aspect.
As can be seen from the foregoing technical solutions, a data packet processing method and apparatus provided in the embodiments of the present invention receive a data packet sent by each of a plurality of ports; according to the header information of the data packet sent by each port, caching the data packet in a storage space corresponding to the header information; detecting the occupation state of each storage space in a plurality of storage spaces corresponding to the plurality of ports; under the condition that the occupation state of a first storage space in the plurality of storage spaces is detected to exceed a preset first threshold, judging whether the first storage space can be adjusted or not; under the condition that the first storage space can be adjusted, expanding the first storage space, and continuously caching data packets sent by corresponding ports by using the first storage space; under the condition that the first storage space cannot be adjusted, preventing a port corresponding to the first storage space from continuously sending data packets; and according to the priority of the storage space for caching the data packets sent by each port, sending the data packets sent by each port of the plurality of ports to a server according to the sequence from high priority to low priority, so that the server processes the data packets sent by each port of the plurality of ports. In this way, independent storage space may be automatically allocated for packets from each of the plurality of ports. The first storage space can be expanded under the condition that the first storage space can be adjusted, and the first storage space is continuously utilized to cache the data packet sent by the corresponding port; or, when it is determined that the first storage space is not adjustable, the port corresponding to the first storage space may be prevented from continuing to send the data packet. And the data packets of the ports are prevented from interfering with each other.
Drawings
In order to more clearly explain the technical solution of the present application, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious to those skilled in the art that other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a flow chart of a data packet processing method according to the present invention;
FIG. 2 is a schematic diagram of a FIFO according to the present invention;
fig. 3 is a block diagram of a packet processing apparatus according to the present invention;
FIG. 4 is a schematic diagram of an embodiment of an electronic device provided in the invention;
fig. 5 is a schematic diagram of an embodiment of a computer-readable storage medium provided in the invention.
Detailed Description
Reference will now be made in detail to embodiments, examples of which are illustrated in the accompanying drawings. When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following examples do not represent all embodiments consistent with the present application. But merely as exemplifications of systems and methods consistent with certain aspects of the application, as recited in the claims.
Referring to fig. 1, fig. 1 is a flowchart of a packet processing method according to the present invention. As shown in fig. 1, the method comprises the following steps:
Illustratively, as shown in fig. 2, a schematic diagram of a FIFO is shown. In fig. 2, the FIFO includes an Avalon interface module, a control module, a memory module, an analysis module, and a status & interrupt module. The Avalon interface module comprises an Avalon _ MM interface, an Avalon _ st sink interface and an Avalon _ st source interface.
The Avalon interface module has the main function of connecting the peripheral and the host to realize transmission of control signals and data.
Optionally, before the step of receiving the data packet sent by each of the plurality of ports, the method further includes:
receiving storage space configuration information sent by the server;
setting the plurality of storage spaces according to the storage space configuration information;
setting a priority of each of the plurality of storage spaces, a space size of each of the plurality of storage spaces, and an adjustable state of each of the plurality of storage spaces.
Further, the control module may receive storage space configuration information sent by the server, and set a plurality of storage spaces according to the storage space configuration information. The priority of each of the plurality of memory spaces, the size of each memory space, and the adjustable state of each memory space may also be set. Namely, the main function of the control module is to receive the configuration information from the host and control the memory module according to the configuration information of the host. Including the number of channel in FIFO, the space size of each channel, whether the space size can be adjusted, the threshold values of full and empty almost empty of each channel space, and the priority of data transmission of each channel, etc.
The state interrupt module has two main functions: and the other is to monitor the state of each channel of the memory module in real time, including the space occupation condition of each channel at the moment, and whether the state accords with the condition of space adjustment. The number of packets in each channel. Another important function is to send a notification message/interrupt signal to host. When an error condition occurs, that is, an incomplete data packet is received for multiple times, or when a data packet with a lower priority cannot be processed for a long time, the state interrupt module sends a corresponding notification message/interrupt signal to the host, and the host can also shield the notification message/interrupt signal by configuring the state interrupt module.
The analysis module has the main functions of receiving data packets from each port of the Avalon _ st sink and sending the data packets of different ports to corresponding memory channels according to the header information. And simultaneously, determining whether to prevent the port from continuously sending the data packet or not according to the state information of the state interrupt module.
The main function of the Memory module is to divide the total space of the Memory into a plurality of corresponding channels according to the configuration information of the host, determine the size of each channel, the threshold of full, the threshold of empty, the priority of each channel, and the like.
As shown in fig. 2, assuming that the peripheral is a four-port network port, which is port1, port2, port3 and port4, the priority of data is sequentially lowered. And in practice the amount of data for port1 significantly exceeds the amount of data for other ports. First, host configures FIFO, sets the number of channels of memory to be 4, can set the space of channel1 to be 256M, and sets the priority to be 1 (highest); the channels 2, 3, and 4 are all set to 64M, and the priorities are set to 2, 3, and 4 in this order. Meanwhile, the space size of each channel in the memory can be adjusted.
Illustratively, the four-port network port starts sending data packets, and the Avalon _ st sink interface may receive the data packets sent by each of the plurality of ports.
And 102, caching the data packet in a storage space corresponding to the header information according to the header information of the data packet sent by each port.
For example, all data packets carry header information, and the parsing module may buffer the data packets in a storage space corresponding to the header information according to the header information of the data packets sent by each port. That is, the parsing module may send the data packet from each port to the channel corresponding to the memory according to the packet header information.
Illustratively, the memory module sends the state information of each channel to the state interruption module in real time. The state interrupt module may detect an occupied state of each of a plurality of memory spaces corresponding to the plurality of ports.
And 104, judging whether the first storage space in the plurality of storage spaces can be adjusted or not under the condition that the occupation state of the first storage space is detected to exceed a preset first threshold.
For example, when it is detected that the occupation state of a first storage space in the plurality of storage spaces exceeds a preset first threshold, the corresponding signal line may be pulled up, and the parsing module determines whether the first storage space is adjustable.
And 105, under the condition that the first storage space is judged to be adjustable, expanding the first storage space, and continuing to cache the data packet sent by the corresponding port by using the first storage space.
For example, when it is determined that the first storage space is adjustable, the first storage space may be expanded, and the first storage space is continuously used to cache the data packet sent by the corresponding port.
And 106, preventing the port corresponding to the first storage space from continuously sending the data packet under the condition that the first storage space is judged not to be adjustable.
For example, when it is determined that the first storage space cannot be adjusted, the parsing module may pull down the ready signal, so as to prevent the port corresponding to the first storage space from continuing to send the data packet. Therefore, under the condition that the first storage space can be adjusted, the first storage space can be enlarged, the data packets sent by the corresponding ports are cached continuously by utilizing the first storage space, and the flexibility is better.
Optionally, in a case that it is determined that the first storage space is adjustable and the first storage space is enlarged, the method further includes:
and reducing the other storage spaces except the first storage space in the plurality of storage spaces.
Further, when it is determined that the first storage space is adjustable and the first storage space is enlarged, the storage spaces other than the first storage space among the plurality of storage spaces may be reduced.
And step 107, according to the priority of the storage space for caching the data packets sent by each port, sending the data packets sent by each port of the plurality of ports to a server according to the sequence from high priority to low priority, so that the server processes the data packets sent by each port of the plurality of ports.
Illustratively, the Memory module receives data from the parsing module, and sends the data packets sent by each of the plurality of ports to the server according to the priority of the storage space for caching the data packets sent by each of the plurality of ports, in order from high to low, so that the server processes the data packets sent by each of the plurality of ports. The data processing sequence of each channel is carried out according to the priority, and if the data in the channel with the higher priority is not processed, the channel with the lower priority is not turned to.
Optionally, after the step of sending, according to the priority of the storage space for caching the data packet sent by each port, the data packet sent by each port of the plurality of ports to the server in the order from high to low, the method further includes:
and under the condition that the time length of waiting processing of the data packets in a second storage space in the plurality of storage spaces is detected to exceed a preset second threshold, sending a notification message to the server, so that the server terminates processing of the data packets in other storage spaces except the second storage space in the plurality of storage spaces according to the notification message, and processing the data packets in the second storage space.
Further, the state interrupt module may send a notification message to the server when detecting that a duration of waiting for processing of the data packet in a second storage space of the plurality of storage spaces exceeds a preset second threshold, so that the server terminates processing of the data packet in the other storage spaces except the second storage space of the plurality of storage spaces according to the notification message, and processes the data packet in the second storage space. That is, if the high-priority channel has data all the time, which results in the waiting time of the low-priority channel reaching the set threshold, the state interrupt module sends a notification message to the host to request the host to process the data in the low-priority channel preferentially. Thus, it is possible to prevent the packets in the low priority channels from being processed for a long time, and to equalize the processing of the packets in each channel.
Optionally, after the step of sending, according to the priority of the storage space for caching the data packet sent by each port, the data packet sent by each port of the plurality of ports to the server in the order from high to low, the method further includes:
detecting whether a data packet sent by each port in the plurality of ports is complete;
and sending an interrupt signal to the server under the condition that the data packet sent by a target port in the plurality of ports is detected to be incomplete, so that the server terminates processing of the incomplete data packet sent by the target port according to the interrupt signal.
Further, as mentioned above, the status interrupt module may detect whether the data packet sent by each of the plurality of ports is complete. In the case that it is detected that the data packet sent by the destination port of the multiple ports is incomplete, an interrupt signal may be sent to the server, so that the server terminates processing of the incomplete data packet sent by the destination port according to the interrupt signal.
The Host can access the control module and the status interruption module through the Avalon _ MM interface, and acquire status information and configuration information.
Optionally, the number of the plurality of storage spaces does not exceed 32.
Furthermore, the number of the plurality of storage spaces does not exceed 32, that is, the FIFO can be expanded to 32 channels at most.
Optionally, the plurality of ports is 4 ports.
Further, as previously described, the plurality of ports may be 4 ports.
In the prior art, the amount of data from each port differs for a multi-port network port (packets from multiple ports and port numbers differ). Some port packets are more and some port packets are less. And the packet priorities of the various ports are also different. At this time, mutual interference may occur when processing each port packet.
In the present application, however, a separate storage space may be automatically allocated for packets from each of the plurality of ports. The first storage space can be expanded under the condition that the first storage space can be adjusted, and the first storage space is continuously utilized to cache the data packet sent by the corresponding port; or, when it is determined that the first storage space is not adjustable, the port corresponding to the first storage space may be prevented from continuing to send the data packet. And the data packets of the ports are prevented from interfering with each other.
As can be seen from the foregoing technical solutions, in the data packet processing method provided in the embodiments of the present invention, a data packet sent by each port of a plurality of ports is received; according to the header information of the data packet sent by each port, caching the data packet in a storage space corresponding to the header information; detecting the occupation state of each storage space in a plurality of storage spaces corresponding to the plurality of ports; under the condition that the occupation state of a first storage space in the plurality of storage spaces is detected to exceed a preset first threshold, judging whether the first storage space can be adjusted or not; under the condition that the first storage space can be adjusted, expanding the first storage space, and continuously caching data packets sent by corresponding ports by using the first storage space; under the condition that the first storage space cannot be adjusted, preventing a port corresponding to the first storage space from continuously sending data packets; and according to the priority of the storage space for caching the data packets sent by each port, sending the data packets sent by each port of the plurality of ports to a server according to the sequence from high priority to low priority, so that the server processes the data packets sent by each port of the plurality of ports. In this way, independent storage space may be automatically allocated for packets from each of the plurality of ports. The first storage space can be expanded under the condition that the first storage space can be adjusted, and the first storage space is continuously utilized to cache the data packet sent by the corresponding port; or, when it is determined that the first storage space is not adjustable, the port corresponding to the first storage space may be prevented from continuing to send the data packet. And the data packets of the ports are prevented from interfering with each other.
Referring to fig. 3, fig. 3 is a structural diagram of a packet processing apparatus according to the present invention. As shown in fig. 3, the packet processing apparatus 300 includes a receiving module 301, a first caching module 302, a detecting module 303, a determining module 304, a second caching module 305, a blocking module 306, and a sending module 307, wherein:
a receiving module 301, configured to receive a data packet sent by each of a plurality of ports;
a first caching module 302, configured to cache the data packet in a storage space corresponding to the header information according to the header information of the data packet sent by each port;
a detecting module 303, configured to detect an occupied state of each storage space in a plurality of storage spaces corresponding to the plurality of ports;
a determining module 304, configured to determine whether a first storage space in the plurality of storage spaces is adjustable when it is detected that an occupied state of the first storage space exceeds a preset first threshold;
a second cache module 305, configured to expand the first storage space and continue to cache the data packet sent by the corresponding port by using the first storage space when it is determined that the first storage space is adjustable;
a blocking module 306, configured to block a port corresponding to the first storage space from continuing to send a data packet when it is determined that the first storage space is not adjustable;
a sending module 307, configured to send, according to the priority of the storage space for caching the data packet sent by each port, the data packet sent by each port of the multiple ports to a server according to the order from high to low of the priority, so that the server processes the data packet sent by each port of the multiple ports.
The data packet processing apparatus 300 can implement each process implemented by the data packet processing apparatus in the method embodiment of fig. 1, and is not described herein again to avoid repetition. And the packet processing device 300 may be implemented to automatically allocate separate memory space for packets from each of the plurality of ports. The first storage space can be expanded under the condition that the first storage space can be adjusted, and the first storage space is continuously utilized to cache the data packet sent by the corresponding port; or, when it is determined that the first storage space is not adjustable, the port corresponding to the first storage space may be prevented from continuing to send the data packet. And the data packets of the ports are prevented from interfering with each other.
Referring to fig. 4, fig. 4 is a schematic view of an embodiment of an electronic device according to an embodiment of the present disclosure.
As shown in fig. 4, an electronic device 400 according to an embodiment of the present application includes a memory 410, a processor 420, and a computer program 411 stored in the memory 410 and executable on the processor 420, where the processor 420 executes the computer program 411 to implement the following steps:
receiving a data packet sent by each port in a plurality of ports;
according to the header information of the data packet sent by each port, caching the data packet in a storage space corresponding to the header information;
detecting the occupation state of each storage space in a plurality of storage spaces corresponding to the plurality of ports;
under the condition that the occupation state of a first storage space in the plurality of storage spaces is detected to exceed a preset first threshold, judging whether the first storage space can be adjusted or not;
under the condition that the first storage space can be adjusted, expanding the first storage space, and continuously caching data packets sent by corresponding ports by using the first storage space;
under the condition that the first storage space cannot be adjusted, preventing a port corresponding to the first storage space from continuously sending data packets;
and according to the priority of the storage space for caching the data packets sent by each port, sending the data packets sent by each port of the plurality of ports to a server according to the sequence from high priority to low priority, so that the server processes the data packets sent by each port of the plurality of ports.
In a specific implementation, when the processor 420 executes the computer program 411, any of the embodiments corresponding to fig. 1 may be implemented.
Since the electronic device described in this embodiment is a device used for implementing a packet processing apparatus in this embodiment, based on the method described in this embodiment, a person skilled in the art can understand the specific implementation manner of the electronic device of this embodiment and various variations thereof, so that how to implement the method in this embodiment by the electronic device is not described in detail herein, and as long as the person skilled in the art implements the device used for implementing the method in this embodiment, the scope of protection intended by this application falls.
Referring to fig. 5, fig. 5 is a schematic diagram illustrating an embodiment of a computer-readable storage medium according to the present application.
As shown in fig. 5, the present embodiment provides a computer-readable storage medium 500 having a computer program 511 stored thereon, the computer program 511 implementing the following steps when executed by a processor:
receiving a data packet sent by each port in a plurality of ports;
according to the header information of the data packet sent by each port, caching the data packet in a storage space corresponding to the header information;
detecting the occupation state of each storage space in a plurality of storage spaces corresponding to the plurality of ports;
under the condition that the occupation state of a first storage space in the plurality of storage spaces is detected to exceed a preset first threshold, judging whether the first storage space can be adjusted or not;
under the condition that the first storage space can be adjusted, expanding the first storage space, and continuously caching data packets sent by corresponding ports by using the first storage space;
under the condition that the first storage space cannot be adjusted, preventing a port corresponding to the first storage space from continuously sending data packets;
and according to the priority of the storage space for caching the data packets sent by each port, sending the data packets sent by each port of the plurality of ports to a server according to the sequence from high priority to low priority, so that the server processes the data packets sent by each port of the plurality of ports.
In a specific implementation, the computer program 511 may implement any of the embodiments corresponding to fig. 1 when executed by a processor.
It should be noted that, in the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to relevant descriptions of other embodiments for parts that are not described in detail in a certain embodiment.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Embodiments of the present application further provide a computer program product, where the computer program product includes computer software instructions, and when the computer software instructions are run on a processing device, the processing device is caused to execute the flow in the data packet processing method in the embodiment corresponding to fig. 1.
The computer program product includes one or more computer instructions. When loaded and executed on a computer, cause the processes or functions described in accordance with the embodiments of the application to occur, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored on a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website, computer, server, or data center to another website, computer, server, or data center via wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that a computer can store or a data storage device, such as a server, a data center, etc., that is integrated with one or more available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.
It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the several embodiments provided in the present application, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application may be substantially implemented or contributed to by the prior art, or all or part of the technical solution may be embodied in a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
The above embodiments are only used for illustrating the technical solutions of the present application, and not for limiting the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the corresponding technical solutions in the embodiments of the present application.
Claims (10)
1. A method for processing a data packet, comprising:
receiving a data packet sent by each port in a plurality of ports;
according to the header information of the data packet sent by each port, caching the data packet in a storage space corresponding to the header information;
detecting the occupation state of each storage space in a plurality of storage spaces corresponding to the plurality of ports;
under the condition that the occupation state of a first storage space in the plurality of storage spaces is detected to exceed a preset first threshold, judging whether the first storage space can be adjusted or not;
under the condition that the first storage space can be adjusted, expanding the first storage space, and continuously caching data packets sent by corresponding ports by using the first storage space;
under the condition that the first storage space cannot be adjusted, preventing a port corresponding to the first storage space from continuously sending data packets;
and according to the priority of the storage space for caching the data packets sent by each port, sending the data packets sent by each port of the plurality of ports to a server according to the sequence from high priority to low priority, so that the server processes the data packets sent by each port of the plurality of ports.
2. The method of claim 1, wherein prior to the step of receiving the data packet transmitted by each of the plurality of ports, the method further comprises:
receiving storage space configuration information sent by the server;
setting the plurality of storage spaces according to the storage space configuration information;
setting a priority of each of the plurality of storage spaces, a space size of each of the plurality of storage spaces, and an adjustable state of each of the plurality of storage spaces.
3. The method of claim 2, wherein after the step of transmitting the packet transmitted by each of the plurality of ports to the server in order of priority from high to low according to the priority of the storage space for buffering the packet transmitted by each port, the method further comprises:
and under the condition that the time length of waiting processing of the data packets in a second storage space in the plurality of storage spaces is detected to exceed a preset second threshold, sending a notification message to the server, so that the server terminates processing of the data packets in other storage spaces except the second storage space in the plurality of storage spaces according to the notification message, and processing the data packets in the second storage space.
4. The method of claim 1, wherein after the step of transmitting the packets transmitted by each of the plurality of ports to the server in order of priority from high to low according to the priority of the storage space in which the packets transmitted by each of the ports are buffered, the method further comprises:
detecting whether a data packet sent by each port in the plurality of ports is complete;
and sending an interrupt signal to the server under the condition that the data packet sent by a target port in the plurality of ports is detected to be incomplete, so that the server terminates processing of the incomplete data packet sent by the target port according to the interrupt signal.
5. The method of claim 1, wherein in case it is determined that the first storage space is adjustable and the first storage space is enlarged, the method further comprises:
and reducing the other storage spaces except the first storage space in the plurality of storage spaces.
6. The method of any of claims 1 to 5, wherein the number of the plurality of storage spaces does not exceed 32.
7. The method of claim 6, wherein the plurality of ports is 4 ports.
8. A packet processing apparatus, comprising:
the receiving module is used for receiving a data packet sent by each port in the plurality of ports;
the first cache module is used for caching the data packets in a storage space corresponding to the header information according to the header information of the data packets sent by each port;
the detection module is used for detecting the occupation state of each storage space in a plurality of storage spaces corresponding to the plurality of ports;
the judging module is used for judging whether a first storage space in the plurality of storage spaces can be adjusted or not under the condition that the occupation state of the first storage space is detected to exceed a preset first threshold;
the second cache module is used for expanding the first storage space and continuously caching the data packets sent by the corresponding ports by using the first storage space under the condition that the first storage space is judged to be adjustable;
the blocking module is used for blocking a port corresponding to the first storage space from continuously sending data packets under the condition that the first storage space is judged not to be adjustable;
and the sending module is used for sending the data packets sent by each of the plurality of ports to a server according to the priority of the storage space for caching the data packets sent by each port and the sequence from high to low of the priority, so that the server processes the data packets sent by each of the plurality of ports.
9. An electronic device comprising a memory, a processor, wherein the processor is configured to implement the steps of the data packet processing method according to any one of claims 1 to 7 when executing a computer program stored in the memory.
10. A computer-readable storage medium having stored thereon a computer program, characterized in that: the computer program realizing the steps of the data packet processing method according to any one of claims 1 to 7 when executed by a processor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011578250.5A CN112737977B (en) | 2020-12-28 | 2020-12-28 | Data packet processing method and device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011578250.5A CN112737977B (en) | 2020-12-28 | 2020-12-28 | Data packet processing method and device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112737977A true CN112737977A (en) | 2021-04-30 |
| CN112737977B CN112737977B (en) | 2022-05-20 |
Family
ID=75606244
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011578250.5A Active CN112737977B (en) | 2020-12-28 | 2020-12-28 | Data packet processing method and device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112737977B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8312188B1 (en) * | 2009-12-24 | 2012-11-13 | Marvell International Ltd. | Systems and methods for dynamic buffer allocation |
| CN108011704A (en) * | 2016-11-01 | 2018-05-08 | 中芯国际集成电路制造(上海)有限公司 | Half-duplex communications device and its communication means, the device of half-duplex operation |
| CN110581877A (en) * | 2018-06-11 | 2019-12-17 | 佛山市顺德区美的电热电器制造有限公司 | Communication method and device, electronic equipment and readable storage medium |
| CN111124291A (en) * | 2019-12-09 | 2020-05-08 | 北京金山云网络技术有限公司 | Data storage processing method and device of distributed storage system and electronic equipment |
| CN111371704A (en) * | 2020-02-06 | 2020-07-03 | 视联动力信息技术股份有限公司 | Data caching method and device, terminal equipment and storage medium |
| WO2020220535A1 (en) * | 2019-04-28 | 2020-11-05 | 平安科技（深圳）有限公司 | Data storage method, and related device |
-
2020
- 2020-12-28 CN CN202011578250.5A patent/CN112737977B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8312188B1 (en) * | 2009-12-24 | 2012-11-13 | Marvell International Ltd. | Systems and methods for dynamic buffer allocation |
| CN108011704A (en) * | 2016-11-01 | 2018-05-08 | 中芯国际集成电路制造(上海)有限公司 | Half-duplex communications device and its communication means, the device of half-duplex operation |
| CN110581877A (en) * | 2018-06-11 | 2019-12-17 | 佛山市顺德区美的电热电器制造有限公司 | Communication method and device, electronic equipment and readable storage medium |
| WO2020220535A1 (en) * | 2019-04-28 | 2020-11-05 | 平安科技（深圳）有限公司 | Data storage method, and related device |
| CN111124291A (en) * | 2019-12-09 | 2020-05-08 | 北京金山云网络技术有限公司 | Data storage processing method and device of distributed storage system and electronic equipment |
| CN111371704A (en) * | 2020-02-06 | 2020-07-03 | 视联动力信息技术股份有限公司 | Data caching method and device, terminal equipment and storage medium |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112737977B (en) | 2022-05-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7007097B1 (en) | Method and system for covering multiple resourcces with a single credit in a computer system | |
| US8370558B2 (en) | Apparatus and method to merge and align data from distributed memory controllers | |
| US20030074502A1 (en) | Communication between two embedded processors | |
| US5933413A (en) | Adaptive priority determination for servicing transmit and receive in network controllers | |
| CN107426113B (en) | Message receiving method and network equipment | |
| EP3166269B1 (en) | Queue management method and apparatus | |
| US6952739B2 (en) | Method and device for parameter independent buffer underrun prevention | |
| CN115481048A (en) | Memory system and chip | |
| US20170024344A1 (en) | Method and System for USB 2.0 Bandwidth Reservation | |
| CA2925612A1 (en) | A network interface | |
| KR100505689B1 (en) | Transceiving network controller providing for common buffer memory allocating corresponding to transceiving flows and method thereof | |
| CN112995809B (en) | Control method and device of FC switch, FC switch and storage medium | |
| CN112737977B (en) | Data packet processing method and device | |
| US7802031B2 (en) | Method and system for high speed network application | |
| KR100560277B1 (en) | Assignment of packet descriptor field positions in a network processor | |
| US9985874B2 (en) | Network traffic split among multiple paths | |
| US10031884B2 (en) | Storage apparatus and method for processing plurality of pieces of client data | |
| CN113157465B (en) | Message sending method and device based on pointer linked list | |
| CN117499351A (en) | Message forwarding device and method, communication chip and network equipment | |
| CN114401235A (en) | Method, system, medium, equipment and application for processing heavy load in queue management | |
| KR20160109733A (en) | Storage apparatus and method for processing a plurality of client data | |
| CN116055409B (en) | Data transmission method and device of Ethernet card, network equipment and storage medium | |
| EP0446335B1 (en) | Packet/fast packet switch for voice and data | |
| CN112073316B (en) | Data transmission system, method, equipment and storage medium with multi-channel bit width change | |
| CN111124987B (en) | PCIE-based data transmission control system and method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |