CN112737378A - Cascaded H-bridge multi-level converter hybrid topology structure and control method thereof - Google Patents

Cascaded H-bridge multi-level converter hybrid topology structure and control method thereof Download PDF

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CN112737378A
CN112737378A CN202110015242.8A CN202110015242A CN112737378A CN 112737378 A CN112737378 A CN 112737378A CN 202110015242 A CN202110015242 A CN 202110015242A CN 112737378 A CN112737378 A CN 112737378A
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frequency
module
bridge
switching
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CN112737378B (en
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涂春鸣
龙柳
郭祺
肖凡
高家元
肖标
侯玉超
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Hunan University
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483Converters with outputs that each can have more than two voltages levels
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H02M7/53871Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration with automatic control of output voltage or current
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The invention provides a mixed topological structure and a control method of a cascaded H-bridge multi-level converter by utilizing a high-frequency module and a low-frequency module which are distinguished by mixed frequency pulse width modulation, and a high-frequency branch and a power frequency branch which are separated by unipolar modulation. The hybrid topological structure and the control method provided by the invention solve the problems of large power loss, uneven distribution and uneven intermediate direct-current voltage of the cascaded H-bridge multi-level converter in the prior art.

Description

Cascaded H-bridge multi-level converter hybrid topology structure and control method thereof
Technical Field
The invention belongs to the technical field of loss reduction, energy conservation and loss balance control of a power electronic converter, and relates to a mixed topological structure of a cascaded H-bridge multi-level converter and a control method thereof.
Background
With the development of large-scale application of power electronic technology, power electronic equipment has become the core for realizing high-quality and high-efficiency utilization of electric energy in various fields of national defense industry, especially large-capacity equipment. The cascaded H-bridge multi-level structure is favored in medium-high voltage high-power occasions due to the advantages of good output waveform quality, easiness in modular expansion and the like. The control effect and the conversion efficiency of the device play a crucial role in improving the energy utilization rate of large-capacity equipment.
The cascade H-bridge multilevel topology adopts a switching device with a low voltage withstanding value to realize high-voltage multilevel output, the traditional modulation scheme adopts a carrier phase-shift sinusoidal pulse width modulation (CPS-SPWM) mode to improve equivalent switching frequency, but the frequency of the switching device used in the modulation strategy is high, the existing multilevel topology mainly adopts Si IGBT as the switching device, the Si IGBT can generate high switching loss under high frequency, and the number of the switching devices in the cascade structure is large, so that the generated loss is large, and the high-efficiency operation of the converter is not facilitated. On the basis of ensuring high-quality electric energy output waveform, a scholars proposes to reduce the switching loss of a power device by adopting a Hybrid Pulse Width Modulation (HPWM) strategy, the HPWM technology only enables one module to work in a high-frequency mode, and other modules all run in a low-frequency state, so that the total switching times of the power device is far less than CPS modulation, and the switching loss is greatly reduced. Through calculation, the output voltage under the HPWM modulation strategy can reach the same harmonic characteristic as that of CPS modulation, and therefore the superiority of the hybrid modulation strategy is highlighted. However, due to the difference of the switching modes of the modules, the power loss distribution is not uniform and the intermediate dc voltage is not uniform, so it is very important to find a topology and a control method of a cascaded H-bridge multi-level converter that can reduce the loss and ensure the balance of the intermediate dc voltages.
Disclosure of Invention
In order to achieve the purpose, the invention provides a hybrid topology structure of a cascaded H-bridge multi-level converter and a control method, which solve the problems of uneven heat loss distribution of each module and unbalanced intermediate direct-current voltage of the cascaded H-bridge multi-level structure in the prior art.
The technical scheme adopted by the invention is that,
the utility model provides a cascade H bridge multilevel converter mixes topological structure, includes a high frequency module and a plurality of low frequency module, the high frequency module comprises high frequency branch road and power frequency branch road, and wherein the high frequency branch road adopts SiC MOSFET to connect in parallel or SiC MOSFET and Si IGBT parallel structure as switching device, and low frequency module and power frequency branch road adopt Si IGBT as switching device.
The control method of the cascade H-bridge multi-level converter hybrid topology structure comprises the following steps:
step 1, dividing a cascaded H bridge multi-level converter into a high-frequency module and a plurality of low-frequency modules by using a mixed pulse width modulation mode: making N-1 modules work in the step wave mode to output step wave voltage ustepThe Nth module operates in a high-frequency PWM mode, which modulates the wave signal unrefFor modulating the wave voltage urefAnd step wave voltage ustepAre obtained by subtraction, i.e. unref=uref-ustep(ii) a Will unrefAnd a triangular carrier signal ucMaking a comparison at unrefPositive half cycle of (d), when unref>ucTime, output voltage uo=ud,udIs a DC side voltage, when unref<ucTime, output voltage u o0; at unrefNegative half cycle of (d), when unref<ucTime, output voltage uo=-udWhen u isnref>ucTime, output voltage u o0, to obtain the output voltage u of the high-frequency moduleoOutput waveform of (d) will ustepAnd uoThe multi-level voltage u output by the converter AC side can be synthesized by superpositionan,uanIs shown as formula (1):
Figure BDA0002886532390000021
In the formula (1), uhiRepresenting the input voltage at the AC terminal of the ith H-bridge module, udiRepresenting the output voltage at the DC terminal of the ith H-bridge module, HiRepresents the switching function of the ith H-bridge module when S1、S4When conducting, hi+1, the output voltage of the module is + ud(ii) a When S is2、S3When conducting, hi-1, the output voltage of the module is-ud(ii) a When S is1、S3Or S2、S4When conducting, hiThe output terminal voltage of the module is 0, where S1、S2、S3、S4For 4 switching elements in the cascade H-bridge module, the connection relation is consistent with that of the traditional cascade H-bridge, and the position relation is as follows: s1And S2On the left side of the H bridge, S3And S4On the right side of the H bridge, S1And S3At the upper part of the H bridge, S2And S4At the lower part of the H bridge;
step 2, dividing the high-frequency module into a high-frequency branch and a power frequency branch by using a unipolar modulation mode: inputting power frequency modulation signal u to high frequency modulerControl switch S1And S2Make-and-break; will urAnd a triangular wave carrier signal ucComparing and controlling the switch S3And S4The output voltage of the bridge arm of the high-frequency module is obtained by switching on and off, and the specific process is as follows:
1) at urPositive half-cycles of (i.e. u)r>At time 0:
S1remains in the on-state, S2Keeping an off state: when u isr>ucTime S3Off, S4Is turned on at this time uo=ud(ii) a When u isr<ucTime S3Conduction, S4Is turned off when uo=0;
2) At urNegative half cycles of (i.e. u)r<At 0 time:
S1Remains in an off state, S2Keeping an on state: when u isr>ucTime S3Off, S4Is turned on at this time uo0; when u isr<ucTime S3Conduction, S4Is turned off when uo=-ud
Wherein, the power frequency branch S1And S2The power frequency modulation is adopted, a device with low transmission loss is selected as a switching device, and a high-frequency branch S3And S4Switching frequency modulation is adopted, and a device with low switching loss is selected as a switching device.
Further, the high-frequency branch adopts the following scheme:
scheme A: a SiC MOSFET parallel structure is adopted as a switching device;
scheme B: a SiC MOSFET and Si IGBT parallel structure is adopted as a switching device.
Further, the scheme B enables the Si IGBT to be turned on before the SiC MOSFET and then turned off after the SiC MOSFET by changing the driving time sequence.
Further, the low-frequency module performs half-power-frequency period timing rotation on the switching function: and successively carrying out recursion on the switch mode of each low-frequency module backwards every half power frequency period until the switch mode completes one round of switching.
The invention has the following characteristics:
1) the high-frequency module and the low-frequency module which are distinguished by a mixed pulse width modulation mode are used for mixing power devices in the cascaded H-bridge multi-level converter according to the difference of module frequencies, and a mixed topology of the cascaded H-bridge multi-level converter is constructed;
2) the high-frequency module is divided into a high-frequency branch and a power-frequency branch by using a unipolar modulation mode, and the high-frequency branch can respectively adopt two schemes of parallel connection of SiC MOSFETs or parallel connection of Si IGBTs and SiC MOSFETs, so that the switching loss of the high-frequency branch is reduced; the power frequency branch circuit adopts the Si IGBT as a switching device, so that the transmission loss of the power frequency branch circuit is reduced, the running loss of the high-frequency module is further reduced to the greatest extent, and the loss difference between the high-frequency module and each low-frequency module is reduced;
3) in order to realize the loss balance among the modules, the symmetrical distribution of the switch modes of the N-1 low-frequency modules is realized by adopting a mode of timing alternation of the half power frequency period of the switch function, so that the loss distribution among the modules is more balanced.
The invention has the beneficial effects that:
the hybrid topology and the control method can remarkably reduce the running loss of the high-frequency module and reduce the loss difference between the high-frequency module and each low-frequency module while considering low cost, and the loss of each low-frequency module can be consistent by a timing rotation strategy, so that the power loss and the intermediate direct-current voltage between the modules can be balanced finally.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram of a hybrid pulse width modulation scheme
Fig. 2 is a waveform diagram of a unipolar modulation scheme.
Fig. 3 is a hybrid topology diagram of an N-cascade H-bridge multilevel converter.
Fig. 4 is a topology structure diagram of a conventional N-cascade H-bridge multi-level converter.
Fig. 5 is a waveform diagram of a mixed pulse width modulation output multi-level voltage.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The invention adopts the specific technical scheme that:
the utility model provides a cascade H bridge multilevel converter mixes topological structure, includes a high frequency module and a plurality of low frequency module, the high frequency module comprises high frequency branch road and power frequency branch road, the high frequency branch road adopts SiC MOSFET to connect in parallel or SiC MOSFET and Si IGBT parallel structure as switching device, low frequency module and power frequency branch road adopt Si IGBT as switching device.
A control method of a cascade H-bridge multi-level converter hybrid topology structure comprises the following steps:
step 1, dividing a cascaded H bridge multi-level converter into a high-frequency module and a plurality of low-frequency modules by using a mixed pulse width modulation mode: making N-1 modules work in the step wave mode to output step wave voltage ustepThe Nth module operates in a high-frequency PWM mode, which modulates the wave signal unrefFor modulating the wave voltage urefAnd step wave voltage ustepAre obtained by subtraction, i.e. unref=uref-ustep(ii) a Will unrefAnd a triangular carrier signal ucMaking a comparison at unrefPositive half cycle of (d), when unref>ucTime, output voltage uo=ud,udIs a DC side voltage, when unref<ucTime, output voltage u o0; at unrefNegative half cycle of (d), when unref<ucTime, output voltage uo=-udWhen u isnref>ucTime, output voltage u o0, to obtain the output voltage u of the high-frequency moduleoOutput waveform of (d) will ustepAnd uoThe multi-level voltage u output by the converter AC side can be synthesized by superpositionan,uanThe specific expression of (2) is shown as formula (1):
Figure BDA0002886532390000041
in the formula (1), uhiRepresenting the input voltage at the AC terminal of the ith H-bridge module, udiRepresenting the output voltage at the DC terminal of the ith H-bridge module, HiRepresents the switching function of the ith H-bridge module when S1、S4When conducting, hi+1, the output voltage of the module is + ud(ii) a When S is2、S3When conducting, hi-1, the output voltage of the module is-ud(ii) a When S is1、S3Or S2、S4When conducting, hiThe output terminal voltage of the module is 0, where S1、S2、S3、S4For 4 switching elements in the cascade H-bridge module, the connection relation is consistent with that of the traditional cascade H-bridge, and the position relation is as follows: s1And S2On the left side of the H bridge, S3And S4On the right side of the H bridge, S1And S3At the upper part of the H bridge, S2And S4At the lower part of the H bridge;
step 2, dividing the high-frequency module into a high-frequency branch and a power frequency branch by using a unipolar modulation mode: inputting power frequency modulation signal u to high frequency modulerControl switch S1And S2Make-and-break; will urAnd a triangular wave carrier signal ucComparing and controlling the switch S3And S4The output voltage of the high-frequency module is obtained by switching on and off, and the specific process is as follows:
1) at urPositive half-cycles of (i.e. u)r>At time 0:
S1remains in the on-state, S2Keeping an off state: when u isr>ucTime S3Off, S4Is turned on at this time uo=ud(ii) a When u isr<ucTime S3Conduction, S4Is turned off when uo=0;
3) At urNegative half cycles of (i.e. u)r<At time 0:
S1remains in an off state, S2Keeping an on state: when u isr>ucTime S3Off, S4Is turned on at this time uo0; when u isr<ucTime S3Conduction, S4Is turned off when uo=-ud
Wherein, the power frequency branch S1And S2The power frequency modulation is adopted, a device with low transmission loss is selected as a switching device, and a high-frequency branch S3And S4Switching frequency modulation is adopted, and a device with low switching loss is selected as a switching device.
Further, the high-frequency branch in step 2 adopts the following scheme:
scheme A: a SiC MOSFET parallel structure is adopted as a switching device;
scheme B: a SiC MOSFET and Si IGBT parallel structure is adopted as a switching device.
Furthermore, in the scheme B, the Si IGBT is switched on before the SiC MOSFET and is switched off after the SiC MOSFET by changing the driving time sequence, so that zero-voltage switching of the Si IGBT is realized.
Further, the low-frequency module performs half-power-frequency period timing rotation on the switching function: and successively carrying out recursion on the switch mode of each low-frequency module backwards every half power frequency period until the switch mode completes one round of switching.
The principle of the technical scheme adopted by the invention is as follows:
fig. 1 shows a topology of a conventional cascaded H-bridge multi-level converter, which is formed by cascading N H-bridge modules, each of which is generally composed of 4 Si IGBTs and a dc-side energy storage capacitor, and can expand the overall capacity of the converter. The modulation principle of the mixed pulse width modulation is shown in FIG. 2, the modulated wave is a sinusoidal reference signal, and the modulated wave voltage is urefMaking N-1 modules work in step wave mode to output step wave voltage ustepThe Nth module operates in a high-frequency PWM mode, which modulates the wave signal unrefObtained by subtracting the modulated wave voltage from the stepped wave voltage, i.e. unref=uref-ustep. Will unrefAnd a triangular carrier signal ucMaking a comparison at unrefPositive half cycle of (d), when unref>ucTime, output voltage uo=udWhen u isnref<ucTime, output voltage u o0; at unrefNegative half cycle of (d), when unref<ucTime, output voltage uo=-udWhen u isnref>ucTime, output voltage u o0, thereby obtaining the output waveform u of the high frequency moduleoWill ustepAnd uoThe multi-level voltage u output by the converter AC side can be synthesized by superpositionan,uanThe specific expression of (2) is shown as formula (1):
Figure BDA0002886532390000051
in the formula (1), uhiRepresenting the input voltage at the AC terminal of the ith H-bridge module, udiRepresenting the output voltage at the DC terminal of the ith H-bridge module, HiThe switching function of the ith H-bridge module is shown. When S is1,S4When conducting, hi+1, the output voltage of the module is + ud(ii) a When S is2,S3When conducting, hi-1, the output voltage of the module is-ud(ii) a When S is1,S3(or S)2,S4) When conducting, hiThe output voltage of the module is 0. Fig. 3 is an output waveform diagram of an N cascade H bridge multi-level converter under HPWM modulation.
Due to the difference of the switching modes of the modules, the power loss of each module is inconsistent, especially the IGBT of the high-frequency module is subjected to the on-off of high switching frequency, so the switching loss of the high-frequency module is far higher than that of the low-frequency module, which causes uneven distribution of the heat loss of each module in the N-cascade H-bridge multi-level converter and also causes unbalance of the intermediate direct-current voltage. When the converter is actually operated, the junction temperature of the IGBT of the high frequency module will be higher than that of the other modules, which also lowers the maximum output power of the converter to some extent.
As can be known from the modulation schematic diagram of the Hybrid Pulse Width Modulation (HPWM) shown in fig. 2, the HPWM modulation technique divides the cascaded H-bridge multi-level converter into a high-frequency module and a low-frequency module, wherein the high-frequency module adopts a unipolar modulation mode, and a modulation wave signal of the high-frequency module is obtained by subtracting a modulation wave voltage from a step wave voltage. The invention divides the high-frequency module into a high-frequency branch and a power-frequency branch by using a unipolar modulation mode, and the specific modulation waveform is shown in figure 4.
In FIG. 4, udIs a DC side voltage urFor the power frequency modulation signal of the high-frequency module, ucIs a triangular wave carrier signal uoFor the output voltage u of the bridge arm of the high-frequency modulePWMIs the driving signal for the switching device in the high frequency module.
1) At urPositive half cycle of
S1Remains in the on-state, S2Keeping an off state: when u isr>ucTime S4Conduction, S3Is turned off when uo=ud(ii) a When u isr<ucTime S4Off, S3Is turned on at this time uo=0。
4) At urNegative half cycle of
S1Remains in an off state, S2Keeping an on state: when u isr<ucTime S3Conduction, S4Is turned off when uo=-ud(ii) a When u isr>ucTime S3Off, S4Is turned on at this time uo=0。
Through the analysis, the H-bridge module is split into the high-frequency branch and the power-frequency branch by the unipolar modulation mode, wherein S1And S2Using power frequency modulation, S3And S4Switching frequency modulation is used. In a power frequency branch, a power device can basically realize ZVS (zero voltage switching), and the switching loss can be considered as 0, so that the transmission loss is the main loss, and a device with small transmission loss can be selected as a switching device; in the high-frequency branch, the power device needs to be switched on and off at a high switching frequency, so that the switching loss is high, and a device with low switching loss can be selected as a switching device. The invention provides a mixed topology of a cascaded H-bridge multi-level converter by utilizing a high-frequency module and a low-frequency module which are distinguished by mixed frequency pulse width modulation, and a high-frequency branch and a power frequency branch which are separated by unipolar modulation, as shown in figure 5.
In fig. 5, assuming that the first module is a high-frequency module, in order to reduce the loss of the high-frequency module, the power frequency branch circuit adopts a Si IGBT with small transmission loss, and zero-voltage turn-on and zero-voltage turn-off can be realized. The high-frequency branch circuit has two schemes, wherein the scheme A adopts SiC MOSFET parallel connection, and the scheme B adopts SiC MOSFET parallel connection with Si IGBT, and the scheme comprises the following specific steps:
1) scheme A. By adopting the SiC MOSFETs in parallel connection, the problem that the cost of a single large-current SiC MOSFET is too high is avoided, and the loss can be greatly reduced.
2) Scheme B. The parallel connection of the SiC MOSFET and the Si IGBT is a scheme comprehensively considering cost and efficiency. When the current is small, only the SiC MOSFET is turned on, and when the current is large, most of the current will flow through the Si IGBT due to the conductance modulation effect of the Si IGBT. The hybrid device integrates the advantages of low loss of the SiC MOSFET under low current and low conduction loss of the Si IGBT under high current, and simultaneously, the Si IGBT is switched on before the SiC MOSFET and is switched off after the SiC MOSFET by changing the driving time sequence, so that the ZVS of the Si IGBT is realized.
The transmission loss in the low-frequency module is the main loss of the module, so the Si IGBT is still selected as a switching device.
From the above analysis, the hybrid topology can further optimize the loss while considering low cost, the loss of the high-frequency module is greatly reduced, and effective loss balance can be realized between the high-frequency module and each low-frequency module.
In addition, because the N-1 low-frequency modules work in a step wave mode, the switching modes among the low-frequency modules are inconsistent. In order to balance the loss distribution among the low-frequency modules, the switching functions of the low-frequency modules are periodically alternated in half power frequency period, namely, the switching modes of the low-frequency modules are sequentially recurred back and forth every other half power frequency period until the switching modes complete one-round switching. Taking 5 cascade H bridge 7 level converter as an example (assuming that the 1 st module is a high-frequency module), in the half cycle of the first power frequency period, the switching state of each low-frequency module is defined as Hi=hi(ii) a In the second half cycle, the first round of switch alternation is carried out, and h is2-h5Successively backward recursion one bit for H2-H5I.e. H2=h1,H3=h2,H4=h3,H5=h4And by analogy, the switching function restores to the initial state until after 2 power frequency cycles. Therefore, the symmetrical distribution of the switch modes of the low-frequency modules within a certain time is ensured, and the problem of uneven loss of the cascaded H-bridge multi-level converter under the HPWM modulation can be further solved.
Examples
A single-phase 15-cascade H-bridge 31 level converter testing platform with the capacity of 202kVA is constructed in the invention, the devices are selected from 1200V/75A Si IGBT (IKW40N120T2), 1200V/75A Si IGBT (IGW40T120), 1200V/50A Si IGBT (IGW25N120H3), 1200V/36A SiC MOSFET (C2M0080120D) and 1200V/18A SiC MOSFET (C2M0160120D), and other experimental parameters are shown in Table 1.
TABLE 1 Main test parameters
Parameter(s) Numerical value Parameter(s) Numerical value
us 10kV ud 580V
fsw 10kHz m 0.9
Wherein u issRepresenting the grid voltage udRepresenting the intermediate DC voltage of each module, m being the modulation degree, fswIs the switching frequency. The ac terminal voltages of the respective modules are:
Figure BDA0002886532390000081
the effective value of the input current of a single module is
Figure BDA0002886532390000082
The transmission loss of the single-tube Si IGBT is calculated as follows:
Figure BDA0002886532390000083
vCE(t)=VCE0+rCE*iC(t) (4)
iC(t)=ICPsin(ωt)
in the formula (4), m is a modulation ratio of 0.9, τ is a duty ratio, which is related to a waveform of a modulated wave voltage, and VCEOIs a threshold voltage rCEIs an on-state resistance, ICPIs the peak value of the current flowing in the Si IGBT.
The switching loss of a single-tube Si IGBT can be calculated with the following formula:
Figure BDA0002886532390000084
in the formula (5), fswTo the switching frequency, EswonTo turn-on losses (including diode reverse recovery losses), EswoffFor turn-off losses (including diode reverse recovery losses), ICNRated current peak value, V, of Si IGBTDCIs a DC bus voltage, VCENRated power of Si IGBTAnd (6) pressing.
As can be seen from the above formula for calculating the loss, most of the parameters in the formula are determined by the selected device model and operating frequency, and the parameters related to the device operating state are only the duty ratio tau and the peak value I of the current flowing through the deviceCP. Similarly, the calculation method is also suitable for the transmission and switching loss calculation of the SiC MOSFET.
The prior structure is adopted:
the high-frequency module adopts a 1200V/75A Si IGBT as a switching device, and V at the moment can be obtained by looking up the Datasheet of the 1200V/75A Si IGBT with the model number of IGW40T120CEO=0.6V,rCE=0.0257Ω,Eswon=3.3mJ,Eswoff3.2 mJ. The data of the high-frequency module corresponding to τ (t) ═ m (15 × sin (wt) — i) (i is a voltage of a step wave), and the data of the above-described data combination formula (4) and formula (5) can be obtained by MATLAB programming: pss-IGBT=13.3448W,Psw-IGBTThis results in a loss of (13.3448+6.5998) × 4 ═ 79.7784W of the high-frequency module of 6.5998W.
The 14 low-frequency modules still adopt the Si IGBT of 1200V/75A of the type IGW40T120 as a switching device, and the low-frequency modules can be always kept in an on state in a certain period of time, so that zero-voltage switching-on and zero-voltage switching-off can be realized, and approximately considered as Psw-IGBT0W. And combining the formula (4) and the formula (5), the transmission loss of each low-frequency module can be obtained by MATLAB programming, that is, the power loss distribution of each low-frequency module is shown in Table 2:
TABLE 2 losses of the Low frequency modules
Ith low frequency module Loss (W) Ith low frequency module Loss (W)
1 96.4979 2 92.1984
3 87.8597 4 83.4601
5 78.9752 6 74.3764
7 69.6287 8 64.6874
9 59.4929 10 53.9608
11 47.9631 12 41.2854
13 33.5104 14 23.5591
From the above analysis, it can be seen that the loss distribution of each module in the 15-cascade H-bridge 31 level converter is severely uneven.
The structure of the invention is adopted:
when the topological structure and the modulation strategy used by the invention are adopted, the power frequency branch of the high-frequency module still adopts the Si IGBT of 1200V/75A as the switching device, and the V at the moment can be obtained by looking up the Datashet of the Si IGBT of 1200V/75A with the model of IKW40N120T2CEO=0.7V,rCE=0.0329Ω,Eswon=3.2mJ,Eswoff2.05 mJ. By calculation, P can be obtainedss-IGBTSince ZVS of Si IGBT is realized, P can be approximated as 16.5275Wsw-IGBTThe loss of the power frequency branch is as follows: (16.5275+0) × 2 ═ 30.055W.
The high-frequency branch can respectively adopt a structure that the SiC MOSFET is connected in parallel in scheme A or the SiC MOSFET and the Si IGBT are connected in parallel in scheme B.
Scheme A: when the SiC MOSFET parallel structure is adopted, 1200V/36A SiC MOSFETs are selected for parallel connection, and V can be obtained by looking up the Datasheet of the 1200V/36A SiC MOSFET with the model number of C2M0080120DDSO=0V,rDS=0.08Ω,Eswon=523uJ,Eswoff72 uJ. Combining the above data with equations (4) and (5), by MATLAB programming, we can obtain: pss-MOSFET=6.5730W,Psw-MOSFETWhen 0.6293W, the loss of the high frequency branch is: (6.5730+0.6293) × 4 ═ 28.8092W. This yields a loss of 30.055+28.8092 — 58.8642W for the high-frequency module.
Scheme B: when a SiC MOSFET and Si IGBT parallel structure is adopted, a 1200V/18A SiC MOSFET and a 1200V/50A Si IGBT are selected to be connected in parallel, and I in the hybrid device is obtained through simulationSi IGBT=24A,ISiC MOSFETReferring to the Datasheet of a 1200V/50A Si IGBT model IGW25N120H3, V at this point can be obtained as 11ACEO=0.7V,rCE=0.054Ω,Eswon=1.8mJ,Eswoff=0.85mJ。V can be obtained by looking up the Datashet of a 1200V/18A SiC MOSFET model C2M0160120DDSO=0V,rDS=0.16Ω,Eswon=121uJ,Eswoff48 uJ. By combining the above data with equations (4) and (5), the loss of each device can be obtained by MATLAB programming as follows: pss-IGBT1=12.2635W,Psw-IGBT1=0W;Pss-MOSFET=5.1940W,Psw-MOSFET0.2247W. The loss of the high-frequency branch is: by (12.2635+0+5.1940+0.2247) × 2 equal to 35.3644W, the loss of the high-frequency module is 30.055+35.3644 equal to 65.4194W.
After 7 half power frequency periods are regularly alternated, the power loss of 14 low-frequency modules is consistent, the low-frequency modules adopt 1200V/75A Si IGBT as a switching device, and V at the moment can be obtained by looking up the Datasheet of 1200V/75A Si IGBT with the type of IGW40T120CEO=0.6V,rCE0.0257 Ω. Combining the above data with equations (4) and (5), by MATLAB programming, we can obtain: pss-IGBT16.2046W, and Psw-IGBTThis results in that the loss of each low-frequency module is (16.2046+0) × 4 ═ 64.8184W. The difference between the loss of the high-frequency module and the loss of the low-frequency module under the scheme A and the scheme B is very small, and the loss balance among the modules can be approximately considered. The relevant indexes are compared as follows:
TABLE 3 comparison of the indices
Figure BDA0002886532390000101
From the above analysis results, it can be seen that: on the premise of not increasing the cost remarkably, the cascade H-bridge multi-level hybrid structure and the control method provided by the invention can reduce the operation loss of the high-frequency module remarkably, reduce the loss difference between the high-frequency module and each low-frequency module, and make the loss of each low-frequency module consistent by a timing alternation strategy, so that the power loss among the modules can be distributed uniformly.
The above description is only for the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention shall fall within the protection scope of the present invention.

Claims (5)

1. A mixed topological structure of a cascaded H-bridge multi-level converter comprises a high-frequency module and a plurality of low-frequency modules and is characterized in that the high-frequency module is composed of a high-frequency branch and a power-frequency branch, wherein the high-frequency branch adopts a structure that SiC MOSFETs are connected in parallel or the SiC MOSFETs and Si IGBTs are connected in parallel as a switch device, and the low-frequency module and the power-frequency branch adopt the Si IGBTs as the switch device.
2. A method for controlling a hybrid topology of cascaded H-bridge multilevel converters according to claim 1, comprising the steps of:
step 1, dividing a cascaded H bridge multi-level converter into a high-frequency module and a plurality of low-frequency modules by using a mixed pulse width modulation mode: making N-1 modules work in the step wave mode to output step wave voltage ustepThe Nth module operates in a high-frequency PWM mode, which modulates the wave signal unrefFor modulating the wave voltage urefAnd step wave voltage ustepAre obtained by subtraction, i.e. unref=uref-ustep(ii) a Will unrefAnd a triangular carrier signal ucMaking a comparison at unrefPositive half cycle of (d), when unref>ucTime, output voltage uo=ud,udIs a DC side voltage, when unref<ucTime, output voltage uo0; at unrefNegative half cycle of (d), when unref<ucTime, output voltage uo=-udWhen u isnref>ucTime, output voltage uo0, to obtain the output voltage u of the high-frequency moduleoOutput waveform of (d) will ustepAnd uoThe multi-level voltage u output by the converter AC side can be synthesized by superpositionan,uanThe specific expression of (2) is shown as formula (1):
Figure FDA0002886532380000011
in the formula (1), uhiRepresenting the input voltage at the AC terminal of the ith H-bridge module, udiRepresenting the output voltage at the DC terminal of the ith H-bridge module, HiRepresents the switching function of the ith H-bridge module when S1、S4When conducting, hi+1, the output voltage of the module is + ud(ii) a When S is2、S3When conducting, hi-1, the output voltage of the module is-ud(ii) a When S is1、S3Or S2、S4When conducting, hiThe output terminal voltage of the module is 0, where S1、S2、S3、S4For 4 switching elements in the cascade H-bridge module, the connection relation is consistent with that of the traditional cascade H-bridge, and the position relation is as follows: s1And S2On the left side of the H bridge, S3And S4On the right side of the H bridge, S1And S3At the upper part of the H bridge, S2And S4At the lower part of the H bridge;
step 2, dividing the high-frequency module into a high-frequency branch and a power frequency branch by using a unipolar modulation mode: inputting power frequency modulation signal u to high frequency modulerControl switch S1And S2Make-and-break; will urAnd a triangular wave carrier signal ucComparing and controlling the switch S3And S4The output voltage of the high-frequency module is obtained by switching on and off, and the specific process is as follows:
1) at urPositive half-cycles of (i.e. u)r>At time 0:
S1remains in the on-state, S2Keeping an off state: when u isr>ucTime S3Off, S4Is turned on at this time uo=ud(ii) a When u isr<ucTime S3Conduction, S4Is turned off when uo=0;
2) At urNegative half cycles of (i.e. u)r<At time 0:
S1remains in an off state, S2Keeping an on state: when u isr>ucTime S3Off, S4Is turned on at this time uo0; when u isr<ucTime S3Conduction, S4Is turned off when uo=-ud
Wherein, the power frequency branch S1And S2The power frequency modulation is adopted, a device with low transmission loss is selected as a switching device, and a high-frequency branch S3And S4Switching frequency modulation is adopted, and a device with low switching loss is selected as a switching device.
3. The method for controlling the hybrid topology of the cascaded H-bridge multilevel converter according to claim 2, wherein the high-frequency branch in step 2 adopts the following scheme:
scheme A: a SiC MOSFET parallel structure is adopted as a switching device;
scheme B: a SiC MOSFET and Si IGBT parallel structure is adopted as a switching device.
4. The method for controlling the hybrid topology of the cascaded H-bridge multilevel converter according to claim 3, wherein in the scheme B, the Si IGBT is turned on before the SiC MOSFET and then turned off after the SiC MOSFET by changing the driving timing sequence.
5. The method for controlling the hybrid topology structure of the cascaded H-bridge multilevel converter according to claim 2, wherein the low frequency module in the step 1 performs half-power frequency cycle timing rotation on the switching function: and successively carrying out recursion on the switch mode of each low-frequency module backwards every half power frequency period until the switch mode completes one round of switching.
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