CN112735963B - Method and apparatus for analyzing semiconductor structure - Google Patents
Method and apparatus for analyzing semiconductor structure Download PDFInfo
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- CN112735963B CN112735963B CN202011525982.8A CN202011525982A CN112735963B CN 112735963 B CN112735963 B CN 112735963B CN 202011525982 A CN202011525982 A CN 202011525982A CN 112735963 B CN112735963 B CN 112735963B
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- H01—ELECTRIC ELEMENTS
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional arrangements, e.g. with cells on different height levels
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- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
- H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
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- H10B43/00—EEPROM devices comprising charge-trapping gate insulators
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- H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
- H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
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Abstract
The present invention relates to a method and an apparatus for analyzing a semiconductor structure. The analysis method of the semiconductor structure comprises the following steps: providing a semiconductor structure, wherein the semiconductor structure is provided with a plurality of repeated structural units which are arranged periodically; emitting a detection light to the semiconductor structure to obtain spatial diffraction light intensity data diffracted by the semiconductor structure; carrying out Fourier transform processing on the spatial diffraction light intensity data to obtain a sample diffraction pattern generated by a plurality of repeated structural units; acquiring the deflection angle of the semiconductor structure relative to a preset reference line according to the light intensity distribution of the sample diffraction pattern; rotating the semiconductor structure according to the deflection angle; an image of the semiconductor structure is captured. The invention automatically compensates the deflection angle of the semiconductor structure, and improves the accuracy of measuring the characteristic dimension of the semiconductor structure subsequently.
Description
Technical Field
The present invention relates to the field of semiconductor manufacturing technologies, and in particular, to an analysis method and an analysis apparatus for a semiconductor structure.
Background
With the development of the planar flash memory, the manufacturing process of the semiconductor has been greatly improved. In recent years, however, the development of planar flash memories has met with various challenges: physical limits, existing development technology limits, and storage electron density limits, among others. In this context, to solve the difficulties encountered by flat flash memories and to pursue lower production costs of unit memory cells, various three-dimensional (3D) flash memory structures, such as 3D NOR (3D NOR) flash memory and 3D NAND (3D NAND) flash memory, have come into force.
A 3D NAND memory is a memory formed by a stacking technique from two dimensions to three dimensions. With the maturity of the integrated circuit production process, the cost and the process performance requirements of the 3D NAND memory on each layer production process are higher and higher. With the demand for higher memory functions of 3D NAND memories, the number of layers stacked thereon is continuously increasing.
In a process flow for manufacturing a semiconductor structure such as a 3D NAND memory, taking a picture of the semiconductor structure by a Transmission Electron Microscope (TEM) to measure a feature size of the semiconductor structure is an important step for ensuring the performance and manufacturing yield of the semiconductor structure. However, the conventional method has low accuracy in measuring the characteristic dimension of a semiconductor structure picture shot by a transmission electron microscope, thereby limiting the smooth proceeding of the subsequent process.
Therefore, how to improve the accuracy of measuring the characteristic dimension of the semiconductor structure and further ensure the performance and the manufacturing yield of the semiconductor structure is a technical problem to be solved.
Disclosure of Invention
The invention provides an analysis method and an analysis device of a semiconductor structure, which are used for solving the problem that the conventional analysis method has low accuracy in measuring the characteristic dimension of the semiconductor structure so as to ensure the performance of the semiconductor structure and improve the manufacturing yield of the semiconductor structure.
In order to solve the above problems, the present invention provides a method for analyzing a semiconductor structure, comprising the steps of:
providing a semiconductor structure, wherein the semiconductor structure is provided with a plurality of repeated structural units which are arranged periodically;
emitting a detection light to the semiconductor structure to obtain spatial diffraction light intensity data diffracted by the semiconductor structure;
carrying out Fourier transform processing on the spatial diffraction light intensity data to obtain a sample diffraction pattern generated by a plurality of repeated structural units;
acquiring the deflection angle of the semiconductor structure relative to a preset reference line according to the light intensity distribution of the sample diffraction pattern;
rotating the semiconductor structure according to the deflection angle;
an image of the semiconductor structure is captured.
Optionally, the specific step of emitting a detection light to the semiconductor structure includes:
placing the semiconductor structure on a sample stage;
and emitting a detection light so that the detection light irradiates the semiconductor structure along a vertically downward direction.
Optionally, the detection light source for emitting the detection light is a KrF gas laser light source, an ArF gas laser light source, or an X-ray light source.
Optionally, the specific step of acquiring the spatial diffraction light intensity data diffracted by the semiconductor structure includes:
obtaining original diffraction light intensity data diffracted by the semiconductor structure;
and carrying out two-dimensional spatial distribution processing on the original diffraction light intensity data to obtain spatial diffraction light intensity data, wherein the spatial diffraction light intensity data comprises a plurality of diffraction light intensities and a plurality of two-dimensional spatial coordinates in one-to-one correspondence with the plurality of diffraction light intensities.
Optionally, the specific step of performing fourier transform processing on the spatial diffraction light intensity data includes:
and carrying out Fourier transform processing on the diffraction light intensity by taking the two-dimensional space coordinate as an independent variable to obtain Fourier transform data.
Optionally, the specific step of obtaining a sample diffraction pattern generated by a plurality of the repeating structural units includes:
extracting a group of light intensity signals with fixed frequency from the Fourier transform data to be used as target light intensity signals;
and acquiring a sample diffraction pattern generated by a plurality of the repeated structural units according to the target light intensity signal.
Optionally, the specific step of obtaining the deflection angle of the semiconductor structure relative to a preset reference line according to the light intensity distribution of the sample diffraction pattern includes:
defining a connecting line of the maximum light intensity points of each order of light spots in the sample diffraction pattern as an orientation datum line;
and acquiring an included angle between the orientation datum line and the preset datum line, and taking the included angle as a deflection angle.
Optionally, the specific step of capturing the image of the semiconductor structure includes:
an image of the semiconductor structure is taken using a transmission electron microscope.
In order to solve the above problem, the present invention also provides an analysis apparatus for a semiconductor structure, comprising:
the detection light source is used for emitting detection light to a semiconductor structure, and the semiconductor structure is provided with a plurality of repeating structural units which are periodically arranged;
a first processing module for acquiring spatial diffraction light intensity data diffracted by the semiconductor structure;
the second processing module is connected with the first processing module and used for carrying out Fourier transform processing on the spatial diffraction light intensity data to obtain a sample diffraction pattern generated by the plurality of repeated structural units;
the third processing module is connected with the second processing module and used for acquiring the deflection angle of the semiconductor structure relative to a preset reference line according to the light intensity distribution of the sample diffraction pattern;
and the rotating module is connected with the third processing module and used for rotating the semiconductor structure according to the deflection angle.
Optionally, the method further includes:
the sample stage is used for placing the semiconductor structure;
the detection light emitted by the detection light source irradiates the semiconductor structure along a vertically downward direction.
Optionally, the detection light source is a KrF gas laser light source, an ArF gas laser light source, or an X-ray light source.
Optionally, the first processing module is configured to obtain original diffracted light intensity data diffracted by the semiconductor structure, perform two-dimensional spatial distribution processing on the original diffracted light intensity data, and obtain spatial diffracted light intensity data, where the spatial diffracted light intensity data includes a plurality of diffracted light intensities and a plurality of two-dimensional spatial coordinates corresponding to the plurality of diffracted light intensities one to one.
Optionally, the second processing module is configured to perform fourier transform processing on the diffracted light intensity with the two-dimensional space coordinate as an argument to obtain fourier transform data.
Optionally, the second processing module is further configured to extract a group of light intensity signals with fixed frequency from the fourier transform data, to serve as target light intensity signals, and obtain a sample diffraction pattern generated by the plurality of repeating structural units according to the target light intensity signals.
Optionally, the third processing module is configured to define a connection line of maximum light intensity points of each order of light spots in the sample diffraction pattern as an orientation reference line, and obtain an included angle between the orientation reference line and the preset reference line, where the included angle is used as a deflection angle.
Optionally, the method further includes:
and the shooting module is used for shooting the image of the semiconductor structure.
According to the analysis method and the analysis device for the semiconductor structure, provided by the invention, the deflection angle of the semiconductor structure is automatically compensated based on the optical diffraction method before the image of the semiconductor structure is shot, so that the problem of inaccurate measurement result caused by human factors is avoided, and the accuracy of measuring the characteristic dimension of the semiconductor structure subsequently is improved. Moreover, the reference of the rotation angle of the semiconductor structure is unified, so that the foundation is laid for realizing the automatic measurement of the shot image subsequently.
Drawings
FIG. 1 is a flow chart of a method for analyzing a semiconductor structure in accordance with an embodiment of the present invention;
FIG. 2 is a schematic diagram of a semiconductor structure in accordance with an embodiment of the present invention;
FIG. 3 is a schematic diagram of a semiconductor structure being analyzed in accordance with an embodiment of the present invention;
FIG. 4 is a graph of the actual effect of a standard diffraction pattern obtained by embodiments of the present invention;
fig. 5 is a block diagram of an apparatus for analyzing a semiconductor structure according to an embodiment of the present invention.
Detailed Description
The following describes in detail a specific embodiment of a method and an apparatus for analyzing a semiconductor structure according to the present invention with reference to the drawings.
In the development of semiconductor structures such as 3D NAND memories, it is often necessary to take an image of a prepared sample using a transmission electron microscope and measure a characteristic dimension of a structure in the sample from the taken image. However, since the sample preparation and the imaging method cannot be unified, the transmission electron microscope image cannot be automatically measured by software due to problems such as rotation. For example, a sample is prepared by peeling a minute thin sheet from a whole wafer and then placing the thin sheet in a vacuum chamber for electron microscopy, and the peeling process and the placing process inevitably cause random rotation of the thin sheet. In this case, the boundary measurement line is usually calibrated by visual inspection of an engineer, which has at least two disadvantages: on one hand, the manual calibration method brings about an error of about 2 pixels to the measurement result; on the other hand, different people have different calibration methods and different subjective feelings, which may cause additional disturbance to the measurement result. Moreover, the quality and reliability of transmission electron microscope images is often questioned when it comes to comparisons between sets of metrology data. If the rotation angle of the sample is adjusted manually, the workload of an engineer is greatly increased, and subjective errors of the operator are necessarily introduced. In addition, because the sample is rotated before shooting, the boundary of the shot picture has different degrees of inclination on the pixel scale, so that the interpolation compensation of the picture in the gray scale processing process cannot be unified, and automatic characteristic dimension measurement cannot be performed.
To solve the problem of inaccurate measurement result caused by the rotation of the sample, the present embodiment provides an analysis method of a semiconductor structure, fig. 1 is a flow chart of the analysis method of the semiconductor structure according to the present embodiment, and fig. 2 is a schematic diagram of a semiconductor structure according to the present embodiment. The semiconductor structure described in this embodiment may be, but is not limited to, a 3D NAND memory. As shown in fig. 1 and fig. 2, the method for analyzing a semiconductor structure according to this embodiment includes the following steps:
step S11, providing a semiconductor structure 20, wherein the semiconductor structure 20 has a plurality of repeating structural units 201 arranged periodically, as shown in fig. 2.
Specifically, the semiconductor structure 20 includes a substrate and a plurality of repeating structural units 201 arranged periodically (for example, arranged in a two-dimensional array) on the surface of the substrate 20. For example, on the substrate of the 3D NAND memory, a plurality of channel hole structures are arranged periodically. The plurality of the embodiments described above refers to two or more.
Step S12, emitting a detecting light to the semiconductor structure 20, and acquiring spatial diffraction light intensity data diffracted by the semiconductor structure 20.
Optionally, the specific step of emitting a detection light to the semiconductor structure 20 includes:
placing the semiconductor structure 20 on a sample stage;
a sensing light is emitted such that the sensing light illuminates the semiconductor structure 20 in a vertically downward direction.
FIG. 3 is a schematic diagram of a semiconductor structure being analyzed according to an embodiment of the present invention. The solid arrows in fig. 3 indicate the propagation direction of the detection light. For example, the semiconductor structure 20 is placed on a sample stage (not shown) and a detection light source 21 is placed above the sample stage. The detection light emitted from the detection light source 21 is reflected by a light guide plate 22 and then emitted to the semiconductor structure 20 in a vertically downward direction.
In other specific embodiments, the light guide plate 22 may not be provided, and the detection light source 21 may be controlled to emit the detection light in a vertically downward direction by adjusting the position of the detection light source 21.
The present embodiment is described by taking an example in which the detection light is directed vertically downward toward the semiconductor structure 20. In other embodiments, the emission direction of the detecting light can be adjusted by those skilled in the art according to the arrangement of the repeating structural units on the semiconductor structure 20.
Optionally, the detection light source for emitting the detection light is a KrF gas laser light source, an ArF gas laser light source, or an X-ray light source.
Specifically, a short-wavelength light source such as a KrF gas laser light source, an ArF gas laser light source, or an X-ray light source is used as the detection light source because the size of the repeating structural unit 201 in the semiconductor structure 20 is small. The wavelength of the detection light should match the size of the repeating structural unit 201, i.e., the smaller the size of the repeating structural unit 201, the shorter the wavelength of the detection light.
Optionally, the specific step of acquiring the spatial diffraction light intensity data diffracted by the semiconductor structure 20 includes:
obtaining raw diffracted light intensity data diffracted by the semiconductor structure 20;
and carrying out two-dimensional spatial distribution processing on the original diffraction light intensity data to obtain spatial diffraction light intensity data, wherein the spatial diffraction light intensity data comprises a plurality of diffraction light intensities and a plurality of two-dimensional spatial coordinates in one-to-one correspondence with the plurality of diffraction light intensities.
Specifically, the detection light passing through the semiconductor structure 20 forms diffraction spots, and the diffraction spots at different coordinate positions in a two-dimensional space coordinate system (e.g., in the XY plane of fig. 3) have different diffraction intensities. Based on the principle, a light receiver (such as a CCD photosensitive device) for receiving diffracted light intensity is arranged below the sample stage, and light intensity data received by the light receiver is used as original diffracted light intensity data. Since the plurality of repeating structural units 201 are arranged periodically, the detecting light passing through the semiconductor structure 20 will have different diffraction intensities at different spatial positions. Thus, the raw diffracted light intensity data comprises a plurality of diffracted light intensities. Then, a two-dimensional spatial coordinate is introduced, and the original diffracted light intensity data is processed into a two-dimensional spatial distribution, that is, formed as spatial diffracted light intensity data including a plurality of diffracted light intensities and a plurality of two-dimensional spatial coordinates corresponding to the plurality of diffracted light intensities one-to-one. The specific method for processing the original diffraction light intensity data into two-dimensional spatial distribution may be to obtain a plurality of two-dimensional spatial coordinates, and associate each two-dimensional spatial coordinate with the diffraction light intensity at the position of the two-dimensional spatial coordinate.
In other embodiments, a person skilled in the art may also select an optical receiver having a function of directly acquiring the spatially diffracted optical intensity data, so as to improve the analysis efficiency of the semiconductor structure.
Step S13, performing fourier transform processing on the spatial diffraction light intensity data to obtain a plurality of sample diffraction patterns generated by the repeating structural unit 201.
Optionally, the specific step of performing fourier transform processing on the spatial diffraction light intensity data includes:
and carrying out Fourier transform processing on the diffraction light intensity by taking the two-dimensional space coordinate as an independent variable to obtain Fourier transform data.
Optionally, the specific step of obtaining the sample diffraction pattern generated by a plurality of the repeating structural units 201 includes:
extracting a group of light intensity signals with fixed frequency from the Fourier transform data to be used as target light intensity signals;
and acquiring the sample diffraction patterns 24 generated by a plurality of the repeated structure units 201 according to the target light intensity signals.
Specifically, for the obtained spatial diffraction light intensity data, fourier transform processing is performed with the two-dimensional spatial coordinates as an argument to obtain fourier transform data. Since the semiconductor structure 201 has a plurality of the repeating structural units 201 arranged periodically, that is, the repeating structural units 201 form a grating-like structure, the diffracted light intensities diffracted by different repeating structural units 201 have the same frequency after fourier transform processing based on the principle of optical diffraction. Therefore, after the fourier transform processing is performed on the spatial diffraction light intensity data, a set of light intensity signals (i.e., light intensity signals corresponding to a plurality of the repeating structural units 201) having a fixed frequency therein is filtered and extracted as the target light intensity signal. And based on the principle of optical diffraction, obtaining a sample diffraction pattern generated by a plurality of the repeating structural units 201 according to the target light intensity signal, as shown in a sample diffraction pattern 24 in fig. 3.
In step S14, the deflection angle of the semiconductor structure 20 relative to the preset reference line 23 is obtained according to the light intensity distribution of the sample diffraction pattern 24.
Optionally, the specific step of obtaining the deflection angle of the semiconductor structure 20 relative to the preset reference line 23 according to the light intensity distribution of the sample diffraction pattern 24 includes:
defining a connecting line of the maximum light intensity points of each order of light spots in the sample diffraction pattern as an orientation datum line BB;
and acquiring an included angle theta between the orientation datum line BB and the preset datum line AA, and taking the included angle as a deflection angle.
FIG. 4 is a graph showing the actual effect of a standard diffraction pattern obtained by the embodiment of the present invention. Specifically, the preset reference line 23 may be a standard sample that is not rotated in advance, and the standard diffraction pattern 23 of the standard sample is obtained through the processing from step S11 to step S13. And taking a connecting line of the maximum light intensity points of each order of light spots in the standard diffraction pattern 23 as a preset reference line AA. And then, acquiring an included angle theta between the orientation datum line BB and the preset datum line AA, and taking the included angle as a deflection angle. In other embodiments, one skilled in the art may not use the standard, but directly define a predetermined reference line 23 by human.
Step S15, rotating the semiconductor structure 20 according to the deflection angle.
Specifically, after the deflection angle is obtained again, the compensation of the deflection angle of the semiconductor structure 20 is realized by rotating structures such as a sample stage, so that the influence of artificial subjective factors on the final measurement result is avoided. Moreover, the reference standard of the rotation angle of the semiconductor structure 20 is unified, so that the foundation is laid for realizing the automatic measurement of the shot image subsequently.
In step S16, an image of the semiconductor structure 20 is captured.
Optionally, the specific step of capturing the image of the semiconductor structure 20 includes:
an image of the semiconductor structure 20 is taken using a transmission electron microscope.
Specifically, after the semiconductor structure 20 is automatically rotation-compensated according to the deflection angle, a lens such as a transmission electron microscope may be used to capture an image of the semiconductor structure 20, so as to measure parameters such as a feature size of the semiconductor structure 20 according to the captured image.
Furthermore, the present embodiment also provides an analysis apparatus for a semiconductor structure, and fig. 5 is a block diagram of the analysis apparatus for a semiconductor structure according to the present embodiment. The semiconductor structure analysis device provided in this embodiment mode can analyze a semiconductor structure by using the method shown in fig. 1 to 4. The semiconductor structure described in this embodiment may be, but is not limited to, a 3D NAND memory. As shown in fig. 5, the semiconductor structure analysis device according to the present embodiment includes:
a detection light source 21 for emitting detection light to a semiconductor structure 20, the semiconductor structure 20 having a plurality of repeating structural units 201 arranged periodically therein;
a first processing module 51 for obtaining spatially diffracted light intensity data diffracted by said semiconductor structure 20;
the second processing module 52 is connected to the first processing module 51, and is configured to perform fourier transform processing on the spatial diffraction light intensity data to obtain sample diffraction patterns generated by the multiple repeating structural units 201;
the third processing module 53 is connected to the second processing module 52, and is configured to obtain a deflection angle of the semiconductor structure relative to a preset reference line according to the light intensity distribution of the sample diffraction pattern;
a rotation module 54 connected to the third processing module 53 for rotating the semiconductor structure 20 according to the deflection angle.
Optionally, the apparatus for analyzing a semiconductor structure further includes:
a sample stage 50 for placing the semiconductor structure 20;
the detection light emitted from the detection light source 21 irradiates the semiconductor structure 20 in a vertically downward direction.
Optionally, the detection light source 21 is a KrF gas laser light source, an ArF gas laser light source, or an X-ray light source.
Optionally, the first processing module 51 is configured to obtain original diffracted light intensity data diffracted by the semiconductor structure 20, and perform two-dimensional spatial distribution processing on the original diffracted light intensity data to obtain spatial diffracted light intensity data, where the spatial diffracted light intensity data includes a plurality of diffracted light intensities and a plurality of two-dimensional spatial coordinates corresponding to the plurality of diffracted light intensities one to one.
Optionally, the second processing module 52 is configured to perform fourier transform processing on the diffracted light intensity by using the two-dimensional space coordinate as an argument, so as to obtain fourier transform data.
Optionally, the second processing module 52 is further configured to extract a group of light intensity signals with a fixed frequency from the fourier transform data as target light intensity signals, and obtain sample diffraction patterns generated by the plurality of repeating structural units 201 according to the target light intensity signals.
Optionally, the third processing module 53 is configured to define a connection line of maximum light intensity points of each order of light spots in the sample diffraction pattern as an orientation reference line, and obtain an included angle between the orientation reference line and the preset reference line, where the included angle is used as a deflection angle.
Optionally, the apparatus for analyzing a semiconductor structure further includes:
a photographing module 55 for photographing an image of the semiconductor structure 20.
Specifically, the photographing module 55 may include a transmission electron microscope. In this embodiment, the detection light source 21, the first processing module 51, the second processing module 52, the third processing module 53 and the rotating module 54 may be integrated into a transmission electron microscope platform, or may be disposed independently of the transmission electron microscope platform.
In the analysis method and the analysis apparatus for a semiconductor structure according to the present embodiment, before the image of the semiconductor structure is captured, the deflection angle of the semiconductor structure is automatically compensated by using an optical diffraction method, so that the problem of inaccurate measurement result caused by human factors is solved, and the accuracy of measuring the feature size of the semiconductor structure subsequently is improved. Moreover, the reference of the rotation angle of the semiconductor structure is unified, so that the foundation is laid for realizing the automatic measurement of the shot image subsequently.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (16)
1. A method of analyzing a semiconductor structure, comprising the steps of:
providing a semiconductor structure, wherein the semiconductor structure is provided with a plurality of repeated structural units which are arranged periodically;
transmitting detection light to the semiconductor structure, and acquiring spatial diffraction light intensity data diffracted by the semiconductor structure, wherein the spatial diffraction light intensity data comprises a plurality of diffraction light intensities and a plurality of two-dimensional space coordinates in one-to-one correspondence with the plurality of diffraction light intensities;
carrying out Fourier transform processing on the spatial diffraction light intensity data to obtain a sample diffraction pattern generated by a plurality of repeated structural units;
acquiring the deflection angle of the semiconductor structure relative to a preset reference line according to the light intensity distribution of the sample diffraction pattern;
rotating the semiconductor structure according to the deflection angle;
an image of the semiconductor structure is captured.
2. The method of claim 1, wherein the step of emitting a detection light to the semiconductor structure comprises:
placing the semiconductor structure on a sample stage;
and emitting a detection light so that the detection light irradiates the semiconductor structure along a vertically downward direction.
3. The method of claim 2, wherein the detection light source for emitting the detection light is a KrF gas laser light source, an ArF gas laser light source, or an X-ray light source.
4. The method of claim 1, wherein the step of obtaining spatially diffracted intensity data of light diffracted by the semiconductor structure comprises:
obtaining original diffraction light intensity data diffracted by the semiconductor structure;
and carrying out two-dimensional spatial distribution processing on the original diffraction light intensity data to obtain spatial diffraction light intensity data.
5. The method for analyzing a semiconductor structure according to claim 4, wherein the step of performing Fourier transform on the spatially diffracted intensity data comprises:
and carrying out Fourier transform processing on the diffraction light intensity by taking the two-dimensional space coordinate as an independent variable to obtain Fourier transform data.
6. The method of claim 5, wherein the step of obtaining the sample diffraction pattern generated by the plurality of repeating structural units comprises:
extracting a group of light intensity signals with fixed frequency from the Fourier transform data to be used as target light intensity signals;
and acquiring a sample diffraction pattern generated by a plurality of the repeated structural units according to the target light intensity signal.
7. The method for analyzing a semiconductor structure according to claim 1, wherein the step of obtaining the deflection angle of the semiconductor structure relative to a preset reference line according to the light intensity distribution of the sample diffraction pattern comprises:
defining a connecting line of the maximum light intensity points of each order of light spots in the sample diffraction pattern as an orientation datum line;
and acquiring an included angle between the orientation datum line and the preset datum line, and taking the included angle as a deflection angle.
8. The method of claim 1, wherein capturing the image of the semiconductor structure comprises:
an image of the semiconductor structure is taken using a transmission electron microscope.
9. An apparatus for analyzing a semiconductor structure, comprising:
the detection light source is used for emitting detection light to a semiconductor structure, and the semiconductor structure is provided with a plurality of repeating structural units which are periodically arranged;
the first processing module is used for acquiring spatial diffraction light intensity data diffracted by the semiconductor structure, wherein the spatial diffraction light intensity data comprise a plurality of diffraction light intensities and a plurality of two-dimensional space coordinates in one-to-one correspondence with the plurality of diffraction light intensities;
the second processing module is connected with the first processing module and used for carrying out Fourier transform processing on the spatial diffraction light intensity data to obtain a sample diffraction pattern generated by the plurality of repeated structural units;
the third processing module is connected with the second processing module and used for acquiring the deflection angle of the semiconductor structure relative to a preset reference line according to the light intensity distribution of the sample diffraction pattern;
and the rotating module is connected with the third processing module and used for rotating the semiconductor structure according to the deflection angle.
10. The apparatus for analyzing a semiconductor structure of claim 9, further comprising:
the sample stage is used for placing the semiconductor structure;
the detection light emitted by the detection light source irradiates the semiconductor structure along a vertically downward direction.
11. The apparatus for analyzing a semiconductor structure according to claim 9, wherein the detection light source is a KrF gas laser light source, an ArF gas laser light source, or an X-ray light source.
12. The apparatus of claim 9, wherein the first processing module is configured to obtain original diffracted light intensity data diffracted by the semiconductor structure, and perform two-dimensional spatial distribution processing on the original diffracted light intensity data to obtain spatial diffracted light intensity data.
13. The apparatus for analyzing a semiconductor structure according to claim 12, wherein the second processing module is configured to perform fourier transform processing on the diffracted light intensity with the two-dimensional space coordinate as an argument to obtain fourier transform data.
14. The apparatus of claim 13, wherein the second processing module is further configured to extract a set of light intensity signals with a fixed frequency from the fourier transform data as a target light intensity signal, and obtain a sample diffraction pattern generated by the plurality of repeating structural units according to the target light intensity signal.
15. The apparatus for analyzing a semiconductor structure according to claim 9, wherein the third processing module is configured to define a connection line of maximum light intensity points of each order of the light spots in the sample diffraction pattern as an orientation reference line, and obtain an included angle between the orientation reference line and the preset reference line, and use the included angle as a deflection angle.
16. The apparatus for analyzing a semiconductor structure of claim 9, further comprising:
and the shooting module is used for shooting the image of the semiconductor structure.
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