CN112734042A - Calibration method, device and medium for multi-bit computing capability of quantum computer - Google Patents
Calibration method, device and medium for multi-bit computing capability of quantum computer Download PDFInfo
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Abstract
The application discloses a calibration method, equipment and medium for multi-bit computing capability of a quantum computer, which are used for solving the problem that the multi-bit computing capability of the quantum computer cannot be calibrated by the existing method. The method comprises the following steps: respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit; determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit; and determining the corresponding number of control bits with the probability meeting the preset threshold, and selecting the control bit with the maximum number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer. The target bit is respectively overturned by using different numbers of control bits, and the quantum bit with the maximum number and the probability of successful control overturning is larger than the preset threshold value is selected, so that the interference of the number of bits can be eliminated, and the multi-bit computing capability of the quantum computer can be accurately calibrated.
Description
Technical Field
The present application relates to the field, and in particular, to a method, an apparatus, and a medium for calibrating multi-bit computing capability of a quantum computer.
Background
Quantum computing has been widely studied and focused since it was proposed, and has become a strategic high place for the arrangement of the strong science and technology countries in the world as an emerging frontier computing technology with great computing potential advantages.
At present, promotion of the computing power of a quantum computer is mostly determined by the number of qubits contained in a quantum chip, but the number of qubits contained in the quantum chip is not equal to the multi-bit computing power of the quantum computer. The increase of the number of pure quantum bits does not necessarily lead to the improvement of the computing power of a quantum computer.
Therefore, a method for calibrating the multi-bit computing capability of a quantum computer is needed to eliminate the interference of the number of bits and judge the real computing capability of the corresponding quantum computer.
Disclosure of Invention
The embodiment of the application provides a calibration method, equipment and medium for multi-bit computing capability of a quantum computer, and aims to solve the problem that the multi-bit computing capability of the quantum computer cannot be calibrated by the conventional method.
The calibration method for the multi-bit computing capability of the quantum computer provided by the embodiment of the application comprises the following steps: respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit; determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit; and determining the corresponding number of control bits with the probability meeting the preset threshold, and selecting the control bit with the maximum number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
In one example, before controlling the target bit to perform the flipping by a preset number of times using different numbers of control bits, the method further includes: and determining the control bits with different quantities according to the maximum bit number contained in the quantum computer to be calibrated.
In one example, before controlling the target bit to perform the flipping by a preset number of times using different numbers of control bits, the method further includes: and selecting a plurality of integers of the arithmetic difference sequence which is not more than the maximum bit number as different numbers of the control bits according to a preset number interval.
In one example, according to a preset interval, selecting an integer of an arithmetic sequence not greater than the maximum number of bits as different numbers of control bits specifically includes: and selecting all integers from 1 to the maximum bit number as different numbers of control bits according to a preset interval 1.
In one example, controlling the target bit to flip according to a preset number of times by using different numbers of control bits respectively specifically includes: controlling the target bit to turn over according to the preset times by using different numbers of control bits according to the sequence of the number of the control bits from small to large; the method further comprises the following steps: and calculating the probability of successful turnover corresponding to the control bits, and stopping the operation on the remaining control bits until the probability of successful turnover is smaller than the preset threshold value.
In one example, before controlling the target bit to perform the flipping by a preset number of times using different numbers of control bits, the method further includes: determining a pauli-X gate corresponding to a different number of control bits; keeping the control bit in an initial state, and turning the control bit by using the Pally-X gate.
In one example, controlling the target bit to flip according to a preset number of times by using different numbers of control bits respectively specifically includes: constructing controlled NOT gates corresponding to different numbers of control bits; applying the control bits to corresponding controlled not gates; and controlling the target bit to overturn by using the control bit according to preset times.
In one example, determining, according to the end state of the target bit, a probability of success of control inversion corresponding to different numbers of control bits specifically includes: determining an initial state of the target bit; judging whether the target bit is successfully overturned according to the final state of the target bit; determining the number of times of successful target bit turnover in preset times; calculating the percentage of the successful times of the target bit flipping to the preset times; and determining the probability of success of the target bit flipping according to the percentage.
The calibration equipment for the multi-bit computing capability of the quantum computer provided by the embodiment of the application comprises: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to: respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit; determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit; and determining the corresponding number of control bits with the probability meeting the preset threshold, and selecting the control bit with the maximum number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
In an embodiment of the present application, a calibrated nonvolatile computer storage medium for multi-bit computing capability of a quantum computer includes: respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit; determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit; and determining the corresponding number of control bits with the probability meeting the preset threshold, and selecting the control bit with the maximum number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
The embodiment of the application adopts at least one technical scheme which can achieve the following beneficial effects:
the target bit is respectively overturned by using different numbers of control bits, and the quantum bit with the maximum number and the probability of successful control overturning is larger than the preset threshold value is selected, so that the interference of the number of bits can be eliminated, and the multi-bit computing capability of the quantum computer can be accurately calibrated. And based on the relation between the quantum bit number and the calculation precision, the calculation is carried out according to the sequence of the quantum bit number from small to large, and the calculation is stopped when the probability of the successful overturn is smaller than a preset threshold value, so that the extra workload can be reduced, and the calibration efficiency can be improved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application. In the drawings:
fig. 1 is a flowchart of a calibration method for multi-bit computing power of a quantum computer according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a controlled not gate including a control bit according to an embodiment of the present application;
fig. 3 is a schematic diagram of a controlled not gate including two control bits according to an embodiment of the present application;
fig. 4 is a structural diagram of a calibration apparatus for a quantum computer with multi-bit computing capability according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the technical solutions of the present application will be described in detail and completely with reference to the following specific embodiments of the present application and the accompanying drawings. It should be apparent that the described embodiments are only some of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
At present, promotion of the computing power of a quantum computer is mostly determined by the number of qubits contained in a quantum chip, but the number of qubits contained in the quantum chip is not equal to the multi-bit computing power of the quantum computer. The increase of the number of pure quantum bits does not necessarily lead to the improvement of the computing power of a quantum computer.
According to the method and the device, the target bits are respectively turned over by using different numbers of control bits, the quantum bits with the largest number and the probability of successful control turning over larger than the preset threshold are selected, the interference of the number of bits can be eliminated, and the multi-bit computing capability of the quantum computer is accurately calibrated. And based on the relation between the quantum bit number and the calculation precision, the calculation is carried out according to the sequence of the quantum bit number from small to large, and the calculation is stopped when the probability of the successful overturn is smaller than a preset threshold value, so that the extra workload can be reduced, and the calibration efficiency can be improved.
Fig. 1 is a flowchart of a calibration method for multi-bit computing capability of a quantum computer according to an embodiment of the present application, which specifically includes the following steps:
s101: and respectively controlling the target bit to turn over according to the preset times by using different numbers of control bits, and acquiring the final state of the target bit.
In the embodiment of the application, the server selects different numbers of control bits as the number of candidate bits for calibrating the multi-bit computing capability of the quantum computer, then controls the target bit to turn over by using the control bits according to the preset times, and obtains the final state after the target bit is turned over. The preset times can be specifically set according to needs, and the preset times are not limited in the application.
The quantum computer is a brand new computer based on quantum theory, and is a physical device for performing high-speed mathematical and logical operation, storing and processing quantum information according to a quantum mechanical rule, and the quantum computer applies quantum bits, can be in a plurality of states at the same time, and is not in a binary state of only 0 or 1 as a traditional computer.
For example, the server determines 7, 10, 12, and 15 as the number of control bits, determines 1000 as the preset number, and then the server first takes 7 control bits, then controls the target bit to flip using 7 control bits, repeats 1000 times, and respectively obtains the last state of the target bit after each control flip, and then the server can respectively take 10, 12, and 15 control bits to perform the same operation.
In this embodiment, if the number of qubits included in different quantum computers is different, the server may determine the maximum number of bits included in the quantum computer to be calibrated, and then select different numbers of control bits according to the maximum number of bits.
In the embodiment of the application, the server selects a plurality of integers, the maximum number of which is not more than the maximum number of bits and which form an arithmetic sequence, as different numbers of control bits according to a preset number interval. The preset quantity interval represents a difference value between each item in the equal difference sequence, and the difference value can be specifically set according to needs, and the difference value is not limited in the application. Because the quantity of the control bits and the computing power of the quantum computer form a positive correlation relationship in a certain interval, the regularity of the quantity of the selected control bits is determined through the preset interval, and the accurate calibration of the computing power of the quantum computer is facilitated to a certain extent.
For example, the server determines that the maximum number of bits included in the quantum computer to be calibrated is 25, and determines 2 as a preset number interval, so that the server selects 8, 10, 12, and 14 as different numbers of control bits according to the preset number interval.
Specifically, 1 is selected as a preset quantity interval, and the server selects all integers from 1 to the maximum bit number according to the preset quantity interval 1 as different quantities of the control bits. Therefore, all possibilities of different quantities of quantum bits in the quantum computer can be tested, the quantum bit number which can represent the computing capability of the quantum computer most is determined, and the accuracy of calibrating the computing capability of the quantum computer is improved.
For example, the maximum number of bits in the quantum computer to be calibrated is 20, and the preset number interval is 1, so that all integers from 1 to 20 are taken as the number of control bits, and a corresponding 20-round control inversion test is performed for the number of 20 control bits.
In the embodiment of the present application, the flipping by using the control bit to control the target bit includes the following steps:
step one, constructing controlled NOT gates (C-NOT gates for short) corresponding to different numbers of Control bits;
and respectively constructing controlled NOT gates corresponding to the number of the control bits by the server according to the selected control bits with different numbers.
Step two, applying the control bit to the corresponding controlled not gate;
and respectively taking different numbers of control bits as the control bits of the controlled NOT gate.
Specifically, 1 control bit may be used as the control bit of the controlled not gate, as shown in fig. 2, a solid dot in fig. 2 represents the control bit q0, and the symbol ≦ represents the target bit q 1. It is also possible to use 2 control bits as the control bits of the controlled not gate, as shown in fig. 3, the solid dots q0 and q1 represent two control bits, and the symbol ≦ represents the target bit q 2.
And step three, controlling the target bit to overturn by using the control bit according to the preset times.
The action target of the controlled NOT gate is divided into a control bit and a target bit, and the action mechanism is that if the control bit is 0, the state of the target bit is unchanged; if the control bit is at 1, the state of the target bit flips and changes from 1 to 0 or from 0 to 1, and the truth table of the controlled not gate is shown in table 1:
TABLE 1
| Control bit | Target bit | Application result of controlled not gate |
| 0 | 0 | 00 |
| 0 | 1 | 01 |
| 1 | 0 | 11 |
| 1 | 1 | 10 |
In table 1, the controlled not gate includes a control bit and a target bit, both of which have 0 and 1 states. When the state of the control bit is 0 and the state of the target bit is 0 or 1, the target bit is not inverted at this time, and the application result of the controlled not gate is corresponding to 00 or 01; when the state of the control bit is 1 and the state of the target bit is 0 or 1, the target bit is inverted, and the application result of the controlled not gate is 11 or 10.
In the embodiment of the present application, the control target bit can be turned only when the control bit is at 1, and therefore, the server needs to set all the control bits to 1 before applying the control bit to the controlled not gate control target bit to be turned. According to the number of the control bits, the server firstly determines a Pally-X gate corresponding to the number of the control bits, and then, the Pay-X gate is used for overturning a plurality of control bits kept in an initial state 0, so that all the control bits are set to be 1. Wherein, the Paly-X gate can turn 0 to 1 and 1 to 0.
S102: and determining the probability of successful control inversion corresponding to the control bits with different quantities according to the final state of the target bit.
In the embodiment of the application, the server determines the last state of the target bit after the inversion, and determines the probability of successful inversion of the target bit corresponding to different numbers of control bits according to the last state of the target bit.
In this embodiment, the server first determines an initial state of the target bit, determines a final state of the target bit after the control inversion operation is completed, and compares the final state of the target bit with the initial state of the target bit, and when the final state of the target bit is opposite to the initial state of the target bit, it indicates that the target bit is successfully inverted, and therefore, the server determines that the target bit is successfully inverted. Then, the server calculates the percentage of the number of successful target bit flipping times in the preset number according to the number of successful target bit flipping times in the preset number, and determines the probability of successful target bit flipping according to the percentage.
Specifically, the server determines that the initial state is 0, after control inversion, determines whether the target bit end state is 1, and proves that the target bit inversion is successful when the target bit end state is 1, and proves that the target bit inversion is failed when the target bit end state is 0. The server determines the probability of successful target bit flipping by judging the number of successful target bit flipping in the preset number and calculating the percentage of the number of successful target bit flipping in the preset number, and then selects the next number of control bits and calculates the probability of successful target bit flipping according to the sequence from small to large.
S103: and determining the corresponding number of control bits with the probability meeting the preset threshold, and selecting the control bit with the maximum number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
In the embodiment of the application, the server determines the corresponding number of control bits with the probability meeting the preset threshold according to the calculated probability of successful target bit flipping, and selects the control bit with the largest number from the corresponding number of control bits as the multi-bit computing capability of the calibrated quantum computer.
Wherein, the probability of successful bit flipping of the control bit control target can represent the probability of error calculation of the quantum computer in the application process. In order to maintain the normal use of the quantum computer, it is necessary to ensure that the probability of the computation error of the quantum computer is low and within a tolerable range, that is, the probability of the control bit control target bit flipping success needs to be ensured to be kept above a certain value. Thus, the preset threshold is used to define a standard by which the quantum computer can maintain normal use.
The selectable value range of the preset threshold is 50% -100%, and can be determined to be 90% in the embodiment.
For example, the server determines, according to the calculation, that the probability of successful target bit flipping corresponding to the control bits of 7, 10, and 12 satisfies a preset threshold, and therefore selects the maximum value 12 of the three numbers as the multi-bit calculation capability of the calibrated quantum computer.
The number of quantum bits contained in a quantum chip is not equivalent to the multi-bit computing power of a quantum computer. Without considering error correction, the accuracy of the result obtained by quantum computer computation is generally reduced as the number of quantum bits applied in quantum computation increases.
In the embodiment of the application, the server controls the target bit to be turned by using the control bits according to the sequence from small to large of the number of the control bits and the preset times by using different numbers of the control bits, and calculates the probability of success of turning of the target bit corresponding to the control bits. And if the calculated probability of successful turnover of the target bit is smaller than the preset threshold value, stopping the operation on the rest control bits.
When the probability is smaller than a preset threshold value, the precision of a result obtained by calculation of the quantum computer is reduced along with the increase of the number of the quantum bits, which indicates that the corresponding calculation capacity of the control bits with more residual quantity is smaller than the preset threshold value, so that the calculation of the residual control bits is stopped, the time required by calculation can be reduced, the workload is reduced, and the calibration efficiency is improved.
Based on the same inventive concept, the foregoing calibration method for multi-bit computing capability of a quantum computer provided in the embodiments of the present application further provides corresponding calibration equipment for multi-bit computing capability of a quantum computer, as shown in fig. 4.
Fig. 4 is a schematic structural diagram of a calibration apparatus for multi-bit computing capability of a quantum computer provided in an embodiment of the present application, which specifically includes: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to cause the at least one processor to: respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit; determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit; and determining the corresponding number of control bits with the probability meeting the preset threshold, and selecting the control bit with the maximum number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
The embodiment of the application also provides a corresponding calibrated nonvolatile computer storage medium of the multi-bit computing capability of the quantum computer, which stores computer executable instructions, and is characterized in that the computer executable instructions are set as follows: respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit; determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit; and determining the corresponding number of control bits with the probability meeting the preset threshold, and selecting the control bit with the maximum number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
The embodiments in the present application are described in a progressive manner, and the same and similar parts among the embodiments can be referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the device and media embodiments, the description is relatively simple as it is substantially similar to the method embodiments, and reference may be made to some descriptions of the method embodiments for relevant points.
The device and the medium provided by the embodiment of the application correspond to the method one to one, so the device and the medium also have the similar beneficial technical effects as the corresponding method, and the beneficial technical effects of the method are explained in detail above, so the beneficial technical effects of the device and the medium are not repeated herein.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
In a typical configuration, a computing device includes one or more processors (CPUs), input/output interfaces, network interfaces, and memory.
The memory may include forms of volatile memory in a computer readable medium, Random Access Memory (RAM) and/or non-volatile memory, such as Read Only Memory (ROM) or flash memory (flash RAM). Memory is an example of a computer-readable medium.
Computer-readable media, including both non-transitory and non-transitory, removable and non-removable media, may implement information storage by any method or technology. The information may be computer readable instructions, data structures, modules of a program, or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device. As defined herein, a computer readable medium does not include a transitory computer readable medium such as a modulated data signal and a carrier wave.
It should also be noted that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. A calibration method for multi-bit computing power of a quantum computer is characterized by comprising the following steps:
respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit;
determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit;
and determining the corresponding number of control bits with the probability meeting a preset threshold, and selecting the control bit with the largest number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
2. The method of claim 1, wherein before controlling the target bits to flip according to the preset number of times by using different numbers of control bits, the method further comprises:
and determining the control bits with different quantities according to the maximum bit number contained in the quantum computer to be calibrated.
3. The method of claim 2, wherein before controlling the target bits to flip according to the preset number of times by using different numbers of control bits, the method further comprises:
and selecting a plurality of integers of the arithmetic difference sequence which is not more than the maximum bit number as different numbers of the control bits according to a preset number interval.
4. The method according to claim 3, wherein selecting, according to a preset interval, integers of the arithmetic sequence that are not greater than the maximum number of bits as different numbers of control bits specifically includes:
and selecting all integers from 1 to the maximum bit number as different numbers of control bits according to a preset interval 1.
5. The method of claim 1, wherein the controlling the target bits to be flipped according to the preset number of times by using different numbers of control bits respectively comprises:
controlling the target bit to turn over according to the preset times by using different numbers of control bits according to the sequence of the number of the control bits from small to large;
the method further comprises the following steps:
and calculating the probability of successful turnover corresponding to the control bits, and stopping the operation on the remaining control bits until the probability of successful turnover is smaller than the preset threshold value.
6. The method of claim 1, wherein before controlling the target bits to flip according to the preset number of times by using different numbers of control bits, the method further comprises:
determining a pauli-X gate corresponding to a different number of control bits;
keeping the control bit in an initial state, and turning the control bit by using the Pally-X gate.
7. The method of claim 1, wherein the controlling the target bits to be flipped according to the preset number of times by using different numbers of control bits respectively comprises:
constructing controlled NOT gates corresponding to different numbers of control bits;
applying the control bits to corresponding controlled not gates;
and controlling the target bit to overturn by using the control bit according to preset times.
8. The method according to claim 1, wherein determining, according to the end state of the target bit, a probability of success of control inversion corresponding to different numbers of control bits specifically includes:
determining an initial state of the target bit;
judging whether the target bit is successfully overturned according to the final state of the target bit;
determining the number of times of successful target bit turnover in preset times;
calculating the percentage of the successful times of the target bit flipping to the preset times;
and determining the probability of success of the target bit flipping according to the percentage.
9. A calibration apparatus for multi-bit computation capability of a quantum computer, comprising:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein the content of the first and second substances,
the memory stores instructions executable by the at least one processor to enable the at least one processor to:
respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit;
determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit;
and determining the corresponding number of control bits with the probability meeting a preset threshold, and selecting the control bit with the largest number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
10. A calibrated non-volatile computer storage medium for quantum computer multi-bit computing power, storing computer-executable instructions configured to:
respectively utilizing different numbers of control bits to control the target bit to turn over according to preset times, and acquiring the final state of the target bit;
determining the probability of successful control turnover corresponding to different numbers of control bits according to the final state of the target bit;
and determining the corresponding number of control bits with the probability meeting a preset threshold, and selecting the control bit with the largest number from the corresponding number of control bits for calibrating the multi-bit computing capacity of the quantum computer.
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