CN112733484B - X-structure Steiner tree construction method under Slew constraint based on multi-strategy optimization - Google Patents

X-structure Steiner tree construction method under Slew constraint based on multi-strategy optimization Download PDF

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CN112733484B
CN112733484B CN202110086124.6A CN202110086124A CN112733484B CN 112733484 B CN112733484 B CN 112733484B CN 202110086124 A CN202110086124 A CN 202110086124A CN 112733484 B CN112733484 B CN 112733484B
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CN112733484A (en
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刘耿耿
黄逸飞
郭文忠
陈国龙
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Fuzhou University
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    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/394—Routing
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Abstract

The invention provides an X-structure Steiner tree construction method under Slew constraint based on multi-strategy optimization, which comprises the following steps: step S1: combining a triangulation method and a minimum spanning tree method to obtain a minimum spanning tree with a point set as a pin set; step S2: generating a pre-lookup table for recording information between the pins and the obstacles, and converting the minimum spanning tree into a Steiner tree; step S3: rewiring is carried out, and the size of the Slew is reduced by eliminating a long segment passing through obstacles in the wiring and rewiring, so that the Steiner tree part meets the Slew constraint; a refining strategy is adopted to further reduce the wiring cost of the Steiner tree; step S4: and calculating and correcting the wiring which does not satisfy the Slew constraint one by one so that the internal tree completely satisfies the Slew constraint. Experiments show that the scheme of the invention obtains the optimal result on the line length and the algorithm running time.

Description

X-structure Steiner tree construction method under Slew constraint based on multi-strategy optimization
Technical Field
The invention belongs to the technical field of computer aided design of integrated circuits, and particularly relates to a method for constructing an X-structure Steiner tree under Slew constraint based on multi-strategy optimization in a super-large-scale integrated circuit.
Background
As the fabrication process enters the nanometer stage, the feature size of the chip is continuously reduced, the design scale of the integrated circuit is continuously enlarged following moore's law, the density of the circuit is continuously increased, and the design concept of the electronic system is developing from the system on the board to the system on the chip. The advent of the system-on-chip design concept places higher demands on chip performance. The wiring is one of the most important steps in the physical design of the very large scale integrated circuit, and the wiring quality directly determines the final performance of the chip. The Steiner tree is an optimal connection model of a net in wiring and is a key link in the wiring of a very large scale integrated circuit. Therefore, the method for constructing the efficient and low-cost Steiner tree wiring is of great significance.
Disclosure of Invention
In order to fill the blank of the prior art, the invention provides an X-structure Steiner tree construction method under Slew constraint based on multi-strategy optimization, aiming at minimizing total line length deviation, total overflow and total line length.
With the continuous improvement of the manufacturing process of integrated circuits and the further reduction of the feature size of processed chips, higher requirements are put forward on the performance of the circuits, and the interconnection effect directly influences the final chip performance in the wiring stage of the physical design of the very large scale integrated circuit. In order to strengthen the interconnection effect, a Slew constraint model which more fully utilizes wiring resources and an X structure which has the interconnection optimization advantage are further considered, the invention provides an X structure Steiner tree construction algorithm under Slew constraint based on multi-strategy optimization. Firstly, a triangulation method and a minimum spanning tree method are combined to obtain a minimum spanning tree with a point set as a pin set. Second, to save computation time, a pre-lookup table is generated to record information between pins and obstacles, and the minimum spanning tree is converted to a Steiner tree. Then, a rewiring strategy is proposed to reduce the Slew size by eliminating the longer segments of the wiring that pass the obstacle and rewiring so that the Steiner tree partially satisfies the Slew constraint, and a refining strategy is used to further reduce the Steiner tree wiring cost. And finally, providing a verification strategy, and calculating and correcting the wiring which does not meet the constraint one by one to ensure that the internal tree completely meets the constraint. Experiments show that the scheme of the invention obtains the optimal result on the line length and the algorithm running time.
Introduction of related art:
A. and (3) coordinate mapping:
coordinate mapping is a technology for converting a pin coordinate of an original two-dimensional coordinate into a pin coordinate under the two-dimensional coordinate after rotating 45 degrees counterclockwise around an origin. By the technology, a line segment with the slope of 45 degrees or 135 degrees can be converted into a horizontal line segment or a vertical line segment in a two-dimensional coordinate after rotating 45 degrees anticlockwise around an original point, so that the overlapping of wiring edges can be judged conveniently, and the length of the edge can be calculated conveniently.
B. Rewiring:
rerouting is a technique for eliminating a route in which a connected component at a certain obstacle is large in a Steiner tree. And sequencing all obstacles passed by the wiring according to the distance between the center of the obstacle and the left pin of the spatial position in the wiring by a rewiring technology, eliminating the original wiring, setting the left pin of the spatial position in the wiring as a starting point, and setting the other pin as a terminal point. The obstacles are selected in order, and from the vertices of the obstacles through which the wiring passes, the vertex having the shortest distance from the straight line formed by the starting point and the end point is selected as a pseudo Steiner point. And connecting in a proper wiring mode, setting the vertex as a new starting point, and judging the next obstacle until the next obstacle is connected with the terminal.
C. And (3) optimizing the subtree structure:
for any pin, there is at least one optimal subtree structure. In order to further improve the sharing degree of the wiring resources, the sub-tree structure optimization technology calculates the length of the common edge of each sub-tree by enumerating all possible sub-trees formed by the topology in the Steiner tree, and sorts all pins in a descending order according to the value of the length of the common edge. Finally, each pin is combined in place of its original connection according to the sorted pin list until the connection combination for all pins is determined.
The method mainly comprises the following design processes:
an initial stage: the main purpose of this phase is to generate the basic topology of the X-structured Steiner tree, so that the subsequent phases operate under this topology. In this stage, the pins to be connected are constructed into a connected graph with point sets as pins in a short time by a triangulation method, and a minimum spanning tree is constructed on the connected graph by using a Kruskal method.
A pretreatment stage: in order to further improve the time efficiency, the invention generates a corresponding look-ahead table by pre-calculating and recording the edge set of the minimum spanning tree constructed in the initial stage and the information between the minimum spanning tree and the obstacle, thereby avoiding frequent and repeated calculation in the subsequent stage and converting the minimum spanning tree constructed in the initial stage into the Steiner tree.
A main stage: the main purpose of this stage is to eliminate the partly constraint-violating routing structure and to further shorten the wire length. The invention removes the wiring with longer barrier in the Steiner tree constructed in the preprocessing stage by introducing a pseudo Steiner point method and rewires, thereby effectively eliminating part of wiring structures violating the constraint, and providing a refining strategy to further optimize the wire length by removing redundant points and a subtree structure optimization method.
And (3) post-treatment stage: in order to enable the constructed Steiner tree to completely meet Slew constraint, the method traverses all internal trees in the Steiner tree, judges Slew values of all receiving nodes of the internal trees point by point, and repairs a part which violates the constraint, so that the Steiner tree completely meets the constraint.
The invention specifically adopts the following technical scheme:
a method for constructing an X-structure Steiner tree under Slew constraint based on multi-strategy optimization is characterized by comprising the following steps:
step S1: combining a triangulation method and a minimum spanning tree method to obtain a minimum spanning tree with a point set as a pin set;
step S2: generating a pre-lookup table for recording information between the pins and the obstacles, and converting the minimum spanning tree into a Steiner tree;
step S3: rewiring is carried out, and the size of the Slew is reduced by eliminating a long segment passing through obstacles in the wiring and rewiring, so that the Steiner tree part meets the Slew constraint; a refining strategy is adopted to further reduce the wiring cost of the Steiner tree;
step S4: and calculating and correcting the routes which do not satisfy the Slew constraint one by one so that the internal tree completely satisfies the Slew constraint.
Preferably, the method comprises the following steps:
step S1: an initial stage: constructing pins to be connected into a connected graph with point sets as the pins by a triangulation method, and constructing a minimum spanning tree in the connected graph by a Kruskal method;
step S2: a pretreatment stage: and generating a corresponding look-up table by pre-calculating and recording an edge set of the minimum spanning tree constructed in the initial stage and information between the edge set and the obstacle, and converting the minimum spanning tree constructed in the initial stage into a Steiner tree.
Step S3: a main body stage: removing wiring with longer obstacles in the Steiner tree constructed in the preprocessing stage and rewiring by introducing a pseudo Steiner point method, thereby effectively eliminating part of wiring structures violating constraints, and further optimizing wire length by removing redundant points and a subtree structure optimization method by adopting a refining strategy;
step S4: and (3) post-treatment stage: and traversing all internal trees in the Steiner tree, judging the Slew values of all receiving nodes of the internal trees point by point, and repairing the part which violates the constraint so that the Steiner tree completely meets the Slew constraint.
Preferably, step S1 specifically includes the following processes: under a given circuit, the Thiessen polygons are first constructed on the basis of a given pin set by planar scanning, then triangulation is generated by converting the Thiessen polygons into a dual graph, and a minimum spanning tree is constructed on the triangulation by the Kruskal method.
Preferably, in step S2, the look-up table includes: a line segment information table, an in-obstacle segment table and a pin obstacle information table; the line segment information table records the line segments generated by the generated minimum spanning tree; the in-obstacle segment table records the end point and line length information of the wiring component in the obstacle; and the pin obstacle information table records the information of intersection of the line segment and the obstacle recorded in the line segment information table.
Preferably, the connection mode of the X structure includes four connection modes, i.e., connection mode 0 to connection mode 3:
connection method 0: first from point P through horizontal or vertical edge connect to pseudo Steiner point S, then from point S through 45 degree or 135 degree edge connect to point Q;
connection mode 1: first from point P to pseudo Steiner point S by 45 ° edge or 135 ° edge, then from point S to point Q by horizontal edge or vertical edge;
connection mode 2: firstly, connecting a point P to a pseudo Steiner point S through a vertical edge, and then connecting the point S to a point Q through a horizontal edge;
connection mode 3: firstly, connecting a point P to a pseudo Steiner point S through a horizontal edge, and then connecting the point S to a point Q through a vertical edge;
in step S3, the rerouting includes the following processes:
if the Steiner tree has the wiring needing to be adjusted, sequencing all barriers passed by the wiring according to the distance between the center of the barrier and the pin near the left of the spatial position in the wiring, eliminating the original wiring, setting the pin near the left of the spatial position in the wiring as a starting point, setting the other pin as an end point, selecting the barriers in sequence, selecting the vertex with the shortest straight line formed by the distance, the starting point and the end point from the vertexes of the barriers passed by the wiring as a pseudo Steiner point, connecting in a wiring connection mode from a connection mode 0 to a connection mode 3, setting the vertex as a new starting point, and judging the next barrier until the next barrier is connected with the end point.
Preferably, in step S3, the sub-tree structure optimization method adopted by the refining strategy specifically includes the following steps:
step 31: traverse all edges of the Steiner tree to record each pin piEach pin piForm a root with its adjacent pin as pin piThe size of the edge set is a subtree structure with the number m of pins and the depth of 2;
step 32: for each subtree, all 4 enumeratedmA seed topology; then, selecting all the edge set element barriers or the subtree structure with the minimum line length and the connected component not exceeding the threshold value in the barriers as the optimal sub-structure of the subtree and recording the optimal sub-structure as bpiCalculating each bp at the same timeiOf a common side length spi；
Step 33: according to spiThe length of the sub-tree is sorted in descending order;
step 34: for each pin piPress sp toiIn order of bpiThe original Steiner tree is replaced by the routing combination until all edges of the routing tree have been determined.
Preferably, step S4 specifically includes the following steps:
step S41, traversing all edges of the Steiner tree, and establishing a corresponding internal tree for each obstacle;
step S42: traversing all internal trees, and accurately calculating the Slew value of a receiving node of the internal tree point by point from a driving node;
step S43: and deleting the connected components from the receiving nodes to the upstream nodes of the internal tree of the receiving nodes with the skew value larger than the threshold value, connecting the receiving nodes to the upstream receiving nodes on the same side along the side of the barrier, and connecting the upstream receiving nodes on the same side to the driving node along the side of the barrier.
Compared with the prior art, the invention and the preferred scheme thereof have the following characteristics and beneficial effects: firstly, a triangulation method and a minimum spanning tree method are combined to obtain a minimum spanning tree with a point set as a pin set. Second, to save computation time, a pre-lookup table is generated to record information between pins and obstacles, and the minimum spanning tree is converted to a Steiner tree. Then, a rewiring strategy is proposed to reduce the Slew size by eliminating the longer segments of the wiring that pass the obstacle and rewiring so that the Steiner tree partially satisfies the Slew constraint, and a refining strategy is used to further reduce the Steiner tree wiring cost. Finally, a verification strategy is provided, and the wiring which does not meet the constraint is calculated and corrected one by one, so that the internal tree completely meets the constraint. Experiments show that the scheme of the invention obtains the optimal result on the line length and the algorithm running time.
Drawings
The invention is described in further detail below with reference to the following figures and detailed description:
FIG. 1 is a schematic diagram of a wiring reference circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of the structure connection mode of the embodiment X of the present invention, namely, connection mode 0 (a), connection mode 1 (b), connection mode 2(c), and connection mode 3 (d);
FIG. 3 is a schematic flow chart of a method according to an embodiment of the present invention;
FIG. 4 shows an initial stage of the embodiment of the present invention: (a) a wiring diagram, (b) triangulation, (c) a minimum spanning tree diagram;
FIG. 5 shows the preprocessing stages of an embodiment of the present invention: (a) minimum spanning tree, (b) look-up table, (c) conversion strategy diagram;
FIG. 6 is a schematic diagram of coordinate mapping according to an embodiment of the present invention;
FIG. 7 illustrates a layout adjustment according to an embodiment of the present invention: (a) illegal wiring, (b) rerouting, (c) eliminating redundant point schematic diagram;
FIG. 8 is a diagram illustrating 16 topologies of a subtree structure with two edges according to an embodiment of the present invention;
fig. 9 is an internal tree of a node according to embodiment 4 of the present invention: (a) initial internal tree, (b) adjust k3Node, (c) adjusting k2And (4) a node schematic diagram.
Detailed Description
In order to make the features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail as follows:
an X-structure Steiner wiring tree construction problem model under Slew constraint:
given a circuit to be wired, a set of pins P ═ P is included0,p1,p2,…,pn-1And a set of rectangular obstacles O ═ O0,O1,O2,…,Om-1In which piIs epsilon of P and Pi＝(xi,yi)，(xi,yi) Representing the pin coordinate of the routing area, pin p0Is a signal source, the other pins are sink points, OiIs e.g. O and OJ＝(xj1,yj1,xj2,yj2)，(xj1,yj1) Coordinates representing the lower left corner of a rectangular obstacle, (x)j2,yj2) Representing the coordinates of the upper right corner of the rectangular obstacle. Under the problem model, a Steiner tree T connecting all pins is constructed. T is full under the optimal line length targetThe following constraints apply:
(1) the included angle formed by all wiring edges in the T and the X axis needs to satisfy the specific angle of the X structure.
(2) The connected component of T inside the barrier needs to satisfy the Slew constraint.
FIG. 1 shows a circuit to be wired with 10 pins and 10 barriers, where p0Is a signal source, and the other end points are pins to be connected. As shown in FIG. 1, the pins in the circuit cannot be located inside the barrier, but can be on the barrier edge (pin p)5In the obstacle O5On the side), the obstacles do not overlap each other, but a common side (obstacle O) exists0And obstacle O2Presence of a common edge b0b1). The present embodiment actually provides a solution to implement the above model.
Slew calculation:
in Steiner tree model under Slew constraint, signal is from signal source p0Starting, all sink points are driven along the steiner tree T. In this process, to drive the signal through the internal tree, near the drive node VinFront position insert repeater BinAnd near the receiving node VoutiFollowed by the placement of repeater BoutiThereby shielding the downstream capacitance. In this embodiment, a concrete voltage slew rate of each node is calculated through a PERI model, and the following is a concrete formula:
Figure BDA0002910732550000071
in the formula 1, Sstep(Vin,Vout) Is node VinTo VoutThe stepping voltage conversion rate is related to time delay and is calculated through an Elmore model; and S (V)in) Is node VinAt a voltage slew rate, and repeater BinIntrinsic voltage slew rate K ofbinAnd input voltage slew rate correlation. The corresponding calculation methods are given below respectively:
sstep(vin,vout)＝ln9×Elmore(vin,vout) (2)
s(vin)＝Kbin+Rbin×Csucc(Vin) (3)
wherein in formula 2, Elmore (V)in,Vout) Is node VinTo VoutElmore time delay of (1); and in formula 3, RbinAs a repeater BinVoltage slew rate impedance of (C)succ(Vin) Is node VinDownstream load capacitance.
The structure X is connected in a way that:
aiming at the characteristics of the X structure, the invention provides four connection modes from 0 to 3. An example of the connection mode 0 is given in fig. 2 (a). In this connection, first, from point P, through the horizontal or vertical edge, to the pseudo Steiner point S, and then from point S, through the 45 ° or 135 ° edge, to point Q. Fig. 2(b) shows an example of the connection mode 1. In this connection, first, from point P, a pseudo Steiner point S is connected through a 45 ° side or a 135 ° side, and then from point S, a pseudo Steiner point S is connected through a horizontal side or a vertical side to point Q. Fig. 2(c) shows an example of the connection mode 2. In this connection, first from point P to the pseudo Steiner point S through the vertical edge, and then from point S to point Q through the horizontal edge. Fig. 2(d) shows an example of the connection mode 3. In this connection, first from point P to the pseudo Steiner point S through a horizontal edge, and then from point S to point Q through a vertical edge.
4. Algorithm overview:
the X-structure Steiner tree construction algorithm under the Slew constraint based on multi-strategy optimization provided by the embodiment optimizes the line length cost and the operation efficiency. The algorithm reduces wire length and run time through a number of efficient stages. The proposed algorithm is divided into four phases and the algorithm flow is shown in fig. 3. And in the initial stage, a minimum spanning tree with a point set as a pin set is obtained by combining a triangulation method and a minimum spanning tree method. In the preprocessing stage, in order to save the computation time, a pre-lookup table for recording information between pins and obstacles is generated, and the minimum spanning tree is converted into a Steiner tree through an effective conversion strategy. And in a main stage, a rewiring strategy is proposed, Slew is reduced by eliminating a longer segment passing through obstacles in the wiring and rewiring, so that the Steiner tree part meets Slew constraint, and a refining strategy is used for further reducing the Steiner tree wiring cost. And in the post-processing stage, providing a verification strategy, and calculating and correcting stages which do not satisfy the constraints one by one to ensure that the Steiner tree completely satisfies the constraints. The details of each stage are described in detail below.
(1) An initial stage:
since the minimum spanning tree is easily converted to the X-structured Steiner tree, the minimum spanning tree is usually used as the initial topology of the X-structured Steiner tree. To improve time efficiency, under a given circuit (as in fig. 4(a)), the algorithm first constructs the tesson polygons on a given pin set basis by planar scanning, then generates triangulation by converting the tesson polygons to a dual map (as in fig. 4(b)), and efficiently constructs a minimal spanning tree on the triangulation by the Kruskal method (as in fig. 4 (c)).
The main purpose of this stage is to quickly obtain a minimum spanning tree and treat the spanning tree as the initial topology of the wiring tree.
(2) A pretreatment stage:
because the density of modern chips increases sharply, the wiring problem scale is larger than ever before, in order to further improve the efficiency of the algorithm and avoid frequent judgment and calculation between pins and obstacles in the subsequent stage, the stage is designed and generates a pre-lookup table: a line segment information table, an in-obstacle segment table and a pin obstacle information table. The line segment information table records line segments possibly generated by 4 routing modes of the minimum spanning tree base generated in the initial stage, the in-obstacle segment table records the end point and line length information of the internal wiring component of the obstacle, and the pin obstacle information table records the intersection information of the line segments and the obstacle recorded in the line segment information table.
Without loss of generality, it is assumed that the minimum spanning tree constructed in the initial stage has k edges, each edge has 4 routing modes, and at most 4X (k-1) X structure edges exist in a routing area. As shown in FIG. 5, FIG. 5(a) is a minimum spanning tree constructed in the initial stage, the tree has 4 edges, and in FIG. 5(b), all potential X structures of the minimum spanning tree in FIG. 5(a) are shownEdge, wherein edge p1p2And obstacle O1Will intersect under any trace, edge p2 p3And p3 p4Will not intersect with any obstacle under any routing, and the side p3p5And will intersect with part of the barrier under part of the trace.
In order to facilitate the judgment of the overlapping of the edges and the calculation of the length of the edges at the subsequent stage, coordinate mapping under a coordinate axis of 45 degrees is carried out on the 45-degree or 135-degree edge of the potential X structure in the algorithm (as shown in FIG. 6), and the information is recorded in a line segment information table. The coordinate mapping formula is as follows:
Figure BDA0002910732550000091
wherein the original coordinate is (x)i,yi) The mapped coordinate is (x)i*,yi*). In the latter half of the preprocessing, the algorithm proposes a conversion strategy to effectively convert the minimum spanning tree into the Steiner tree. As shown in fig. 5(c), the algorithm uses the minimum spanning tree of fig. 5(a) as a basic skeleton, selects an appropriate routing manner for each edge, and converts the routing manner into a Steiner tree. The scheme of converting the minimum spanning tree into the Steiner tree as given in the X-structure Steiner minimum tree construction method considering the slack of the wiring resources, such as CN201910937860, can also be applied in this embodiment.
(3) A main stage:
considering that the Steiner tree of the preprocessing stage conversion can have the routing violating the Slew constraint due to the fact that the connected component inside the obstacle is too large, on the other hand, considering the resource sharing among the routing, the possibility of further reducing the line length cost exists. Therefore, the subject phase proposes a rewiring method aiming at eliminating most violation constraints, and a refining method for removing redundant points and optimizing a subtree structure aiming at further reducing the cost of wire length.
In the main stage, traversing all wiring edges of the Steiner tree, judging the intersection condition of each edge and a barrier, and under the condition of neglecting the influence of nodes generated by other wiring edges, simply calculating a Slew value generated by connected components of the wiring in all passing barriers, namely a Slew estimated value, wherein if the Slew estimated value generated by the wiring in any one of the passing barriers is greater than a threshold value, the connected component in a single barrier is considered to be overlarge, and the calculation mode of the Slew estimated value is given as follows:
Figure BDA0002910732550000092
wherein, cbIs the input capacitance of the repeater, rbIs the repeater output resistance, c is the unit capacitance on the interconnect, r is the unit resistance on the interconnect, Len (v)in,vout) For the connected component (node v) routed inside the obstacleinTo node vout)。
In the present embodiment, the specific method of the rewiring technique employed is as follows: if wiring needing to be adjusted exists in the Steiner tree, sequencing all barriers passed by the wiring according to the distance between the center of the barrier and a pin near the left of the spatial position in the wiring, eliminating the original wiring, setting the pin near the left of the spatial position in the wiring as a starting point, setting the other pin as an end point, selecting the barriers in sequence, selecting a vertex with the shortest straight line formed by the distance, the starting point and the end point from the vertexes of the barriers passed by the wiring as a pseudo Steiner point, connecting in a wiring connection mode from a connection mode 0 to a connection mode 3, setting the vertex as a new starting point, and judging the next barrier until the next barrier is connected with the end point.
As shown in FIG. 7(b), p1Point is obstacle b2Of the four corners, the corner, p, closest to the offline segment pq2Point is obstacle b3Four corner central line segment p1q nearest corner point, so p is selected1、p2The point is re-wired as a pseudo Steiner point, and wiring p is selected by selecting connection mode 2 and connection mode 11p2、p2q are connected.
After the rewiring stage, the larger connected components of the wiring in the obstacles are eliminated, but the smaller connected components in part of the obstacles do not violate the constraints, but the obstacles are selected to increase the wire length cost because the rewiring stage selects the wiring which violates the constraints to bypass all the obstacles passed by the wiring. For this case, a redundancy point elimination strategy is proposed herein.
In FIG. 7(a), pq is two pins, b2b3For the obstacle of the wiring passing between the pq pins, assume that the wiring is at b2Do not violate the constraint, and b3The medium connected component is too large to violate the constraint. In FIG. 7(b), at the rewiring portion, the algorithm proceeds by introducing a pseudo Steiner point p1p2Circumventing the obstacle b2b3Whereas in FIG. 7(c), the algorithm has only selected the pseudo Steiner point p2So as to eliminate the wiring at b3The larger of the connected components. With respect to the rewiring method, the redundant point p is eliminated1And the line length cost is optimized.
In the second half of the main body phase, the wiring resource sharing is further improved by a subtree structure optimization method. As shown in fig. 8, if there are two edges in the sub-tree structure in the graph, and there are four connection modes on each edge, there are 16 seed tree structures in total, and the 16 seed tree structures are traversed, and the sub-tree structure with the shortest line length is selected as the optimal sub-tree structure. And secondly, sequencing according to the optimization degree of the optimal subtree structure compared with the current subtree structure, and updating the current subtree structure in sequence. In the refining stage, the purpose of optimizing the wire length is achieved by two technologies of eliminating redundant points and optimizing the subtree structure.
In this embodiment, the sub-tree structure optimization method is specifically as follows:
compared with the wiring connection methods of the connection method 2 and the connection method 3, the wiring connection method between the selection pins of the algorithm generally has a preference for the connection method 0 and the connection method 1 with better wiring advantages. In consideration of resource sharing between wirings, the first preferred connection method 0 and the connection method 1 are not necessarily the best choice. In order to improve the sharing degree of wiring and further reduce the length of the wiring line, the algorithm provides a strategy of sub-tree structure optimization, and the steps are as follows:
step 1: traversing all edges of Steiner treeTo record each pin piEach pin piForm a root with its adjacent pin as pin piAnd the size of the edge set is a subtree structure with the number m of pins and the depth of 2.
Step 2: for each subtree, all 4 enumeratedmA topological structure. Then, selecting all the edge set element barriers or the subtree structure with the minimum line length and the connected component not exceeding the threshold value in the barriers as the optimal sub-structure of the subtree and recording the optimal sub-structure as bpiSimultaneously calculate each bpiOf a common side length spi。
And step 3: according to spiAll subtrees are sorted in descending order by length.
And 4, step 4: for each pin piPress sp toiIn order of bpiThe original Steiner tree is replaced by the routing combination until all edges of the routing tree have been determined.
In step 2, the judgment that the edge set element barriers or the connected components in the barriers do not exceed the threshold value can be inquired through a pre-lookup table, in step 4, the structure of the pin with the longer common edge length is preferentially determined, and if the connection mode of a certain edge is determined, in the subsequent process, even if other optimal topological structures select different connection modes for the edge, the connection mode of the edge cannot be changed.
(4) And (3) post-treatment stage:
the Slew value of the receiving node in the internal tree is influenced by other receiving nodes, and the rewiring is calculated under the condition of neglecting the influence of other receiving nodes. Therefore, the rerouting strategy does not fully guarantee elimination of a full violation of the constraints. In order to make the Steiner tree completely meet the constraint, the algorithm proposes a verification strategy, which comprises the following specific steps:
step 1, traversing all edges of the Steiner tree and establishing a corresponding internal tree for each obstacle.
And 2, step: and traversing all internal trees, and accurately calculating the size of the Slew of a receiving node of the internal tree point by point from the driving node.
And step 3: and deleting the connected components from the receiving nodes to the upstream nodes of the internal tree of the receiving nodes with the Slew values larger than the threshold, connecting the receiving nodes to the upstream receiving nodes on the same side along the edge of the obstacle, and connecting the receiving nodes without the same side to the driving node along the edge of the obstacle.
As shown in FIG. 9, k0To drive a node, k1、k2、k3For the receiving node, press k in step 21、k2、k3The Slew size of each receiving node is calculated in the order of (2). In step 3, assume k3If the size of the Slew exceeds the threshold value, the upstream receiving node k is connected to the same side along the edge of the obstacle2Provided k is2If the size of the Slew exceeds the threshold value, the driving node k is connected to along the edge of the barrier0。
The present invention is not limited to the above preferred embodiments, and any other various methods for constructing the Steiner tree under Slew constraint based on multi-strategy optimization can be derived from the present invention, and all the equivalent changes and modifications made according to the claimed scope of the present invention shall fall within the covered scope of the present invention.

Claims (5)

1. A method for constructing an X-structure Steiner tree under Slew constraint based on multi-strategy optimization is characterized by comprising the following steps:
step S1: combining a triangulation method and a minimum spanning tree method to obtain a minimum spanning tree with a point set as a pin set;
step S2: generating a pre-lookup table for recording information between the pins and the obstacles, and converting the minimum spanning tree into a Steiner tree;
step S3: rewiring is carried out, and the size of the Slew is reduced by eliminating the long fragments passing through obstacles in the wiring and rewiring, so that the Steiner tree part meets the Slew constraint; a refining strategy is adopted to reduce the wiring cost of the Steiner tree;
step S4: calculating and correcting the wiring which does not satisfy the Slew constraint one by one to ensure that the internal tree completely satisfies the Slew constraint;
in step S3, the sub-tree structure optimization method adopted by the refining strategy specifically includes the following steps:
step 31: traverse all edges of the Steiner tree to record each pin piEach pin piForm a root with its adjacent pin as pin piThe side set has a subtree structure with the size of m pins and the depth of 2;
step 32: for each subtree, all 4 enumeratedmA seed topology; then selecting a subtree structure with all the edge set element barriers or the connected components in the barriers not exceeding a threshold value and having the minimum line length as the optimal subtree substructure to be recorded as bpiSimultaneously calculate each bpiOf a common side length spi；
Step 33: according to spiThe length of the tree is sorted in descending order for all subtrees;
step 34: for each pin piPress sp toiIn the order of bpiThe original Steiner tree is replaced by the routing selection combination until all the edges of the routing tree are determined;
step S41, traversing all edges of the Steiner tree and establishing a corresponding internal tree for each obstacle;
step S42: traversing all internal trees, and accurately calculating the Slew value of a receiving node of the internal trees point by point from the driving node;
step S43: deleting the communication component from the receiving node to the upstream node of the internal tree of the receiving node for the receiving node with the Slew value larger than the threshold value, connecting the receiving node to the upstream receiving node on the same side along the edge of the obstacle, and connecting the receiving node without the upstream receiving node on the same side to the driving node along the edge of the obstacle;
the calculation method of the Slew estimation value is as follows:
Figure FDA0003607407750000021
wherein, cbIs the input capacitance of the repeater, rbIs the repeater output resistance, c is the unit capacitance on the interconnect, r is the unit resistance on the interconnect, Len (v)in,vout) For wiring at the barrierInternal node vinTo node voutA connected component of (a); kbinIs a repeater BinThe intrinsic voltage slew rate of; rbinIs a repeater BinVoltage slew rate impedance.
2. The method for constructing the Steiner tree of the X structure under the Slew constraint based on multi-strategy optimization as claimed in claim 1, characterized by comprising the following steps:
step S1: an initial stage: constructing pins to be connected into a connected graph with point sets as the pins by a triangulation method, and constructing a minimum spanning tree in the connected graph by a Kruskal method;
step S2: a pretreatment stage: generating a corresponding pre-check table by pre-calculating and recording an edge set of a minimum spanning tree constructed in the initial stage and information between the minimum spanning tree constructed in the initial stage and an obstacle, and converting the minimum spanning tree constructed in the initial stage into a Steiner tree;
step S3: a main stage: removing wiring with longer obstacles in a Steiner tree constructed in a preprocessing stage and rewiring by introducing a pseudo Steiner point method, thereby effectively eliminating part of wiring structures violating constraints, and adopting a refining strategy to optimize the wire length by removing redundant points and a subtree structure optimization method;
step S4: and (3) post-treatment stage: and traversing all internal trees in the Steiner tree, judging the Slew values of all receiving nodes of the internal trees point by point, and repairing the part which violates the constraint so that the Steiner tree completely meets the Slew constraint.
3. The method for constructing the Steiner tree of the X structure under the Slew constraint based on multi-strategy optimization according to claim 1 or 2, wherein the method comprises the following steps:
step S1 specifically includes the following processes: under a given circuit, Thiessen polygons are first constructed on the basis of a given pin set by planar scanning, then triangulation is generated by converting the Thiessen polygons to a pair graph, and a minimum spanning tree is constructed on the triangulation by the Kruskal method.
4. The method for constructing the Steiner tree of the X structure under the Slew constraint based on multi-strategy optimization according to claim 1 or 2, wherein the method comprises the following steps:
in step S2, the look-up table includes: a line segment information table, an in-obstacle segment table and a pin obstacle information table; the line segment information table records the line segments generated by the generated minimum spanning tree; the in-obstacle segment table records the end point and line length information of the wiring component in the obstacle; and the pin obstacle information table records the information of intersection of the line segment and the obstacle recorded in the line segment information table.
5. The method for constructing the Steiner tree of the X structure under the Slew constraint based on multi-strategy optimization according to claim 1 or 2, wherein the method comprises the following steps:
the X structure connection mode comprises four connection modes from a connection mode 0 to a connection mode 3:
connection mode 0: first from point P through horizontal or vertical edge connect to pseudo Steiner point S, then from point S through 45 degree or 135 degree edge connect to point Q;
connection mode 1: first from point P to pseudo Steiner point S by 45 ° edge or 135 ° edge, then from point S to point Q by horizontal edge or vertical edge;
connection mode 2: firstly, connecting a point P to a pseudo Steiner point S through a vertical edge, and then connecting the point S to a point Q through a horizontal edge;
connection mode 3: firstly, connecting a point P to a pseudo Steiner point S through a horizontal edge, and then connecting the point S to a point Q through a vertical edge;
in step S3, the rerouting includes the following processes:
if the Steiner tree has the wiring needing to be adjusted, sequencing all barriers passed by the wiring according to the distance between the center of the barrier and the pin near the left of the spatial position in the wiring, eliminating the original wiring, setting the pin near the left of the spatial position in the wiring as a starting point, setting the other pin as an end point, selecting the barriers in sequence, selecting the vertex with the shortest straight line formed by the distance, the starting point and the end point from the vertexes of the barriers passed by the wiring as a pseudo Steiner point, connecting in a wiring connection mode from a connection mode 0 to a connection mode 3, setting the vertex as a new starting point, and judging the next barrier until the next barrier is connected with the end point.
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