CN105426556A - Visualization analysis method for image layer relation in layout design rule file - Google Patents
Visualization analysis method for image layer relation in layout design rule file Download PDFInfo
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Abstract
The present invention discloses a visualization analysis method for an image layer relation in a layout design rule file, and belongs to the field of semiconductor integrated circuit design automation. The method is mainly used for analyzing a rule file of a verification module in an integrated circuit design. For a disadvantage that it is inconvenient for a user to analyze a file structure in development and maintenance of an integrated circuit layout design rule file, a visualization analysis method is provided. The method comprises: first parsing a design rule file, and for one or more image layers selected by a user, acquiring an image layer set that has a dependency relationship with the image layer selected by the user; and performing layout wiring processing by using an image layer in a dependency relationship set as a node and by using a referencing relationship between image layers as a side, and generating and drawing a visualization relationship diagram. According to the visual analysis method for an image layer relation in a layout design rule file provided by the present invention, a user is helped to clarify rule logic and to optimize rule content, thereby improving development efficiency and facilitating later maintenance and modification.
Description
Technical field
The invention belongs to SIC (semiconductor integrated circuit) the Automation Design field, relate generally to rear end layout design and checking, during especially integrated circuit diagram checks, rule file design, exploitation and analysis field.
Background technology
The design of domain and checking are rings important in design flow of integrated circuit, and layout verification can improve integrated circuit (IC) design efficiency, reduce the risk that design is failed.The checking content of IC Layout rule control domain, it generally first can define the layer in domain, then checks parameter value (as spacing) between layer or in layer whether in the scope that manufacture technics allows by some regular commands.
The content of design rule is generally kept in design rule file, and its content is relevant to integrated circuit design process, and for different technique (as 90nm, 65nm, 40nm), the content of design rule file is not identical.Design rule file is generally developed by the designer be correlated with, and they progressively can add verification command according to the technique of domain, to verify relevant layer.
Due to technique constantly to improve and optimize, the graft application of same rule file in different platform, make design rule file need constantly to develop and safeguard.User, when exploitation and Maintenance Design rule file, needs the production Methods revising or adjust some layer, to revise mistake or to improve the efficiency verified.
Before amendment layer production Methods, the existing figure ATM layer relationsATM of user's Water demand: the clearly generative process of this layer, the adduction relationship of layer; To guarantee the correctness revising rear whole rule file.
Traditional method is that user finds the order using this layer one by one, analyzes relation between layer; According to the generation order of layer, find out the relation between itself and original layer.The method workload is large, and easily make mistakes, for this reason, the present invention proposes the visual analysis method of figure ATM layer relationsATM in a kind of IC Layout rule file.
Key concept:
(1) layer: in the design rule file of checking, layer comprises original layer and derives from layer (as without special appointment, layer described herein all assigns raw layer).Original layer is consistent with the basic layer in domain.Deriving from layer is the new layer generated by order one or more original layer or derivation layer, and this order is the generation order deriving from layer.
(2) order: in the design rule file of checking, order refer to one or more layer by geometric operation (as with or computing), relational calculus (as angular range, spacing range) derives from the layer made new advances, the output layer that namely new layer orders.
(3) input path of layer: refer to this layer by some orders from the process that one or more original layer derives from, all used layer set.
(4) outgoing route of layer: establish the input path of layer v to comprise layer u, then the layer set that all layer v meeting this condition form is called the outgoing route of layer u.
(5) digraph: if the every bar limit in figure is all directive, be then called digraph.The ordered pair that limit in digraph is made up of two summits, ordered pair represents with angle brackets usually, and as e<v, u> represent a directed edge, wherein v is the start node on limit, and u is the terminal node on limit.E<v, u> and e<u, v> represents two different directed edges.
(6) no-output node: if in the limit that is connected of node v, not existing with v is the limit of start node, then claim node v to be no-output, or claims v to be no-output node.
(7) node exports limit: the limit that to refer to this node be start node.
(8) output node: node v exports the output node that the terminal node on limit is called this node, is designated as Eout (v).
(9) node input limit: the limit that to refer to this node be terminal node.
(10) input node: node v inputs the input node that the start node on limit is called this node, is designated as Ein (v).
(11) nodal hierarchy: all nodes are divided into layer L1, a L2 ... LN, directed edge e<v, u> represent the limit from node v to node u; To any directed edge e<v, u>, v belong to Li, and u belongs to Lj, all have j<i.
(12) span on limit: after nodal hierarchy, to any directed edge e<v, u>, u belong to Li, and v belongs to Lj, and the span of limit e is designated as B (e)=j-i.
(13) dummy node: refer in the drawings and non-existent node, what just in order to process conveniently, hypothesis existed, there is the character that real node is identical.
(14) visual graph of a relation: refer to use computer graphics and image processing techniques, is changed to figure by data relation or image shows on screen, and carry out interaction process.
Summary of the invention
The present invention is directed in the exploitation of IC Layout rule file, maintenance, relationship analysis difficulty between each layer, amendment and maintenance documentation too rely on the drawback of user experience, propose a kind of visual layer relationship analysis method, the figure ATM layer relationsATM that single or multiple rule checks can be analyzed simultaneously.The logical organization of customer analysis, principle of optimality file can be helped, make its logical organization succinctly clear, thus improve development efficiency, reduce maintenance cost.
The present invention is analytical design method rule file first, obtain dependence between All Layers, then for one or more layer that user selects, obtain and select layer to have the layer set of dependence with user, last with the layer in dependence set for node, with the adduction relationship between layer for limit, carry out placement-and-routing's process, generate and draw visual graph of a relation.Characterization step of the present invention is as follows:
1. analytical design method rule file, obtains the dependence between All Layers;
2. for user select one or more layer, obtain with user select layer to have the layer set of dependence, this set by user-selected layer, and the input path of this layer and outgoing route composition;
3. with the layer in dependence set for node, with the adduction relationship between layer for limit, carry out placement-and-routing's process, generate visual graph of a relation.Step is as follows:
3.1 pairs of nodes carry out layering, calculate the span on limit: all nodes are divided into layer L1, a L2 ... LN, directed edge e<v, u> represent the limit from node v to node u; To any directed edge e<v, u>, v belong to Li, and u belongs to Lj, all have j<i.
3.2 pairs of layering results add dummy node, make the span on all limits all become 1, comprise and add initial virtual node and remove redundant virtual node two step:
A () adds initial virtual node: the node input limit successively traveling through layer interior nodes from top to bottom, if certain the node input limit e<v of layer Li interior joint u, the span n of u> is greater than 1, then in Li+1, add a dummy node v0, former limit e<v, u> splits into e<v, v0> and e<v0, u>, the span on limit becomes n-1 and 1, after traversal terminates, the span on all limits becomes 1;
B () removes redundant virtual node: successively travel through layer interior nodes from top to bottom, if the input node that there is two or more pieces limit in the node input limit of layer Li interior joint u is dummy node, then these dummy nodes are redundant virtual node, are merged into a dummy node.
3.3 optimize cross edge, do limited round two way alternate traversal layer, do a layer interior nodes relative position pre-adjustment to adjacent two layers, after each two way alternate traversal one is taken turns, intersection before and after analysis and regulation is counted, and if reduced; would adjust and continues traversal, otherwise just abandon this take turns adjust and stop optimization.
A the method for () layer interior nodes relative position pre-adjustment is: according to the direction of layer traversal, adjacent two layers, and wherein one deck is fixed bed, and another layer is adjustment layer; Then travel through each node in adjustment layer, whether the intersection analyzed before and after adjacent two node locations exchange is counted reduces, if reduce, adjusts, otherwise does not adjust; Repeat traverse node until do not have new position adjustment to occur.
3.4 computing node center point coordinates, center point coordinate is divided into X value to calculate and Y value calculates;
According to the quantity on height of node, interlayer distance and interlayer limit, calculate the Y-coordinate value of every one deck, the node in same layer has identical Y-coordinate.
X value calculates and tried to achieve key horizon before this, and key horizon to node cloth X value, then from key horizon, respectively up and down, does the layer reference cloth X value of adjacent two layers according to the relative position of layer interior nodes:
A () tries to achieve key horizon: travel through all layers, the summation of spacing between each node width and minimum node in computation layer, and in all layers, the maximum layer of this total value is key horizon;
B () layer is with reference to cloth X value: so that layout layer Li is for reference layer, current layer Li-1 (upwards) or Li+1 (downwards) travels through all nodes in layer according to certain priority and calculates X value; For present node m, first according to arrangement nodes position in this layer, estimate the layout scope of current layer interior nodes m, then according to the layout of reference layer Li layer interior nodes, calculate the desired layout point of current layer interior nodes m, finally with the point that distance desired layout point within the scope of layout is nearest, as nodes X coordinate.
3.5 draw figure: according to result after layout, draw node in relevant position, connect respective nodes.
Accompanying drawing explanation
Fig. 1 visual analyzing processing flow chart
Fig. 2 nodal hierarchy processing flow chart
Fig. 3 nodal hierarchy result figure
Fig. 4 adds dummy node processing flow chart
Fig. 5 point of crossing optimization process flow figure
Fig. 6 node layout processing flow chart
Fig. 7 node layout line result figure
Embodiment
Rule file example F:
X1=ANDLA1LB1
OUT1=NOTX1L0
X2=ANDLA2X1
OUT2=NOTX2L0
X3=ANDLA3X2
OUT3=NOTX3L0
X4=ANDX1X2
OUT4=NOTX4L0
OUT5=NOTOUT2OUT3
OUT6=NOTOUT4OUT1
OUT7=OROUT5OUT6
For one section of Simple Design rule file F listed above, the concrete implementation step of this method is as follows:
1. resolution file, obtains dependence as follows:
Export layer X1 to be generated by order AND by inputting layer LA1, LB1.
Export layer X2 to be generated by order AND by inputting layer X1, LA2.
Export layer X3 to be generated by order AND by inputting layer X2, LA3.
Export layer X4 to be generated by order AND by inputting layer X2, X1.
Export layer OUT1 to be generated by order NOT by inputting layer X1, L0.
Export layer OUT2 to be generated by order NOT by inputting layer X2, L0.
Export layer OUT3 to be generated by order NOT by inputting layer X3, L0.
Export layer OUT4 to be generated by order NOT by inputting layer X4, L0.
Export layer OUT5 to be generated by order NOT by inputting layer OUT1, OUT2.
Export layer OUT6 to be generated by order NOT by inputting layer OUT3, OUT4.
Export layer OUT7 to be generated by order OR by inputting layer OUT5, OUT6.
2. suppose that user selects OUT7 layer to carry out visual analyzing; The layer set of input placement-and-routing device is L (L0, LA1, LB1, LA2, LA3, X1, X2, X3, X4, OUT1, OUT2, OUT3, OUT4, OUT5, OUT6, OUT7); Limit set is E (e (LA1, X1), e (LB1, X1), e (LA2, X2), e (X1, X2), e (LA3, X3), e (X2, X3), e (X2, X4), e (X1, X4), e (L0, OUT1), e (X1, OUT1), e (L0, OUT2), e (X2, OUT2), e (L0, OUT3), e (X3, OUT3), e (L0, OUT4), e (X4, OUT4), e (OUT2, OUT5), e (OUT3, OUT5), e (OUT1, OUT6), e (OUT2, OUT6), e (OUT5, OUT7), e (OUT6, OUT7)).
3. carry out layered shaping, as shown in Figure 2, after process, result is as shown in Figure 3 for treatment scheme:
A () no-output node is placed on ground floor; And remember number of plies i=1;
B the input node Nin of i node layer, according to i node layer input relation, is increased to i+l layer by ():
If c () i+1 layer contains node, then i=i+1, repeat (b), otherwise terminate.
Concrete implementation is as follows:
The first step performs: OUT7 is put into the 1st layer;
Second step performs: i=1, OUT5, OUT6 is put into the 2nd layer;
3rd step performs: i=2, OUT2, OUT3, OUT4, OUT2 is put into the 3rd layer;
4th step performs: i=3, X2, L0, X3, X4, X1 is put into the 4th layer;
5th step performs: i=4, by LA2, LA3, puts into the 5th layer, and X1, X2 level is set to the 5th layer;
6th step performs: i=5, LA1, LB1 is put into the 6th layer, and LA2, X1 level is set to the 6th layer;
7th step performs: i=6, is set to the 7th layer by LA1, LB1 level;
8th step performs: i=7, this node layer is without input node, and i+1 layer is without node, and process terminates.
After layering, data are divided into 7 layers; L1={OUT7}, L2={OUT5, OUT6}, L3={OUT2, OUT3, OUT4, OUT1}, L4={L0, X3, X4}, L5={LA3, X2}, L6={LA2, X1}, L7={LA1, LB1}.
4. after pair layering, result carries out dummy node interpolation, treatment scheme as shown in Figure 4:
(a) note current layer numbering i=1, the input limit of detection layers interior nodes;
B () is for the input limit of i layer interior nodes, if the span on limit is greater than 1, increase the dummy node on limit: if the starting point on limit is not at i+1 layer at i+1 layer, newly-built node connects levels node; If the start node on limit has the dummy node be connected at i+1 layer, merge dummy node;
C () is after i-th layer of detection terminates, if lower one deck has node, i=i+1, forwards to (b); Otherwise terminate.
Such as have limit e<v, u1>, e<v, u2>, wherein v belongs to L1, and { u1, u2} belong to L3, i=1; Limit e<v detected, during u1>, span B (e)=2 on limit, therefore dummy node Vir1 is increased at L2, limit e<v, u1> is decomposed into limit e<v, Vir1> and e<Vir1, u1>.E<v detected, during u2>, dummy node Vir2 is increased at L2, e<v, u2> is decomposed into limit e<v, Vir2> and e<Vir2, u1>, there is connected dummy node Vir1 at L2 in node v, so merge dummy node Vir2, Vir1.
Final process result is increase dummy node Vir1 at L2, e<v, u1> and e<v, u2> is decomposed into limit e<v, Vir1>, e<Vir1, u1> and e<Vir1, u2>.Concrete implementation is as follows:
The first step perform: the input node of i=1, L1 node layer all at L2 layer, without the need to adding dummy node;
Second step perform: the input node of i=2, L2 node layer all at L3 layer, without the need to adding dummy node;
3rd step performs: the input node X2 of i=3, L3 node layer, X1 lay respectively at the 5th and the 6th layer, and increase dummy node V1 at L4, V2, replaces e (X2, OUT2) with limit e (X2, V1) and e (V1, OUT2); E (X1, OUT1) is replaced with limit e (X1, V2) and e (V2, OUT1);
4th step performs: the input node X1 of i=4, L4 node layer is positioned at the 6th layer, and increase dummy node V3 at L5, V4, replaces e (X1, X4) with limit e (X1, V3) and e (V3, X4); E (X1, V2) is replaced with limit e (X1, V4) and e (V4, V2);
5th step perform: the input node of i=5, L5 node layer all at L6 layer, without the need to adding dummy node;
6th step perform: the input node of i=6, L6 node layer all at L7 layer, without the need to adding dummy node;
7th step performs: i=7, L8 are without node, and process terminates.
After adding dummy node, L4 increases dummy node V1 and V2, and L4={X3, X4, L0, V1, V2}, L5 increase dummy node V3 and V4, and L5={LA3, X2, V3, V4}, make the span on all limits be 1.
5. reduce limit number of crossings, treatment scheme as shown in Figure 5:
A () sequential optimization: i is from 1 to N-1, fixed L i layer, regulates the relative position of Lil interior nodes, reduce two-layer between number of crossings;
B () backward optimization: i is from N to 2, fixed L i layer, regulates the relative position of Li-1 interior nodes, reduce two-layer between number of crossings;
C () is executing after sequential optimization and backward optimize, calculating limit and intersects the summation of counting, if crossing number is front fewer than regulating, then continuing optimization; Otherwise terminate to optimize.
The treatment step that Li layer interior nodes relative position regulates is as follows, layer interior nodes total number is designated as Node (Li), if in layer current detection node be numbered m, m belongs to [1, Node (Li)], corresponding node is expressed as Li (m).
A () initialization m=1, if m<Node (Li), forwards second step to, otherwise end position regulates flow process;
If b () node Li (m) and Li (m+1) exchange after, the intersection between fixed bed and regulating course is counted minimizing, then exchange two node locations, m=1, otherwise m=m+1;
C if () m=Node (Li), then position adjustments terminates, otherwise forwards (b) to.
Concrete implementation is as follows:
The first step performs: sequential optimization, and during i=3, the relative position after regulating in L4 layer is L4={X3, V1, L0, X4, V2}, and other layer is without regulating;
Second step performs: backward optimization, without regulating;
3rd step performs: the total number of crossings after optimization is 2, fewer than original, continues to optimize;
4th step performs: sequential optimization, without regulating;
5th step performs: backward optimization, without regulating;
6th step performs: the total number of crossings after optimization is 2, and last round of equal, and process terminates.
After optimizing, each node layer relative position is: L1={OUT7}, L2={OUT5, OUT6}, L3={OUT3, OUT2, OUT4, OUT1}, L4={X3, V1, L0, X4, V2}, L5={LA3, X2, V3, V4}, L6={LA2, X1}, L7={LA1, LB1};
6. pair all nodes carry out layout, and as shown in Figure 6, layout initial layers is L3 to treatment scheme, then from the 3rd layer respectively to upper, carry out layout downwards, result is as shown in Figure 7.
Vertically (Y) coordinate calculates: according to height of node H and interlayer distance Lsapce, calculate the Y-coordinate value of every one deck, the node in same layer has identical Y-coordinate.The Y-coordinate of Li node layer is designated as Yi; Its account form is Yi=i*H+ (i-l) * Lsapce;
Level (X) coordinate is calculated as follows:
A () travels through all layerings, according to spacing between layer interior nodes width and node, computation layer minimum widith, chooses the maximum layer of minimum widith as key horizon, and note benchmark level number is Sn;
B (), in Sn layer, according to node width and minimum spacing, calculates the X-coordinate position of each node;
(c) according to the layout of initial layers, successively upwards layout.I, from Sn to 2, according to the X-coordinate position of Li, calculates the X-coordinate position of Li-1 layer interior nodes.As follows to m nodes X layout step in layer:
(1). according to arrangement nodes position in this layer, estimate the layout scope of Li-1 (m) node;
(2). according to Li layout layer, calculate the approximate ideal cloth office point Gx of Li-1 (m); And with the nearest point of distance desired layout point within the scope of layout, as nodes X coordinate; Gx=MeanX (Ein (Li-1 (m))), represents and is averaging the X-coordinate of all nodes in Ein (Li-1 (m)).
(d) according to the layout of initial layers, successively downward layout.I, from Sn to N-1, according to the X-coordinate position of Li, calculates the coordinate position of Li+1 layer interior nodes.As follows to m nodes X layout step in layer:
(1). according to arrangement nodes position in this layer, estimate the layout scope of Li+1 (m) node;
(2). according to Li layout layer, calculate the approximate ideal cloth office point Gx of Li+1 (m); And with the nearest point of distance desired layout point within the scope of layout, as nodes X coordinate; Gx=MeanX (Eout (Li+1 (m))).
Li layer m node layout's scope [a, b] (a<=b) adopt following process computation: W (Li (n)) represents node Li (n) node width, and X (Li (n)) represents some Li (n) nodes X coordinate.
The first step: left margin calculates, and makes n=m:
(1).a=0.5*W(Li(n))；
(2) if. Li (n-1) does not exist, then a=bears infinite; And forward the 3rd step to;
If Li (n-1) is not by layout, then a=a+SafeSapce+W (Li (n-1)); N=n-1, and forward to (2).
Otherwise a=a+SafeSapce+0.5*W (Li (n-1))+X (Li (n-1)); And forward the 3rd step to;
Second step: right margin calculates, and makes n=m:
(1).b=0.5*W(Li(n))；
(2) if. Li (n+1) does not exist, then b=is just infinite; End process.
If Li (n+1) is not by layout, then b=b+SafeSapce+W (Li (n+1)); N=n+1, and forward to (2).
Otherwise b=X (Li (n+1)) – (b+SafeSapce+0.5*W (Li (n+1))), computing;
To choose layout parameter be height of node is 40, and dummy node width is 0, and real node width is 100, is 30 with node layer spacing, and interlayer distance is 80.Integral layout implementation is as follows:
The first step performs: the Y-coordinate calculating each layer, Y1=40, Y2=160, Y3=280, Y4=400, Y5=520, Y6=640, Y7=760;
Second step performs: calculate each layer minimum widith, W1=100, W2=230, W3=490, W4=420, W5=290, W6=230, W7=230;
3rd step performs: compare, choose initial layers Sn=3;
4th step performs: carry out layout to L3 layer, X (OUT3)=50, X (OUT2)=180, X (OUT4)=310, X (OUT1)=440;
5th step performs: with L3 layer for reference layer, carry out layout to L2 layer, and the sequence of Layout Priority level is for { the layout scope of OUT6, OUT5}, OUT6 be [bearing infinite, just infinite], Gx=375, therefore X (OUT6)=375; The layout scope of OUT5 is [negative infinite, 295], Gx=115, therefore X (OUT5)=115;
6th step performs: with L2 layer for reference layer, carry out layout to L1 layer, and the layout scope of OUT7 be [bearing infinite, just infinite], Gx=245, therefore X (OUT5)=245;
7th step performs: with L3 layer for reference layer, carry out layout to L4 layer, and the sequence of Layout Priority level is: { the layout scope of V2, V1, L0, X4, X3}, V2 be [bearing infinite, just infinite], Gx=440, therefore X (V2)=440; The layout scope of V1 is [negative infinite, 150], Gx=180, therefore X (V1)=150; The layout scope of L0 is [230,230], Gx=245, therefore X (L0)=230; The layout scope of X4 is [360,360], Gx=310, therefore X (X4)=360; The layout scope of X3 is [negative infinite, 70], Gx=50, therefore X (X3)=50;
8th step performs: with L4 layer for reference layer, carry out layout to L5 layer, and the sequence of Layout Priority level is for { the layout scope of V4, V3, X2, LA3}, V4 be [bearing infinite, just infinite], Gx=440, therefore X (V4)=440; The layout scope of V3 is [negative infinite, 410], Gx=360, therefore X (V3)=360; The layout scope of X2 is [negative infinite, 330], Gx=187, therefore X (X2)=187; The layout scope of LA3 is [negative infinite, 57], Gx=50, therefore X (LA3)=50;
9th step performs: with L5 layer for reference layer, carry out layout to L6 layer, and the sequence of Layout Priority level is for { the layout scope of X1, LA2}, X1 be [bearing infinite, just infinite], Gx=329, therefore X (X1)=329; The layout scope of LA2 is [negative infinite, 199], Gx=187, therefore X (LA2)=187;
Tenth step performs: with L6 layer for reference layer, carry out layout to L7 layer, and the sequence of Layout Priority level is for { the layout scope of LB1, LA1}, LB1 be [bearing infinite, just infinite], Gx=329, therefore X (LB1)=329; The layout scope of LA1 is [negative infinite, 199], Gx=329, therefore X (LA1)=199.
7. according to result after layout, draw real node in relevant position, adopt straight line as the cabling mode on limit, connect respective nodes, result as shown in Figure 7.
Claims (7)
1. the invention provides the visual analysis method of figure ATM layer relationsATM in a kind of layout design rules file, it is characterized in that: first analytical design method rule file, obtain dependence between All Layers, then for one or more layer that user selects, obtain with user select layer to have the layer set of dependence, finally with the layer in dependence set for node, with the adduction relationship between layer for limit, carry out placement-and-routing's process, generate and draw visual graph of a relation.
2. the visual analysis method of figure ATM layer relationsATM in layout design rules file according to claim 1, it is characterized in that, the operation of described placement-and-routing, the steps include:
The first step, carries out layering to node, calculates the span on limit;
Second step, adds dummy node, makes the span on all limits all become 1;
3rd step, optimizes cross edge, regulates the relative position of each layer interior nodes;
4th step, the center point coordinate of computing node;
5th step, draws figure.
3. the visual analysis method of figure ATM layer relationsATM in layout design rules file according to claim 2, it is characterized in that, described carries out layering to node, and calculate the span on limit, step is:
All nodes are divided into layer
l 1,
l 2,
l n , directed edge
e<
v,
u> represents from node
vto node
ulimit; To any directed edge
e<
v,
u>,
vbelong to
l i ,
ubelong to
l j , all have
j<
i.
4. the visual analysis method of figure ATM layer relationsATM in layout design rules file according to claim 2, it is characterized in that, described interpolation dummy node, make the span on all limits all become 1, step is:
A () adds initial virtual node: the node input limit successively traveling through layer interior nodes from top to bottom, if layer
l i interior joint
ucertain node input limit
e<
v,
uthe span of >
nbe greater than 1, then exist
l i+ 1
middle interpolation dummy node
v 0, former limit
e<
v,
u> splits into
e<
v,
v 0> and
e<
v 0,
u>, the span on limit becomes
n-1 and 1, after traversal terminates, the span on all limits becomes 1;
B () removes redundant virtual node: successively travel through layer interior nodes from top to bottom, if layer
l i interior joint
unode input limit in there is two or more pieces limit input node be dummy node, then these dummy nodes are redundant virtual node, are merged into a dummy node.
5. the visual analysis method of figure ATM layer relationsATM in layout design rules file according to claim 2, it is characterized in that, described optimization cross edge, regulate the relative position of each layer interior nodes, step is:
A () does limited round two way alternate traversal layer, do a layer interior nodes relative position pre-adjustment to adjacent two layers;
B () each two way alternate traversal one is taken turns after, the intersection before and after analysis and regulation is counted, if reduce, adjusts and continues traversal, otherwise just abandons this and take turns and adjust and stop optimization.
6. the visual analysis method of figure ATM layer relationsATM in layout design rules file according to claim 5, it is characterized in that, described layer interior nodes relative position pre-adjustment, step is:
A direction that () travels through according to layer, adjacent two layers, wherein one deck is fixed bed, and another layer is adjustment layer;
Each node in (b) traversal adjustment layer, whether the intersection analyzed before and after adjacent two node locations exchange is counted reduces, if reduce, adjusts, otherwise does not adjust;
C () repeats traverse node until do not have new position adjustment to occur.
7. the visual analysis method of figure ATM layer relationsATM in layout design rules file according to claim 2, it is characterized in that, the center point coordinate of described computing node, step is:
According to the quantity on height of node, interlayer distance and interlayer limit, calculate the Y-coordinate value of every one deck;
X value calculates and tried to achieve key horizon before this, and key horizon to node cloth X value, then from key horizon, respectively up and down, does the layer reference cloth X value of adjacent two layers according to the relative position of layer interior nodes:
A () tries to achieve key horizon: travel through all layers, the summation of spacing between each node width and minimum node in computation layer, and in all layers, the maximum layer of this total value is key horizon;
B () layer is with reference to cloth X value: with layout layer
l i for reference layer, current layer
l i-1
(upwards) or
l i+1
(downwards) travels through all nodes in layer according to certain priority and calculates X value; For present node
m, first according to arrangement nodes position in this layer, estimate current layer interior nodes
mlayout scope, then according to reference layer
l i the layout of layer interior nodes, calculates current layer interior nodes
mdesired layout point, finally with the point that distance desired layout point within the scope of layout is nearest, as nodes X coordinate.
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