CN112701951A - Inverter voltage state prediction control method based on tolerant hierarchical sequence method - Google Patents

Inverter voltage state prediction control method based on tolerant hierarchical sequence method Download PDF

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CN112701951A
CN112701951A CN202110111020.6A CN202110111020A CN112701951A CN 112701951 A CN112701951 A CN 112701951A CN 202110111020 A CN202110111020 A CN 202110111020A CN 112701951 A CN112701951 A CN 112701951A
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inverter
voltage state
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CN112701951B (en
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樊明迪
汤宇杭
张凯
杨勇
王凯欣
顾明星
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Suzhou University
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

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Abstract

The invention discloses a prediction control method for the voltage state of an inverter based on a tolerant hierarchical sequence method, wherein the inverter is a clamp type three-level three-phase inverter, and the prediction control method for the voltage state comprises the following steps: creating an MPC prediction model, and predicting the output capacitor voltage and the potential difference of the neutral point at the DC side at the K +2 moment according to the MPC prediction model at the K moment; then constructing a double-layer value objective function; then, solving a first layer of objective function in a double-layer value objective function by using a tolerant hierarchical sequence method to obtain a plurality of candidate voltage state vectors, substituting the plurality of candidate voltage state vectors obtained by solving into a second layer of objective function, and optimizing and solving the second layer of objective function to obtain an optimal voltage state vector; and finally, applying the inverter switching state corresponding to the optimal voltage state vector at the moment of K +1 to carry out prediction control on the inverter. The inverter voltage state prediction control method improves the modeling rate and the control stability.

Description

Inverter voltage state prediction control method based on tolerant hierarchical sequence method
Technical Field
The invention relates to the technical field of inverters, in particular to a method for predicting and controlling the voltage state of an inverter based on a tolerant hierarchical sequence method.
Background
The rapid development of new energy sources such as wind energy, solar energy, biological energy and the like enables the multi-level inverter to be widely concerned. The multilevel inverter is required to have excellent dynamic stability as a tie for photovoltaic network access. The existing two-level inverter has the defects of serious electromagnetic interference, low inversion efficiency and the like, and is particularly obvious in high-voltage occasions, and compared with the two-level inverter, the clamp type three-level inverter becomes the first choice of a distributed power generation system by virtue of the advantages of low voltage resistance of a switching tube, low filter inductance loss, low harmonic distortion and the like.
As a Control strategy for a clamped inverter, a Model Predictive Control (MPC) method can evaluate each switching state sequence according to a cost function, and enable the switching state sequence satisfying the minimum cost function to be used for controlling the power electronic inverter at the next moment. Existing MPC methods typically use a cost function with weighting coefficients to achieve control of different objectives. The proportion of a single target in a total target is added or reduced through the adjustment of the weight coefficient, so that the limitation and nonlinear processing of a system are realized, but in the method, the selection of the weight coefficient is uncertain, the selection of the weight coefficient is mostly determined through a genetic algorithm and empirical analysis, and corresponding theoretical bases are lacked, so that the process of determining the weight coefficient is complicated, randomness exists, and the modeling efficiency is reduced; due to the inexorability among different control targets, a large weight coefficient is often needed for balancing the dimension among the targets, and meanwhile, the noise is amplified, so that the control strategy is unstable, and the use requirement cannot be met.
Disclosure of Invention
The invention aims to provide an inverter voltage state prediction control method based on a tolerant hierarchical sequence method, which can improve the modeling rate and the control stability.
In order to solve the technical problems, the technical scheme provided by the invention is as follows:
a voltage state prediction control method of an inverter based on a tolerant hierarchical sequence method is disclosed, the inverter is a clamp type three-level three-phase inverter, and the voltage state prediction control method comprises the following steps:
1) creating an MPC prediction model, and predicting the output capacitor voltage and the potential difference of the neutral point at the DC side at the K +2 moment according to the MPC prediction model at the K moment;
2) constructing a first-layer cost function according to the difference value between the output capacitor voltage at the moment K +2 and the expected output capacitor voltage, constructing a second-layer cost function according to the potential difference of the neutral point at the direct current side at the moment K +2, wherein the first-layer cost function and the second-layer cost function form a double-layer cost target function;
3) solving the first layer of objective function by using a tolerant hierarchical sequence method to obtain a plurality of candidate voltage state vectors, substituting the plurality of candidate voltage state vectors obtained by solving the first layer of objective function into the second layer of objective function, and optimizing and solving the second layer of objective function to obtain an optimal voltage state vector;
4) and applying the inverter switching state corresponding to the optimal voltage state vector to the moment K +1 to perform prediction control on the inverter.
In one embodiment, the minimization principle is adopted when the second-layer objective function is optimized and solved.
In one embodiment, the two-layer cost objective function is:
Figure BDA0002919228190000021
wherein,
Figure BDA0002919228190000022
a first-level cost function is represented,
Figure BDA0002919228190000023
representing the second layer cost function, Δ VPN(K +2) represents the DC-side neutral point potential difference at the time K +2,
Figure BDA0002919228190000024
representing the desired output capacitor voltage at time K +2,
Figure BDA0002919228190000025
the output capacitor voltage at the time K +2 is shown, and α and β respectively show an α axis and a β axis in the two-phase stationary coordinate system.
In one embodiment, the following formula is adopted when the second layer objective function is optimized and solved to obtain the optimal voltage state vector:
Figure BDA0002919228190000026
Figure BDA0002919228190000031
denotes an optimum voltage state vector, n denotes a reference numeral of the voltage vector, ζ denotes a wide tolerance value,
Figure BDA0002919228190000032
the representation represents a first-level candidate cost function,
Figure BDA0002919228190000033
representing a second tier candidate merit function.
In one of the embodiments, the first and second electrodes are,
Figure BDA0002919228190000034
wherein,
Figure BDA0002919228190000035
indicating the output capacitor voltage at time K, TsIs the sampling time, C is the filter capacitance,
Figure BDA0002919228190000036
output inductance representing time KThe flow of the stream(s),
Figure BDA0002919228190000037
represents the output load current at time K, ux(K) Representing the output voltage of the inverter at time K, Δ VPN(K) Represents the potential difference of the neutral point on the DC side at the time KO(K) The dc-side midpoint current at time K is shown.
In one embodiment, the two-phase stationary coordinate system is converted from a three-phase stationary coordinate system.
In one embodiment, the two-phase stationary coordinate system is obtained by converting a three-phase stationary coordinate system through Clark transformation or Park transformation.
The invention has the following beneficial effects: the inverter voltage state prediction control method based on the tolerant hierarchical sequence method can avoid the adjustment of the weight coefficient in the value function, save the complex and fussy trial and error process and improve the modeling rate; meanwhile, the method mediates the non-aggressivity among different control targets, avoids the phenomenon of distortion caused by overlarge noise due to the fact that the control targets are excessively amplified, and has excellent steady-state performance and quick dynamic response.
Drawings
Fig. 1 is a schematic structural diagram of a clamp type three-level three-phase inverter;
FIG. 2 is a voltage space vector diagram of the inverter shown in FIG. 1;
FIG. 3 is a block diagram of the inverter voltage state prediction control method based on the tolerant hierarchical sequence method according to the present invention;
FIG. 4 is a flow chart of a control strategy of the inverter voltage state prediction control method based on the tolerant hierarchical sequence method of the present invention;
FIG. 5 is a coordinate diagram of a three-phase stationary coordinate system and a two-phase stationary coordinate system;
FIG. 6 is a voltage state control waveform diagram obtained using the predictive control method of the invention;
FIG. 7 is a distribution plot of the number of candidate voltage state vectors in a voltage vector into a second tier cost function;
Detailed Description
The present invention is further described below in conjunction with the following figures and specific examples so that those skilled in the art may better understand the present invention and practice it, but the examples are not intended to limit the present invention.
As shown in fig. 3 to 4, the present embodiment discloses a method for predicting and controlling a voltage state of an inverter based on a tolerant hierarchical sequence method, where the inverter is a clamped three-level three-phase inverter, and the inverter structure is as shown in fig. 1 to 2, and the clamped three-level three-phase inverter outputs an ac power to a three-phase load, and the method for predicting and controlling a voltage state of an inverter based on a tolerant hierarchical sequence method includes the following steps:
1) creating an MPC prediction model, and predicting the output capacitor voltage and the potential difference of the neutral point at the DC side at the K +2 moment according to the MPC prediction model at the K moment;
2) constructing a first-layer cost function according to the difference value between the output capacitor voltage at the moment K +2 and the expected output capacitor voltage, constructing a second-layer cost function according to the potential difference of the neutral point at the direct current side at the moment K +2, wherein the first-layer cost function and the second-layer cost function form a double-layer cost target function;
3) solving the first layer of objective function by using a tolerant hierarchical sequence method to obtain a plurality of candidate voltage state vectors, substituting the plurality of candidate voltage state vectors obtained by solving the first layer of objective function into the second layer of objective function, and optimizing and solving the second layer of objective function to obtain an optimal voltage state vector;
4) and applying the inverter switching state corresponding to the optimal voltage state vector to the moment K +1 to perform prediction control on the inverter.
In the process, the output capacitor voltage and the potential difference of the neutral point at the DC side at the K +2 moment are predicted according to the MPC prediction model at the K moment, a double-layer cost function is constructed by utilizing the predicted output capacitor voltage and the predicted potential difference of the neutral point at the K +2 moment, an optimal voltage state vector is finally obtained, and the inverter is subjected to prediction control by applying the inverter switch state corresponding to the optimal voltage state vector at the K +1 moment, namely, the output capacitor voltage and the potential difference of the DC side at the K +2 moment are brought into the prediction model at the K moment and are applied at the K +1 moment.
In one embodiment, the minimization principle is adopted when the second-layer objective function is optimized and solved.
In one embodiment, the two-tier cost objective function is:
Figure BDA0002919228190000051
wherein,
Figure BDA0002919228190000052
a first-level cost function is represented,
Figure BDA0002919228190000053
representing the second layer cost function, Δ VPN(K +2) represents the DC-side neutral point potential difference at the time K +2,
Figure BDA0002919228190000054
representing the desired output capacitor voltage at time K +2,
Figure BDA0002919228190000055
denotes an output capacitor voltage at the time K +2, where x ═ α and β denote α and β axes in the two-phase stationary coordinate system, respectively, and where x ═ α,
Figure BDA0002919228190000056
and a coordinate value on the α axis of the output capacitor voltage at the time K + 2.
In one embodiment, the two-phase stationary coordinate system is converted from a three-phase stationary coordinate system.
In one embodiment, as shown in fig. 5, the two-phase stationary coordinate system is obtained by converting the three-phase stationary coordinate system through Clark transformation (Clark transformation) or Park transformation (Park transformation).
In one embodiment, the following formula is adopted when the minimization principle is used to optimize and solve the second layer objective function to obtain the optimal voltage state vector:
Figure BDA0002919228190000057
Figure BDA0002919228190000058
representing the optimal voltage state vector, as will be appreciated,
Figure BDA0002919228190000059
respectively, optimal voltages of a phase, B phase and C phase, n denotes a reference numeral of a voltage vector, ζ denotes a wide tolerance value,
Figure BDA00029192281900000510
the representation represents a first-level candidate cost function,
Figure BDA00029192281900000511
representing a second tier candidate merit function.
As can be appreciated, the first and second electrodes,
Figure BDA00029192281900000512
means for finding a value satisfying not more than
Figure BDA00029192281900000513
All the candidate voltage state vectors of the sum, and the first-layer cost function under the candidate voltage state vector is taken as the first-layer candidate cost function
Figure BDA0002919228190000061
Will then satisfy
Figure BDA0002919228190000062
Substituting the candidate voltage state vector into the second layer cost functionThe two-layer cost function is recorded as the second-layer candidate cost function
Figure BDA0002919228190000063
And finally find out the candidate cost function of the second layer
Figure BDA0002919228190000064
Minimum value of (2)
Figure BDA0002919228190000065
Satisfy the requirement of
Figure BDA0002919228190000066
The candidate voltage state vector of (2) is then the optimal voltage vector.
The first layer objective function is solved by adopting a tolerance layering sequence method, so that a tolerance value zeta is introduced, requirements of different performances can be met by setting a proper tolerance value, and at least one optimal solution can be sent to the next layer. The method solves the problem that the control target of the next layer cannot be realized as expected due to the fact that the optimal solution falling into the next layer is unique when the existing optimal solution of the dictionary is subjected to hierarchical calculation. The selection of the wide capacitance value is not as complicated as the selection of the weight coefficient, the number of candidate voltage state vectors entering the second layer is determined by the size of the wide capacitance value, and the size of the wide capacitance value depends on the strictness degree of the practical application place to the DC side midpoint potential balance.
In one of the embodiments, the first and second electrodes are,
Figure BDA0002919228190000067
wherein,
Figure BDA0002919228190000068
indicating the output capacitor voltage at time K, TsIs the sampling time, C is the filter capacitance,
Figure BDA0002919228190000069
representing the output inductor current at time K,
Figure BDA00029192281900000610
represents the output load current at time K, ux(K) Representing the output voltage of the inverter at time K, Δ VPN(K) Represents the potential difference of the neutral point on the DC side at the time KO(K) The dc-side midpoint current at time K is shown.
In one embodiment, the MPC prediction model in step 1) is:
Figure BDA00029192281900000611
in the formula,
Figure BDA0002919228190000071
for outputting inductor current uxIs the output voltage of the inverter and is,
Figure BDA0002919228190000072
for the balance capacitor current, y is P, N, and the reference numerals of the two balance capacitors on the dc side, i.e. the balance capacitor P and the balance capacitor N, i respectively, are shownOIs a DC side midpoint current, Δ VPNIs the potential difference of the midpoint of the direct current side, C is a filter capacitor,
Figure BDA0002919228190000073
in order to output the voltage of the capacitor,
Figure BDA0002919228190000074
for outputting load current, L is filter inductor, CyTo balance the capacitance value of the capacitor, VyTo balance the voltage of the capacitor, Sn′Indicating the switching state of the inverter n' phase, in,Phase currents of n 'phases of the inverter are shown, n' ═ a, B, and C respectively represent a phase, B phase, and C phase,
Figure BDA0002919228190000075
respectively representing the capacitance currents, V, of the balance capacitors P and NP、VNIndividual watchThe capacitance voltages of the balance capacitor P and the balance capacitor N are shown.
Wherein, the process of obtaining formula (3) from formula (4) is as follows:
s1) first, a differential equation of the clamped three-phase three-level inverter in the continuous time domain in the α β two-phase stationary coordinate system is derived from equation (4):
Figure BDA0002919228190000076
where x ═ α, β represent the α axis and β axis in the α β two-phase stationary coordinate system, and for example, where x ═ α,
Figure BDA0002919228190000077
a coordinate value on the α axis representing the output load current.
S2) at time K, the output capacitor voltage and the dc-side potential difference of the inverter at time K +1 are predicted using the MPC prediction model, and these systems are discretized in consideration of the fact that the microprocessor can complete the prediction calculation within several tens of microseconds. Let TsFor sampling time, the output capacitor voltage and the direct current side potential difference at the K moment under a discrete time domain are obtained according to an Euler forward method:
Figure BDA0002919228190000078
wherein,
Figure BDA0002919228190000079
representing the output capacitor voltage, Δ V, at time K +1PN(K +1) represents the potential difference of the neutral point on the DC side at the time of K +1,
Figure BDA00029192281900000710
indicating the output capacitor voltage at time K, TsIs the sampling time, C is the filter capacitance,
Figure BDA00029192281900000711
representing the output inductor current at time K,
Figure BDA00029192281900000712
representing the output load current at time K, Δ VPN(K) Represents the potential difference of the neutral point on the DC side at the time KO(K) The dc-side midpoint current at time K is shown.
S3) iteratively predicts the output capacitor voltage and the direct current side potential difference at the moment K +2 according to the predicted value at the moment K +1 obtained in the step S2), namely obtaining a formula (3).
The formula (2) is obtained as follows:
the mathematical model of the inverter of the present embodiment can be identified by the following two coordinate systems, an abc three-phase stationary coordinate system and an α β two-phase stationary coordinate system, as shown in fig. 5:
1) abc three-phase stationary coordinate system: abc is the axial direction of the three-phase winding of the stator, and the electrical angles are different by 120 degrees;
2) α β two-phase stationary coordinate system: the alpha axis is coincident with the a axis, and the beta axis leads the alpha axis by 90 degrees of electric angle anticlockwise;
in order to transform the mathematical model of abc three-phase stationary coordinate system into α β two-phase stationary coordinate system, Clark transformation (Clark transformation), which is abbreviated as 3/2 transformation, is required to be performed, and transformation matrix C is used3/2(constant amplitude coordinate transformation) as follows:
Figure BDA0002919228190000081
structure of clamp type three-phase three-level voltage source inverter referring to FIG. 2, output voltage upsilonsThe formula of (1) is as follows:
Figure BDA0002919228190000082
in the formula, VdcIs the voltage amplitude of the DC input, Sa、Sb、ScSeparately identifying inverter switching states, e.g. S a1 represents
Figure BDA0002919228190000083
Figure BDA0002919228190000084
At the same time, the switch-on is carried out,
Figure BDA0002919228190000085
Figure BDA0002919228190000086
simultaneously turning off; s a0 represents
Figure BDA0002919228190000087
Figure BDA0002919228190000088
At the same time, the switch-on is carried out,
Figure BDA0002919228190000089
simultaneously turning off; e.g. SaIs-1 represents
Figure BDA00029192281900000810
Figure BDA00029192281900000811
At the same time, the switch-on is carried out,
Figure BDA00029192281900000812
and simultaneously turned off. The inverter has 27 switching states, and the voltage space vector relationship is shown in figure 3, which corresponds to 27 voltage vector outputs.
According to the topological structure of the clamp type three-phase three-level inverter shown in fig. 2, a dynamic equation under a two-phase static coordinate system can be obtained:
(1) output inductor current equation
Figure BDA0002919228190000091
In the formula,
Figure BDA0002919228190000092
respectively representing the coordinate values of the output inductor current on the alpha axis and the beta axis, ucIs used for outputting capacitor voltage, C is filter capacitor,
Figure BDA0002919228190000093
and coordinate values on the α axis and β axis of the output load current, respectively.
(2) Voltage equation:
Figure BDA0002919228190000094
in the formula uα、uβL represents the filter inductance, which is a coordinate value representing the output voltage on the α axis and the β axis, respectively.
(3) Direct-current side equilibrium capacitance equation:
Figure BDA0002919228190000095
in the formula,
Figure BDA0002919228190000096
are all balancing capacitance currents, iOIs a DC side midpoint current, Δ VPNIs a DC side midpoint potential difference, CP、CNAre all the capacitance values of the balance capacitor, Sn′Indicating the switching state of the inverter n' phase, in,Phase currents of n 'phases of the inverter are shown, n' ═ a, B, and C respectively represent a phase, B phase, and C phase,
Figure BDA0002919228190000097
respectively representing the capacitance currents, V, of the balance capacitors P and NP、VNRespectively representing the capacitance voltages of the balance capacitor P and the balance capacitor N.
According to the formulas (8), (9) and (10), a differential equation of the clamped three-phase three-level inverter in a continuous time domain under an alpha beta coordinate system is deduced:
Figure BDA0002919228190000101
where x ═ α, β represent the α axis and β axis in the α β two-phase stationary coordinate system, and for example, where x ═ α,
Figure BDA0002919228190000102
a coordinate value representing the output load current on the α axis;
Figure BDA0002919228190000103
in order to output the voltage of the capacitor,
Figure BDA0002919228190000104
in order to output the load current,
Figure BDA0002919228190000105
to output the inductor current.
Two control targets can be obtained according to the formula (11), which are respectively a value of a difference between the output capacitor voltage and the reference capacitor voltage and a minimized DC-side balance capacitor potential difference, and a specific value function equation:
Figure BDA0002919228190000106
where n is 0.., 26, which represents different voltage state vector indices.
In practice, for the formula (12), the voltage vector which is optimal for satisfying two control targets at the same time is almost nonexistent, and only one equivalent pareto optimal solution exists. Determining one group of pareto optimal solutions as
Figure BDA0002919228190000107
For purposes of illustration, the following definitions are set forth herein:
definition 1: when the reference number n of the selected voltage state vector is 0
Figure BDA0002919228190000108
Definition 2: is suitable for relieving
Figure BDA0002919228190000109
Satisfy the requirement of
Figure BDA00029192281900001010
Or
Figure BDA00029192281900001011
This solution is called the pareto optimal solution;
definition 3: has and has only proper solution
Figure BDA00029192281900001012
Satisfy the requirement of
Figure BDA00029192281900001013
And is
Figure BDA00029192281900001014
J2Representing the second layer of cost function values under the solution, and the solution is called the optimal solution of the dictionary;
the invention solves the problem of multi-objective optimization by adopting a mode of establishing a sequence structure. And layering the value functions according to the priority levels, entering the next layer when the input quantity of the current-level control target is met, and continuing the layering calculation until the pareto optimal solution of the last value function is obtained. Different levels of the cost function have different pareto optimal solutions. From definition 3, a mathematical representation of the dictionary optimal solution can be obtained:
Figure BDA0002919228190000111
equation (13) shows that the optimal solution of the dictionary is unique when performing hierarchical calculation, so that the control target of the next layer cannot be realized as expected. To overcome the defect, a wide tolerance value zeta is introduced in the hierarchical calculation process, and the formula (13) is improved to obtain
Figure BDA0002919228190000112
According to the inverter voltage state prediction control method based on the tolerant hierarchical sequence method, a simulation model of a system is established in Matlab, and the optimal voltage vector is obtained by using the method to control the operation of the inverter. In order to verify that the control strategy can well balance the midpoint voltage of the direct current side, capacitors on the direct current side are set to be unequal in the model, namely the capacitors CPEnd is connected in parallel with a resistor RP. Simulation parameters: vdc=400V,Rdc=0.001Ω,CP=CN=500μF,R=20Ω,L=10mH,C=10μF,RPControlling the sampling period of the system to be 20 kHz; the desired voltage is given an assigned value of 150V and a frequency of 50 Hz. And comparing the simulation of the traditional model prediction control with the simulation of the tolerant sequence model prediction voltage state control, wherein the comparison result shows that the current and voltage performances of the two control strategies are approximately similar. Fig. 6 is a waveform diagram of voltage state control obtained by the predictive control method of the present embodiment, in which (a) shows a waveform diagram of a phase current of a phase, (b) shows a diagram of a fast fourier transform of the phase current of a phase, (c) shows a diagram of a line voltage fluctuation diagram, and (d) shows a diagram of a dc-side neutral point potential difference fluctuation diagram, and as can be seen from the diagram (b) in fig. 6, the total harmonic distortion of the predictive voltage state control of the present embodiment is 0.68%, and the predictive voltage state control method maintains excellent performance in terms of current performance. Due to the capacitance C on the DC sidePIs connected in parallel with a resistor RPThe predicted voltage state control method of the present embodiment controls the maximum neutral point voltage offset value to-6.198V, and is also excellent in suppressing the neutral point voltage fluctuation. Fig. 7 shows the candidate voltage state vector numbers entering the second layer of the two-layer cost function, where the numbers are 1, 2, and 3, which are the largest in proportion, respectively 55%, 30%, and 11%, and this represents that the predicted voltage state control method of this embodiment can select the candidate voltage state vector numbers according to the current system situation dynamics.
According to the inverter voltage state prediction control method based on the tolerant hierarchical sequence method, the voltage state vector is solved by establishing a double-layer cost function without adjusting the weight coefficient, so that a complex process of confirming the weight coefficient in a single cost function in the prior art is avoided, the non-aggressivity between two control targets is simultaneously regulated, and the phenomenon of distortion caused by overlarge noise due to the fact that the control targets are excessively amplified is avoided; meanwhile, the number of candidate voltage state vectors entering the second layer in the fixed cost function does not exist, dynamic adjustment of the number of the candidate voltage state vectors is achieved by setting a wide-capacity value, the number of the candidate voltage state vectors can be selected by the control strategy according to different voltage states at each moment, the number of the candidate voltage state vectors can be selected dynamically, and adaptability and flexibility of the control strategy are improved; the whole method is combined with a dictionary method with wide tolerance value and model prediction control, and has excellent steady-state performance and rapid dynamic response; the time consumed by parameter design is greatly reduced, and the modeling efficiency and the operation efficiency are improved.
The above-mentioned embodiments are merely preferred embodiments for fully illustrating the present invention, and the scope of the present invention is not limited thereto. The equivalent substitution or change made by the technical personnel in the technical field on the basis of the invention is all within the protection scope of the invention. The protection scope of the invention is subject to the claims.

Claims (7)

1. A voltage state prediction control method of an inverter based on a tolerant hierarchical sequence method is disclosed, the inverter is a clamp type three-level three-phase inverter, and the voltage state prediction control method is characterized by comprising the following steps:
1) creating an MPC prediction model, and predicting the output capacitor voltage and the potential difference of the neutral point at the DC side at the K +2 moment according to the MPC prediction model at the K moment;
2) constructing a first-layer cost function according to the difference value between the output capacitor voltage at the moment K +2 and the expected output capacitor voltage, constructing a second-layer cost function according to the potential difference of the neutral point at the direct current side at the moment K +2, wherein the first-layer cost function and the second-layer cost function form a double-layer cost target function;
3) solving the first layer of objective function by using a tolerant hierarchical sequence method to obtain a plurality of candidate voltage state vectors, substituting the plurality of candidate voltage state vectors obtained by solving the first layer of objective function into the second layer of objective function, and optimizing and solving the second layer of objective function to obtain an optimal voltage state vector;
4) and applying the inverter switching state corresponding to the optimal voltage state vector to the moment K +1 to perform prediction control on the inverter.
2. The inverter voltage state prediction control method based on the tolerant hierarchical sequence method according to claim 2, wherein a minimization principle is adopted when the second-layer objective function is optimized and solved.
3. The method for predictive control of inverter voltage states based on the tolerant hierarchical sequence method as set forth in claim 2, wherein the two-level cost objective function is:
Figure FDA0002919228180000011
wherein,
Figure FDA0002919228180000012
a first-level cost function is represented,
Figure FDA0002919228180000013
representing the second layer cost function, Δ VPN(K +2) represents the DC-side neutral point potential difference at the time K +2,
Figure FDA0002919228180000014
representing the desired output capacitor voltage at time K +2,
Figure FDA0002919228180000015
the output capacitor voltage at the time K +2 is shown, and α and β respectively show an α axis and a β axis in the two-phase stationary coordinate system.
4. The inverter voltage state prediction control method based on the tolerant hierarchical sequence method according to claim 3, wherein the following formula is adopted when the optimal voltage state vector is obtained by optimizing and solving the second-layer objective function:
Figure FDA0002919228180000021
Figure FDA0002919228180000022
denotes an optimum voltage state vector, n denotes a reference numeral of the voltage vector, ζ denotes a wide tolerance value,
Figure FDA0002919228180000023
the representation represents a first-level candidate cost function,
Figure FDA0002919228180000024
representing a second tier candidate merit function.
5. The inverter voltage state prediction control method based on the tolerant hierarchical sequence method according to claim 3,
Figure FDA0002919228180000025
wherein,
Figure FDA0002919228180000026
indicating the output capacitor voltage at time K, TsIs the sampling time, C is the filter capacitance,
Figure FDA0002919228180000027
representing the output inductor current at time K,
Figure FDA0002919228180000028
represents the output load current at time K, ux(K) Representing the output voltage of the inverter at time K, Δ VPN(K) Represents the potential difference of the neutral point on the DC side at the time KO(K) The dc-side midpoint current at time K is shown.
6. The method for predictive control of inverter voltage states based on the tolerant hierarchical sequence method as set forth in claim 3, characterized in that the two-phase stationary coordinate system is converted from a three-phase stationary coordinate system.
7. The inverter voltage state prediction control method based on the tolerant hierarchical sequence method according to claim 6, wherein the two-phase static coordinate system is obtained by Clark conversion or Park conversion of a three-phase static coordinate system.
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