CN112701915A - Local Zero Voltage Switching (ZVS) for flyback power converter and method thereof - Google Patents

Local Zero Voltage Switching (ZVS) for flyback power converter and method thereof Download PDF

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Publication number
CN112701915A
CN112701915A CN202011134302.XA CN202011134302A CN112701915A CN 112701915 A CN112701915 A CN 112701915A CN 202011134302 A CN202011134302 A CN 202011134302A CN 112701915 A CN112701915 A CN 112701915A
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China
Prior art keywords
voltage
controller
side transistor
detection circuit
primary
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CN202011134302.XA
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Chinese (zh)
Inventor
丁烽根
S·哈伯
韦凯方
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Semiconductor Components Industries LLC
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Semiconductor Components Industries LLC
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Priority claimed from US17/034,938 external-priority patent/US11303195B2/en
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Publication of CN112701915A publication Critical patent/CN112701915A/en
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • H02M1/0054—Transistor switching losses
    • H02M1/0058—Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/083—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the ignition at the zero crossing of the voltage or the current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33592—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer having a synchronous rectifier circuit or a synchronous freewheeling circuit at the secondary side of an isolation transformer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Abstract

The invention provides a local Zero Voltage Switching (ZVS) for a flyback power converter and a method thereof. The invention discloses a controller for a flyback power converter, which comprises: a line voltage detection circuit that activates a high voltage line detection signal in response to detecting that an input line voltage is greater than a first threshold; a discontinuous conduction mode detection circuit that activates a discontinuous conduction mode signal in response to detecting that the controller is operating in a discontinuous conduction mode; and a switching controller coupled to the line voltage detection circuit and the discontinuous conduction mode detection circuit, to control the primary side transistor and the secondary side transistor using local zero voltage switching in response to activation of the high voltage line detection signal and the discontinuous conduction mode signal, and to otherwise not use local zero voltage switching.

Description

Local Zero Voltage Switching (ZVS) for flyback power converter and method thereof
Technical Field
The present disclosure relates generally to power converters, and more particularly to power converters using flyback transformers.
Background
Switched mode power supplies may be used to generate a Direct Current (DC) voltage from an Alternating Current (AC) voltage by switching the current through an energy storage element, such as a transformer. The duty cycle of the switch is controlled to regulate the output voltage to a desired level. Switched mode power supplies are generally effective under heavier loads, but are less efficient under lighter loads. Two common types of isolated switched mode power supplies are forward mode converters and flyback mode converters.
Flyback converters are common in AC voltage to DC voltage applications. Flyback converters are based on flyback transformers that alternately form flux in a magnetic core and transfer energy to an output. When the current is switched through the primary winding, the primary current in the transformer increases, thereby storing energy within the transformer. When the switch is open, the primary current in the transformer drops and the secondary current flows based on the energy stored in the magnetizing inductance labeled "Lm". When the secondary current flows, the primary voltage of the transformer is determined by the reflected output voltage. The secondary current may flow through an internal diode at a Synchronous Rectifier (SR) transistor even when the SR transistor is non-conductive. The controller varies the on-time and off-time of a primary switch in series with the primary winding to regulate the output voltage to a desired level.
Flyback converters may be configured to switch an additional reactive element in parallel with the primary winding using a topology known as Active Clamped Flyback (ACF). ACF converters can reduce electrical stress on components and improve efficiency by achieving near Zero Voltage Switching (ZVS) of the primary switch and producing a clean drain waveform without any ringing. They also allow for a soft increase in secondary current. However, although ACF converters have high efficiency at medium and heavy loads, their efficiency decreases at lighter loads due to continuous conduction losses from the magnetizing current that continuously circulates on the primary side of the transformer due to the additional reactive element. Furthermore, ACF converters are not typically used with other techniques that improve efficiency at light loads (such as cycle skipping and frequency flyback).
For example, battery powered consumer electronics remain smaller and more powerful, but this trend requires higher power, faster and smaller AC/DC chargers. For example, the Universal Serial Bus (USB) Power Delivery (PD) standard has begun to become increasingly popular between smart devices and laptop manufacturers. The USB PD standard allows higher power levels (up to 100 watts (W)) and adaptive output voltages to enable next generation battery powered electronics. However, existing power supply designs (such as ACF converters) cannot meet these new higher power delivery requirements while maintaining high efficiency and low cost.
Disclosure of Invention
A controller for a power converter having a flyback transformer with a primary winding switched by a primary-side transistor and a secondary winding switched by a secondary-side transistor, the controller comprising: a line voltage detection circuit to activate a high voltage line detection signal in response to detecting an input line voltage greater than a first threshold; a discontinuous conduction mode detection circuit to activate a discontinuous conduction mode signal in response to detecting that the controller is operating in a discontinuous conduction mode; and a switching controller coupled to the line voltage detection circuit and the discontinuous conduction mode detection circuit for controlling the primary side transistor and the secondary side transistor using local zero voltage switching in response to activation of the high voltage line detection signal and the discontinuous conduction mode signal, and otherwise controlling the primary side transistor and the secondary side transistor without using local zero voltage switching.
A power converter, the power converter comprising: a flyback transformer having a primary winding and a secondary winding; a primary side transistor coupled in series with the primary winding; a secondary side transistor coupled in series with the secondary winding; a controller, the controller comprising: a line voltage detection circuit to activate a high voltage line detection signal in response to detecting an input line voltage greater than a first threshold; a discontinuous conduction mode detection circuit to activate a discontinuous conduction mode signal in response to detecting that the controller is operating in a discontinuous conduction mode; and a switching controller coupled to the line voltage detection circuit and the discontinuous conduction mode detection circuit for controlling the primary side transistor and the secondary side transistor using local zero voltage switching in response to activation of the high voltage line detection signal and the discontinuous conduction mode signal, and otherwise controlling the primary side transistor and the secondary side transistor without using local zero voltage switching.
A method for selectively operating a power converter in a local zero voltage switching mode, the power converter having a flyback transformer with a primary winding switched by a primary side transistor and a secondary winding switched by a secondary side transistor, the method comprising: detecting an input line voltage; detecting an output voltage; detecting an operating mode of a control loop of the power converter; operating the control loop in the local zero voltage switching mode in response to detecting that the input line voltage is greater than a first threshold, detecting that the output voltage is greater than a second threshold, and detecting that the operating mode is a discontinuous conduction mode; and operating the control loop in another mode than the local zero voltage switching mode in response to at least one of: detecting that the input line voltage is less than the first threshold, detecting that the output voltage is less than the second threshold, and detecting that the operating mode is the discontinuous conduction mode.
Drawings
The present disclosure may be better understood, and its numerous features and advantages made apparent to those skilled in the art by referencing the accompanying drawings, wherein:
fig. 1 illustrates, in partial block diagram and partial schematic form, a flyback power converter using partial Zero Voltage Switching (ZVS) in accordance with one embodiment of the present disclosure;
fig. 2 shows a timing diagram illustrating a local ZVS technique used in the flyback power converter of fig. 1;
fig. 3 shows a flow chart useful in understanding the operation of the flyback power converter of fig. 1;
FIG. 4 illustrates, in partial block diagram and partial schematic form, a line voltage detection circuit for use in the secondary controller of FIG. 1 to determine whether a line voltage exceeds a first threshold;
FIG. 5 illustrates, in partial block diagram and partial schematic form, an output voltage detection circuit for use in the secondary controller of FIG. 1 to determine whether the output voltage exceeds a second threshold;
FIG. 6 shows, in partial block diagram and partial schematic form, a DCM detection circuit for use in the secondary controller of FIG. 1 to determine whether the converter is operating in DCM; and is
Fig. 7 illustrates, in block diagram form, a local ZVS decision circuit in accordance with one embodiment of the present disclosure.
The use of the same reference symbols in different drawings indicates the same or similar elements. Unless otherwise stated, the word "coupled" and its associated verb forms include both direct and indirect electrical connections by means known in the art; and unless otherwise indicated, any description of a direct connection also implies an alternative implementation using an indirect electrical connection of suitable form.
Detailed Description
Fig. 1 illustrates, in partial block diagram and partial schematic form, a flyback power converter 100 using partial Zero Voltage Switching (ZVS) in accordance with one embodiment of the present disclosure. Flyback power converter 100 generally includes an input section 110, a transformer 120, a primary switching circuit 130, an output circuit 140, a controller 150, a drive network 160, a voltage sense and supply circuit 170, a secondary side circuit 180, and a resistor 190.
The input portion 110 includes a fuse 111, a common mode choke 112, a diode bridge rectifier 113, a capacitor 114, an inductor 115, a capacitor 116, and a resistor 117. The input portion 110 receives an Alternating Current (AC) input voltage labeled "AC IN" at first and second terminals thereof connectable to, for example, an AC mains power supply. The fuse 111 has a first terminal connected to the first terminal of the input portion 110, and a second terminal. The common mode choke coil 112 has a first terminal connected to the second terminal of the fuse 111, a second terminal, a third terminal connected to the second terminal of the input portion 110, and a fourth terminal. The diode bridge 113 has a first input terminal connected to the second terminal of the common mode choke coil 112, a second input terminal connected to the fourth terminal of the common mode choke coil 112, a first output terminal, and a second output terminal connected to the primary ground. Capacitor 115 has a first terminal connected to the first output terminal of diode-bridge rectifier 113, and a second terminal connected to primary ground. The inductor 115 has a first terminal connected to the second terminal of the common mode choke coil 112, and a second terminal. Capacitor 116 has a first terminal connected to the second terminal of inductor 115, and a second terminal connected to the primary ground. Resistor 117 has a first terminal connected to the second terminal of inductor 115, and a second terminal.
The transformer 120 has a magnetic core 121, a primary winding 122, a secondary winding 123, and an auxiliary winding 124. The primary winding 122 has a first end connected to the second terminal of the inductor 115, and a second end, and has a number of turns NP. The secondary winding 123 has a first end and a second end and has a number of turns NS. The auxiliary winding 124 has a first end and a second end and has a number of turns NA。
The primary switching circuit 130 includes a transistor 131, a resistor 132, a diode 133, a capacitor 134, and a resistor 135. Transistor 131 is a high power, N-channel Metal Oxide Semiconductor (MOS) transistor having a gate, a source, and a drain connected to the second end of primary winding 122. Resistor 132 has a first terminal connected to the source of transistor 131, and a second terminal connected to primary ground. Diode 133 has an anode connected to the second end of primary winding 122, and a cathode. Capacitor 134 has a first terminal connected to the second terminal of inductor 115, and a second terminal connected to the anode of diode 133. Resistor 135 has a first terminal connected to the second terminal of inductor 115, and a second terminal connected to the anode of diode 133.
The output circuit 140 includes an output capacitor 141, a transistor 142, a bus capacitor 143, a resistor 144, a transistor 145, resistors 146 and 147, and a gate driver chip 148. Output capacitor 142 has a first terminal connected to a first end of secondary winding 123, and a second end connected to a secondary ground. Transistor 142 is an N-channel MOS transistor having a drain connected to the first end of secondary winding 123, a gate, and a source connected to the first output terminal of flyback power converter 100. The bus capacitor 143 has a first terminal connected to the source of the transistor 142 and to the first output terminal of the flyback power converter 100, and a second terminal connected to the second output terminal of the flyback power converter 100. Resistor 144 is a current sense resistor having a first terminal connected to the second terminal of bus capacitor 143 and to the second output terminal of flyback power converter 100, and a second terminal connected to the secondary ground. Transistor 145 is an N-channel MOS transistor having a gate, a drain connected to the second terminal of secondary winding 123, and a source connected to the secondary ground. Resistor 146 has a first terminal connected to the gate of transistor 145, and a second terminal, and has a value labeled "RG"associated resistance. Resistor 147 has a first terminal connected to the gate of transistor 142. The gate driver chip 148 has a serial data and address terminal labeled "SDA", a serial clock terminal labeled "SCL", and a gate drive output terminal connected to the second terminal of the resistor 147.
The controller 150 is an integrated primary and secondary flyback controller that includes a primary controller 151, a secondary controller 152, and an isolator 153. The primary controller 151 has a set of terminals including a high voltage terminal labeled "HV" connected to the second terminal of resistor 117, a primary voltage terminal labeled "VDDP" connected to the first end of the auxiliary winding of transformer 120, a voltage sense terminal labeled "VS", a primary current sense terminal labeled "CSP" connected to the first terminal of resistor 132, a primary ground terminal labeled "GNDP" connected to the primary ground, and a multi-function terminal labeled "SD/IMOD" connected to the first terminal of resistor 190.
The secondary controller 152 has a set of terminals including a DRAIN terminal labeled "DRAIN" connected to the second end of the secondary winding 123 of the transformer 120 and to the DRAIN of the transistor 145, an input voltage terminal labeled "VIN" connected to the first end of the secondary winding 123 of the transformer 120, a secondary gate drive terminal labeled "GATES" connected to the second terminal of the resistor 146, a supply voltage terminal labeled "VDDS", a serial data and feedback terminal labeled "SDA/FB", a serial clock and serial data signal labeled "SCL/SD", a secondary ground terminal labeled "GNDS", and a secondary current sense terminal labeled "CSS" connected to the first terminal of the resistor 144.
Isolator 153 provides a physical and electrical isolation gap between primary controller 151 and secondary controller 152. In order for secondary controller 152 to communicate switching phase information to primary controller 151, isolator 153 has one or more capacitors through which electrical signals can be communicated while maintaining galvanic isolation. As shown in fig. 1, isolator 153 has a first capacitor for transferring signals from secondary controller 152 to primary controller 151 and a second capacitor for transferring signals from primary controller 151 to secondary controller 152. In an exemplary embodiment, primary controller 151 and secondary controller 152 are implemented on separate semiconductor chips that are combined into a multi-chip module in a single integrated circuit package.
Driver network 160 includes resistors 161 and 162, and diode 163. The resistor 161 has a first terminal, and a second terminal connected to the gate of the transistor 131. Resistor 162 has a first terminal connected to the first terminal of resistor 161, and a second terminal. Diode 163 has a cathode connected to the second terminal of resistor 162, and an anode connected to the gate of transistor 131.
Voltage sensing and supply circuit 170 includes a diode 171, a capacitor 172, and resistors 173 and 174. Diode 171 has an anode connected to the first end of auxiliary winding 124, and a cathode. Capacitor 172 has a first terminal connected to the cathode of diode 171, and a second terminal connected to the primary ground. Resistor 173 has a first terminal connected to the first end of auxiliary winding 124, and a second terminal. Resistor 174 has a first terminal connected to the second terminal of resistor 173 and a second terminal connected to the primary ground.
The secondary side circuit 180 includes a capacitor 181, and resistors 182 and 183. Capacitor 181 has a first terminal connected to the VDDS terminal of controller 150, and a second terminal connected to the secondary ground. Resistor 182 has a first terminal connected to the VDDS terminal of controller 150 and a second terminal connected to the SDA/FB terminal of controller 150. Resistor 183 has a first terminal connected to the VDDS terminal of controller 150 and a second terminal connected to the SCL/SD terminal of controller 150.
Resistor 190 has a first terminal connected to the SD/IMOD terminal of controller 150, and a second terminal connected to primary ground. In the illustrated embodiment, resistor 190 is a Negative Temperature Coefficient (NTC) resistor and flyback power converter 100 is used for a thermal shutdown function.
In operation, flyback power converter 100 converts a smoothed input voltage from an AC source to a DC voltage. The input section 110 receives an AC IN signal, rectifies and filters the AC IN signal. The common mode choke 112 filters the AC IN signal to remove high frequency noise. The diode bridge rectifier 113 converts the AC IN sine wave to a full wave rectified sine wave. The capacitors 114 and 116 and the inductor 115 together form a pi-filter for smoothing the ripple in the full-wave rectified sine wave and presenting a smoothed low ripple voltage at the first end of the primary winding 122.
Transformer 120 is based on turns ratio NS/NPConverting the voltage on primary winding 122 to a voltage on secondary winding 123, where NSIs the number of turns on secondary winding 123, and NPIs the number of turns on the primary winding 122. Likewise, transformer 120 is based on a turns ratio NA/NPConvert the voltage on the primary winding 122 to a voltage on the auxiliary winding 124, where NAIs the number of turns on the auxiliary winding 124.
The flyback power converter 100 switches the smoothed rectified voltage at the first end of the primary winding 122 using a transistor 131 connected to the second end of the primary winding 122. The primary controller 151 switches the transistor 131 by providing a driving signal GATEP through a network including resistors 161 and 162 and a diode 163. Resistor 132 senses the primary side current and provides a current sense signal to the CSP terminal of primary controller 151. Primary controller 151 then provides information about the primary current to secondary controller 152 through isolator 153 as part of a constant current, constant voltage ("CC/CV") control loop. The primary controller 151 receives initial power on the HV pin from the input line through resistor 117 and after the transformer 120 begins switching from the auxiliary winding 124 through the voltage sense and supply circuit 170. The voltage sense and supply circuit 170 also provides an indication of the line voltage on the VS terminal.
On the secondary side, the gate driver chip 148 enables and disables the output voltage by turning on or off the transistor 142. The gate driver chip 148 communicates with the secondary controller 152 using a 2-wire serial link using pins SDA (serial data and address) and SCL (serial clock). The secondary controller 152 derives operating power from the VIN pin and charges the capacitor 181 through the VDDS pin to smooth the internal supply voltage. The secondary controller 152 uses the DRAIN input to sense the voltage at the DRAIN of the transistor 145 and this voltage provides polarity information for the primary-side and secondary-side switching decisions. The secondary controller 152 also senses the secondary current using the CSS input and controls the conductive state of the transistor 145 using the GATES pin.
The flyback power converter 100 uses a technique known as local Zero Voltage Switching (ZVS). As used herein, "local zero voltage switching" and "local ZVS" means that the controller implements ZVS only within a portion of its operating range. As will be described more fully below, flyback power converter 100 performs ZVS when the line voltage is relatively high, when the output voltage is relatively high, and when flyback power converter 100 operates in Discontinuous Conduction Mode (DCM). If any of these three conditions is not met, it operates without using ZVS. In other embodiments, different local ZVS control schemes may also be used, such as high voltage line and DCM, or high output voltage and DCM.
When in ZVS mode, flyback power converter 100 activates transistor 145 a second time to control the ZVS time. After turning off the transistor 145, the secondary controller 152 detects the valley of the drain voltage of the primary transistor and then activates the secondary transistor again for a predetermined amount of time based on the CV/CS control loop to create a negative current in the magnetizing inductance on the primary winding of the transformer. This additional current is then sufficient to charge the output capacitance C of the transistor 131OSSFully discharged, thereby ensuring more energy stored in the reactive element is recycled and resulting in higher converter efficiency.
COSSIs the output capacitance of the transistor and is equal to the sum of the drain-to-source capacitance (Cds) and the gate-to-drain capacitance (Cgd) plus the stray capacitance at the primary winding 122 of the transformer 120 in the flyback power converter 100. Transistor 131 is a high power MOS transistor and has a large C that stores energy during switchingOSS. As will be explained more fully below, controller 150 passes a second consideration COSSAnd selectively activating secondary transistor 145 to more fully complete C of transistor 131OSSDischarging and thus achieving true ZVS, thereby achieving better switching efficiency during ZVS operation.
The controller 150 includes both a primary side controller and a secondary side controller integrated in a single integrated circuit package, with the primary and secondary controllers communicating through an isolator. Controlling two FETs with a single IC (with the CC/CV loop implemented on the secondary side) can be used to implement the local ZVS technique. The secondary controller 152 uses the isolator 153 to transmit the switching timing to the primary side.
Fig. 2 shows a timing diagram 200 illustrating a local ZVS technique used in the flyback power converter 100 of fig. 1. In the timing diagram 200, the horizontal axis represents time in microseconds (μ s), and the vertical axis represents the amplitude of each signal in volts. Waveforms for seven signals of interest are shown in timing diagram 200, including a primary Gate waveform 210 labeled "Pri _ Gate", a secondary Gate waveform 220 labeled "SR _ Gate", a primary Drain waveform 230 labeled "Pri _ Drain", a secondary Drain waveform 240 labeled "SR _ Drain", a valley detection waveform 250 labeled "SR _ NVW", a constant current, a constant voltage regulation loop trigger waveform 260 labeled "CC/CV _ Pulse", and a primary regulation loop trigger waveform 230 labeled "Pri _ Pulse _ OUT". Also shown in timing diagram 200 are five time points of interest, labeled "t1”、“t2”、“t3”、“t4", and" t5”。
The sequence starts with the activation of the Pri _ Gate signal. Transistor 131 is turned on and current flows through primary winding 122 causing transformer 120 to accumulate flux in its magnetic core. The Pri _ Drain signal drops to about zero volts, which corresponds to the voltage of the primary ground signal. At this time, the SR _ Drain signal rises to a level corresponding to the line voltage (i.e., the voltage at the first end of the primary winding 122). The three other control signals SR _ NVW, CC/CV _ Pulse, and Pri _ Pulse _ OUT shown in FIG. 2 are all inactive.
At time t1Here, the primary controller 151 deactivates the Pri _ Gate signal, causing the transistor 131 to become non-conductive. At time t1After a nearby transient peak, the Pri _ Drain signal settles at a value corresponding to the rectified line voltage. At t1A short delay thereafter, the secondary controller 152 detects the turn off of transistor 131 by sensing the SR _ Drain voltage falling below the secondary ground. Sound boxIn response to detecting a polarity reversal of the internal diode, the secondary controller 152 activates the SR Gate signal, causing the transistor 145 (synchronous rectifier transistor) to become conductive and transfer energy from the core of the transformer to the load. The secondary controller 152 keeps the SR _ Gate signal active until time t2When it detects that the secondary side current has discharged to zero.
At t2At this point, the secondary controller 152 deactivates the SR _ Gate signal. Subsequently, the voltage on the Pri _ Drain signal is coupled to the output capacitor COSSThe magnetizing inductance (labeled "Lm") of the parallel connected transformer 120 starts to resonate. The capacitor 134 and the resistor 135 operate as a buffer circuit. When the transistor 131 is turned off, the leakage inductance produces a voltage peak when combined with the drain-to-source capacitance of the transistor 131. When the voltage peak is greater than the line voltage, the turns ratio N times the sum of the output voltage labeled "VOUT" and the voltage across capacitor 134, diode 133 turns on and the voltage peak is limited by the voltage across capacitor 134. The SR _ Drain signal resonates with opposite polarity. During this time, the secondary controller 152 senses resonance by: the SR _ Drain signal is compared to a relatively low threshold voltage and the SR _ NVW signal is activated when the SR _ Drain signal is below a low threshold voltage.
At time t3Here, the secondary controller 152 activates CC/CV _ Pulse according to its constant current/constant voltage control loop. If the SR _ Drain signal is also in the valley as indicated by the SR _ NVW signal, the secondary controller 152 activates the SR _ Gate signal a second time and causes it to be at time t3And t4Keep up to standard activity and record as "TZVS"time of day. Will TZVSThe setting to an appropriate value will be further explained below. T isZVSMay be, for example, 1 microsecond (1 mus).
The second activation of the SR _ Gate signal induces a negative current in the magnetizing inductance Lm, and this negative current is then induced in transistor 145 at time t4And t5Is deactivated again and continuously marked as TDELAYAfter an amount of time, let COSSAnd (4) discharging. At time t4After that, the voltage on Pri Drain starts to resonate downwards,and the voltage on SR _ Drain begins to resonate upward. Once the voltage of Pri _ Drain reaches a minimum value (i.e., a valley), secondary controller 152 sends a signal to primary controller 151 to activate transistor 131, which occurs at t5And another cycle begins.
To achieve precise ZVS times, T may be adjustedZVSTo establish a sufficient negative current in the magnetizing inductance Lm to cause C of the transistor 131 before the next switching cycleOSSAnd (4) discharging. T isZVSThe arrangement may be as follows. First, C is determinedOSSNegative current I required for discharging to zeroPN. Then based on IPNThe amount of time required to activate transistor 145 a second time is determined.
To make COSSFully discharged, the energy of the magnetizing inductance must be equal to the energy stored in COSSThe energy in (1):
ELm.N＝ECOSS [1]
will equation [1]Expansion and substitution of magnetizing inductance L with formulamEnergy and C inOSSTo obtain:
Figure BDA0002736161100000091
to IPNSolving to obtain:
Figure BDA0002736161100000092
however:
Figure BDA0002736161100000093
substituting equation [3] to the left of equation [4] yields:
Figure BDA0002736161100000094
thus:
Figure BDA0002736161100000101
TZVScan be preset, such as by design, at measurement COSSLater during final testing, by programming fuse settings, or otherwise programming or setting to match specific system parameters. T isZVSThe value of (c) affects the available switching frequency. With VINAnd COSSIncrease, TZVSBut also increases the switching period and thus decreases the switching frequency.
Fig. 3 shows a flow chart 300 useful in understanding the operation of the flyback power converter 100 of fig. 1. In operation block 310, the secondary controller 152 detects the line input voltage. In operation block 320, the secondary controller 152 detects the output voltage. In operation block 330, the secondary controller 152 detects the operating mode. For example, during a heavy duty cycle requiring a high power output, the secondary controller 152 controls the primary controller 151 to operate the transistor 131 at a sufficiently fast rate such that the transformer 120 does not fully discharge the magnetizing inductance before another switching cycle begins. This mode is referred to as Continuous Conduction Mode (CCM). On the other hand, during light load periods (where it is important to provide high efficiency while delivering low total power), the secondary controller 152 controls the primary controller 151 to operate the transistor 131 to fully discharge the magnetizing inductance before the start of another switching period. This mode is called Discontinuous Conduction Mode (DCM). In decision block 340, the secondary controller 152 determines whether the input voltage is greater than the flag "TH1"whether the output voltage is greater than a first threshold value marked as" TH2"and whether the converter is operating in DCM. If so, flow proceeds to operation block 350 where the secondary controller 152 operates in ZVS mode. If not, flow continues to operation block 360 where the secondary controller 152 continues to operate without using zero voltage switching.
Fig. 4 illustrates, in partial block diagram and partial schematic form, a line voltage detection circuit 400 for use in the secondary controller 152 of fig. 1 to determine whether a line voltage exceeds a first threshold. Line voltage detection circuit 400 generally includes a drain voltage detection circuit 410, an output voltage detection circuit 420, a threshold voltage generation circuit 430, a comparator 440, and an output latch 450.
The drain voltage detection circuit 410 includes a current amplifier 411, resistors 412 and 413, and a diode 414. Current amplifier 411 has a first input terminal connected to the DRAIN terminal of secondary controller 152, a second input terminal, a first output terminal labeled "BIAS", and a second output terminal. Resistor 412 has a first terminal connected to the second input terminal of current amplifier 411, and a second terminal connected to the secondary ground. Resistor 413 has a first terminal connected to the second output terminal of current amplifier 411, and a second terminal connected to the secondary ground. Diode 414 has an anode connected to the second output terminal of current amplifier 411, and a cathode connected to the first output terminal of current amplifier 411.
The output voltage detection circuit 420 includes a current amplifier 421, a resistor 422, and a diode 423. Current amplifier 421 has a first input terminal connected to the VOUT terminal of secondary controller 152, a second input terminal, a first output terminal connected to the second output terminal of current amplifier 411, and a second output terminal connected to secondary ground. Resistor 422 has a first terminal connected to the second input terminal of current amplifier 421, and a second terminal connected to the secondary ground. Diode 423 has an anode connected to the secondary ground and a cathode connected to a first output terminal of current amplifier 421.
The threshold voltage generation circuit 430 includes a voltage source 431, a current amplifier 432, resistors 433 and 434, a diode 435, a switch 436, and a resistor 437. Voltage source 431 provides a voltage labeled "VTrim" measured relative to the secondary ground voltage. In the example shown in fig. 4, VTrim is equal to 590 millivolts. Current amplifier 432 has a first input terminal connected to voltage source 431 for receiving VTrim, a second input terminal, a first output terminal connected to the BIAS terminal, and a second output terminal. Resistor 433 has a first terminal connected to the second input terminal of current amplifier 432 and a second terminal connected to the secondary ground. Resistor 434 has a first terminal connected to the second output terminal of current amplifier 432 and a second terminal connected to the secondary ground. Diode 435 has an anode connected to the second output terminal of current amplifier 432 and a cathode connected to the first output terminal of current amplifier 432. Switch 436 has a first terminal connected to the second output terminal of current amplifier 432, a second terminal, and a control terminal for receiving a signal labeled "HI _ LINE". Resistor 437 has a first terminal connected to the second terminal of switch 436, and a second terminal connected to secondary ground.
The comparator 440 has a positive input terminal connected to the second current output terminal of the current amplifier 411, a negative input terminal connected to the output terminal of the threshold voltage generation circuit 430, and a true output terminal.
Output latch 450 is a clocked D-type latch having a D input connected to the true output terminal of comparator 440, a clock input for receiving a signal labeled "TURN ON all", a reset input for receiving a signal labeled "Pulse _ out", a complementary set input for receiving the Pulse _ out signal, and a true output connected to the control input of switch 436 for providing the HI _ LINE signal.
In operation, the secondary controller 152 of fig. 1 uses the line voltage detection circuit 400 to determine whether the line voltage is high, as determined by whether the line voltage exceeds a first threshold. It depends on the characteristics of the flyback voltage converter, i.e. the voltage on the drain of the synchronous rectifier transistor is proportional to the primary voltage during the forward phase. Thus, all control may advantageously take place on the secondary side, and the secondary controller 152 may provide appropriate switching information to the primary controller 151.
Specifically, DRAIN voltage detection circuit 410 uses the voltage of the DRAIN signal to establish a current through the input side of current amplifier 411 by an amount equal to the voltage of the DRAIN signal divided by the resistance of resistor 412. Current amplifier 411 conducts current through its output side according to current gain "K1". Thus, the voltage at the output of the drain voltage detection circuit 410 is represented at the first terminal of the resistor 413 as:
Figure BDA0002736161100000121
wherein
Figure BDA0002736161100000122
Is the ratio of the primary turns to the secondary turns. If R is412＝R422＝R413And K is411＝K421And then:
Figure BDA0002736161100000123
and:
Figure BDA0002736161100000124
when V is413≥V434The HI _ LINE condition is detected, and therefore the HI _ LINE condition is detected from:
Figure BDA0002736161100000125
if K is3＝K1And then:
Figure BDA0002736161100000126
it should be noted that V can be adjusted in a variety of waysTrimSuch as through internal trimming options or through the use of external integrated circuit terminals. If external terminals are used, external impedance may be used to adjust VTrim。
Fig. 5 illustrates, in partial block diagram and partial schematic form, an output voltage detection circuit 500 for use in the secondary controller 152 of fig. 1 to determine whether the output voltage exceeds a second threshold. The output voltage detection circuit 500 generally includes a voltage divider 510, a high output voltage detection circuit 520, a low output voltage detection circuit 530, a latch 540, and an OR gate 550.
The voltage divider 510 includes resistors 511 and 512. Resistor 511 has a first terminal for receiving VOUT, and a second terminal. Resistor 512 has a first terminal connected to the second terminal of resistor 511, and a second terminal connected to the secondary ground.
The high output voltage detection circuit 520 includes resistors 521 and 522, and a comparator 523. Resistor 521 has a first terminal for receiving a signal labeled "BIAS", and a second terminal. Resistor 522 has a first terminal connected to the second terminal of resistor 521, and a second terminal connected to the secondary ground. The comparator 523 has a positive input terminal connected to the output terminal of the voltage divider 510, a negative input terminal connected to the second terminal of the resistor 521, and a true output terminal.
The low output voltage detection circuit 530 includes resistors 531 and 532, and a comparator 533. Resistor 531 has a first terminal for receiving the BIAS signal and a second terminal. Resistor 532 has a first terminal connected to the second terminal of resistor 531 and a second terminal connected to the secondary ground. The comparator 533 has a positive input terminal connected to the second terminal of the resistor 531, a negative input terminal connected to the second terminal of the voltage divider 510, and a true output terminal.
Latch 540 is an SR latch having a set input labeled "S" connected to the true output of comparator 523, a reset input labeled "R" connected to the true output of comparator 533, and a true output labeled "Q".
The OR gate 550 has a first input for receiving a signal labeled EXT _ CTL, a second input connected to the Q output of the latch 540, and an output for providing the HI _ LINE signal.
In operation, the output voltage detection circuit 500 determines whether the output voltage VOUT is relatively high, i.e., above a threshold. The voltage divider 510 initially scales VOUT to a lower voltage more suitable for evaluation by CMOS logic. Output voltage detection circuit 520 determines whether the scaled voltage is above a high threshold and, if so, sets latch 540. Likewise, the low output voltage detection circuit 530 determines whether the scaled voltage is less than a low threshold, wherein the low threshold is lower than a high threshold, and if so, resets the latch 540. Thus, the combination of the high output voltage detection circuit 520, the low output voltage detection circuit 530, and the latch 540 establishes a hysteresis on the high voltage detection operation to ensure stability in the presence of noise and disturbances to VOUT caused by, for example, switching transients in the load. Output voltage detection circuit 500 includes an OR gate 550 so that the HI _ VOUT condition may be disabled by external control. In particular, if EXT _ CTL is high, HI _ VOUT is high regardless of the level of VOUT, so the level of VOUT does not determine whether flyback power converter 100 is operating in ZVS mode.
Entering ZVS mode based on HI _ VOUT helps avoid extending the operating switching frequency of controller 150 while in ZVS mode. In particular, due to TZVSIs fixed, so at low VOUT, the negative magnetizing current built up will not be large enough for C to beOSSDischarge to an acceptable voltage level. Therefore, ZVS is disabled when VOUT is relatively low. In one specific example, when VOUT>At 5 volts, HI _ VOUT may be detected.
Fig. 6 shows a timing diagram 600 describing the operation of a DCM detection circuit (not shown) that controller 150 of fig. 1 uses to detect whether it is operating in DCM mode. In timing diagram 600, the horizontal axis represents time in microseconds (μ s), and the vertical axis represents the amplitude of each signal in volts. Waveforms for four signals of interest are shown IN timing diagram 600, including a Pri _ Gate waveform 610, a first SR _ Gate waveform 620, a second SR _ Gate waveform 630, and a control Pulse signal labeled "Pulse _ IN".
As shown in fig. 6, the first Pri _ Gate pulse occurs shortly after the end of the SR _ Gate _ B pulse of the previous cycle, and the controller 150 provides the main SR _ Gate pulse shortly after the end of the first Pri _ Gate pulse. The controller 150 activates the Pulse _ IN signal (corresponding to the CC/CV _ Pulse signal IN fig. 2) to begin another switching cycle. When operating IN Continuous Conduction Mode (CCM), for example, at medium or heavy load, the controller 150 activates the Pulse _ IN signal before the end of the SR _ Gate Pulse plus a hysteresis period after the SR _ Gate Pulse becomes inactive. Fig. 6 illustrates this operation in the dashed box labeled "CCM operating region" where the positions of the two possible pulses would cause the flyback converter 100 to operate in CCM mode. When operating IN DCM, for example, under light load, the controller 150 activates the Pulse IN signal after the end of the SR Gate Pulse plus a hysteresis period. Fig. 6 shows this operation in a dashed box labeled "DCM operation zone", where the positions of possible pulses indicate operation in DCM mode.
Controller 150 implements the DCM detection circuit as a CMOS logic circuit that detects whether the Pulse _ IN signal is activated before or after the deactivation of the SR _ Gate Pulse plus a hysteresis period. If the Pulse _ IN signal occurs IN the DCM operating region and the other conditions of ZVS are met, the controller 150 activates the transistor 145 a second time, as shown IN FIG. 6 by the activation of the SR _ Gate _ B signal.
Fig. 7 illustrates, in block diagram form, a local ZVS decision circuit 700 in accordance with one embodiment of the present disclosure. The local ZVS decision circuit 700 includes a line voltage detection circuit 710, an output voltage detection circuit 720, a DCM detection circuit 730, and an and gate 740. LINE voltage detect circuit 710 has an output for providing the HI _ LINE signal and may be implemented with LINE voltage detect circuit 400 of fig. 4 or any other suitable circuit that detects whether the LINE voltage is above the first threshold. Output voltage detection circuit 720 has an output terminal for providing the HI _ VOUT signal and may be implemented with voltage detection circuit 720 of fig. 5 or any other suitable circuit that detects an output voltage above the second threshold. The DCM detection circuit has an output for providing a signal labeled "DCM MODE" and may be implemented with any suitable circuit that detects whether the flyback power converter 100 operates in DCM MODE, such as a circuit that performs the detection shown in fig. 6. And gate 740 has a first terminal connected to the output of line voltage detection circuit 710, a second input connected to the output of output voltage detection circuit 720, a third output connected to the output of DCM detection circuit 730, and an output for providing a control signal labeled "ZVS _ EN". ZVS _ EN serves as an indication that controller 150 is turning on transistor 145 a second time to establish the required negative current in Lm, before secondary controller 152 sends a signal to primary controller 151 to turn on transistor 131. Controller 150 responds to activation of the ZVS _ EN signal to perform ZVS valley switching as described above with respect to fig. 2.
Thus, a flyback power converter using a local ZVS technique and a controller and various circuits in the controller for implementing the technique have been described. This technique is referred to as local ZVS because it operates in ZVS only according to operating conditions. Operating conditions for implementing the ZVS technique include operation in DCM, operation with high line voltage, and operation with high output voltage. When using this ZVS technique, the synchronous rectifier transistor is activated as is typical until the drain voltage decays to zero volts, but then activated a second time to produce a negative current through the magnetizing inductance that can be used to make the output capacitance (C) of the switching transistor on the primary side of the transformer (ZVS)OSS) And (4) completely discharging.
The disclosed local ZVS technique is advantageously implemented by control on the secondary side of the transformer. For example, the line voltage may be detected using the voltage on the drain of the synchronous rectifier transistor, since the magnitude of the drain voltage reflects the line voltage at the first end of the primary winding when the switching transistor on the primary side of the transformer is turned on. Furthermore, the output voltage can be easily and directly detected by the secondary controller. In some embodiments, the primary and secondary controllers may be implemented using separate semiconductor chips combined in a multi-chip module using a single integrated circuit package. In this case, the isolator may be used to maintain galvanic isolation between the primary-side circuit and the secondary-side circuit, but allow communication of switching signals therebetween.
By using the disclosed local ZVS technique, it is believed that the controller 150 can meet the high power density, high switching frequency, high efficiency, and electromagnetic compatibility (EMC) standards required by emerging USB Power Delivery (PD) standards while maintaining a low cost for applications such as AC/DC chargers.
The above-disclosed subject matter is to be considered illustrative, and not restrictive, and the appended claims are intended to cover all such modifications, enhancements, and other embodiments, which fall within the true scope of the claims. For example, the local ZVS technique determines whether the converter is operating in DCM, whether the line (input) voltage is above a first threshold, and whether the output voltage is above a second threshold. If so, it operates in ZVS mode. In other embodiments, if the converter is operating in DCM and the line voltage is above the first threshold, ZVS mode is entered regardless of whether the output voltage is above the second threshold. In other embodiments, if the converter is operating in DCM and the output voltage is above the second threshold, ZVS mode is entered regardless of whether the line voltage is above the first threshold. In the illustrated embodiment, certain circuits are described to use signals available to the secondary controller to determine whether these conditions are met, but in other embodiments other circuits performing the same function may be used.
In one form, a controller is provided for a power converter having a flyback transformer with a primary winding switched by a primary side transistor and a secondary winding switched by a secondary side transistor. According to one aspect, the controller sets the trim voltage for use in the line voltage detection circuit according to the following equation:
Figure BDA0002736161100000151
wherein VTrimIs a trimming voltage, VLineIs the voltage threshold of the high-voltage line, n is the turn ratio of the flyback transformer, R5Is a resistor in series with the input current source, and R6Is connected in series with an output current sourceA resistor.
According to another aspect, the controller further comprises an output voltage detection circuit for activating the high output voltage detection signal in response to detecting that the output voltage across the secondary winding is greater than a second threshold. In this case, the output voltage detection circuit may include: a resistor ladder (resistor ladder) having an input for receiving an output voltage and an output for providing a scaled output voltage signal as a predetermined fraction of the output voltage; a high output voltage signal detection circuit for activating a high output voltage signal in response to the scaled output voltage signal being greater than a third threshold; a low output voltage signal detection circuit to activate a low output voltage signal in response to the scaled output voltage signal being less than a fourth threshold, wherein the fourth threshold is lower than the third threshold; and a latch having a set input for receiving the high output voltage signal, a reset input for receiving the low output voltage signal, and an output for providing the high output voltage detection signal.
In another form, a power converter includes: a flyback transformer having a primary winding and a secondary winding; a primary side transistor coupled in series with the primary winding; a secondary side transistor coupled in series with the secondary winding; and a controller including a line voltage detection circuit, a discontinuous conduction mode detection circuit, and a switching controller. According to one aspect, a controller may include: a drain voltage detection circuit for providing a drain voltage sensing signal proportional to a voltage of a drain of the turned-on secondary side transistor; an output voltage detection circuit for providing an output voltage sense signal proportional to the output voltage of the power converter; and a comparator for comparing a difference between the drain voltage sense signal and the output voltage sense signal with a second threshold, wherein the line voltage detection circuit provides the high voltage line detection signal in response to the comparator detecting that the difference is greater than the second threshold. In this case, the line voltage detection circuit may further include a threshold voltage generation circuit having an input for receiving the trim voltage, and an output for providing a second threshold value according to the high voltage line voltage threshold value and the turn ratio of the flyback transformer. Further, if so, the controller may set the trim voltage according to the following equation:
Figure BDA0002736161100000161
wherein VTrimIs a trimming voltage, VLineIs the voltage threshold of the high-voltage line, n is the turn ratio of the flyback transformer, R5Is a resistor in series with the input current source, and R6Is a resistor in series with the output current source.
According to another aspect, the discontinuous conduction mode detection circuit detects that the controller is operating in the discontinuous conduction mode in response to: no overlap of the detection of a trigger pulse by the controller for activating a primary gate drive signal to the primary side transistor in response to the control loop with a first activation of a secondary gate drive signal to the secondary side transistor after deactivation of a previous primary side gate drive signal.
According to yet another aspect, the controller further comprises an output voltage detection circuit for activating the high output voltage detection signal in response to detecting that the output voltage across the secondary winding is greater than a second threshold. In this case, the output voltage detection circuit may include: a resistor ladder having an input for receiving an output voltage and an output for providing a scaled output voltage signal as a predetermined portion of the output voltage; a high output voltage signal detection circuit for activating a high output voltage signal in response to the scaled output voltage signal being greater than a third threshold; a low output voltage signal detection circuit to activate a low output voltage signal in response to the scaled output voltage signal being less than a fourth threshold, wherein the fourth threshold is lower than the third threshold; and a latch having a set input for receiving the high output voltage signal, a reset input for receiving the low output voltage signal, and an output for providing the high output voltage detection signal.
According to yet another aspect, a controller is formed in a single integrated circuit package and has a primary controller and a secondary controller, wherein the secondary controller is galvanically isolated from and communicatively coupled to the primary controller.
In yet another form there is provided a method for selectively operating a power converter in a local zero voltage switching mode, the power converter having a flyback transformer with a primary winding switched by a primary side transistor and a secondary winding switched by a secondary side transistor. The method comprises detecting an input line voltage, detecting an output voltage, detecting an operation mode of a control loop of the power converter; operating the control loop in a local zero voltage switching mode in response to detecting that the input line voltage is greater than a first threshold, detecting that the output voltage is greater than a second threshold, and detecting that the operating mode is a discontinuous conduction mode; and operating the control loop in another mode other than the local zero voltage switching mode in response to at least one of: detecting that the input line voltage is less than a first threshold, detecting that the output voltage is less than a second threshold, and detecting that the mode of operation is a discontinuous conduction mode.
According to one aspect, the method further comprises setting the predetermined time based on an output capacitance of the primary side transistor and a desired output voltage.
According to another aspect, the method further comprises setting the predetermined time further based on a magnetizing inductance and a turn ratio of the flyback transformer.
Thus, to the maximum extent allowed by law, the scope of the present invention is to be determined by the broadest permissible interpretation of the following claims and their equivalents, and shall not be restricted or limited by the foregoing detailed description.

Claims (10)

1. A controller for a power converter having a flyback transformer with a primary winding switched by a primary-side transistor and a secondary winding switched by a secondary-side transistor, the controller comprising:
a line voltage detection circuit to activate a high voltage line detection signal in response to detecting an input line voltage greater than a first threshold;
a discontinuous conduction mode detection circuit to activate a discontinuous conduction mode signal in response to detecting that the controller is operating in a discontinuous conduction mode; and
a switching controller coupled to the line voltage detection circuit and the discontinuous conduction mode detection circuit for controlling the primary side transistor and the secondary side transistor using local zero voltage switching in response to activation of the high voltage line detection signal and the discontinuous conduction mode signal, and otherwise controlling the primary side transistor and the secondary side transistor without using local zero voltage switching.
2. The controller of claim 1, wherein the line voltage detection circuit comprises:
a drain voltage detection circuit for providing a drain voltage sense signal proportional to a voltage of a drain of the secondary side transistor that is turned on;
an output voltage detection circuit for providing an output voltage sense signal proportional to an output voltage of the power converter; and
a comparator for comparing a difference between the drain voltage sense signal and the output voltage sense signal with a second threshold,
wherein the line voltage detection circuit provides the high voltage line detection signal in response to the comparator detecting that the difference is greater than the second threshold.
3. The controller of claim 2, wherein the line voltage detection circuit further comprises:
a threshold voltage generation circuit having an input for receiving a trim voltage and an output for providing the second threshold in accordance with a high line voltage threshold and a turn ratio of the flyback transformer.
4. The controller of claim 1, wherein the discontinuous conduction mode detection circuit detects that the controller is operating in the discontinuous conduction mode in response to: detecting that a trigger pulse of the controller for activating a primary gate drive signal to the primary side transistor in response to a control loop does not overlap a first activation of a secondary gate drive signal to the secondary side transistor after deactivating a previous primary side gate drive signal.
5. The controller of claim 1, further comprising:
an output voltage detection circuit for activating a high output voltage detection signal in response to detecting that the output voltage across the secondary winding is greater than a second threshold value,
wherein the switching controller is further coupled to the output voltage detection circuit and controls the primary side transistor and the secondary side transistor using local zero voltage switching in response to activation of the high voltage line detection signal, the discontinuous conduction mode signal, and the high output voltage detection signal, and otherwise controls the primary side transistor and the secondary side transistor without using local zero voltage switching.
6. The controller of claim 1, wherein:
the controller is formed in a single integrated circuit package and has a primary controller and a secondary controller, wherein the secondary controller is galvanically isolated from and communicatively coupled to the primary controller.
7. A power converter, the power converter comprising:
a flyback transformer having a primary winding and a secondary winding;
a primary side transistor coupled in series with the primary winding;
a secondary side transistor coupled in series with the secondary winding;
a controller, the controller comprising:
a line voltage detection circuit to activate a high voltage line detection signal in response to detecting an input line voltage greater than a first threshold;
a discontinuous conduction mode detection circuit to activate a discontinuous conduction mode signal in response to detecting that the controller is operating in a discontinuous conduction mode; and
a switching controller coupled to the line voltage detection circuit and the discontinuous conduction mode detection circuit for controlling the primary side transistor and the secondary side transistor using local zero voltage switching in response to activation of the high voltage line detection signal and the discontinuous conduction mode signal, and otherwise controlling the primary side transistor and the secondary side transistor without using local zero voltage switching.
8. The power converter of claim 7, the controller further comprising:
an output voltage detection circuit for activating a high output voltage detection signal in response to detecting that the output voltage across the secondary winding is greater than a second threshold value,
wherein the switching controller is further coupled to the output voltage detection circuit and controls the primary side transistor and the secondary side transistor using local zero voltage switching in response to activation of the high voltage line detection signal, the discontinuous conduction mode signal, and the high output voltage detection signal, and otherwise controls the primary side transistor and the secondary side transistor without using local zero voltage switching.
9. A method for selectively operating a power converter in a local zero voltage switching mode, the power converter having a flyback transformer with a primary winding switched by a primary side transistor and a secondary winding switched by a secondary side transistor, the method comprising:
detecting an input line voltage;
detecting an output voltage;
detecting an operating mode of a control loop of the power converter;
operating the control loop in the local zero voltage switching mode in response to detecting that the input line voltage is greater than a first threshold, detecting that the output voltage is greater than a second threshold, and detecting that the operating mode is a discontinuous conduction mode; and
operating the control loop in another mode than the local zero voltage switching mode in response to at least one of: detecting that the input line voltage is less than the first threshold, detecting that the output voltage is less than the second threshold, and detecting that the operating mode is the discontinuous conduction mode.
10. The method of claim 9, wherein the operating the control loop in the local zero voltage switching mode comprises:
deactivating the primary side transistor;
activating the secondary side transistor after said deactivating the primary side transistor;
deactivating the secondary-side transistor when a secondary-side current generated in response to the activation discharges to zero;
generating a trigger pulse using valley switching in response to a secondary side control loop after said deactivating the secondary side transistor;
activating the secondary side transistor in response to the generating the trigger pulse and deactivating the secondary side transistor at the end of a predetermined time thereafter; and
the primary-side transistor is then activated in response to the drain voltage of the secondary-side transistor reaching a valley.
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Application publication date: 20210423