CN112688788A - Discrete PD circuit and power supply system - Google Patents
Discrete PD circuit and power supply system Download PDFInfo
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- CN112688788A CN112688788A CN202011492754.5A CN202011492754A CN112688788A CN 112688788 A CN112688788 A CN 112688788A CN 202011492754 A CN202011492754 A CN 202011492754A CN 112688788 A CN112688788 A CN 112688788A
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Abstract
The invention relates to the technical field of POE power supply, and discloses a discrete PD circuit and a power supply system, wherein the discrete PD circuit comprises a detection circuit, a classification circuit and a power supply circuit; the first end of the detection circuit is connected with the positive electrode of the power supply, and the second end of the detection circuit is connected with the negative electrode of the power supply; the first end of the grading circuit is connected with the power supply anode, and the second end of the grading circuit is connected with the power supply cathode; the first end of the power supply circuit is connected with the positive power supply electrode, and the second end of the power supply circuit is connected with the negative power supply electrode. The discrete PD circuit and the power supply system provided by the embodiment of the invention can support wide voltage input, avoid the use of a special function integrated PD chip and reduce the power supply cost of the dual-standard POE.
Description
Technical Field
The invention relates to the technical field of POE (power over Ethernet), in particular to a discrete PD (passive Power) circuit and a power supply system.
Background
At present, in a POE (Power Over Ethernet ) Power supply system, IEEE Std 802.3 standard requires that a PD terminal voltage input range is 36V to 57V, and a traditional integrated PD (Powered devices) chip is designed according to the standard, but with the change of engineering application, 24V non-standard POE Power supply is also changed into a mainstream Power supply requirement, and more products are required to support dual-standard (standard/non-standard) POE Power supply. However, the full power requirements cannot be achieved using only a single conventional integrated PD chip.
In the prior art, the integrated PD chip with a special function (for example, the integrated PD chip with an APD function) is required to realize the dual-standard POE power supply, which is relatively high in cost.
Disclosure of Invention
The technical problem to be solved by the embodiment of the invention is as follows: the discrete PD circuit and the power supply system are provided, the use of a special function integrated PD chip is avoided, and the power supply cost of the dual-standard POE is reduced.
In order to solve the above technical problem, in a first aspect, an embodiment of the present invention provides a discrete PD circuit, where the discrete PD circuit includes a detection circuit, a classification circuit, and a power supply circuit; wherein the content of the first and second substances,
the first end of the detection circuit is connected with the positive electrode of the power supply, and the second end of the detection circuit is connected with the negative electrode of the power supply;
the first end of the grading circuit is connected with the power supply anode, and the second end of the grading circuit is connected with the power supply cathode;
the first end of the power supply circuit is connected with the positive power supply electrode, and the second end of the power supply circuit is connected with the negative power supply electrode.
As a preferred scheme, the detection circuit comprises a first capacitor and a first resistor; wherein the content of the first and second substances,
one end of the first capacitor is connected with the first end of the detection circuit, and the other end of the first capacitor is connected with the second end of the detection circuit;
the first resistor is connected in parallel with the first capacitor.
As a preferred solution, the grading circuit includes a second resistor, a third resistor, a first diode, a fourth resistor, a first switch tube, a fifth resistor, a second diode, a sixth resistor, a seventh resistor, an eighth resistor, a second switch tube, and a third diode; wherein the content of the first and second substances,
one end of the second resistor is connected with the second end of the grading circuit, and the other end of the second resistor is connected with one end of the third resistor;
the other end of the third resistor is connected with the anode of the first diode;
the other end of the first diode is connected with the first end of the grading circuit;
one end of the fourth resistor is connected with one end of the third resistor, and the other end of the fourth resistor is connected with the first end of the first switch tube;
the second end of the first switching tube is connected with the second end of the grading circuit, and the third end of the first switching tube is connected with one end of the fifth resistor;
the other end of the fifth resistor is connected with the first end of the grading circuit;
the anode of the second diode is connected with the second end of the first switch tube, and the cathode of the second diode is connected with the third end of the first switch tube;
one end of the sixth resistor is connected with the first end of the grading circuit, and the other end of the sixth resistor is connected with the cathode of the third diode;
the seventh resistor is connected in parallel with the sixth resistor;
the eighth resistor is connected in parallel with the sixth resistor;
the anode of the third diode is connected with the third end of the second switching tube;
the first end of the second switch tube is connected with the third end of the first switch tube, and the second end of the second switch tube is connected with the second end of the first switch tube.
As a preferred scheme, the first switching tube is an NPN-type triode, and then, a first end of the first switching tube is a base, a second end of the first switching tube is an emitter, and a third end of the first switching tube is a collector;
and if the second switch tube is an NMOS tube, the first end of the second switch tube is a gate, the second end of the second switch tube is a source, and the third end of the second switch tube is a drain.
As a preferred scheme, the first diode is a voltage stabilizing diode;
the second diode is a voltage stabilizing diode;
the third diode is a zener diode.
As a preferable scheme, the power supply circuit includes a fourth diode, a ninth resistor, a fifth diode, a second capacitor, a tenth resistor, a third switching tube, an eleventh resistor, a fourth switching tube, a twelfth resistor, a third capacitor, a thirteenth resistor, a fifth switching tube, and a rear-stage load; wherein the content of the first and second substances,
the anode of the fourth diode is connected with the second end of the power supply circuit, and the cathode of the fourth diode is connected with one end of the ninth resistor;
the other end of the ninth resistor is connected with the anode of the fifth diode;
the cathode of the fifth diode is connected with the first end of the power supply circuit;
one end of the second capacitor is connected with the second end of the third switching tube, and the other end of the second capacitor is connected with the first end of the third switching tube;
the tenth resistor is connected in parallel with the second capacitor;
the first end of the third switching tube is connected with one end of the ninth resistor, the second end of the third switching tube is connected with the second end of the power supply circuit, and the third end of the third switching tube is connected with the second end of the fourth switching tube;
one end of the eleventh resistor is connected with the first end of the third switching tube, and the other end of the eleventh resistor is connected with the first end of the fourth switching tube;
the third end of the fourth switching tube is connected with one end of the twelfth resistor;
the other end of the twelfth resistor is connected with the first end of the fifth switching tube;
one end of the third capacitor is connected with the first end of the fifth switching tube, and the other end of the third capacitor is connected with the second end of the fifth switching tube;
the thirteenth resistor is connected in parallel with the third capacitor;
the second end of the fifth switching tube is connected with the first end of the power supply circuit, and the third end of the fifth switching tube is connected with the positive electrode of the rear-stage load;
and the negative electrode of the rear-stage load is connected with the second end of the fourth switching tube.
As a preferable scheme, the power supply circuit further includes a sixth diode and a fourteenth resistor, and the sixth diode and the fourteenth resistor are disposed between the negative electrode of the rear-stage load and the second end of the fourth switching tube; wherein the content of the first and second substances,
the anode of the sixth diode is connected with the cathode of the rear-stage load, and the cathode of the sixth diode is connected with one end of the fourteenth resistor;
the other end of the fourteenth resistor is connected with the second end of the fourth switching tube.
As a preferable scheme, the fourth diode is a voltage regulator diode;
the fifth diode is a voltage stabilizing diode;
the sixth diode is a rectifier diode.
As a preferable scheme, if the third switching tube is an NMOS tube, the first end of the third switching tube is a gate, the second end of the third switching tube is a source, and the third end of the third switching tube is a drain;
the fourth switching tube is an NPN type triode, a first end of the fourth switching tube is a base electrode, a second end of the fourth switching tube is an emitting electrode, and a third end of the fourth switching tube is a collector electrode;
if the fifth switching tube is a PMOS tube, the first end of the fifth switching tube is a gate, the second end of the fifth switching tube is a source, and the third end of the fifth switching tube is a drain.
In order to solve the above technical problem, in a second aspect, an embodiment of the present invention provides a power supply system including the discrete PD circuit according to any one of the first aspect.
Compared with the prior art, the discrete PD circuit and the power supply system provided by the embodiment of the invention have the beneficial effects that: a discrete PD circuit is designed by adopting a simple voltage stabilizing diode, a triode and an MOS (metal oxide semiconductor) transistor, can simultaneously meet the requirements of standard POE (Power over Ethernet) power supply and non-standard POE power supply, and supports wide voltage input of 22V-57V; and the use of a special function integrated PD chip is avoided, the material cost is reduced, and the low-power-consumption and low-cost dual-standard POE power supply design is realized.
Drawings
In order to more clearly illustrate the technical features of the embodiments of the present invention, the drawings needed to be used in the embodiments of the present invention will be briefly described below, and it is apparent that the drawings described below are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained based on the drawings without inventive labor.
FIG. 1 is a schematic diagram of a preferred embodiment of a discrete PD circuit provided by the present invention;
FIG. 2 is a circuit schematic of a preferred embodiment of a discrete PD circuit provided by the present invention;
fig. 3 is a circuit schematic diagram of another preferred embodiment of a discrete PD circuit provided by the present invention.
Detailed Description
In order to clearly understand the technical features, objects and effects of the present invention, the following detailed description of the embodiments of the present invention is provided with reference to the accompanying drawings and examples. The following examples are intended to illustrate the invention, but are not intended to limit the scope of the invention. Other embodiments, which can be derived by those skilled in the art from the embodiments of the present invention without inventive step, shall fall within the scope of the present invention.
In the description of the present invention, it should be understood that the numbers themselves, such as "first", "second", etc., are used only for distinguishing the described objects, do not have a sequential or technical meaning, and cannot be understood as defining or implying the importance of the described objects.
In the description of the invention, it is to be noted that, unless explicitly stated or limited otherwise, the terms "connected" and "connected" are to be interpreted broadly, e.g. as a fixed connection, a detachable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Fig. 1 is a schematic structural diagram of a discrete PD circuit according to a preferred embodiment of the present invention.
As shown in fig. 1, the discrete PD circuit includes a detection circuit 100, a classification circuit 200, and a power supply circuit 300; wherein the content of the first and second substances,
the first end of the detection circuit 100 is connected with a power supply positive pole P1, and the second end of the detection circuit 100 is connected with a power supply negative pole N1;
a first end of the classification circuit 200 is connected with the power supply positive pole P1, and a second end of the classification circuit 200 is connected with the power supply negative pole N1;
the first terminal of the power supply circuit 300 is connected to the power supply positive pole P1, and the second terminal of the power supply circuit 300 is connected to the power supply negative pole N1.
The discrete PD circuit provided by the embodiment of the invention avoids the use of a special function integrated PD chip and reduces the power supply cost of the dual-standard POE.
In a preferred embodiment, as shown in fig. 2, the detection circuit 100 includes a first capacitor C1 and a first resistor R1; wherein the content of the first and second substances,
one end of the first capacitor C1 is connected to the first end of the detection circuit 100, and the other end of the first capacitor C1 is connected to the second end of the detection circuit 100;
the first resistor R1 is connected in parallel with the first capacitor C1.
In a preferred embodiment, as shown in fig. 2, the grading circuit 200 includes a second resistor R2, a third resistor R3, a first diode D1, a fourth resistor R4, a first switch Q1, a fifth resistor R5, a second diode D2, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a second switch Q2, and a third diode D3; wherein the content of the first and second substances,
one end of the second resistor R2 is connected to the second end of the classification circuit 200, and the other end of the second resistor R2 is connected to one end of the third resistor R3;
the other end of the third resistor R3 is connected with the anode of the first diode D1;
the other end of the first diode D1 is connected to a first end of the classification circuit 200;
one end of the fourth resistor R4 is connected to one end of the third resistor R3, and the other end of the fourth resistor R4 is connected to the first end of the first switch tube Q1;
a second terminal of the first switch Q1 is connected to the second terminal of the classification circuit 200, and a third terminal of the first switch Q1 is connected to one terminal of the fifth resistor R5;
the other end of the fifth resistor R5 is connected with the first end of the classification circuit 200;
the anode of the second diode D2 is connected to the second terminal of the first switch Q1, and the cathode of the second diode D2 is connected to the third terminal of the first switch Q1;
one end of the sixth resistor R6 is connected to the first end of the classification circuit 200, and the other end of the sixth resistor R6 is connected to the cathode of the third diode D3;
the seventh resistor R7 is connected in parallel with the sixth resistor R6;
the eighth resistor R8 is connected in parallel with the sixth resistor R6;
the anode of the third diode D3 is connected to the third terminal of the second switch Q2;
a first terminal of the second switch transistor Q2 is connected to the third terminal of the first switch transistor Q1, and a second terminal of the second switch transistor Q2 is connected to the second terminal of the first switch transistor Q1.
Further, the first switch Q1 is an NPN type transistor, and then the first terminal of the first switch Q1 is a base, the second terminal of the first switch Q2 is an emitter, and the third terminal of the first switch Q1 is a collector;
the second switch Q2 is an NMOS transistor, and then the first terminal of the second switch Q2 is a gate, the second terminal of the second switch Q2 is a source, and the third terminal of the second switch Q2 is a drain.
Further, the first diode D1 is a zener diode;
the second diode D2 is a zener diode;
the third diode D3 is a zener diode.
In a preferred embodiment, as shown in fig. 2, the power supply circuit 300 includes a fourth diode D4, a ninth resistor R9, a fifth diode D5, a second capacitor C2, a tenth resistor R10, a third switch tube Q3, an eleventh resistor R11, a fourth switch tube Q4, a twelfth resistor R12, a third capacitor C3, a thirteenth resistor R13, a fifth switch tube Q5, and a rear-stage load Rload; wherein the content of the first and second substances,
the anode of the fourth diode D4 is connected to the second end of the power supply circuit 300, and the cathode of the fourth diode D4 is connected to one end of the ninth resistor R9;
the other end of the ninth resistor R9 is connected with the anode of the fifth diode D5;
the cathode of the fifth diode D5 is connected to the first end of the power supply circuit 300;
one end of the second capacitor C2 is connected to the second end of the third switch Q3, and the other end of the second capacitor C2 is connected to the first end of the third switch Q3;
the tenth resistor R10 is connected in parallel with the second capacitor C2;
a first terminal of the third switching tube Q3 is connected to one terminal of the ninth resistor R9, a second terminal of the third switching tube Q3 is connected to a second terminal of the power supply circuit 300, and a third terminal of the third switching tube Q3 is connected to a second terminal of the fourth switching tube Q4;
one end of the eleventh resistor R11 is connected to the first end of the third switching tube Q3, and the other end of the eleventh resistor R11 is connected to the first end of the fourth switching tube Q4;
the third end of the fourth switching tube Q4 is connected with one end of the twelfth resistor R12;
the other end of the twelfth resistor R12 is connected with the first end of the fifth switch tube Q5;
one end of the third capacitor C3 is connected to the first end of the fifth switch Q5, and the other end of the third capacitor C3 is connected to the second end of the fifth switch Q5;
the thirteenth resistor R13 is connected in parallel with the third capacitor C3;
a second terminal of the fifth switch Q5 is connected to the first terminal of the power supply circuit 300, and a third terminal of the fifth switch Q5 is connected to the positive terminal of the rear-stage load Rload;
the negative electrode of the rear-stage load Rload is connected to the second end of the fourth switching tube Q4.
In a preferred embodiment, as shown in fig. 3, the power supply circuit 300 further includes a sixth diode D6 and a fourteenth resistor R14, the sixth diode D6 and the fourteenth resistor R14 are disposed between the negative terminal of the rear-stage load Rload and the second terminal of the fourth switching tube Q4; wherein the content of the first and second substances,
the anode of the sixth diode D6 is connected to the cathode of the rear-stage load Rload, and the cathode of the sixth diode D6 is connected to one end of the fourteenth resistor R14;
the other end of the fourteenth resistor R14 is connected to the second end of the fourth switch transistor Q4.
Further, the fourth diode D4 is a zener diode;
the fifth diode D5 is a zener diode;
the sixth diode D6 is a rectifying diode.
Further, the third switching tube Q3 is an NMOS tube, and then, the first end of the third switching tube Q3 is a gate, the second end of the third switching tube Q3 is a source, and the third end of the third switching tube Q3 is a drain;
the fourth switching tube Q4 is an NPN type triode, and then the first end of the fourth switching tube Q4 is a base, the second end of the fourth switching tube Q4 is an emitter, and the third end of the fourth switching tube Q4 is a collector;
the fifth switch Q5 is a PMOS transistor, and the first terminal of the fifth switch Q5 is a gate, the second terminal of the fifth switch Q5 is a source, and the third terminal of the fifth switch Q5 is a drain.
The specific working principle of the discrete PD circuit provided by the embodiment of the invention is as follows:
(1) firstly, the invention meets the requirements of a detection stage, a classification stage and a power supply stage in the power supply process of the standard POE.
The detection stage: the IEEE Std 802.3 standard requires that a Power Sourcing Equipment (PSE) terminal needs to determine whether a PD exists by detecting resistance and capacitance values between P1-N1 (i.e., positive and negative Power supply electrodes), so as to determine whether a standard POE voltage needs to be output. The output voltage of the stage P1-N1 is 2.8V-10V, and the characteristic of judging the existence of PD is as follows: the DC impedance is between 19K omega and 26.5K omega, and the capacitance value is not more than 150 nF.
The detection circuit 100 is used for detecting the PD by the PSE, that is, the first capacitor C1 and the first resistor R1 are used at the PSE end to determine the existence of the PD, and preferably, the values are C1 ═ 0.1uF and R1 ═ 24.9K, which meet the standard requirements.
A grading stage: the IEEE Std 802.3 standard requires that the PSE terminal determine the PD power consumption class requirement by detecting the current on P1-N1, thereby determining the power class that the PSE terminal needs to output. The output voltage of the stage P1-N1 is 15.5V-20.5V.
The classification circuit 200 is used for determining the classification current required by the PD, and the resistances of the sixth resistor R6, the seventh resistor R7 and the eighth resistor R8 can be adjusted to meet the requirements of the Class0-4 different classification currents in the protocol. The power supply circuit 300 does not operate at this stage.
The working principle of the stage is as follows: the first diode D1 is a 21V voltage regulator, the second diode D2 is a 10V voltage regulator, the third diode D3 is a 10V voltage regulator, the resistance of the sixth resistor R6 is 430 omega, the resistance of the seventh resistor R7 is 430 omega, and the resistance of the eighth resistor R8 is 430 omega.
At this stage, the voltage regulator tube D1 does not work, the circuits of the voltage regulator tube D1, the second resistor R2 and the third resistor R3 are not conducted, and the first triode Q1 is in a cut-off state; the voltage regulator tube D2 breaks down and regulates the voltage reversely through a fifth resistor R5 circuit, at the moment, the grid electrode of the NMOS tube Q2 is clamped at 10V, VGS is larger than VT, and the NMOS tube Q2 is conducted; the voltage regulator tube D3 is reversely broken through and regulated in voltage through an NMOS tube Q2, a sixth resistor R6, a seventh resistor R7 and an eighth resistor R8, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the voltage regulator tube D3 and an NMOS tube Q2 are conducted, VGD > VT (VT is starting voltage, and the typical value is about 2V), the NMOS tube Q2 works in a variable resistance area, VDS is small, the minimum current ID on the P1-N1 can be estimated to exceed (15.5-10) 3/430 to 38.3mA at the moment, and the power grade is Class4 according to the classification standard of IEEE Std 802.3 on PD, namely the PSE end needs to output the highest power grade.
And thirdly, power supply stage: when the PSE detects that a legal PD exists on the P1-N1 and classification of the PD is completed, the PSE starts to supply power to a rear-stage load Rload, and the output voltage of the P1-N1 in the stage is 36-57V.
In this stage, the classification circuit 200 is turned off, the PD power consumption is reduced, and the power supply circuit 300 is turned on to supply power to the rear stage load Rload.
The working principle of the stage is as follows: the fifth diode D5 is an 11V voltage regulator tube, the fourth diode D4 is a 10V voltage regulator tube, the resistance of the second resistor R2 is 300K omega, the resistance of the third resistor R3 is 300K omega, and the resistance of the fourteenth resistor R14 is 0.1 omega.
At this stage, the voltage regulator tube D1 is reversely broken through and regulated by a third resistor R3 and a second resistor R2, at this time, the base electrode of the triode Q1 is clamped at 7.5V-18V ((36-21)/2- (57-21)/2), VBE > Von (Von is the starting voltage, the typical value is about 0.7V), the voltage regulator tube D1, the third resistor R3 and a fourth resistor R4 are conducted, and the triode Q1 is in the starting state; at the moment, VGS of the NMOS tube Q2 is approximately equal to 0V, the NMOS tube Q2 is turned off, the voltage regulator tube D3 does not work, and load consumption of the resistors R6-R8 is reduced.
In the stage, a voltage regulator tube D5 and a voltage regulator tube D4 are reversely broken down and stabilized in voltage through a voltage regulator tube D5, a ninth resistor R9 and a voltage regulator tube D4, the grid electrode of an NMOS tube Q3 is clamped at 10V, VGS is greater than VT, an NMOS tube Q3 is conducted, and the negative electrode of a rear-stage load Rload is connected with the POE power supply negative electrode through a sixth diode D6 and a fourteenth resistor R14; at the moment, the base electrode of the triode Q4 is clamped at 10V, VBE is larger than Von, and the triode Q4 is conducted; at the moment, VSG of the PMOS tube Q5 is approximately equal to 36V-57V, VSG is greater than VT, the PMOS tube Q5 is conducted, the anode of the rear-stage load Rload is connected with the POE power supply anode, and power supply for the rear-stage load Rload is realized.
The second capacitor C2, the tenth resistor R10, the third capacitor C3 and the thirteenth resistor R13 in the power supply circuit 300 mainly function to provide a charging and discharging loop between the MOS transistors GS, so as to turn on and turn off the MOS transistors GS in time; the ninth resistor R9 and the eleventh resistor R11 in the power supply circuit 300 and the fourth resistor R4 and the fifth resistor R5 in the classification circuit 200 mainly play a role of current limiting.
The fourteenth resistor R14 and the sixth diode D6 added behind the NMOS transistor Q3 in the power supply circuit 300 mainly function to suppress reverse current, because a junction diode commonly exists between the source and the gate of the MOS transistor, which causes a current for detecting the stage to flow back from the negative electrode of the rear-stage load Rload through the junction diode, thereby causing a stage abnormality.
(2) And secondly, the invention meets the requirement of non-standard POE power supply, and the non-standard POE is directly supplied with power without the requirements of detection and classification stages, so that the requirement of a normal power supply stage is only needed to be met.
The output voltage ranges of the non-standard POE power supply are 22.8V-25.2V and 45.6V-50.4V, the working principle of the latter is the same as that of the standard POE power supply stage, which is not described herein again, and the working principle of the former is as follows:
when the output voltage range of the P1-N1 is 22.8V-25.2V, a voltage regulator tube D1 is reversely broken through and stabilized by a third resistor R3 and a second resistor R2 circuit, the base electrode of a triode Q1 is clamped at 0.9V-2.1V ((22.8-21)/2-25.2-21)/2), VBE > Von (Von is the starting voltage and is about 0.7V in typical value), the voltage regulator tube D1, the third resistor R3 and the fourth resistor R4 circuit are conducted, and the triode Q1 is in the starting state; at the moment, VGS of the NMOS tube Q2 is approximately equal to 0V, the NMOS tube Q2 is turned off, the voltage regulator tube D3 does not work, and load consumption of the resistors R6-R8 is reduced.
A voltage regulator tube D5 and a voltage regulator tube D4 are reversely broken down and stabilized in voltage through a voltage regulator tube D5, a ninth resistor R9 and a voltage regulator tube D4, a grid G of an NMOS tube Q3 is clamped at 10V, VGS is larger than VT, an NMOS tube Q3 is conducted, and the negative electrode of a rear-stage load Rload is connected with the POE power supply negative electrode through a sixth diode D6 and a fourteenth resistor R14; at the moment, the base electrode of the triode Q4 is clamped at 10V, VBE is larger than Von, and the triode Q4 is conducted; at the moment, VSG of the PMOS tube Q5 is approximately equal to 22.8V-25.2V, VSG is greater than VT, the PMOS tube Q5 is conducted, the anode of the rear-stage load Rload is connected with the POE power supply anode, and power supply for the rear-stage load Rload is achieved.
It should be noted that values of each electronic component in the embodiments of the present invention are not limited to the above values, and it is obvious to those skilled in the art that the values may be adjusted as appropriate to achieve the same functions as those in the embodiments of the present invention.
It should be understood that, the embodiment of the present invention is exemplified by a dual-standard POE power supply circuit, but is not limited to the POE power supply circuit, and other application circuits with the same or similar functions, such as a similar power supply scheme using step detection or clamp + MOS, all belong to the protection scope of the present invention.
Correspondingly, an embodiment of the present invention further provides a power supply system, where the power supply system includes the discrete PD circuit described in any of the above embodiments.
It should be understood that the power supply system may be different types of power supply systems, such as a power supply system with pasivepoe functionality or a power supply system with DC-Jack functionality, but the invention is not limited thereto.
In summary, the discrete PD circuit and the power supply system provided by the embodiment of the invention adopt a simple zener diode, a triode and a MOS transistor to design the discrete PD circuit, which can simultaneously satisfy the standard POE power supply and the non-standard POE power supply, and support wide voltage input of 22V to 57V; and the use of a special function integrated PD chip is avoided, the material cost is reduced, and the low-power-consumption and low-cost dual-standard POE power supply design is realized.
The above description is only a preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and it should be noted that, for those skilled in the art, several equivalent obvious modifications and/or equivalent substitutions can be made without departing from the technical principle of the present invention, and these obvious modifications and/or equivalent substitutions should also be regarded as the scope of the present invention.
Claims (10)
1. A discrete PD circuit is characterized by comprising a detection circuit, a classification circuit and a power supply circuit; wherein the content of the first and second substances,
the first end of the detection circuit is connected with the positive electrode of the power supply, and the second end of the detection circuit is connected with the negative electrode of the power supply;
the first end of the grading circuit is connected with the power supply anode, and the second end of the grading circuit is connected with the power supply cathode;
the first end of the power supply circuit is connected with the positive power supply electrode, and the second end of the power supply circuit is connected with the negative power supply electrode.
2. The discrete PD circuit of claim 1, wherein the detection circuit comprises a first capacitor and a first resistor; wherein the content of the first and second substances,
one end of the first capacitor is connected with the first end of the detection circuit, and the other end of the first capacitor is connected with the second end of the detection circuit;
the first resistor is connected in parallel with the first capacitor.
3. The discrete PD circuit of claim 1, wherein the classification circuit includes a second resistor, a third resistor, a first diode, a fourth resistor, a first switch tube, a fifth resistor, a second diode, a sixth resistor, a seventh resistor, an eighth resistor, a second switch tube, and a third diode; wherein the content of the first and second substances,
one end of the second resistor is connected with the second end of the grading circuit, and the other end of the second resistor is connected with one end of the third resistor;
the other end of the third resistor is connected with the anode of the first diode;
the other end of the first diode is connected with the first end of the grading circuit;
one end of the fourth resistor is connected with one end of the third resistor, and the other end of the fourth resistor is connected with the first end of the first switch tube;
the second end of the first switching tube is connected with the second end of the grading circuit, and the third end of the first switching tube is connected with one end of the fifth resistor;
the other end of the fifth resistor is connected with the first end of the grading circuit;
the anode of the second diode is connected with the second end of the first switch tube, and the cathode of the second diode is connected with the third end of the first switch tube;
one end of the sixth resistor is connected with the first end of the grading circuit, and the other end of the sixth resistor is connected with the cathode of the third diode;
the seventh resistor is connected in parallel with the sixth resistor;
the eighth resistor is connected in parallel with the sixth resistor;
the anode of the third diode is connected with the third end of the second switching tube;
the first end of the second switch tube is connected with the third end of the first switch tube, and the second end of the second switch tube is connected with the second end of the first switch tube.
4. The discrete PD circuit according to claim 3, wherein the first switch tube is an NPN-type transistor, and then the first terminal of the first switch tube is a base, the second terminal of the first switch tube is an emitter, and the third terminal of the first switch tube is a collector;
and if the second switch tube is an NMOS tube, the first end of the second switch tube is a gate, the second end of the second switch tube is a source, and the third end of the second switch tube is a drain.
5. The discrete PD circuit of claim 3 or 4, characterized in that,
the first diode is a voltage stabilizing diode;
the second diode is a voltage stabilizing diode;
the third diode is a zener diode.
6. The discrete PD circuit of claim 1, wherein the power supply circuit includes a fourth diode, a ninth resistor, a fifth diode, a second capacitor, a tenth resistor, a third switch tube, an eleventh resistor, a fourth switch tube, a twelfth resistor, a third capacitor, a thirteenth resistor, a fifth switch tube, and a rear load; wherein the content of the first and second substances,
the anode of the fourth diode is connected with the second end of the power supply circuit, and the cathode of the fourth diode is connected with one end of the ninth resistor;
the other end of the ninth resistor is connected with the anode of the fifth diode;
the cathode of the fifth diode is connected with the first end of the power supply circuit;
one end of the second capacitor is connected with the second end of the third switching tube, and the other end of the second capacitor is connected with the first end of the third switching tube;
the tenth resistor is connected in parallel with the second capacitor;
the first end of the third switching tube is connected with one end of the ninth resistor, the second end of the third switching tube is connected with the second end of the power supply circuit, and the third end of the third switching tube is connected with the second end of the fourth switching tube;
one end of the eleventh resistor is connected with the first end of the third switching tube, and the other end of the eleventh resistor is connected with the first end of the fourth switching tube;
the third end of the fourth switching tube is connected with one end of the twelfth resistor;
the other end of the twelfth resistor is connected with the first end of the fifth switching tube;
one end of the third capacitor is connected with the first end of the fifth switching tube, and the other end of the third capacitor is connected with the second end of the fifth switching tube;
the thirteenth resistor is connected in parallel with the third capacitor;
the second end of the fifth switching tube is connected with the first end of the power supply circuit, and the third end of the fifth switching tube is connected with the positive electrode of the rear-stage load;
and the negative electrode of the rear-stage load is connected with the second end of the fourth switching tube.
7. The discrete PD circuit of claim 6, wherein the power supply circuit further includes a sixth diode and a fourteenth resistor, the sixth diode and the fourteenth resistor being disposed between a negative terminal of the rear-stage load and the second terminal of the fourth switching tube; wherein the content of the first and second substances,
the anode of the sixth diode is connected with the cathode of the rear-stage load, and the cathode of the sixth diode is connected with one end of the fourteenth resistor;
the other end of the fourteenth resistor is connected with the second end of the fourth switching tube.
8. The discrete PD circuit of claim 7, wherein,
the fourth diode is a voltage stabilizing diode;
the fifth diode is a voltage stabilizing diode;
the sixth diode is a rectifier diode.
9. The discrete PD circuit of any one of claims 6 to 8, wherein the third switch tube is an NMOS tube, then the first end of the third switch tube is a gate, the second end of the third switch tube is a source, and the third end of the third switch tube is a drain;
the fourth switching tube is an NPN type triode, a first end of the fourth switching tube is a base electrode, a second end of the fourth switching tube is an emitting electrode, and a third end of the fourth switching tube is a collector electrode;
if the fifth switching tube is a PMOS tube, the first end of the fifth switching tube is a gate, the second end of the fifth switching tube is a source, and the third end of the fifth switching tube is a drain.
10. A power supply system characterized in that it comprises a discrete PD circuit according to any one of claims 1 to 9.
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| CN202011492754.5A CN112688788B (en) | 2020-12-16 | 2020-12-16 | Discrete PD circuit and power supply system |
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| CN112688788B (en) | 2022-11-08 |
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Effective date of registration: 20230324 Address after: Room 101, Building 1, No. 2, Songshan Lake Bihu Road, Songshan Lake Park, Dongguan City, Guangdong Province Patentee after: Dongguan Lianzhou Technology Co.,Ltd. Address before: Room 901, 9 / F, new East China Sea centre, 9 Science Museum Road, Tsimshatsui, Kowloon, Hong Kong, China Patentee before: Pulian International Co.,Ltd. |