CN112667548B - Communication interface, device and method for supporting bidirectional two-wire system synchronous serial bus - Google Patents
Communication interface, device and method for supporting bidirectional two-wire system synchronous serial bus Download PDFInfo
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- CN112667548B CN112667548B CN202011560836.9A CN202011560836A CN112667548B CN 112667548 B CN112667548 B CN 112667548B CN 202011560836 A CN202011560836 A CN 202011560836A CN 112667548 B CN112667548 B CN 112667548B
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Abstract
The invention provides a communication interface, equipment and a method for supporting a bidirectional two-wire system synchronous serial bus, which relate to the technical field of communication, wherein the equipment comprises an equipment main body and a first controller; the device main body comprises a data output end and a data input end; the first controller comprises a first selection end, a second selection end and a first output end; the data output end is connected with the first selection end; the data output end is also used for being connected with second equipment; the second selection end is used for being connected with second equipment; the first output end is connected with the data input end; when the device is connected with second equipment, the device main body is used for controlling the data output end to output a high level signal and/or a low level signal, detecting a signal input by the data input end, and judging whether the second equipment is in butt joint with the device according to the signal input by the data input end. The problem that a pull-up resistor needs to be connected externally, a process library is used, complex control logic is understood and the like when master and slave equipment supporting a bidirectional two-wire system synchronous serial bus are connected in the prior art is solved.
Description
Technical Field
The embodiment of the invention relates to the technical field of communication, in particular to a communication interface, equipment and a method for supporting a bidirectional two-wire system synchronous serial bus.
Background
The I2C bus is a bi-directional two-wire synchronous serial bus proposed by philips, and is widely used for communication among a plurality of IC (Integrated circuit) modules in a system. It comprises a serial data line (SDA), a serial clock line (SCL, serialcock), both being bidirectional Input/Output (I/O) lines; the interface circuit is an open-drain output and is connected to a power supply through a pull-up resistor.
Since there is no so-called bidirectional line when developing codes in a standard hardware description language in an SoC (System on Chip), people often need to internally decompose an SDA (or SCL) into a simple input signal and an output signal by using PAD (pin of silicon Chip)/GPIO (General-purpose input/output) in a process library. The complete function defined in the protocol of I2C is realized by means of external pull-up resistor.
This means that: a corresponding bidirectional PAD is required to be used as a support for the process library; require the designer to understand the control of the bi-directional PAD in detail; the need to resort to external pull-up resistors; especially when the main device and the slave device of the I2C are required to be directly butted, the loopback connection of firstly outputting and then inputting is required; moreover, as the PADs of different manufacturers have different structures, the corresponding GPIO control logic also needs to be changed.
Disclosure of Invention
The embodiment of the invention provides a communication interface, equipment and a method for supporting a bidirectional two-wire system synchronous serial bus, which aim to solve the problems that a pull-up resistor needs to be externally connected, a process library is used, complex control logic needs to be understood and the like when master and slave equipment supporting the bidirectional two-wire system synchronous serial bus are connected in the prior art.
In order to solve the technical problem, the invention is realized as follows:
in a first aspect, an embodiment of the present invention provides a first device supporting a bidirectional two-wire synchronous serial bus, including a device main body and a first controller;
the device body comprises a data output end and a data input end;
the first controller comprises a first selection end, a second selection end and a first output end;
the data output end of the equipment main body is connected with the first selection end of the first controller;
the data output end of the equipment main body is also used for being connected with second equipment;
the second selection end of the first controller is used for being connected with the second equipment;
a first output end of the first controller is connected with a data input end of the equipment main body;
when the device body is connected with the second device, the device body is used for controlling the data output end to output a high level signal and/or a low level signal, detecting a signal input by the data input end, and judging whether the device body is in butt joint with the second device or not according to the signal input by the data input end.
Optionally, when connected to the second device,
when the data output end outputs a high level signal, receiving a low level signal output by the second equipment, and detecting that the data input end inputs the low level signal;
when the data output end outputs a low level signal, receiving the low level signal output by the second equipment, and detecting that the data input end inputs a high level signal;
when receiving a high level signal output by the second device, the data output end outputs a low level signal, and detects that the data input end inputs the low level signal;
and when receiving the low level signal output by the second device, the data output end outputs the low level signal, and detects that the data input end inputs the high level signal.
Optionally, the first controller comprises a first sub-controller and a second sub-controller;
the first sub-controller includes: a first input terminal, a second input terminal, a third input terminal, and a third output terminal;
the second sub-controller includes: a first input terminal, a second input terminal, a third input terminal, and a third output terminal;
the second input end of the first sub-controller is connected with a low level;
the first input end of the second sub-controller is connected with a high level;
a second input end of the second sub-controller is connected with a low level;
the first input end of the first sub-controller is connected with the third output end of the second sub-controller;
the third input end of the first sub-controller is used for being connected with the first selection end of the first controller;
a third input end of the second sub-controller is used for being connected with a second selection end of the first controller;
and the third output end of the first sub-controller is used for being connected with the first output end of the first controller.
Optionally, the first sub-controller and/or the second sub-controller is a data selector.
Optionally, one of the first device and the second device is a master device, and the other is a slave device.
Optionally, when the first device is a master device, the method further includes: the multi-input OR gate is provided with n fourth input ends and n fourth output ends, and the n fourth input ends are used for being connected with the n second devices in a one-to-one correspondence mode; the fourth output end is connected with the second selection end of the first controller, and n is a natural number greater than 0;
the data output end is used for being connected with the n second devices, and n is a natural number larger than 0.
In a second aspect, an embodiment of the present invention provides a communication interface, applied between a master device and at least one slave device, where the master device and the slave device support a bidirectional two-wire synchronous serial bus, and include a first controller and at least one second controller; each slave device corresponds to one second controller;
the first controller comprises a first selection end, a second selection end and a first output end;
the second controller comprises a third selection end, a fourth selection end and a second output end;
the first selection end of the first controller is connected with the fourth selection end of each second controller;
the first selection end of the first controller is also used for being connected with the data output end of the main device;
the first output end of the first controller is used for being connected with the data input end of the main equipment;
the third selection end of each second controller is connected with the second selection end of the first controller;
the third selection end of each second controller is also used for being connected with the data output end of the corresponding slave device;
the second output end of each second controller is used for being connected with the data input end of the corresponding slave device;
when a first selection end of the first controller receives a high-level signal, a low-level signal is output to the first output end and the second output end;
when a first selection end of the first controller receives a low-level signal and a second selection end of the first controller receives a high-level signal, outputting the low-level signal to the first output end and the second output end;
and when the first selection end of the first controller receives a low level signal and the second selection end of the first controller receives a low level signal, the first selection end outputs a high level signal to the first output end and the second output end.
Optionally, the first controller and the second controller each include a first sub-controller and a second sub-controller;
the first sub-controller includes: a first input terminal, a second input terminal, a third input terminal, and a third output terminal;
the second sub-controller includes: a first input terminal, a second input terminal, a third input terminal, and a third output terminal;
the second input end of the first sub-controller is connected with a low level;
the first input end of the second sub-controller is connected with a high level;
a second input end of the second sub-controller is connected with a low level;
the first input end of the first sub-controller is connected with the third output end of the second sub-controller;
the third input end of the first sub-controller is used for being connected with the first selection end of the first controller;
a third input end of the second sub-controller is used for being connected with a second selection end of the first controller;
and the third output end of the first sub-controller is used for being connected with the first output end of the first controller.
Optionally, the method further includes:
the multi-input OR gate is provided with n fourth input ends and n fourth output ends, and the n fourth input ends are correspondingly connected with the third selection ends of the n second controllers one by one; the fourth output end is connected with the second selection end of the first controller, and n is a natural number greater than 0.
In a third aspect, an embodiment of the present invention provides a communication method, which is applied to the first device according to the second aspect, and includes:
when the data output end is connected with a second device, the data output end outputs a high level signal and/or a low level signal;
detecting a signal input by the data input end;
and judging whether the second equipment is butted or not according to the signal input by the data input end.
Optionally, the determining whether the docking with the second device is completed includes:
when the data output end outputs a high level signal, receiving a low level signal output by the second equipment, and detecting that the data input end inputs a low level signal, wherein the first equipment and the second equipment are in butt joint;
when the data output end outputs a low level signal, receiving the low level signal output by the second equipment, and detecting that the data input end inputs a high level signal, wherein the first equipment and the second equipment are in butt joint;
when receiving a high level signal output by the second device, the data output end outputs a low level signal, and when detecting that the data input end inputs the low level signal, the first device and the second device are in butt joint;
and when receiving the low level signal output by the second equipment, the data output end outputs the low level signal, and detects that the data input end inputs the high level signal, and the first equipment and the second equipment are in butt joint.
In an embodiment of the present invention, there is provided a first device supporting a bidirectional two-wire system synchronous serial bus, including a device main body and a first controller; the device main body comprises a data output end and a data input end; the first controller comprises a first selection end, a second selection end and a first output end; the data output end of the equipment main body is connected with the first selection end of the first controller; the data output end of the equipment main body is also used for being connected with second equipment; the second selection end of the first controller is used for being connected with second equipment; the first output end of the first controller is connected with the data input end of the equipment main body; when the device body is connected with second equipment, the device body outputs a high level signal and/or a low level signal by controlling the data output end, detects a signal input by the data input end, and judges whether the butt joint with the second equipment is completed or not according to the signal input by the data input end; the first device with the structure greatly simplifies the circuit realization of the bidirectional two-wire system synchronous serial bus master-slave device butt joint circuit verification, is not limited by the pin type in a process library, does not need an external pull-up resistor, can realize simple master-slave interconnection and butt joint in the SoC, and does not need external loopback connection; the butt joint of the master-slave interfaces of the bidirectional two-wire system synchronous serial bus can be completed only through reasonable control, and the realization and the functional verification are carried out on a Field Programmable Gate Array (FPGA), thereby simplifying the development of master-slave butt joint verification means and accelerating the verification progress.
Drawings
Various other advantages and benefits will become apparent to those of ordinary skill in the art upon reading the following detailed description of the preferred embodiments. The drawings are only for purposes of illustrating the preferred embodiments and are not to be construed as limiting the invention. Also, like reference numerals are used to refer to like parts throughout the drawings. In the drawings:
fig. 1 is a schematic structural diagram of a first device supporting a bidirectional two-wire synchronous serial bus according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a first controller of a first device supporting a bidirectional two-wire synchronous serial bus according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a communication interface connected to a first device and a second device according to an embodiment of the present invention;
fig. 4 is a second schematic structural diagram of a communication interface connected to a first device and a second device according to an embodiment of the present invention;
fig. 5 is a third schematic structural diagram of a communication interface connected to a first device and a second device according to an embodiment of the present invention;
fig. 6 is a flowchart illustrating a communication method according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a first device supporting a bidirectional two-wire synchronous serial bus according to an embodiment of the present invention;
the invention provides a first device 10 supporting a bidirectional two-wire system synchronous serial bus, which comprises a device main body 11 and a first controller 12;
the apparatus body 11 includes a data output terminal 111 and a data input terminal 112;
the first controller 12 comprises a first selection terminal 121, a second selection terminal 122 and a first output terminal 123;
the data output end 111 of the device body 11 is connected to the first selection end 121 of the first controller 12;
the data output end 111 of the device main body 11 is further used for connecting with a second device;
the second selection terminal 122 of the first controller 12 is used for connecting with the second device;
the first output terminal 123 of the first controller 12 is connected to the data input terminal 112 of the apparatus main body;
when the device is connected to the second device, the device body 11 is configured to control the data output end 111 to output a high level signal and/or a low level signal, detect a signal input by the data input end 112, and determine whether the docking with the second device is completed according to the signal input by the data input end 112.
In an embodiment of the present invention, there is provided a first device supporting a bidirectional two-wire system synchronous serial bus, including a device main body and a first controller; the device main body comprises a data output end and a data input end; the first controller comprises a first selection end, a second selection end and a first output end; the data output end of the equipment main body is connected with the first selection end of the first controller; the data output end of the equipment main body is also used for being connected with second equipment; the second selection end of the first controller is used for being connected with second equipment; the first output end of the first controller is connected with the data input end of the equipment main body; when the device body is connected with second equipment, the device body outputs a high level signal and/or a low level signal by controlling the data output end, detects a signal input by the data input end, and judges whether the butt joint with the second equipment is completed or not according to the signal input by the data input end; the first device with the structure greatly simplifies the circuit realization of the bidirectional two-wire system synchronous serial bus master-slave device butt joint circuit verification, is not limited by the pin type in a process library, does not need an external pull-up resistor, can realize simple master-slave interconnection and butt joint in the SoC, does not need external loopback connection, can realize simple master-slave interconnection and butt joint in the SoC, and does not need external loopback connection; the butt joint of the master interface and the slave interface of the bidirectional two-wire system synchronous serial bus can be completed only through reasonable control, and the realization and the functional verification are carried out on a Field Programmable Gate Array (FPGA), thereby simplifying the development of master-slave butt joint verification means and accelerating the verification progress.
In some embodiments of the invention, optionally, when connected to the second device,
when the data output end 111 outputs a high level signal, receiving a low level signal output by the second device, and detecting that a low level signal is input by the data input end 112;
when the data output end 111 outputs a low level signal, receiving the low level signal output by the second device, and detecting that the data input end 112 inputs a high level signal;
when receiving a high level signal output by the second device, the data output end 111 outputs a low level signal, and detects that a low level signal is input by the data input end 112;
when receiving the low level signal output by the second device, the data output end 111 outputs a low level signal, and detects that the data input end 112 inputs a high level signal.
In the embodiment of the invention, the level signal of the data input end is detected through the specific level signal sent by the data output end and the received level signal, so that the butt joint condition of the signal line between the first device and the second device is judged, the circuit realization of the butt joint circuit verification of the master device and the slave device of the bidirectional two-wire system synchronous serial bus is greatly simplified, the development of master-slave butt joint verification means is simplified, and the verification progress is accelerated.
Wherein:
when the data output end outputs a high level signal, receiving a low level signal output by second equipment, detecting that the data input end inputs a low level signal, and conducting a signal sending line from the first equipment to the second equipment (a signal receiving line from the second equipment to the first equipment);
when the data output end outputs a low level signal, the low level signal output by the second equipment is received, the high level signal input by the data input end is detected, and a signal sending line of the first equipment to the second equipment (a signal receiving line of the second equipment to the first equipment) is conducted;
when receiving a high level signal output by the second device, the data output end outputs a low level signal, and when detecting that the data input end inputs the low level signal, the second device is conducted to a signal sending line of the first device (the first device is conducted to a signal receiving line of the second device);
when receiving a low level signal output by the second device, the data output end outputs a low level signal, and when detecting that a high level signal is input by the data input end, the second device is conducted to a signal sending line of the first device (the first device is conducted to a signal receiving line of the second device).
Referring to fig. 2, fig. 2 is a schematic structural diagram of a first controller 12 of a first device 10 supporting a bidirectional two-wire synchronous serial bus according to an embodiment of the present invention;
in some embodiments of the present invention, optionally, the first controller 12 includes a first sub-controller 13 and a second sub-controller 14;
the first sub-controller 13 includes: a first input 131, a second input 132, a third input 133, and a third output 134;
the second sub-controller 14 includes: a first input 141, a second input 142, a third input 143, and a third output 144;
the second input 132 of the first sub-controller 13 is connected to low level;
the first input 141 of the second sub-controller 14 is connected to high level;
a second input 142 of the second sub-controller 14 is connected to low level;
the first input 131 of the first sub-controller 13 is connected 143 to the third output of the second sub-controller 14;
the third input 133 of the first sub-controller 13 is configured to be connected to the first selection terminal 121 of the first controller 12;
a third input 143 of the second sub-controller 14 is configured to be connected to the second selection terminal 122 of the first controller 12;
the third output 134 of the first sub-controller 13 is used to connect to the first output 123 of the first controller 12.
In the embodiment of the invention, when the second selection end of the first sub-controller inputs a high level signal through the first controller formed by 2 cascaded sub-controllers, the first output end outputs a low level signal; when the second selection end of the first sub-controller inputs a low level signal, the first output end outputs a high level signal; the control logic of circuit realization of the bidirectional two-wire system synchronous serial bus master-slave equipment butt joint circuit verification is simplified.
In some embodiments of the present invention, optionally, when the first device sends a level signal to the second device, the second device sends a low level signal to the first device by default; when the second device sends a level signal to the first device, the first device sends a low level signal to the second device by default.
In some embodiments of the present invention, optionally, the first sub-controller 13 and/or the second sub-controller 14 is a data selector.
In an embodiment of the invention, the first sub-controller and/or the second sub-controller is a data selector, wherein the first sub-controller has a higher execution priority than the second sub-controller.
In some embodiments of the present invention, optionally, when the first selection terminal is "1" (high level), the first output terminal outputs "0" (low level); when the first selection terminal is "0" (low level), the output depends on the output of the second selection terminal; the output of the second selection terminal depends on the level value of the second selection terminal, and when the second selection terminal is 1 (high level), the output of the first output terminal is 0 (low level); when it is "0" (low level), the first output terminal output is "1" (high level).
In some embodiments of the present invention, optionally, one of the first device 11 and the second device 21 is a master device, and the other is a slave device.
In the embodiment of the invention, when the first device and the second device supporting the bidirectional two-wire system synchronous serial bus are butted, one of the first device and the second device is a master device, and the other device is a slave device, the master-slave butting communication of the bidirectional two-wire system synchronous serial bus can be completed.
In some embodiments of the present invention, optionally, when the first device 11 is a master device, the method further includes: a multi-input or gate having n fourth input terminals and n fourth output terminals, the n fourth input terminals being used for one-to-one corresponding connection with the n second devices 21; the fourth output terminal is connected to the second selection terminal 122 of the first controller 12;
the data output end 111 is configured to be connected to n second devices 21, where n is a natural number greater than 0.
In the embodiment of the invention, the first device further comprises an input gate, and the master-slave butt-joint communication is realized when one master device is connected with a plurality of slave devices through circuit connection, so that the control logic of circuit realization of the master-slave butt-joint circuit verification of the two-way two-wire system synchronous serial bus when one master device is connected with a plurality of slave devices is simplified.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a communication interface 30 connected to a first device and a second device according to an embodiment of the present invention; wherein the first device 11 is a master device, and the second device 21 is a slave device;
the embodiment of the present invention provides a communication interface 30, which is applied between a master device 11 and at least one slave device 21, where the master device 11 and the slave device 21 support a bidirectional two-wire system synchronous serial bus, and include a first controller 12 and at least one second controller 15; one for each of the slave devices 21;
the first controller 12 comprises a first selection terminal 121, a second selection terminal 122 and a first output terminal 123;
the second controller 15 comprises a third selection terminal 151, a fourth selection terminal 152 and a second output terminal 153;
the first selection terminal 121 of the first controller 12 is connected to the fourth selection terminal 152 of each of the second controllers 15;
the first selection terminal 121 of the first controller 12 is further configured to be connected to the data output terminal 111 of the master device 11;
the first output 123 of the first controller 12 is configured to be connected to the data input 112 of the master device 11;
the third selection terminal 151 of each of the second controllers 15 is connected to the second selection terminal 122 of the first controller 12;
the third selection terminal 151 of each second controller 15 is further configured to be connected to the data output terminal 211 of the corresponding slave device 21;
the second output 153 of each second controller 15 is configured to be connected to the data input 212 of the corresponding slave device 21;
when the first selection terminal 121 of the first controller 12 receives a high level signal, it outputs a low level signal to the first output terminal 123 and the second output terminal 153;
when the first selection terminal 121 of the first controller 12 receives a low level signal and the second selection terminal 122 of the first controller 12 receives a high level signal, the low level signal is output to the first output terminal 123 and the second output terminal 153;
when the first selection terminal 121 of the first controller 12 receives a low level signal and the second selection terminal 122 of the first controller 12 receives a low level signal, it outputs a high level signal to the first output terminal 123 and the second output terminal 153.
In an embodiment of the present invention, a communication interface is provided, which is applied between a master device and at least one slave device, wherein the master device and the slave device support a bidirectional two-wire synchronous serial bus, and the communication interface includes a first controller and at least one second controller, and each slave device corresponds to one second controller; when a first selection end of the first controller receives a high-level signal, a low-level signal is output to a first output end and a second output end; when a first selection end of the first controller receives a low-level signal and a second selection end of the first controller receives a high-level signal, the low-level signal is output to a first output end and a second output end; when the first selection end of the first controller receives a low level signal and the second selection end of the first controller receives the low level signal, the high level signal is output to the first output end and the second output end, the circuit realization of the bidirectional two-wire system synchronous serial bus master-slave equipment butt circuit verification is greatly simplified, the circuit realization is not limited by the pin type in a process library, an external pull-up resistor is not needed, the simple master-slave interconnection and butt joint can be realized inside the SoC, and the external loopback connection is not needed; the butt joint of the master interface and the slave interface of the bidirectional two-wire system synchronous serial bus can be completed only through reasonable control, and the realization and the functional verification are carried out on a Field Programmable Gate Array (FPGA), thereby simplifying the development of master-slave butt joint verification means and accelerating the verification progress.
Referring to fig. 4, fig. 4 is a second schematic structural diagram of a communication interface 30 connected to a first device and a second device according to an embodiment of the present invention;
in some embodiments of the present invention, optionally, the first controller 12 and the second controller 15 each include a first sub-controller 13 and a second sub-controller 14;
the first sub-controller 13 includes: a first input 131, a second input 132, a third input 133, and a third output 134;
the second sub-controller 14 includes: a first input 141, a second input 142, a third input 143, and a third output 144;
the second input 132 of the first sub-controller 13 is connected to low level;
the first input 141 of the second sub-controller 14 is connected to high level;
a second input 142 of the second sub-controller 14 is connected to low level;
the first input 131 of the first sub-controller 13 is connected 143 to the third output of the second sub-controller 14;
the third input 133 of the first sub-controller 13 is configured to be connected to the first selection terminal 121 of the first controller 12;
a third input 143 of the second sub-controller 14 is configured to be connected to the second selection terminal 122 of the first controller 12;
the third output 134 of the first sub-controller 13 is used to connect to the first output 123 of the first controller 12.
In the embodiment of the invention, the first controller of the communication interface is composed of 2 cascaded sub-controllers, so that when the input of the second selection end of the first sub-controller is a high-level signal, the first output end outputs a low-level signal; when the second selection end of the first sub-controller inputs a low level signal, the first output end outputs a high level signal; the control logic of circuit realization of the bidirectional two-wire system synchronous serial bus master-slave equipment butt joint circuit verification is simplified.
In some embodiments of the present invention, optionally, when the first device sends a level signal to the second device, the second device sends a low level signal to the first device by default; when the second device sends a level signal to the first device, the first device sends a low level signal to the second device by default.
Referring to fig. 5, fig. 5 is a third schematic structural diagram of a communication interface 30 connected to a first device and a second device according to an embodiment of the present invention;
in some embodiments of the present invention, optionally, further comprising:
a multi-input or gate 31 having n fourth input terminals and n fourth output terminals, the n fourth input terminals being connected to the n third selection terminals 151 of the second controller 15 in a one-to-one correspondence; the fourth output terminal is connected to the second selection terminal 122 of the first controller 12, and n is a natural number greater than 0.
In the embodiment of the invention, the communication interface also comprises an input gate, so that the master-slave butt-joint communication when one master device is connected with a plurality of slave devices is realized, and the control logic of circuit realization of the master-slave butt-joint circuit verification of the two-way two-wire system synchronous serial bus when one master device is connected with a plurality of slave devices is simplified.
Referring to fig. 6, fig. 6 is a flowchart illustrating a communication method according to an embodiment of the present invention;
the present invention provides a communication method, which is applied to the first device described in any of the above embodiments, and includes:
step 61: when the data output end is connected with a second device, the data output end outputs a high level signal and/or a low level signal;
step 62: detecting a signal input by the data input end;
and step 63: and judging whether the second equipment is butted or not according to the signal input by the data input end.
In the embodiment of the invention, a communication method applied to a first device supporting a bidirectional two-wire system synchronous serial bus is provided, when the first device is connected with a second device, a data output end outputs a high level signal and/or a low level signal, a signal input by a data input end is detected, and whether the first device is in butt joint with the second device or not is judged according to the signal input by the data input end; the circuit realization of the bidirectional two-wire system synchronous serial bus master-slave equipment butt joint circuit verification is greatly simplified, the circuit is not limited by the pin type in a process library, an external pull-up resistor is not needed, simple master-slave interconnection and butt joint can be realized inside an SoC, and external loopback connection is not needed; the butt joint of the master interface and the slave interface of the bidirectional two-wire system synchronous serial bus can be completed only through reasonable control, and the realization and the functional verification are carried out on a Field Programmable Gate Array (FPGA), thereby simplifying the development of master-slave butt joint verification means and accelerating the verification progress.
In some embodiments of the present invention, optionally, the determining whether the docking with the second device is completed comprises:
when the data output end outputs a high level signal, receiving a low level signal output by the second equipment, and detecting that the data input end inputs a low level signal, wherein the first equipment and the second equipment are in butt joint;
when the data output end outputs a low level signal, receiving the low level signal output by the second equipment, and detecting that the data input end inputs a high level signal, wherein the first equipment and the second equipment are in butt joint;
when receiving a high level signal output by the second device, the data output end outputs a low level signal, and when detecting that the data input end inputs the low level signal, the first device and the second device are in butt joint;
and when receiving the low level signal output by the second equipment, the data output end outputs the low level signal, and detects that the data input end inputs the high level signal, and the first equipment and the second equipment are in butt joint.
In the embodiment of the invention, the level signal of the data input end is detected through the specific level signal sent by the data output end and the received level signal, so that the butt joint condition of the signal line between the first device and the second device is judged, the circuit realization of the butt joint circuit verification of the master device and the slave device of the bidirectional two-wire system synchronous serial bus is greatly simplified, the development of master-slave butt joint verification means is simplified, and the verification progress is accelerated.
Wherein:
when the data output end outputs a high level signal, receiving a low level signal output by second equipment, detecting that the data input end inputs a low level signal, and conducting a signal sending line from the first equipment to the second equipment (a signal receiving line from the second equipment to the first equipment);
when the data output end outputs a low level signal, the low level signal output by the second equipment is received, the high level signal input by the data input end is detected, and a signal sending line of the first equipment to the second equipment (a signal receiving line of the second equipment to the first equipment) is conducted;
when receiving a high level signal output by the second device, the data output end outputs a low level signal, and when detecting that the data input end inputs the low level signal, the second device is conducted to a signal sending line of the first device (the first device is conducted to a signal receiving line of the second device);
when receiving a low level signal output by the second device, the data output end outputs a low level signal, and when detecting that a high level signal is input by the data input end, the second device is conducted to a signal sending line of the first device (the first device is conducted to a signal receiving line of the second device).
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.
Claims (11)
1. A first device supporting a bidirectional two-wire system synchronous serial bus, comprising a device main body and a first controller;
the device body comprises a data output end and a data input end;
the first controller comprises a first selection end, a second selection end and a first output end;
the data output end of the equipment main body is connected with the first selection end of the first controller;
the data output end of the equipment main body is also used for being connected with second equipment;
the second selection end of the first controller is used for being connected with the second equipment;
a first output end of the first controller is connected with a data input end of the equipment main body;
at least one second controller, each second controller corresponding to a second device;
the second controller comprises a third selection end, a fourth selection end and a second output end;
the first selection end of the first controller is connected with the fourth selection end of each second controller;
the third selection end of each second controller is connected with the second selection end of the first controller;
the third selection end of each second controller is also used for being connected with corresponding second equipment;
the second output end of each second controller is also used for being connected with corresponding second equipment;
when the device body is connected with the second device, the device body is used for controlling the data output end to output a high level signal and/or a low level signal, detecting a signal input by the data input end, and judging whether the device body is in butt joint with the second device or not according to the signal input by the data input end.
2. The first device supporting a bidirectional two-wire synchronous serial bus according to claim 1, wherein when connected to the second device,
when the data output end outputs a high level signal, receiving a low level signal output by the second equipment, and detecting that the data input end inputs the low level signal;
when the data output end outputs a low level signal, receiving the low level signal output by the second equipment, and detecting that the data input end inputs a high level signal;
when receiving a high level signal output by the second device, the data output end outputs a low level signal, and detects that the data input end inputs the low level signal;
and when receiving the low level signal output by the second device, the data output end outputs the low level signal, and detects that the data input end inputs the high level signal.
3. The first device supporting a bidirectional two-wire synchronous serial bus according to claim 1,
the first controller comprises a first sub-controller and a second sub-controller;
the first sub-controller includes: a first input terminal, a second input terminal, a third input terminal, and a third output terminal;
the second sub-controller includes: a first input terminal, a second input terminal, a third input terminal, and a third output terminal;
the second input end of the first sub-controller is connected with a low level;
the first input end of the second sub-controller is connected with a high level;
a second input end of the second sub-controller is connected with a low level;
the first input end of the first sub-controller is connected with the third output end of the second sub-controller;
the third input end of the first sub-controller is used for being connected with the first selection end of the first controller;
a third input end of the second sub-controller is used for being connected with a second selection end of the first controller;
and the third output end of the first sub-controller is used for being connected with the first output end of the first controller.
4. The first device supporting a bidirectional two-wire synchronous serial bus according to claim 3,
the first sub-controller and/or the second sub-controller is a data selector.
5. The first device supporting a bidirectional two-wire synchronous serial bus according to claim 1,
one of the first device and the second device is a master device, and the other is a slave device.
6. The first device supporting a bidirectional two-wire synchronous serial bus according to claim 1,
when the first device is a master device, the method further includes: the multi-input OR gate is provided with n fourth input ends and n fourth output ends, and the n fourth input ends are used for being connected with the n second devices in a one-to-one correspondence mode; the fourth output end is connected with the second selection end of the first controller, and n is a natural number greater than 0;
the data output end is used for being connected with the n second devices, and n is a natural number larger than 0.
7. A communication interface, applied between a master device and at least one slave device, said master device and said slave device supporting a bidirectional two-wire synchronous serial bus, characterized by comprising a first controller and at least one second controller; each slave device corresponds to one second controller;
the first controller comprises a first selection end, a second selection end and a first output end;
the second controller comprises a third selection end, a fourth selection end and a second output end;
the first selection end of the first controller is connected with the fourth selection end of each second controller;
the first selection end of the first controller is also used for being connected with the data output end of the main device;
the first output end of the first controller is used for being connected with the data input end of the main equipment;
the third selection end of each second controller is connected with the second selection end of the first controller;
the third selection end of each second controller is also used for being connected with the data output end of the corresponding slave device;
the second output end of each second controller is used for being connected with the data input end of the corresponding slave device;
when a first selection end of the first controller receives a high-level signal, a low-level signal is output to the first output end and the second output end;
when a first selection end of the first controller receives a low-level signal and a second selection end of the first controller receives a high-level signal, outputting the low-level signal to the first output end and the second output end;
and when the first selection end of the first controller receives a low level signal and the second selection end of the first controller receives a low level signal, the first selection end outputs a high level signal to the first output end and the second output end.
8. The communication interface of claim 7,
the first controller and the second controller each comprise a first sub-controller and a second sub-controller;
the first sub-controller includes: a first input terminal, a second input terminal, a third input terminal, and a third output terminal;
the second sub-controller includes: a first input terminal, a second input terminal, a third input terminal, and a third output terminal;
the second input end of the first sub-controller is connected with a low level;
the first input end of the second sub-controller is connected with a high level;
a second input end of the second sub-controller is connected with a low level;
the first input end of the first sub-controller is connected with the third output end of the second sub-controller;
the third input end of the first sub-controller is used for being connected with the first selection end of the first controller;
a third input end of the second sub-controller is used for being connected with a second selection end of the first controller;
and the third output end of the first sub-controller is used for being connected with the first output end of the first controller.
9. The communication interface of claim 7, further comprising:
the multi-input OR gate is provided with n fourth input ends and n fourth output ends, and the n fourth input ends are connected with the third selection ends of the n second controllers in a one-to-one correspondence manner; the fourth output end is connected with the second selection end of the first controller, and n is a natural number greater than 0.
10. A communication method applied to the first device according to any one of claims 1 to 6, comprising:
when the data output end is connected with a second device, the data output end outputs a high level signal and/or a low level signal;
detecting a signal input by the data input end;
and judging whether the second equipment is butted or not according to the signal input by the data input end.
11. The communication method of claim 10, wherein the determining whether the docking with the second device is complete comprises:
when the data output end outputs a high level signal, receiving a low level signal output by the second equipment, and detecting that the data input end inputs a low level signal, wherein the first equipment and the second equipment are in butt joint;
when the data output end outputs a low level signal, receiving the low level signal output by the second equipment, and detecting that the data input end inputs a high level signal, wherein the first equipment and the second equipment are in butt joint;
when receiving a high level signal output by the second device, the data output end outputs a low level signal, and when detecting that the data input end inputs the low level signal, the first device and the second device are in butt joint;
and when receiving the low level signal output by the second equipment, the data output end outputs the low level signal, and detects that the data input end inputs the high level signal, and the first equipment and the second equipment are in butt joint.
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Address after: Room 263, block B, science and technology innovation center, 128 Shuanglian Road, Haining Economic Development Zone, Haining City, Jiaxing City, Zhejiang Province, 314400 Patentee after: Haining yisiwei IC Design Co.,Ltd. Patentee after: Beijing yisiwei Computing Technology Co.,Ltd. Address before: Room 263, block B, science and technology innovation center, 128 Shuanglian Road, Haining Economic Development Zone, Haining City, Jiaxing City, Zhejiang Province, 314400 Patentee before: Haining yisiwei IC Design Co.,Ltd. Patentee before: Beijing yisiwei Computing Technology Co.,Ltd. |