CN112667428A - BMC fault processing circuit, method and device, electronic equipment and storage medium - Google Patents
BMC fault processing circuit, method and device, electronic equipment and storage medium Download PDFInfo
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- 238000004590 computer program Methods 0.000 claims description 3
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Abstract
The application discloses a BMC fault processing circuit, a method and a device, electronic equipment and a storage medium, wherein the BMC fault processing circuit comprises a CPU, a component to be managed, a BMC and a CPLD; the BMC is connected with the CPLD; the CPU and the part to be managed are connected with one end of an electronic change-over switch, and the other end of the electronic change-over switch is connected with the BMC or the CPLD; the CPLD determines the fault of the BMC, and controls the electronic change-over switch to be connected with the CPLD; and the CPLD determines that the BMC is normal, and controls one end of the electronic change-over switch to be connected with the BMC. When the BMC fails, the management and configuration of the CPLD to the server are realized, and further the function of managing the server through the CPLD link under the BMC failure is realized; therefore, the problems that the server cannot be remotely monitored and crashes when the BMC fails are solved.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a BMC fault handling circuit, a method, an apparatus, an electronic device, and a storage medium.
Background
At present, a BMC controller is configured on a conventional server motherboard, and the controller can realize remote monitoring of a server, but once the BMC controller fails, the server cannot receive a remote monitoring instruction and cannot manage internal components of the server, so that the server crashes and crashes.
Therefore, a problem of server crash due to BMC failure needs to be solved.
The above is only for the purpose of assisting understanding of the technical solutions of the present application, and does not represent an admission that the above is prior art.
Disclosure of Invention
In order to solve the above problems, the present application provides a BMC fault handling circuit, a method, an apparatus, an electronic device, and a storage medium, where the circuit implements management and configuration of a CPLD on a server when a BMC fault occurs, and further implements a function of managing the server through a CPLD link when the BMC fault occurs.
The first aspect of the application discloses a BMC fault processing circuit, which comprises a CPU, a component to be managed, a BMC and a CPLD; wherein the content of the first and second substances,
the BMC is connected with the CPLD;
the CPU and the part to be managed are connected with one end of the electronic change-over switch, and the other end of the electronic change-over switch is connected with the BMC or the CPLD.
In one embodiment, the CPLD determines the BMC failure, and the CPLD controls one end of the electronic switch to be connected to the CPLD.
In one embodiment, the CPLD determines that the BMC is normal, and the CPLD controls one end of the electronic switch to be connected with the BMC.
A second aspect of the present application discloses a BMC fault handling method, which is applied to a BMC fault handling circuit as in any one of the first aspects, and the BMC fault handling method includes:
the CPLD judges whether the BMC has a fault;
and the CPLD controls one end of the electronic change-over switch to be connected with the BMC or the CPLD according to whether the BMC has faults or not.
A third aspect of the present application discloses a BMC fault handling device, which includes a BMC fault handling circuit as in any one of the first aspects, and the BMC fault handling device includes a fault detection unit and a processing unit; wherein the content of the first and second substances,
the fault detection unit is used for detecting whether the BMC has a fault through the CPLD;
and the processing unit controls one end of the electronic selector switch to be connected with the BMC or the CPLD according to the detection result of the fault detection unit.
A fourth aspect of the present application discloses an electronic device comprising a memory and a processor; wherein the memory and the processor communicate with each other via a bus, the memory storing program instructions executable by the processor, the processor invoking the program instructions to perform the method of the second aspect.
A fifth aspect of the present application discloses a computer storage medium storing a computer program which, when executed by a computer processor, implements the method according to the second aspect.
When the BMC fails, the management and configuration of the CPLD to the server are realized, and further the function of managing the server through the CPLD link under the BMC failure is realized; therefore, the problems that the server cannot be remotely monitored and crashes when the BMC fails are solved.
Drawings
The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the application and together with the description serve to explain the application and not to limit the application.
FIG. 1 is a schematic diagram of a BMC connection circuit in the prior art;
fig. 2 is a schematic structural diagram of a BMC fault handling circuit according to an embodiment of the present disclosure;
fig. 3 is a schematic flowchart of a BMC fault handling method according to an embodiment of the present disclosure;
fig. 4 is a schematic structural diagram of a BMC fault handling device according to an embodiment of the present disclosure.
Detailed Description
In order to more clearly explain the overall concept of the present application, the following detailed description is given by way of example in conjunction with the accompanying drawings.
The terms "first," "second," and the like in the description and in the claims of the present application and in the above-described drawings are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the order of such use may be interchanged under appropriate circumstances such that embodiments of the invention described herein may be practiced in other orders than those illustrated or described herein.
Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The CPLD is particularly the CPLD controller existing on a server mainboard, and the conventional function of the CPLD controller is responsible for power-on management of a server power supply; a BMC (baseboard Management controller) responsible for the Management and remote monitoring of the components of the server; the server is one of computers, and runs faster and has higher load than a common computer.
In fig. 1 is prior art. In the architecture scheme, if the BMC fails, the server cannot realize remote monitoring, the BMC services a part of the management component, and the server crashes.
Therefore, the present specification discloses a BMC fault handling circuit, which includes a CPU, a component to be managed, a BMC, and a CPLD. As shown in fig. 2.
The BMC is connected with the CPLD; the CPU and the part to be managed are connected with one end of the electronic change-over switch, and the other end of the electronic change-over switch is connected with the BMC or the CPLD.
In one example, the CPLD determines the BMC fault, and the CPLD controls one end of the electronic switch to be connected with the CPLD.
In one example, the CPLD determines that the BMC is normal, and the CPLD controls one end of the electronic selector switch to be connected with the BMC.
As shown in fig. 2, the communication signal line includes a plurality of signal line groups, and there are a plurality of corresponding switches to switch the communication signal line groups, and the description is given by using 1 switching control signal. The CPLD judges whether the BMC has a fault through a BMC fault signal line, and controls the change-over switch to enable communication signal lines of the CPU and the part to be managed to be connected to the BMC controller if the BMC has no fault; if the BMC has a fault, the electronic change-over switch is controlled to enable the communication signal wires of the CPU and the part to be managed to be connected to the CPLD, and the CPLD is used for managing and configuring the server and externally connecting an Ethernet interface to realize remote monitoring of the server.
At the moment, the CPU of the server and the communication signal of the main part originally accessed to the BMC are divided into another group of communication branches to the CPLD through the signal selector switch; when the BMC works normally, the signal change-over switch switches the communication channel to the BMC; if the BMC fails, the CPLD controls the signal change-over switch to change over the communication channel to the CPLD, and the CPLD takes over the functions of managing and configuring the server.
When the BMC fails, the management and configuration of the CPLD to the server are realized, and further the function of managing the server through the CPLD link under the BMC failure is realized; therefore, the problems that the server cannot be remotely monitored and crashes when the BMC fails are solved. That is, the system link channel is added, server system paralysis caused by single equipment failure at the BMC is prevented, the system fault tolerance capability is increased, and the server stability is improved.
The scheme of the specification changes the traditional mode that the server can be managed and configured only by the BMC, and adds the mode that the server is managed and configured by the CPLD controller, so that the problems that the server cannot be remotely monitored and crashes due to the fault of the BMC controller are solved. The method is equivalent to a mode of increasing server management and configuration, and establishes another server management and interaction channel through the CPLD, so as to play a role of redundant backup for the BMC.
At the moment, a communication interface is expanded on the basis of the existing mainboard CPLD controller, so that the management and configuration of the CPLD to the server are realized, and the function of simply managing the server through a CPLD link under the BMC fault is further realized. Because the CPLD configuration and management server is not perfect as BMC management, some necessary remote maintenance and equipment management configuration can be realized, so that the use of the server is prevented from being delayed; and subsequently, the BMC controller is overhauled or replaced in detail.
The present specification also discloses a BMC fault handling method, which is applied to the BMC fault handling circuit described above, and includes steps S301 to S302.
S301, the CPLD judges whether the BMC has a fault.
And S302, controlling one end of the electronic change-over switch to be connected with the BMC or the CPLD according to whether the BMC has a fault or not.
In one example, if the CPLD determines that the BMC is malfunctioning, one end of the CPLD controlling the electronic switch is connected to the CPLD.
In one example, if the CPLD determines that the BMC is normal, the CPLD controls one end of the electronic switch to be connected to the BMC.
In the above method embodiment, the same or similar parts to those in the above circuit embodiment are not described again.
The present specification also discloses a BMC fault handling device, which includes the BMC fault handling circuit described above, and the BMC fault handling device includes a fault detection unit and a processing unit. As shown in fig. 4.
The fault detection unit is used for detecting whether the BMC has a fault through the CPLD;
and the processing unit controls one end of the electronic selector switch to be connected with the BMC or the CPLD according to the detection result of the fault detection unit.
In one example, when the fault detection unit determines that the BMC is faulty, the processing unit controls one end of an electronic changeover switch to be connected with the CPLD; or when the fault detection unit determines that the BMC is normal, the processing unit controls one end of the electronic change-over switch to be connected with the BMC.
In the above device embodiment, the same or similar parts to those in the above circuit embodiment are not described again.
The present specification also discloses an electronic device comprising a memory and a processor. The memory and the processor communicate with each other via a bus, the memory storing program instructions executable by the processor, the processor invoking the program instructions to perform the method as described above.
The present specification also discloses a computer storage medium storing a computer program which, when executed by a computer processor, implements the method as described above.
The embodiments in the present specification are described in a progressive manner, and the same and similar parts among the embodiments are referred to each other, and each embodiment focuses on the differences from the other embodiments. In particular, for the system embodiment, since it is substantially similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
Those of skill would further appreciate that the various illustrative components and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both, and that the various illustrative components and steps have been described above generally in terms of their functionality in order to clearly illustrate this interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
The above description is only an example of the present application and is not intended to limit the present application. Various modifications and changes may occur to those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims (10)
1. The BMC fault processing circuit is characterized by comprising a CPU, a component to be managed, a BMC and a CPLD; wherein the content of the first and second substances,
the BMC is connected with the CPLD;
the CPU and the part to be managed are connected with one end of the electronic change-over switch, and the other end of the electronic change-over switch is connected with the BMC or the CPLD.
2. The BMC fault handling circuit of claim 1, wherein the CPLD determines the BMC fault, the CPLD controlling one end of the electronic switch to connect with the CPLD.
3. The BMC fault handling circuit of claim 1, wherein the CPLD determines that the BMC is normal, and the CPLD controls one end of the electronic switch to be connected to the BMC.
4. A BMC fault handling method applied to a BMC fault handling circuit according to any one of claims 1 to 3, the BMC fault handling method comprising:
the CPLD judges whether the BMC has a fault;
and the CPLD controls one end of the electronic change-over switch to be connected with the BMC or the CPLD according to whether the BMC has faults or not.
5. The BMC fault handling method of claim 4,
and if the CPLD determines that the BMC has a fault, one end of the CPLD controls the electronic change-over switch to be connected with the CPLD.
6. The BMC fault handling method of claim 4,
and if the CPLD determines that the BMC is normal, the CPLD controls one end of the electronic change-over switch to be connected with the BMC.
7. A BMC fault handling device, characterized in that the BMC fault handling device comprises a BMC fault handling circuit as claimed in any one of claims 1 to 3, the BMC fault handling device comprising a fault detection unit and a processing unit; wherein the content of the first and second substances,
the fault detection unit is used for detecting whether the BMC has a fault through the CPLD;
and the processing unit controls one end of the electronic selector switch to be connected with the BMC or the CPLD according to the detection result of the fault detection unit.
8. The BMC fault handling device of claim 7,
when the fault detection unit determines that the BMC has a fault, the processing unit controls one end of the electronic selector switch to be connected with the CPLD; or
And when the fault detection unit determines that the BMC is normal, the processing unit controls one end of the electronic change-over switch to be connected with the BMC.
9. An electronic device, comprising a memory and a processor; wherein the content of the first and second substances,
the memory and the processor communicate with each other via a bus, the memory storing program instructions executable by the processor, the processor invoking the program instructions to perform the method of any one of claims 4-6.
10. A computer storage medium, characterized in that it stores a computer program which, when executed by a computer processor, implements the method according to any one of claims 4-6.
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
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CN113835770A (en) * | 2021-11-30 | 2021-12-24 | 四川华鲲振宇智能科技有限责任公司 | Online replacement method and system for server management module |
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CN109882440A (en) * | 2019-04-16 | 2019-06-14 | 苏州浪潮智能科技有限公司 | A kind of fan rotation speed control apparatus and control method |
CN110659233A (en) * | 2019-09-11 | 2020-01-07 | 苏州浪潮智能科技有限公司 | Serial port information switching device and server |
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Patent Citations (3)
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CN109101009A (en) * | 2018-09-06 | 2018-12-28 | 华为技术有限公司 | Fault diagnosis system and server |
CN109882440A (en) * | 2019-04-16 | 2019-06-14 | 苏州浪潮智能科技有限公司 | A kind of fan rotation speed control apparatus and control method |
CN110659233A (en) * | 2019-09-11 | 2020-01-07 | 苏州浪潮智能科技有限公司 | Serial port information switching device and server |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
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CN113835770A (en) * | 2021-11-30 | 2021-12-24 | 四川华鲲振宇智能科技有限责任公司 | Online replacement method and system for server management module |
CN113835770B (en) * | 2021-11-30 | 2022-02-18 | 四川华鲲振宇智能科技有限责任公司 | Online replacement method and system for server management module |
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Effective date of registration: 20210819 Address after: 807-3, floor 8, block F, No. 9, Shangdi Third Street, Haidian District, Beijing 100085 Applicant after: Zhongcheng Hualong Computer Technology Co.,Ltd. Address before: 100086 No.114, 14th floor, block B, building 1, No.38, Zhongguancun Street, Haidian District, Beijing Applicant before: Shenwei Super Computing (Beijing) Technology Co.,Ltd. |