CN112667380A - Multiprocessor task scheduling method, device and storage medium - Google Patents
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Abstract
The invention relates to the technical field of computer task management, and discloses a multiprocessor task scheduling method, a device and a storage medium, wherein the technical scheme comprises the following steps: receiving a task creating instruction, distributing a CPU (central processing unit) for the task, determining that the task is a common task, dynamically binding the task and the CPU, receiving a task recovery instruction, acquiring the CPU for recovering the dynamic binding of the task, and sending the instruction to the CPU to realize task scheduling. The invention has at least the following beneficial effects: the utilization efficiency of the CPU cache can be improved, the scheduling overhead caused by frequent migration of tasks among different CPUs is avoided, and the task scheduling efficiency is improved.
Description
Technical Field
The present invention relates to the field of computer task management technologies, and in particular, to a method, an apparatus, and a storage medium for scheduling multiprocessor tasks.
Background
Multiprocessor refers to a computer with a set of processors (CPUs) that share a memory subsystem and a bus structure. The method is applied to various middle-high-end application fields, such as product platforms of consumer electronics, video security, intelligent hardware and the like. These application scenarios are often complex, and each CPU is assigned a certain number of tasks and scheduled to run by the operating system according to actual needs. The scheduling efficiency of the operating system is critical to the overall performance of the system. Each CPU is internally provided with a Cache unit (Cache), and the speed of accessing the Cache by the CPU is far higher than that of accessing a main memory. In the process of task scheduling by the operating system, the CPU cache is fully utilized as much as possible, so that the operating system can exert the maximum efficiency.
In an actual application scenario, each task is different in processing, and different in required CPU resources, and accordingly, the CPU is different in how busy it is when processing the tasks. For example, when a task with a complex algorithm runs, the CPU needs to perform intensive operations in a short time, and execute a large number of instructions, and thus is very busy. In other tasks, the CPU only needs to process simple things, and after processing, if no other tasks exist, the CPU enters an idle state to save system power consumption. The busy level of the CPU can be represented by a load rate, which ranges from 0 to 100%, and a higher value indicates that the CPU is busy for the period of time.
Generally, when a system runs, an operating system redistributes tasks in real time according to the load rate of each CPU, and the tasks are migrated from the CPUs with high load rates to the CPUs with low load rates, which is called load balancing.
Since the task scheduling behavior of the operating system itself also consumes CPU resources, it is desirable that the task scheduling behavior itself consumes as little CPU resources as possible while maintaining load balance among the CPUs. If the same task is frequently cut off among different CPUs, not only the cache of the CPUs cannot be fully utilized, but also the CPU time is excessively spent on scheduling behavior, and the CPU time is not used in actual execution of the task, so that the task scheduling efficiency is low.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides a multiprocessor task scheduling method which can realize dynamic binding between tasks and a CPU and improve task scheduling efficiency.
The invention also provides a multiprocessor task scheduling device with the multiprocessor task scheduling method.
The invention also provides a computer readable storage medium with the multiprocessor task scheduling method.
The multiprocessor task scheduling method according to the embodiment of the first aspect of the invention comprises the following steps: s100, receiving a task creating instruction, distributing a CPU (central processing unit) for the task, determining that the task is a common task, and dynamically binding the task and the CPU; s200, receiving a task recovery instruction, acquiring a CPU dynamically bound by a recovery task, and sending the instruction to the CPU to realize task scheduling.
According to some embodiments of the invention, the S100 further comprises: s110, receiving a task creating instruction; s120, if the task is determined to be a common task, the task is dynamically bound to a CPU, and the CPU is defaulted to be the CPU receiving a task creating instruction; and S130, adding the task to a task queue of the CPU.
According to some embodiments of the invention, further comprising: s140, if the task is determined to be a specific task of the CPU, the task is added to a task queue of the corresponding CPU.
According to some embodiments of the invention, the S200 further comprises: s210, receiving a task recovery instruction, acquiring a CPU dynamically bound by the task, and adding the task to a bound CPU task queue; and S220, if the dynamically bound CPU is determined to be the CPU receiving the task recovery instruction, setting a scheduling mark, and scheduling at the next scheduling time point.
According to some embodiments of the invention, further comprising: s230, determining that the dynamically bound CPU is not the CPU receiving the task recovery instruction, sending an interrupt instruction to the dynamically bound CPU, and informing the dynamically bound CPU to carry out scheduling.
According to some embodiments of the invention, further comprising: s300, receiving a task redistribution instruction, migrating the task from the CPU queue with the load rate larger than the first threshold value to the CPU queue with the load rate smaller than the second threshold value, and updating the dynamic binding relationship of the CPU.
According to some embodiments of the invention, the first threshold is greater than the second threshold.
According to some embodiments of the invention, the dynamic binding relationship remains stable under certain conditions.
The multiprocessor task scheduling device according to the second aspect of the present invention includes: the task allocation module is used for receiving a task creation instruction and allocating a CPU (central processing unit) for the task, wherein the task and the CPU realize a dynamic binding relationship; and the task recovery processing module is used for receiving a task recovery instruction, acquiring a CPU dynamically bound by a recovery task, and sending the instruction to the CPU to realize task scheduling.
A computer-readable storage medium according to an embodiment of the third aspect of the invention, has stored thereon a computer program that, when being executed by one or more processors, is capable of performing the steps of the multiprocessor task scheduling method of any one of the above.
The multiprocessor task scheduling method provided by the embodiment of the invention at least has the following beneficial effects: by the method, the task can be dynamically bound with the CPU when being created, the binding relation can not be changed due to the suspension and the recovery of the task, and the stability of the corresponding relation between the task and the CPU is effectively maintained. The tasks are run on the same CPU most of the time, so that the utilization efficiency of the CPU cache is improved, the scheduling overhead caused by frequent migration of the tasks among different CPUs is avoided, and the task scheduling efficiency is improved.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
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The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
FIG. 1 is a schematic flow chart of a method according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a task creation method according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a task recovery method according to an embodiment of the present invention;
FIG. 4 is a flowchart illustrating a task re-allocation method according to an embodiment of the present invention;
FIG. 5 is a block diagram of an apparatus according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the accompanying drawings are illustrative only for the purpose of explaining the present invention, and are not to be construed as limiting the present invention.
In the description of the present invention, the meaning of a plurality of means is one or more, the meaning of a plurality of means is two or more, and more than, less than, more than, etc. are understood as excluding the present number, and more than, less than, etc. are understood as including the present number. If the first and second are described for the purpose of distinguishing technical features, they are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated or implicitly indicating the precedence of the technical features indicated.
Referring to fig. 1, fig. 1 shows that the method of an embodiment of the present invention includes:
s100, receiving a task creating instruction, distributing a CPU (central processing unit) for the task, determining that the task is a common task, and dynamically binding the task and the CPU;
s200, receiving a task recovery instruction, acquiring a CPU dynamically bound by a recovery task, and sending the instruction to the CPU to realize task scheduling.
It will be appreciated that for a symmetric multiprocessor, each CPU corresponds to a task queue to be scheduled, and the operating system periodically migrates tasks from the CPU with the highest load rate to the CPU with the lowest load rate in order to maintain load balancing. Tasks in the multiprocessor are divided into two types, one type is a CPU specific task, which is fixedly bound on a certain CPU and cannot be migrated to other CPUs, such as a task in charge of processing the current CPU interrupt. The second class is generic tasks that are not bound to a particular CPU and can be dynamically migrated to other CPUs. The majority of tasks in the system are the second type of tasks, and the invention is mainly directed to the second type of tasks.
For the scheduling of the second type of task, in the conventional method, the task is not dynamically bound to a certain CPU when being created, so that the task is dynamically migrated back and forth between CPUs in the running process of the system. When the task runs on the CPU, a large amount of CPU cache is generated, and the CPU relies on the cache to improve the running efficiency. Because the caches of the CPUs are independent, after the task is migrated to other CPUs, the cache content on the previous CPU can not be used continuously, the task needs to regenerate the cache on the new CPU, and the process consumes resources relatively, so that the system efficiency is low; meanwhile, since the task is not bound to the CPU, the same task may be migrated back and forth between different CPUs, and resources are excessively consumed in the task scheduling behavior itself.
It should be noted that, for the problems existing at present, the present invention makes a relatively stable relationship between the normal task and the bound CPU by dynamically binding the normal task to the CPU, so that the cache of the CPU can be fully utilized, and the system resources consumed in system scheduling are saved. Thereby solving the technical problem existing in the prior art.
Referring to fig. 2, fig. 2 is a flowchart illustrating a task creating method according to an embodiment of the present invention, including:
s110, receiving a task creating instruction;
s120, if the task is determined to be a common task, the task is dynamically bound to a CPU, and the CPU is defaulted to be the CPU receiving a task creating instruction;
and S130, adding the task to a task queue of the CPU.
And S140, if the task is determined to be the specific task of the CPU, adding the task to the task queue of the corresponding CPU.
Specifically, when a task is created, if the task is a specific task of a CPU, the specific task is fixedly bound to a certain CPU and cannot be migrated to other CPUs, for example, a task in charge of processing current CPU interrupt, and the specific task is added to a task queue of a corresponding CPU; otherwise, dynamically allocating the CPU to be bound for the task, defaulting to the current CPU, namely the CPU which is executing the task flow, and then adding the task to the task queue of the CPU to be bound. Therefore, the new task and the current CPU establish a dynamic binding relationship, and the binding relationship is rarely changed in the subsequent task running process, so that the cache of the CPU can be fully utilized.
Fig. 3 is a flowchart illustrating a task recovery method according to an embodiment of the present invention, including:
s210, receiving a task recovery instruction, acquiring a CPU dynamically bound by a task, and adding the task to a bound CPU task queue;
and S220, if the dynamically bound CPU is determined to be the CPU receiving the task recovery instruction, setting a scheduling mark, and scheduling at the next scheduling time point.
And S230, if the dynamically bound CPU is determined not to be the CPU receiving the task recovery instruction, sending an interrupt instruction to the dynamically bound CPU, and informing the dynamically bound CPU to carry out scheduling.
Specifically, in the process of task running, a running task may be suspended by waiting for a certain resource, the task does not occupy the CPU resource after being suspended, and is not in the task queue of the CPU, but is added to the waiting queue of the resource, and when the resource is in place, the task is resumed.
In the process of task recovery, a CPU dynamically bound by a task is obtained first, and then the task is added to a task queue of the bound CPU. If the bound CPU is the current CPU, setting a scheduling mark, and scheduling at the next scheduling time point; if the bound CPU is not the current CPU, sending an interrupt to the bound CPU to inform the bound CPU to carry out scheduling, thus ensuring that the task which resumes operation can be scheduled to operate in time. At the same time, the bound CPU of the task in the process is not changed, so that the content in the original cache can still be utilized.
Referring to fig. 4, fig. 4 is a flowchart illustrating a task re-allocation method according to an embodiment of the present invention, including:
and receiving a task redistribution instruction, migrating the task from the CPU queue with the load rate larger than the first threshold value to the CPU queue with the load rate smaller than the second threshold value, and updating the dynamic binding relationship of the CPU.
Specifically, the operating system redistributes the tasks in real time according to the load ratios of the CPUs, and migrates the tasks from the task queue of the CPU with the high load ratio to the task queue of the CPU with the low load ratio. As tasks are migrated to additional CPUs, the corresponding dynamic binding relationships change, and the tasks are re-bound to the new CPUs. Firstly, removing a task from a task queue of a source CPU (namely, a CPU with high load rate), then adding the task into a task queue of a target CPU (namely, a CPU with low load rate), and finally modifying the binding relationship and changing the bound CPU of the task into the target CPU.
It should be noted that both the first threshold and the second threshold may be flexibly set according to the actual operation condition of the system, the first threshold may indicate a degree that the load rate is high, and the second threshold may indicate a degree that the load rate is low, when the system performs load balancing, the system schedules the task in the CPU with the high load rate into the CPU with the low load rate, and it can be understood that the first threshold is greater than the second threshold.
In some specific embodiments of the present invention, the dynamic binding relationship is kept stable under certain conditions, so as to ensure that once the dynamic binding relationship between the task and the CPU is established, the dynamic binding relationship cannot be changed due to the suspension and resumption of the operation of the task, effectively maintain the stability of the corresponding relationship between the task and the CPU, ensure that the task cannot be frequently switched randomly among different CPUs, improve the utilization efficiency of the CPU cache, reduce the overhead of the scheduling behavior, and thus improve the task scheduling efficiency.
FIG. 5 is a block schematic diagram of an apparatus of an embodiment of the invention, comprising:
the task allocation module is used for receiving a task creation instruction and allocating a CPU (central processing unit) for the task, and the task and the CPU realize a dynamic binding relationship;
and the task recovery processing module is used for receiving the task recovery instruction, acquiring the CPU dynamically bound by the recovery task, and sending the instruction to the CPU to realize task scheduling.
In some embodiments of the invention, there is a computer readable storage medium having stored thereon a computer program which, when executed by one or more processors, is capable of performing the steps of the multiprocessor task scheduling method of any one of the above.
It should be noted that, in the conventional method, the task does not have a dynamic binding relationship with the CPUs, and therefore, during the operation of the system, the task may be dynamically migrated back and forth between the CPUs. Resulting in low CPU cache utilization and excessive resource consumption in the task scheduling behavior itself.
According to the method, the task can be dynamically bound with the CPU when being created, the binding relation cannot be changed due to the fact that the task is suspended and resumed, and the binding relation is changed only when the task is migrated to other CPUs, so that the stability of the corresponding relation between the task and the CPU is effectively maintained. The tasks are run on the same CPU most of the time, so that the utilization efficiency of the CPU cache is improved, the scheduling overhead caused by frequent migration of the tasks among different CPUs is avoided, and the task scheduling efficiency is improved.
Although specific embodiments have been described herein, those of ordinary skill in the art will recognize that many other modifications or alternative embodiments are equally within the scope of this disclosure. For example, any of the functions and/or processing capabilities described in connection with a particular device or component may be performed by any other device or component. In addition, while various illustrative implementations and architectures have been described in accordance with embodiments of the present disclosure, those of ordinary skill in the art will recognize that many other modifications of the illustrative implementations and architectures described herein are also within the scope of the present disclosure.
Certain aspects of the present disclosure are described above with reference to block diagrams and flowchart illustrations of systems, methods, systems, and/or computer program products according to example embodiments. It will be understood that one or more blocks of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, respectively, can be implemented by executing computer-executable program instructions. Also, according to some embodiments, some blocks of the block diagrams and flow diagrams may not necessarily be performed in the order shown, or may not necessarily be performed in their entirety. In addition, additional components and/or operations beyond those shown in the block diagrams and flow diagrams may be present in certain embodiments.
Accordingly, blocks of the block diagrams and flowchart illustrations support combinations of means for performing the specified functions, combinations of elements or steps for performing the specified functions and program instruction means for performing the specified functions. It will also be understood that each block of the block diagrams and flowchart illustrations, and combinations of blocks in the block diagrams and flowchart illustrations, can be implemented by special purpose hardware-based computer systems that perform the specified functions, elements or steps, or combinations of special purpose hardware and computer instructions.
Program modules, applications, etc. described herein may include one or more software components, including, for example, software objects, methods, data structures, etc. Each such software component may include computer-executable instructions that, in response to execution, cause at least a portion of the functionality described herein (e.g., one or more operations of the illustrative methods described herein) to be performed.
The software components may be encoded in any of a variety of programming languages. An illustrative programming language may be a low-level programming language, such as assembly language associated with a particular hardware architecture and/or operating system platform. Software components that include assembly language instructions may need to be converted by an assembler program into executable machine code prior to execution by a hardware architecture and/or platform. Another exemplary programming language may be a higher level programming language, which may be portable across a variety of architectures. Software components that include higher level programming languages may need to be converted to an intermediate representation by an interpreter or compiler before execution. Other examples of programming languages include, but are not limited to, a macro language, a shell or command language, a job control language, a scripting language, a database query or search language, or a report writing language. In one or more exemplary embodiments, a software component containing instructions of one of the above programming language examples may be executed directly by an operating system or other software component without first being converted to another form.
The software components may be stored as files or other data storage constructs. Software components of similar types or related functionality may be stored together, such as in a particular directory, folder, or library. Software components may be static (e.g., preset or fixed) or dynamic (e.g., created or modified at execution time).
The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments, and various changes can be made within the knowledge of those skilled in the art without departing from the gist of the present invention.
Claims (10)
1. A method for scheduling multiprocessor tasks, comprising the steps of:
s100, receiving a task creating instruction, distributing a CPU (central processing unit) for the task, determining that the task is a common task, and dynamically binding the task and the CPU;
s200, receiving a task recovery instruction, acquiring a CPU dynamically bound by a recovery task, and sending the instruction to the CPU to realize task scheduling.
2. The multiprocessor task scheduling method of claim 1, wherein the S100 further comprises:
s110, receiving a task creating instruction;
s120, if the task is determined to be a common task, the task is dynamically bound to a CPU, and the CPU is defaulted to be the CPU receiving a task creating instruction;
and S130, adding the task to a task queue of the CPU.
3. The multiprocessor task scheduling method of claim 2, further comprising:
s140, if the task is determined to be a specific task of the CPU, the task is added to a task queue of the corresponding CPU.
4. The multiprocessor task scheduling method of claim 1, wherein the S200 further comprises:
s210, receiving a task recovery instruction, acquiring a CPU dynamically bound by the task, and adding the task to a bound CPU task queue;
and S220, if the dynamically bound CPU is determined to be the CPU receiving the task recovery instruction, setting a scheduling mark, and scheduling at the next scheduling time point.
5. The multiprocessor task scheduling method of claim 4, further comprising:
s230, determining that the dynamically bound CPU is not the CPU receiving the task recovery instruction, sending an interrupt instruction to the dynamically bound CPU, and informing the dynamically bound CPU to carry out scheduling.
6. The multiprocessor task scheduling method of claim 1, further comprising:
s300, receiving a task redistribution instruction, migrating the task from the CPU queue with the load rate larger than the first threshold value to the CPU queue with the load rate smaller than the second threshold value, and updating the dynamic binding relationship of the CPU.
7. The multiprocessor task scheduling method of claim 6, wherein the first threshold is greater than the second threshold.
8. The multiprocessor task scheduling method of claim 1, wherein the dynamic binding relationship remains stable under certain conditions.
9. A multiprocessor task scheduling apparatus, comprising:
the task allocation module is used for receiving a task creation instruction and allocating a CPU (central processing unit) for the task, wherein the task and the CPU realize a dynamic binding relationship;
and the task recovery processing module is used for receiving a task recovery instruction, acquiring a CPU dynamically bound by a recovery task, and sending the instruction to the CPU to realize task scheduling.
10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the method of any one of claims 1 to 8.
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