CN112654036A - Apparatus and method for blind decoding and/or channel estimation capability indication - Google Patents

Apparatus and method for blind decoding and/or channel estimation capability indication Download PDF

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Publication number
CN112654036A
CN112654036A CN202011072085.6A CN202011072085A CN112654036A CN 112654036 A CN112654036 A CN 112654036A CN 202011072085 A CN202011072085 A CN 202011072085A CN 112654036 A CN112654036 A CN 112654036A
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China
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value
higher layer
pdcch
circuitry
channel estimation
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阿维克·森古普塔
阿列克谢·达维多夫
比斯瓦鲁普·蒙达尔
德伯迪普·查特吉
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Intel Corp
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Intel Corp
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W8/00Network data management
    • H04W8/22Processing or transfer of terminal data, e.g. status or physical capabilities
    • H04W8/24Transfer of terminal data
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0023Systems modifying transmission characteristics according to link quality, e.g. power backoff characterised by the signalling
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00Arrangements for detecting or preventing errors in the information received
    • H04L1/0001Systems modifying transmission characteristics according to link quality, e.g. power backoff
    • H04L1/0036Systems modifying transmission characteristics according to link quality, e.g. power backoff arrangements specific to the receiver
    • H04L1/0038Blind format detection
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00Baseband systems
    • H04L25/02Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/0202Channel estimation

Abstract

The present disclosure provides apparatuses and methods for blind decoding and/or channel estimation capability indication. An apparatus for a UE comprising: a memory; and a processor circuit coupled with the memory via the interface, the processor circuit to: encoding AN indicator for transmission to the AN, wherein the indicator comprises a first value for indicating a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring the PDCCH; decoding first higher layer signaling, wherein the first higher layer signaling is transmitted by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and monitoring the PDCCH based on the second value, and wherein the memory is to store the second value. Other embodiments are also disclosed and claimed.

Description

Apparatus and method for blind decoding and/or channel estimation capability indication
Priority declaration
The present application is based on U.S. provisional application serial No. 62/914,288 filed on 11/10/2019 and claims priority from that application. The entire contents of this application are incorporated herein by reference in their entirety.
Technical Field
Embodiments of the present disclosure relate generally to the field of wireless communications, and in particular, to an apparatus and method for blind decoding and/or channel estimation capability indication.
Background
The explosive growth of wireless services has resulted in an urgent need for rate and capacity improvements. Communication using a plurality of Transmission and Reception Points (TRP)/panels (panel) has been introduced and studied to improve the rate and capacity of wireless communication. When using communication with multiple TRP/panels, it is necessary to improve the blind decoding and channel estimation capabilities accordingly.
Disclosure of Invention
An aspect of the present disclosure provides an apparatus for a User Equipment (UE), the apparatus comprising: a memory; and a processor circuit coupled with the memory via an interface, wherein the processor circuit is to: encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value for indicating a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); decoding first higher layer signaling, wherein the first higher layer signaling is transmitted by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and monitor the PDCCH based on the second value, and wherein the memory is to store the second value. .
An aspect of the disclosure provides a computer-readable medium having instructions stored thereon, wherein the instructions, when executed by processor circuitry of a User Equipment (UE), cause the processor circuitry to: decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling includes a per control resource set (CORESET) -based higher layer index for activating multi-Downlink Control Information (DCI) -based multi-Transmission Receive Point (TRP) operation of the UE; and responsive to the per-CORESET-based higher layer index, performing the multi-DCI based multi-TRP operation.
AN aspect of the present disclosure provides AN apparatus for AN Access Node (AN), the apparatus comprising: a Radio Frequency (RF) circuit interface; and a processor circuit coupled with the RF circuit interface, wherein the processor circuit is to: decoding an indicator received from a User Equipment (UE) via the RF circuit interface, wherein the indicator comprises a first value to indicate a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); encoding first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH; and cause transmission of the first higher layer signaling to the UE via the RF circuitry interface for the UE to monitor the PDCCH based on the second value.
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Embodiments of the present disclosure will be described by way of example, and not limitation, in the figures of the accompanying drawings in which like references indicate similar elements.
Fig. 1 illustrates an example architecture of a system according to some embodiments of the present disclosure.
Fig. 2 illustrates a flow diagram of a method for blind decoding/channel estimation capability indication in accordance with some embodiments of the present disclosure.
Fig. 3 illustrates a flow diagram of a method for blind decoding/channel estimation capability activation in accordance with some embodiments of the present disclosure.
Fig. 4 illustrates a flow diagram of a method for blind decoding/channel estimation capability indication in accordance with some embodiments of the present disclosure.
Fig. 5 illustrates example components of a device according to some embodiments of the present disclosure.
Fig. 6 illustrates an example interface of a baseband circuit according to some embodiments of the present disclosure.
Fig. 7 is a block diagram illustrating components capable of reading instructions from a machine-readable or computer-readable medium and performing any one or more of the methodologies discussed herein, according to some example embodiments.
Fig. 8 illustrates an example of an infrastructure device in accordance with various embodiments.
Detailed Description
Various aspects of the illustrative embodiments will be described using terms commonly employed by those skilled in the art to convey the substance of the disclosure to others skilled in the art. However, it will be readily appreciated by those skilled in the art that many alternative embodiments may be practiced using portions of the described aspects. For purposes of explanation, specific numbers, materials, and configurations are set forth in order to provide a thorough understanding of the illustrative embodiments. However, it will be apparent to one skilled in the art that alternative embodiments may be practiced without the specific details. In other instances, well-known features may be omitted or simplified in order not to obscure the illustrative embodiments.
Further, various operations will be described as multiple discrete operations, in a manner that is most helpful in understanding the illustrative embodiments; however, the order of description should not be construed as to imply that these operations are necessarily order dependent. In particular, these operations need not be performed in the order of presentation.
The phrases "in an embodiment," "in one embodiment," and "in some embodiments" are used repeatedly herein. The phrase generally does not refer to the same embodiment; however, it may refer to the same embodiment. The terms "comprising," "having," and "including" are synonymous, unless the context dictates otherwise. The phrases "A or B" and "A/B" mean "(A), (B) or (A and B)".
Fig. 1 illustrates an example architecture of a system 100 according to some embodiments of the present disclosure. The following description is provided for an example system 100 operating in conjunction with the Long Term Evolution (LTE) system standard and the 5G or New Radio (NR) system standard provided by the 3GPP Technical Specification (TS). However, the example embodiments are not limited in this respect and the described embodiments may be applied to other networks that benefit from the principles described herein, such as future 3GPP systems (e.g., sixth generation (6G)) systems, Institute of Electrical and Electronics Engineers (IEEE)802.16 protocols (e.g., wireless Metropolitan Area Network (MAN), Worldwide Interoperability for Microwave Access (WiMAX), etc.), and so forth.
As shown in FIG. 1, the system 100 can include a UE 101a and a UE 101b (collectively referred to as "UE(s) 101"). As used herein, the term "user equipment" or "UE" may refer to devices having radio communication capabilities and may describe remote users of network resources in a communication network. The terms "user equipment" or "UE" may be considered synonyms and may be referred to as a client, a mobile phone, a mobile device, a mobile terminal, a user terminal, a mobile unit, a mobile station, a mobile user, a subscriber, a user, a remote station, an access agent, a user agent, a receiver, a radio, a reconfigurable mobile, and the like. Furthermore, the terms "user equipment" or "UE" may include any type of wireless/wired device or any computing device that includes a wireless communication interface. In this example, the UE 101 is shown as a smartphone (e.g., a handheld touchscreen mobile computing device connectable to one or more cellular networks), but may also include any mobile or non-mobile computing device, such as a consumer electronic device, a cellular phone, a smartphone, a feature phone, a tablet, a wearable computer device, a Personal Digital Assistant (PDA), a pager, a wireless handheld device, a desktop computer, a laptop computer, an in-vehicle infotainment system (IVI), an in-vehicle entertainment (ICE) device, an Instrument panel (Instrument Cluster, IC), a head-up display (HUD) device, an in-vehicle diagnostics (OBD) device, a dashboard mobile Device (DME), a Mobile Data Terminal (MDT), an Electronic Engine Management System (EEMS), an electronic/Engine Control Unit (ECU), an electronic/Engine Control Module (ECM), a mobile computing device(s), a mobile computing device, a mobile, Embedded systems, microcontrollers, control modules, Engine Management Systems (EMS), networked or "smart" devices, Machine Type Communication (MTC) devices, machine-to-machine (M2M), internet of things (IoT) devices, and/or the like.
In some embodiments, any of the UEs 101 may include an IoT UE, which may include a network access layer designed for low-power IoT applications that utilize short-term UE connections. IoT UEs may utilize technologies such as M2M or MTC to exchange data with MTC servers or devices via PLMNs, proximity-based services (ProSe) or device-to-device (D2D) communications, sensor networks, or IoT networks. The data exchange of M2M or MTC may be a machine initiated data exchange. An IoT network describes interconnected IoT UEs that may include uniquely identifiable embedded computing devices (within the internet infrastructure) with short-term connections. The IoT UE may execute background applications (e.g., keep-alive messages, status updates, etc.) to facilitate connection of the IoT network.
UE 101 may be configured to connect with (e.g., communicatively couple with) RAN 110. In an embodiment, RAN 110 may be a Next Generation (NG) RAN or a 5G RAN, an evolved Universal Mobile Telecommunications System (UMTS) terrestrial radio access network (E-UTRAN), or a legacy RAN, such as a UTRAN (UMTS terrestrial radio access network) or a GERAN (GSM (global system for Mobile communications or group Sp specific Mobile) EDGE (GSM evolution) radio access network). As used herein, the term "NG RAN" or the like may refer to RAN 110 operating in an NR or 5G system 100, and the term "E-UTRAN" or the like may refer to RAN 110 operating in an LTE or 4G system 100. The UE 101 utilizes connections (or channels) 103 and 104, respectively, each of which includes a physical communication interface or layer (discussed in further detail below). As used herein, the term "channel" may refer to any tangible or intangible transmission medium that communicates data or a stream of data. The term "channel" may be synonymous and/or equivalent to "communication channel," "data communication channel," "transmission channel," "data transmission channel," "access channel," "data access channel," "link," "data link," "carrier," "radio frequency carrier," and/or any other similar term denoting a path or medium through which data is communicated. In addition, the term "link" may refer to a connection between two devices for the purpose of transmitting and receiving information over a Radio Access Technology (RAT).
In this example, connections 103 and 104 are shown as air interfaces to enable communicative coupling, and may be consistent with a cellular communication protocol, such as a global system for mobile communications (GSM) protocol, a Code Division Multiple Access (CDMA) network protocol, a push-to-talk (PTT) protocol, a cellular PTT (poc) protocol, a Universal Mobile Telecommunications System (UMTS) protocol, a 3GPP Long Term Evolution (LTE) protocol, a fifth generation (5G) protocol, a New Radio (NR) protocol, and/or any other communication protocol discussed herein. In an embodiment, the UE 101 may exchange communication data directly via the ProSe interface 105. The ProSe interface 105 may alternatively be referred to as a Sidelink (SL) interface 105 and may include one or more logical channels including, but not limited to, a Physical Sidelink Control Channel (PSCCH), a physical sidelink shared channel (PSCCH), a Physical Sidelink Discovery Channel (PSDCH), and a Physical Sidelink Broadcast Channel (PSBCH).
UE 101b is shown configured to access an Access Point (AP)106 (also referred to as "WLAN node 106", "WLAN terminal 106", or "WT 106", etc.) via a connection 107. The connection 107 may comprise a local wireless connection, such as a connection consistent with any IEEE 802.11 protocol, where the AP106 would comprise a wireless fidelity (WiFi) router. In this example, the AP106 is shown connected to the internet without being connected to the core network of the wireless system (described in further detail below). In various embodiments, UE 101b, RAN 110, and AP106 may be configured to utilize LTE-WLAN aggregation (LWA) operations and/or WLAN LTE/WLAN radio level integration (LWIP) operations with IPsec tunneling. LWA operation may involve UE 101b in RRC _ CONNECTED being configured by RAN node 111 to utilize radio resources of LTE and WLAN. The LWIP operation may involve the UE 101b using WLAN radio resources (e.g., connection 107) via an internet protocol security (IPsec) protocol tunnel to authenticate and encrypt packets (e.g., Internet Protocol (IP) packets) sent over the connection 107. An IPsec tunnel may include encapsulating the entire original IP packet and adding a new packet header to protect the original header of the IP packet.
RAN 110 may include one or more RAN nodes 111a and 111b (collectively referred to as "RAN node(s) 111") that enable connections 103 and 104. As used herein, the terms "Access Node (AN)", "access point", "RAN node", and the like may describe a device that provides radio baseband functionality for data and/or voice connections between a network and one or more users. These access nodes may be referred to as Base Stations (BSs), next generation node BS (gnbs), RAN nodes, evolved nodebs (enbs), nodebs, Road Side Units (RSUs), transmission reception points (TRxP or TRP), etc., and may include ground stations (e.g., ground access points) or satellite stations that provide coverage within a geographic area (e.g., a cell). As used herein, the term "NG RAN node" or the like may refer to a RAN node 111 (e.g., a gNB) operating in the NR or 5G system 100, and the term "E-UTRAN node" or the like may refer to a RAN node 111 (e.g., an eNB) operating in the LTE or 4G system 100. According to various embodiments, the RAN node 111 may be implemented as one or more dedicated physical devices such as a macro cell base station and/or a Low Power (LP) base station for a femto cell, pico cell or other similar cell providing a smaller coverage area, smaller user capacity or higher bandwidth than a macro cell.
In some embodiments, all or part of the RAN node 111 may be implemented as one or more software entities running on a server computer as part of a virtual network, which may be referred to as a Cloud Radio Access Network (CRAN) and/or a virtual baseband unit pool (vbbp). In these embodiments, the CRAN or vbbp may implement RAN functional partitioning, such as: PDCP partitioning, wherein RRC and PDCP layers are operated by the CRAN/vbbp, while other layer 2 (L2) protocol entities are operated by individual RAN nodes 111; MAC/PHY division, where RRC, PDCP, RLC and MAC layers are operated by the CRAN/vbup, and PHY layers are operated by individual RAN nodes 111; or "lower PHY" division, where the RRC, PDCP, RLC, MAC layers and upper parts of the PHY layers are operated by the CRAN/vbup and lower parts of the PHY layers are operated by the individual RAN node 111. The virtualization framework allows freeing up processor cores of RAN node 111 to execute other virtualized applications. In some implementations, the individual RAN nodes 111 may represent individual gNB-DUs that are connected to the gNB-CUs via individual F1 interfaces (not shown in fig. 1). In these implementations, the gbb-DUs may include one or more remote radio heads or radio front-end modules (RFEM), and the gbb-CUs may be operated by a server (not shown) located in the RAN 110 or by a server pool in a similar manner to the CRAN/vbbp. Additionally or alternatively, one or more RAN nodes 111 may be next generation enbs (NG-enbs), which are RAN nodes that provide E-UTRA user plane and control plane protocol terminations towards the UE 101 and which are connected to the 5GC via an NG interface.
In the V2X scenario, one or more RAN nodes 111 may be or act as RSUs. The term "roadside unit" or "RSU" may refer to any transportation infrastructure entity for V2X communication. The RSU may be implemented in or by a suitable RAN node or a fixed (or relatively stationary) UE, where the RSU in or by the UE may be referred to as a "UE-type RSU", the RSU in or by the eNB may be referred to as an "eNB-type RSU", the RSU in or by the gNB may be referred to as a "gNB-type RSU", and so on. In one example, an RSU is a computing device coupled with radio frequency circuitry located at the curb side that provides connectivity support for a passing vehicle UE 101(vUE 101). The RSU may also include internal data storage circuitry for storing intersection map geometry, traffic statistics, media, and applications/software for sensing and controlling ongoing vehicle and pedestrian traffic. The RSU may operate on the 5.9GHz Direct Short Range Communication (DSRC) band to provide very low latency communications required for high speed events, such as collision avoidance, traffic warnings, etc. Additionally or alternatively, the RSU may operate on the cellular V2X frequency band to provide the low latency communications described above as well as other cellular communication services. Additionally or alternatively, the RSU may operate as a WiFi hotspot (2.4GHz band) and/or provide a connection to one or more cellular networks to provide uplink and downlink communications. The computing device(s) and some or all of the radio frequency circuitry of the RSU may be enclosed in a weatherproof enclosure suitable for outdoor installation, and may include a network interface controller to provide wired (e.g., ethernet) connectivity to a traffic signal controller and/or a backhaul network.
Any RAN node 111 may terminate the air interface protocol and may be the first point of contact for the UE 101. In some embodiments, any RAN node 111 may fulfill various logical functions of RAN 110, including but not limited to Radio Network Controller (RNC) functions such as radio bearer management, uplink and downlink dynamic radio resource management and data packet scheduling, and mobility management.
In an embodiment, the UEs 101 may be configured to communicate with each other or any of the RAN nodes 111 over a multicarrier communication channel in accordance with various communication techniques, such as, but not limited to, Orthogonal Frequency Division Multiple Access (OFDMA) communication techniques (e.g., for downlink communications) or single carrier frequency division multiple access (SC-FDMA) communication techniques (e.g., for uplink and ProSe or sidelink communications), using Orthogonal Frequency Division Multiplexing (OFDM) communication signals, although the scope of the embodiments is not limited in this respect. The OFDM signal may include a plurality of orthogonal subcarriers.
In some embodiments, the downlink resource grid may be used for downlink transmissions from any RAN node 111 to the UE 101, while uplink transmissions may use similar techniques. The grid may be a time-frequency grid, referred to as a resource grid or time-frequency resource grid, which is the physical resource in the downlink per slot. Such a time-frequency plane representation is common practice for OFDM systems, which makes radio resource allocation intuitive. Each column and each row of the resource grid corresponds to one OFDM symbol and one OFDM subcarrier, respectively. The duration of the resource grid in the time domain corresponds to one time slot in a radio frame. The smallest time-frequency unit in the resource grid is represented as a resource element. Each resource grid includes a plurality of resource blocks, which describe the mapping of certain physical channels to resource elements. Each resource block comprises a set of resource elements; in the frequency domain, this may represent the minimum amount of resources that can currently be allocated. There are several different physical downlink channels transmitted using such resource blocks.
According to various embodiments, UE 101 and RAN node 111 communicate (e.g., transmit and receive) data over a licensed medium (also referred to as "licensed spectrum" and/or "licensed band") and an unlicensed shared medium (also referred to as "unlicensed spectrum and/or" unlicensed band "). The licensed spectrum may include channels operating in a frequency range of about 400MHz to about 3.8GHz, while the unlicensed spectrum may include a 5GHz band.
To operate in unlicensed spectrum, the UE 101 and RAN node 111 may operate using Licensed Assisted Access (LAA), enhanced LAA (elaa), and/or other elaa (felaa) mechanisms. In these implementations, UE 101 and RAN node 111 may perform one or more known medium sensing operations and/or carrier sensing operations to determine whether one or more channels in the unlicensed spectrum are unavailable or otherwise occupied prior to transmission in the unlicensed spectrum. The medium/carrier sensing operation may be performed according to a Listen Before Talk (LBT) protocol.
LBT is a mechanism in which a device (e.g., UE 101, RAN node 111,112, etc.) senses a medium (e.g., channel or carrier frequency) and transmits when the medium is sensed to be idle (or when a particular channel in the medium is sensed to be unoccupied). The medium sensing operation may include Clear Channel Assessment (CCA) that utilizes at least Energy Detection (ED) to determine whether other signals are present on the channel in order to determine whether the channel is occupied or clear. The LBT mechanism allows the cellular/LAA network to coexist with incumbent systems in unlicensed spectrum and with other LAA networks. ED may include sensing Radio Frequency (RF) energy over an expected transmission band for a period of time and comparing the sensed RF energy to a predetermined or configured threshold.
Generally, an incumbent system in the 5GHz band is a WLAN based on IEEE 802.11 technology. WLANs employ a contention-based channel access mechanism known as carrier sense multiple access with collision avoidance (CSMA/CA). Here, when a WLAN node (e.g., a Mobile Station (MS) such as UE 101, AP 106) intends to transmit, the WLAN node may first perform a CCA prior to the transmission. In addition, a back-off mechanism is used to avoid collisions in the case where more than one WLAN node senses the channel as idle and transmits at the same time. The back-off mechanism may be a counter drawn randomly within the Contention Window Size (CWS) that is exponentially increased when collisions occur and reset to a minimum value when a transmission is successful. The LBT mechanism designed for LAA is somewhat similar to CSMA/CA of WLAN. In some implementations, an LBT procedure for a DL or UL transmission burst including PDSCH or PUSCH transmissions, respectively, may have an LAA contention window of variable length between X and Y extended cca (ecca) slots, where X and Y are minimum and maximum values of a CWS for the LAA. In one example, the minimum CWS for LAA transmission may be 9 microseconds (μ β); however, the size of the CWS and the Maximum Channel Occupancy Time (MCOT) (e.g., transmission bursts) may be based on government regulatory requirements.
The LAA mechanism is established based on the Carrier Aggregation (CA) technique of the LTE-Advanced (LTE-Advanced) system. In CA, each aggregated carrier is referred to as a Component Carrier (CC). The CCs may have bandwidths of 1.4, 3, 5, 10, 15, or 20MHz, and may be aggregated for up to five CCs, and thus, the maximum aggregated bandwidth is 100 MHz. In a Frequency Division Duplex (FDD) system, the number of aggregated carriers may be different for DL and UL, where the number of UL CCs is equal to or lower than the number of DL component carriers. In some cases, individual CCs may have different bandwidths than other CCs. In a Time Division Duplex (TDD) system, the number of CCs and the bandwidth of each CC are typically the same for DL and UL.
The CA also includes individual serving cells to provide individual CCs. The coverage of the serving cell may be different, e.g., because CCs on different frequency bands will experience different path losses. A primary serving cell or primary cell (PCell) may provide a primary cc (pcc) for both UL and DL and may handle Radio Resource Control (RRC) and non-access stratum (NAS) related activities. The other serving cells are referred to as secondary cells (scells), and each SCell may provide a separate secondary cc (scc) for both UL and DL. SCCs may be added and removed as needed, while changing the PCC may require the UE 101 to undergo handover. In LAA, eLAA, and feLAA, some or all scells may operate in unlicensed spectrum (referred to as "LAA scells"), and the LAA scells are assisted by pcells operating in licensed spectrum. When a UE is configured with more than one LAA SCell, the UE may receive a UL grant on the configured LAA SCell, the UL grant indicating different Physical Uplink Shared Channel (PUSCH) starting positions within the same subframe.
The Physical Downlink Shared Channel (PDSCH) may carry user data and higher layer signaling to the UE 101. A Physical Downlink Control Channel (PDCCH) may carry information on a transport format and resource allocation related to a PDSCH channel, and the like. It may also inform the UE 101 of transport format, resource allocation and H-ARQ (hybrid automatic repeat request) information related to the uplink shared channel. In general, downlink scheduling (allocation of control and shared channel resource blocks to UEs 101b within a cell) may be performed at any RAN node 111 based on channel quality information fed back from any UE 101. The downlink resource allocation information may be sent on a PDCCH for (e.g., allocated to) each UE 101.
The PDCCH may use Control Channel Elements (CCEs) to convey control information. The PDCCH complex-valued symbols may first be organized into quadruplets before mapping to resource elements, which may then be permuted using a sub-block interleaver for rate matching. Each PDCCH may be transmitted using one or more of these CCEs, where each CCE may correspond to nine sets of four physical resource elements called Resource Element Groups (REGs). Four Quadrature Phase Shift Keying (QPSK) symbols may be mapped to each REG. The PDCCH may be transmitted using one or more CCEs, depending on the size of Downlink Control Information (DCI) and channel conditions. Four or more different PDCCH formats with different numbers of CCEs may be defined in LTE (e.g., aggregation level, L ═ 1, 2, 4, or 8).
Some embodiments may use the concept of resource allocation for control channel information, which is an extension of the above-described concept. For example, some embodiments may use an Enhanced Physical Downlink Control Channel (EPDCCH) that uses PDSCH resources for control information transmission. The EPDCCH may be transmitted using one or more Enhanced Control Channel Elements (ECCEs). Similar to the above, each ECCE may correspond to nine sets of four physical resource elements referred to as Enhanced Resource Element Groups (EREGs). In some cases, ECCE may have other numbers of EREGs.
The RAN nodes 111 may be configured to communicate with each other via an interface 112. In embodiments where system 100 is an LTE system, interface 112 may be an X2 interface 112. An X2 interface may be defined between two or more RAN nodes 111 (e.g., two or more enbs, etc.) connected to the EPC 120 and/or two enbs connected to the EPC 120. In some implementations, the X2 interfaces may include an X2 user plane interface (X2-U) and an X2 control plane interface (X2-C). The X2-U may provide a flow control mechanism for user data packets transmitted over the X2 interface and may be used to communicate information about user data transfer between enbs. For example, X2-U may provide specific sequence number information for user data transmitted from a master enb (menb) to a secondary enb (senb); information on successful in-order transmission of PDCP PDUs for user data from the SeNB to the UE 101; information of PDCP PDUs not delivered to the UE 101; information on a current minimum required buffer size at the SeNB for transmitting user data to the UE; and so on. X2-C may provide intra-LTE access mobility functions including context transfer from source eNB to target eNB, user plane transfer control, etc.; a load management function; and an inter-cell interference coordination function.
In embodiments where system 100 is a 5G or NR system, interface 112 may be an Xn interface 112. An Xn interface is defined between two or more RAN nodes 111 (e.g., two or more gnbs, etc.) connected to the 5GC 120, between a RAN node 111 (e.g., a gNB) connected to the 5GC 120 and an eNB, and/or between two enbs connected to the 5GC 120. In some implementations, the Xn interface can include an Xn user plane (Xn-U) interface and an Xn control plane (Xn-C) interface. The Xn-U can provide unsecured transport of user plane PDUs and support/provide data forwarding and flow control functionality. Xn-C may provide: management and error handling functions; managing the function of the Xn-C interface; mobility support for a UE 101 in CONNECTED mode (e.g., CM-CONNECTED) includes functionality to manage CONNECTED mode UE mobility between one or more RAN nodes 111. Mobility support may include context transfer from the old (source) serving RAN node 111 to the new (target) serving RAN node 111; and control of user plane tunnels between the old (source) serving RAN node 111 and the new (target) serving RAN node 111. The protocol stack of the Xn-U may include a transport network layer established above an Internet Protocol (IP) transport layer and a GTP-U layer above UDP(s) and/or IP layers for carrying user plane PDUs. The Xn-C protocol stack may include an application layer signaling protocol, referred to as the Xn application protocol (Xn-AP), and a transport network layer built over SCTP. SCTP can be located above the IP layer and can provide guaranteed delivery of application layer messages. In the transport IP layer, point-to-point transport is used to deliver signaling PDUs. In other implementations, the Xn-U protocol stack and/or the Xn-C protocol stack may be the same as or similar to the user plane and/or control plane protocol stack(s) shown and described herein.
RAN 110 is shown communicatively coupled to a core network, in this embodiment, Core Network (CN) 120. CN 120 may include a plurality of network elements 122 configured to provide various data and telecommunications services to clients/subscribers (e.g., users of UE 101) connected to CN 120 through RAN 110. The term "network element" may describe a physical or virtualized device used to provide wired or wireless communication network services. The term "network element" may be considered synonymous with and/or referred to as: a networking computer, network hardware, network device, router, switch, hub, bridge, radio network controller, radio access network device, gateway, server, Virtualized Network Function (VNF), Network Function Virtualization Infrastructure (NFVI), and/or the like. The components of CN 120 may be implemented in one physical node or separate physical nodes, including components that read and execute instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium). In some embodiments, Network Function Virtualization (NFV) may be used to virtualize any or all of the above network node functions via executable instructions stored in one or more computer-readable storage media (described in further detail below). Logical instantiations of the CN 120 may be referred to as network slices, and logical instantiations of a portion of the CN 120 may be referred to as network subslices. The NFV architecture and infrastructure may be used to virtualize one or more network functions or be executed by dedicated hardware onto physical resources including a combination of industry standard server hardware, storage hardware, or switches. In other words, the NFV system may be used to perform a virtual or reconfigurable implementation of one or more EPC components/functions.
In general, the application server 130 may be an element that provides applications that use IP bearer resources with a core network (e.g., UMTS Packet Service (PS) domain, LTE PS data services, etc.). The application server 130 may also be configured to support one or more communication services (e.g., voice over internet protocol (VoIP) sessions, PTT sessions, group communication sessions, social networking services, etc.) for the UE 101 via the EPC 120.
In an embodiment, the CN 120 may be a 5GC (referred to as "5 GC 120" or the like), and the RAN 110 may be connected with the CN 120 via the NG interface 113. In an embodiment, the NG interface 113 may be divided into two parts: a NG user plane (NG-U) interface 114 that carries traffic data between RAN node 111 and User Plane Functions (UPFs); and S1 control plane (NG-C) interface 115, which is the signaling interface between RAN node 111 and the AMF.
In an embodiment, the CN 120 may be a 5G CN (referred to as "5 GC 120," etc.), while in other embodiments, the CN 120 may be an Evolved Packet Core (EPC). In the case where CN 120 is an EPC (referred to as "EPC 120," etc.), RAN 110 may connect with CN 120 via S1 interface 113. In an embodiment, the S1 interface 13 may be divided into two parts: an S1 user plane (S1-U) interface 114, which carries traffic data between the RAN node 111 and the serving gateway (S-GW); and S1-Mobility Management Entity (MME) interface 115, which is a signaling interface between RAN node 111 and the MME.
In Rel-16 NR, a Multiple Input Multiple Output (MIMO) work item studies and specifies downlink reception of data from multiple TRPs/panels by a UE. A method for downlink reception of data from a plurality of TRPs may comprise: PDSCH transmissions from multiple TRPs to a UE are scheduled with an associated search space set using multiple DCIs transmitted within a PDCCH on multiple configured control resource sets (CORESET). When a UE is expected to decode multiple DCIs for multiple TRP transmissions, the corresponding blind decoding and channel estimation capabilities for the UE may be increased.
Methods are provided in the present disclosure for activating and/or instructing a UE to use increased blind decoding/channel estimation capability for multi-DCI based multi-TRP (multi-DCI based multi-TRP) operation in Rel-16 NR and future next generation cellular systems.
The channel estimation capability is related to a Control Channel Element (CCE), and thus, in the present disclosure, a blind decoding/channel estimation capability may be interchanged with a BD/CCE capability.
In some embodiments of the present disclosure, blind decoding/channel estimation capabilities may be described based on serving cell, Component Carrier (CC), bandwidth part (BWP), time slot, etc. (e.g., on a per serving cell, per Component Carrier (CC), per bandwidth part (BWP), per time slot, etc.).
In addition, blind decoding/channel estimation capability may be related to both: total number of monitored PDCCH candidates per slot basis with subcarrier spacing (SCS) configuration μ
Figure BDA0002715308680000141
Or total number of non-overlapping CCEs per slot with SCS configuration μ
Figure BDA0002715308680000142
Thus, "blind decoding/channel estimation capability"),
Figure BDA0002715308680000143
And "blind decoding/channel estimation total limit" are interchangeable in this disclosure.
In Rel-16 NR, a process of multi-TRP/panel operation based on multi-DCI is being specified. The following has been agreed:
if a higher layer index (also referred to herein as CORESET poolndex or per CORESET higher layer index) is configured per CORESET for a UE supporting multi-DCI based multi-TRP transmission, then the following principles of multi-DCI based multi-TRP transmission are supported:
for the case where multiple CORESETs are configured for the same TRP (e.g., the same coresetpoilndex value is configured per "PDCCH-Config"), the maximum number of monitored PDCCH candidates per slot with SCS configuration μ for DL BWP
Figure BDA0002715308680000144
And maximum number of non-overlapping CCEs per slot with SCS configuration μ
Figure BDA0002715308680000145
No greater than Rel.15 limits as defined in tables 10.1-2 and tables 10.1-3 in 3GPP TS 38.213V15.7.0 (2019-09);
calculation method of overall limit of blind decoding/channel estimation across configured CCs is the same as in rel.15, based on the description in subclause 10 of 3GPP TS 38.213V15.7.0(2019-09)
Figure BDA0002715308680000146
To calculate;
omicron (boundary derived from PDCCH-binddetectionca) when determining the maximum number of monitored PDCCH candidates and non-overlapping CCEs on a per-slot basis (defined in 3GPP TS 38.213V15.7.0 (2019-09))
Figure BDA0002715308680000151
And
Figure BDA0002715308680000152
) For the total restriction, the number of DL serving cell(s) configured for multi-DCI based multi-TRP transmission is increased by a factor of R, where R is a value indicating the degree to which the UE is to increase its blind decoding/channel estimation capability;
omicron (border independent of pdcch-binddetectionca) for a serving cell configured with multi-DCI based multi-TRP operation, as compared to that defined in tables 10.1-2 and 10.1-3 in 3GPP TS 38.213V15.7.0(2019-09),
Figure BDA0002715308680000153
and
Figure BDA0002715308680000154
increasing to R times;
to be further studied (FFS), the border is derived from or independent of pdcch-BlindDetectionSCG.
If a higher layer index (also referred to herein as CORESET poilndex or per CORESET higher layer index) is configured per CORESET for a UE supporting multi-DCI based multi-TRP transmission, the following is supported for the above principles:
omicron DL cell number with SCS configuration mu
Figure BDA0002715308680000155
Is replaced by
Figure BDA0002715308680000156
Figure BDA0002715308680000157
Wherein
Figure BDA0002715308680000158
Is the number of configured DL serving cell(s) with SCS μ, with active DL BWP, and without multi-DCI based multi-TRP operation, and
Figure BDA0002715308680000159
is the number of configured DL serving cell(s) with SCS μ, with active DL BWP, and with multi-DCI based multi-TRP operation;
the value range of omicr is [1, 2], which depends on the capability of the UE;
omicron UE indicates pdcch-blenddrotection ca if: a + B DL cells may be configured to the UE, where a > -0 DL serving cells without multi-DCI based multi-TRP operation and B > -0 DL serving cells with multi-DCI based multi-TRP operation, such that a + R · B > 4;
omicron when the UE does not provide pdcch-blenddrotection ca,
Figure BDA00027153086800001510
is a + R · b, where a is the number of configured DL serving cells without multi-DCI based multi-TRP operation and b is the number of configured DL serving cells with multi-DCI based multi-TRP operation.
For multi-TRP operation based on multiple DCI, UE capability reporting is supported. The UE may report the value R. This capability may only apply to downlink cells configured by the network for multi-DCI based multi-TRP operation. In the case where the UE reports its capabilities through a value of R >1, the network may not be authorized to use this reported capability to increase blind decoding/channel estimation capabilities for multiple TRP operation while sacrificing the flexibility of CA.
Therefore, it would be beneficial to allow the following two cases of multiple DCI based multiple TRP operation:
case A: the per-CC, per-slot based blind decoding/channel estimation limit is increased by a factor of R compared to Rel-15.
Case B: the per-CC, per-slot based blind decoding/channel estimation constraints are the same as in Rel-15.
Suppose R is 2, and
Figure BDA0002715308680000161
assume that 4 CCs are configured for CA, e.g., 4 cells are configured, including one primary cell (PCell) and three secondary cells (scells). It is also assumed that the actual number of PDCCH candidates/non-overlapping CCEs configured on the PCell is
Figure BDA0002715308680000162
While the actual number of PDCCH candidates/non-overlapping CCEs configured on each of the three scells is
Figure BDA0002715308680000163
For case A, assume the networkMultiple TRP operation based on multiple DCI is configured, so that
Figure BDA0002715308680000164
And is
Figure BDA0002715308680000165
In this case, blind decoding/channel estimation constraints are added
Figure BDA0002715308680000166
While blind decoding/channel estimation is limited by
Figure BDA0002715308680000167
It is given. In this case, the PDCCH candidates are not dropped on the PCell due to the increased blind decoding/channel estimation restriction. Therefore, it is not possible to configure PDCCH candidates for all scells beyond their respective limits
Figure BDA0002715308680000168
Because over-subscription (overbooking) is not allowed on the SCell, the search space must be reconfigured.
For case B, assume that the network configures multiple TRP operation based on multiple DCI such that
Figure BDA0002715308680000169
And is
Figure BDA00027153086800001610
This means that the per-CC based blind decoding/channel estimation limit is not increased compared to Rel-15. In this case, the PDCCH candidates will be dropped on the PCell according to the Rel-15 oversubscription rule. PDCCH candidates may be configured for each of the three SCells up to their maximum limit
Figure BDA00027153086800001611
And does not require reconfiguration of the search space.
Hereinafter, a method for blind decoding/channel estimation capability indication and activation will be described in detail with reference to fig. 2 to 4.
Fig. 2 illustrates a flow diagram of a method 200 for blind decoding/channel estimation capability indication in accordance with some embodiments of the present disclosure. The method 200 may be performed by a UE.
In 210, the UE may encode AN indicator for transmission to the AN (e.g., the gNB). The indicator may include a first value R for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring the PDCCH. In some embodiments, the first value may be greater than 1.
In 220, the UE may decode the first higher layer signaling. The first higher layer signaling may be sent by the AN in response to receiving the indicator in 210. The first higher layer signaling may comprise a second value Rapplied(also referred to as bdfactor) for indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH. The second value RappliedBased at least in part on the first value R. In some embodiments, the second value RappliedBut also based on bandwidth conditions, etc.
In some embodiments, the second value RappliedEqual to or less than the first value R.
In some embodiments, the UE may assign the second value RappliedStored in a memory.
In 230, the UE may be based on the second value RappliedThe PDCCH is monitored to perform multi-TRP operation based on the multi-DCI.
In some embodiments, when the UE report has a value R>1, the UE will expect higher layer parameters to be configured by the network specifying the actual value R of R being used by the networkappliedWherein R isapplied<R. In other words, the blind decoding/channel estimation capability is increased to RappliedMultiple times to enable the UE to perform multiple TRP operations based on multiple DCI.
In some embodiments, the bs may be based on time slot, CC set, cell, TRP, BWP, and/or UE (e.g., on a per-slot basis, on a per-CC set basis, on a per-cell basis, on a per-TRP basis, on a per-BWP basis, and/or/and/Or on a per UE basis) to indicate Rapplied
In some embodiments of the present invention, the,
Figure BDA0002715308680000171
in some embodiments, the UE may receive and decode second higher layer signaling sent from the AN. The second higher layer signaling may include coresetpoilndex to enable increased blind decoding/channel estimation capability of the UE. In other words, the AN may use coresetpoilndex to activate multi-DCI based multi-TRP operation of the UE. In one embodiment, the UE may receive the coresetpoilndex before reporting R to the AN. In another embodiment, the UE may report R before receiving coresetpoilndex from the AN. The embodiments are not limited in this respect.
In some embodiments, coresetpoilndex may include a value of 0 or 1.
In some embodiments, the UE may report R, where R >1, but may be configured by the network
Figure BDA0002715308680000181
Due to the fact that
Figure BDA0002715308680000182
Is configured as a single TRP cell
Figure BDA0002715308680000183
And RappliedMultiple TRP cell
Figure BDA0002715308680000184
In sum, the multiple TRP operation may thus be transparent to the UE. In these embodiments, the coresetpoolndex of all cells may be configured to have the same value, so the network configures the UE with blind decoding/channel estimation capabilities similar to the Rel-15 NR.
In some embodiments, the network is based on CORESETPoolIndex and RappliedOversubscription is applied to PDCCH candidates, e.g., on PCell. Overbooking means that the ratio is configured by the ANBlind decoding/channel estimation restricts more PDCCH candidates. Thus, the UE may be based on CORESETPoolIndex and RappliedTo check for oversubscription and determine that a rule according to R is reachedappliedDerived blind decoding/channel estimation constraints, PDCCH candidates that need to be detected. The remaining (out-of-limit) PDCCH candidates need not be detected, e.g., they may be discarded.
At RappliedIn the example of >1, oversubscription may be applied only to PDCCH candidates corresponding to coresetpoilndex 0. Thus, the UE may check a set of search spaces associated with the CORESET corresponding to coresetpoilndex 0. However, this example is described for illustrative purposes only, and the present disclosure is not limited in this regard. Thus, in another example, oversubscription may be applied to PDCCH candidates corresponding to coresetpoilndex ═ 1.
Fig. 3 illustrates a flow diagram of a method 300 for blind decoding/channel estimation capability activation in accordance with some embodiments of the present disclosure. The method 300 may be performed by a UE.
In 310, the UE may decode higher layer signaling received from the AN. The higher layer signaling may include a per CORESET based higher layer index (CORESET poilndex) to activate multi-DCI based multi-TRP operation of the UE.
In 320, the UE may perform multiple-TRP operation based on multiple DCI in response to a per-CORESET higher layer index.
As described above, a per CORESET based higher layer index (CORESET poilndex) may be used to activate multi-DCI based multi-TRP operation of the UE. The UE may then perform multiple TRP operation based on the multiple DCI and its blind decoding/channel estimation capability increases accordingly.
In some embodiments, the CORESET corresponding to two TRPs is configured to have the same CORESET poilndex value, any multiple TRP transmissions from these two TRPs may be transparent from the UE perspective and may not increase blind decoding/channel estimation capabilities.
Fig. 4 illustrates a flow diagram of a method 400 for blind decoding/channel estimation capability indication in accordance with some embodiments of the present disclosure. The method 400 may be performed by AN.
In 410, the AN may decode AN indicator comprising a first value indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring the PDCCH.
In 420, the AN may encode first higher layer signaling based at least in part on the first value. The first higher layer signaling may include a second value indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH.
In 430, the AN may send first higher layer signaling to the UE to monitor the PDCCH by the UE based on the second value.
The method 400 performed by the AN may be understood in conjunction with embodiments of the method 200 and will not be described in detail herein.
Methods for blind decoding/channel estimation capability indication and activation have been described above. With these methods, the UE may perform multiple TRP operation based on multiple DCI to increase the capability of downlink reception.
Fig. 5 illustrates example components of a device 500 according to some embodiments. In some embodiments, device 500 may include application circuitry 502, baseband circuitry 504, Radio Frequency (RF) circuitry 506, Front End Module (FEM) circuitry 508, one or more antennas 510, and Power Management Circuitry (PMC)512 coupled together at least as shown. The illustrated components of the apparatus 500 may be included in a UE or AN. In some embodiments, the apparatus 500 may include fewer elements (e.g., the AN may not use the application circuitry 502, but rather include a processor/controller to process IP data received from the EPC). In some embodiments, device 500 may include additional elements, such as memory/storage devices, displays, cameras, sensors, or input/output (I/O) interfaces. In other embodiments, the components described below may be included in more than one device (e.g., for a Cloud-RAN (C-RAN) implementation, the circuitry may be included separately in more than one device).
The application circuitry 502 may include one or more application processors. For example, the application circuitry 502 may include circuitry such as, but not limited to: one or more single-core or multi-core processors. The processor(s) may include any combination of general-purpose processors and special-purpose processors (e.g., graphics processors, application processors, etc.). The processor may be coupled with or may include memory/storage and may be configured to execute instructions stored in the memory/storage to enable various applications and/or operating systems to run on the device 500. In some embodiments, the processor of the application circuitry 502 may process IP packets received from the EPC.
The baseband circuitry 504 may include circuitry such as, but not limited to: one or more single-core or multi-core processors. Baseband circuitry 504 may include one or more baseband processors or control logic to process baseband signals received from the receive signal path of RF circuitry 506 and to generate baseband signals for the transmit signal path of RF circuitry 506. Baseband processing circuitry 504 may interface with application circuitry 502 to generate and process baseband signals and to control operation of RF circuitry 506. For example, in some embodiments, the baseband circuitry 504 may include a third generation (3G) baseband processor 504A, a fourth generation (4G) baseband processor 504B, a fifth generation (5G) baseband processor 504C, or other baseband processor(s) 504D for other existing generations, generations in development or to be developed in the future (e.g., sixth generation (6G), etc.). Baseband circuitry 504 (e.g., one or more of baseband processors 504A-D) may handle various radio control functions that support communication with one or more radio networks via RF circuitry 506. In other embodiments, some or all of the functions of the baseband processors 504A-D may be included in modules stored in the memory 504G and executed via a Central Processing Unit (CPU) 504E. The radio control functions may include, but are not limited to: signal modulation/demodulation, encoding/decoding, radio frequency shifting, etc. In some embodiments, the modulation/demodulation circuitry of baseband circuitry 504 may include Fast Fourier Transform (FFT), precoding, and/or constellation mapping/demapping functionality. In some embodiments, the encoding/decoding circuitry of baseband circuitry 504 may include convolution, tail-biting convolution, turbo, Viterbi (Viterbi), and/or Low Density Parity Check (LDPC) encoder/decoder functionality. Embodiments of modulation/demodulation and encoder/decoder functions are not limited to these examples, and other suitable functions may be included in other embodiments.
In some embodiments, the baseband circuitry 504 may include one or more audio Digital Signal Processors (DSPs) 504F. The audio DSP(s) 504F may include elements for compression/decompression and echo cancellation, and may include other suitable processing elements in other embodiments. In some embodiments, components of the baseband circuitry may be combined as appropriate in a single chip, a single chipset, or disposed on the same circuit board. In some embodiments, some or all of the constituent components of baseband circuitry 504 and application circuitry 502 may be implemented together, for example, on a system on a chip (SOC).
In some embodiments, the baseband circuitry 504 may provide communications compatible with one or more radio technologies. For example, in some embodiments, baseband circuitry 504 may support communication with an Evolved Universal Terrestrial Radio Access Network (EUTRAN) or other Wireless Metropolitan Area Network (WMAN), Wireless Local Area Network (WLAN), Wireless Personal Area Network (WPAN). Embodiments in which the baseband circuitry 504 is configured to support radio communications of more than one wireless protocol may be referred to as multi-mode baseband circuitry.
The RF circuitry 506 may support communication with a wireless network using modulated electromagnetic radiation through a non-solid medium. In various embodiments, the RF circuitry 506 may include switches, filters, amplifiers, and the like to facilitate communication with the wireless network. RF circuitry 506 may include a receive signal path that may include circuitry to down-convert RF signals received from FEM circuitry 508 and provide baseband signals to baseband circuitry 504. RF circuitry 506 may also include a transmit signal path that may include circuitry to up-convert baseband signals provided by baseband circuitry 504 and provide RF output signals to FEM circuitry 508 for transmission.
In some embodiments, the receive signal path of RF circuit 506 may include a mixer circuit 506a, an amplifier circuit 506b, and a filter circuit 506 c. In some embodiments, the transmit signal path of RF circuitry 506 may include filter circuitry 506c and mixer circuitry 506 a. The RF circuitry 506 may also include synthesizer circuitry 506d for synthesizing frequencies for use by the mixer circuitry 506a of the receive signal path and the transmit signal path. In some embodiments, the mixer circuit 506a of the receive signal path may be configured to down-convert the RF signal received from the FEM circuit 508 based on the synthesized frequency provided by the synthesizer circuit 506 d. The amplifier circuit 506b may be configured to amplify the downconverted signal, and the filter circuit 506c may be a Low Pass Filter (LPF) or a Band Pass Filter (BPF) configured to remove unwanted signals from the downconverted signal to generate an output baseband signal. The output baseband signal may be provided to baseband circuitry 504 for further processing. In some embodiments, the output baseband signal may be a zero frequency baseband signal, but this is not required. In some embodiments, mixer circuit 506a of the receive signal path may comprise a passive mixer, although the scope of the embodiments is not limited in this respect.
In some embodiments, the mixer circuitry 506a of the transmit signal path may be configured to up-convert the input baseband signal based on the synthesis frequency provided by the synthesizer circuitry 506d to generate the RF output signal for the FEM circuitry 508. The baseband signal may be provided by baseband circuitry 504 and may be filtered by filter circuitry 506 c.
In some embodiments, the mixer circuitry 506a of the receive signal path and the mixer circuitry 506a of the transmit signal path may comprise two or more mixers and may be arranged for quadrature down-conversion and/or up-conversion, respectively.
In some embodiments, the mixer circuit 506a of the receive signal path and the mixer circuit 506a of the transmit signal path may include two or more mixers and may be arranged for image rejection (e.g., Hartley image rejection). In some embodiments, the mixer circuit 506a of the receive signal path and the mixer circuit 506a of the transmit signal path may be arranged for direct down-conversion and/or direct up-conversion, respectively. In some embodiments, mixer circuit 506a of the receive signal path and mixer circuit 506a of the transmit signal path may be configured for superheterodyne operation.
In some embodiments, the output baseband signal and the input baseband signal may be analog baseband signals, although the scope of the embodiments is not limited in this respect. In some alternative embodiments, the output baseband signal and the input baseband signal may be digital baseband signals. In these alternative embodiments, RF circuitry 506 may include analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuitry, and baseband circuitry 504 may include a digital baseband interface to communicate with RF circuitry 506.
In some dual-mode embodiments, separate radio IC circuitry may be provided to process signals for each spectrum, although the scope of the embodiments is not limited in this respect.
In some embodiments, synthesizer circuit 506d may be a fractional-N synthesizer or a fractional-N/N +1 synthesizer, although the scope of embodiments is not limited in this respect as other types of frequency synthesizers may be suitable. For example, synthesizer circuit 506d may be a delta-sigma synthesizer, a frequency multiplier, or a synthesizer including a phase locked loop with a frequency divider.
The synthesizer circuit 506d may be configured to synthesize an output frequency for use by the mixer circuit 506a of the RF circuit 506 based on the frequency input and the divider control input. In some embodiments, the synthesizer circuit 506d may be a fractional-N/N +1 type synthesizer.
In some embodiments, the frequency input may be provided by a Voltage Controlled Oscillator (VCO), but this is not required. The divider control input may be provided by the baseband circuitry 504 or the application processor 502 depending on the desired output frequency. In some embodiments, the divider control input (e.g., N) may be determined from a look-up table based on the channel indicated by the application processor 502.
Synthesizer circuit 506d of RF circuit 506 may include a frequency divider, a Delay Locked Loop (DLL), a multiplexer, and a phase accumulator. In some embodiments, the divider may be a dual-mode divider (DMD) and the phase accumulator may be a Digital Phase Accumulator (DPA). In some embodiments, the DMD may be configured to divide an input signal by N or N +1 (e.g., based on a carry out) to provide a fractional division ratio. In some example embodiments, a DLL may include a set of cascaded, tunable delay elements, a phase detector, a charge pump, and a D-type flip-flop. In these embodiments, the delay elements may be configured to decompose the VCO period into at most Nd equal phase groups, where Nd is the number of delay elements in the delay line. In this manner, the DLL provides negative feedback to help ensure that the total delay through the delay line is one VCO cycle.
In some embodiments, synthesizer circuit 506d may be configured to generate a carrier frequency as the output frequency, while in other embodiments, the output frequency may be a multiple of the carrier frequency (e.g., twice the carrier frequency, four times the carrier frequency) and used with a quadrature generator and divider circuit to generate a plurality of signals having a plurality of different phases from one another at the carrier frequency. In some embodiments, the output frequency may be the LO frequency (fLO). In some embodiments, the RF circuit 506 may include an IQ/polarity converter.
FEM circuitry 508 may include a receive signal path that may include circuitry configured to operate on RF signals received from one or more antennas 510, amplify the received signals, and provide amplified versions of the received signals to RF circuitry 506 for further processing. FEM circuitry 508 may also include a transmit signal path that may include circuitry configured to amplify signals provided by RF circuitry 506 for transmission by one or more of the one or more antennas 510. In various embodiments, amplification through the transmit signal path or the receive signal path may be done only in RF circuitry 506, only in FEM 508, or both RF circuitry 506 and FEM 508.
In some embodiments, the FEM circuitry 508 may include a TX/RX switch to switch between transmit mode and receive mode operation. The FEM circuitry may include a receive signal path and a transmit signal path. The receive signal path of the FEM circuitry may include a Low Noise Amplifier (LNA) to amplify the received RF signal and provide the amplified received RF signal as an output (e.g., to RF circuitry 506). The transmit signal path of FEM circuitry 508 may include a Power Amplifier (PA) to amplify an input RF signal (e.g., provided by RF circuitry 506) and one or more filters to generate an RF signal for subsequent transmission (e.g., by one or more of antennas 510).
In some embodiments, PMC 512 may manage power provided to baseband circuitry 504. Specifically, PMC 512 may control power selection, voltage scaling, battery charging, or DC-DC conversion. PMC 512 may generally be included when device 500 is capable of being powered by a battery, for example, when the device is included in a UE. PMC 512 may improve power conversion efficiency while providing desired implementation size and heat dissipation characteristics.
Although figure 5 shows PMC 512 coupled only to baseband circuitry 504. However, in other embodiments, PMC 512 may additionally or alternatively be coupled with and perform similar power management operations on other components, such as, but not limited to, application circuitry 502, RF circuitry 506, or FEM 508.
In some embodiments, PMC 512 may control or otherwise be part of various power saving mechanisms of device 500. For example, if the device 500 is in an RRC _ Connected state where the device 500 is still Connected to the RAN node when it expects to receive traffic soon, then after a period of inactivity it may enter a state called discontinuous reception mode (DRX). During this state, the device 500 may be powered down for a brief interval of time, thereby saving power.
If there is no data traffic activity for an extended period of time, the device 500 may transition to an RRC _ Idle state in which the device 500 is disconnected from the network and no operations such as channel quality feedback, handover, etc. are performed. The device 500 enters a very low power state and performs paging, where the device 500 again periodically wakes up to listen to the network and then powers down again. The device 500 may not receive data in this state and it may transition back to the RRC Connected state in order to receive data.
The additional power-save mode may allow the device to be unavailable to the network for a period longer than the paging interval (ranging from a few seconds to a few hours). During this time, the device is completely unable to access the network and may be completely powered down. Any data transmitted during this period will incur a significant delay and the delay is assumed to be acceptable.
The processor of the application circuitry 502 and the processor of the baseband circuitry 504 may be used to execute elements of one or more instances of a protocol stack. For example, the processor of the baseband circuitry 504 (alone or in combination) may be configured to perform layer 3, layer 2, or layer 1 functions, while the processor of the application circuitry 504 may utilize data (e.g., packet data) received from these layers and further perform layer 4 functions (e.g., Transmission Communication Protocol (TCP) and User Datagram Protocol (UDP) layers). As mentioned herein, layer 3 may include an RRC layer. As referred to herein, layer 2 may include a Medium Access Control (MAC) layer, a Radio Link Control (RLC) layer, and a Packet Data Convergence Protocol (PDCP) layer. As referred to herein, layer 1 may comprise the Physical (PHY) layer of the UE/RAN node.
Fig. 6 illustrates an example interface of a baseband circuit according to some embodiments. As described above, the baseband circuitry 504 of FIG. 5 may include processors 504A-504E and memory 504G used by the processors. Each of the processors 504A-504E may include a memory interface 604A-604E, respectively, to send and receive data to and from the memory 504G.
The baseband circuitry 504 may also include one or more interfaces, to communicatively couple to other circuitry/devices, such as a memory interface 612 (e.g., an interface for sending/receiving data to/from memory external to baseband circuitry 504), an application circuitry interface 614 (e.g., an interface for sending/receiving data to/from application circuitry 502 of fig. 5), an RF circuitry interface 616 (e.g., an interface for sending/receiving data to/from RF circuitry 506 of fig. 5), a wireless hardware connection interface 618 (e.g., an interface for sending/receiving data to/from Near Field Communication (NFC) components, bluetooth components (e.g., bluetooth low power), Wi-Fi components, and other communication components), and a power management interface 620 (e.g., an interface for sending/receiving power or control signals to/from PMC 512).
Fig. 7 is a block diagram illustrating components capable of reading instructions from a machine-readable or computer-readable medium (e.g., a non-transitory machine-readable storage medium) and performing any one or more of the methodologies discussed herein, according to some example embodiments. In particular, fig. 7 shows a diagrammatic representation of hardware resources 700, which includes one or more processors (or processor cores) 710, one or more memory/storage devices 720, and one or more communication resources 730, each of which may be communicatively coupled by a bus 740. For embodiments utilizing node virtualization (e.g., NFV), hypervisor 702 may be executed to provide an execution environment for one or more network slices/subslices to utilize hardware resources 700.
Processor 710 (e.g., a Central Processing Unit (CPU), a Reduced Instruction Set Computing (RISC) processor, a Complex Instruction Set Computing (CISC) processor, a Graphics Processing Unit (GPU), a Digital Signal Processor (DSP) such as a baseband processor, an Application Specific Integrated Circuit (ASIC), a Radio Frequency Integrated Circuit (RFIC), another processor, or any suitable combination thereof) may include, for example, processor 712 and processor 714.
Memory/storage 720 may include a main memory, a disk storage, or any suitable combination thereof. The memory/storage 720 may include, but is not limited to, any type of volatile or non-volatile memory, such as Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), flash memory, solid state storage, and the like.
Communication resources 730 may include interconnection or network interface components or other suitable devices to communicate with one or more peripherals 704 or one or more databases 706 via network 708. For example, communication resources 730 may include wired communication components (e.g., for coupling via a Universal Serial Bus (USB)), cellular communication components, NFC components, bluetooth components (e.g., bluetooth low energy), Wi-Fi components, and other communication components.
Instructions 750 may include software, programs, applications, applets, apps, or other executable code for causing at least any processor 710 to perform any one or more of the methods discussed herein. The instructions 750 may reside, completely or partially, within at least one of the processor 710 (e.g., within a processor's cache memory), the memory/storage 720, or any suitable combination thereof. Further, any portion of instructions 750 may be communicated to hardware resource 700 from any combination of peripheral device 704 or database 706. Thus, the processor 710, memory/storage 720, peripherals 704, and the memory of database 706 are examples of computer-readable and machine-readable media.
Fig. 8 illustrates an example of an infrastructure device 800 according to various embodiments. Infrastructure device 800 (or "system 800") may be implemented as a base station, a radio head, a RAN node, etc., such as RAN nodes 111 and 112 and/or AP106 shown and described previously. In other examples, system 800 may be implemented in or by a UE, application server(s) 130, and/or any other elements/devices discussed herein. The system 800 may include one or more of the following: an application circuit 805, a baseband circuit 810, one or more radio front end modules 815, a memory 820, a Power Management Integrated Circuit (PMIC) 825, a power tee circuit 830, a network controller 835, a network interface connector 840, a satellite positioning circuit 845, and a user interface 850. In some embodiments, device 800 may include additional elements, such as memory/storage, a display, a camera, sensors, or input/output (I/O) interface elements. In other embodiments, the components described below may be included in more than one device (e.g., for a cloud RAN (C-RAN) implementation, the circuitry may be included separately in more than one device).
As used herein, the term "circuitry" may refer to, be part of, or include hardware components such as the following configured to provide the described functionality: electronic circuits, logic circuits, processors (shared, dedicated, or group) and/or memories (shared, dedicated, or group), Application Specific Integrated Circuits (ASICs), field-programmable devices (FPDs) (e.g., field-programmable gate arrays (FPGAs), Programmable Logic Devices (PLDs), complex PLDs (complex PLDs, CPLDs), high-capacity PLDs (HCPLDs), structured ASICs, or System on Chip (socs)), Digital Signal Processors (DSPs), and so forth. In some embodiments, the circuitry may execute one or more software or firmware programs to provide at least some of the described functionality. Furthermore, the term "circuitry" may also refer to a combination of one or more hardware elements (or circuitry used in an electrical or electronic system) and program code for performing the functions of the program code. In these embodiments, the combination of hardware elements and program code may be referred to as a particular type of circuitry.
The terms "application circuitry" and/or "baseband circuitry" may be considered synonymous with "processor circuitry" and may be referred to as "processor circuitry". As used herein, the term "processor circuit" may refer to, be part of, or include circuitry that: the circuit is capable of sequentially and automatically performing a sequence of arithmetic or logical operations; and recording, storing and/or transmitting digital data. The term "processor circuit" may refer to one or more application processors, one or more baseband processors, physical Central Processing Units (CPUs), single-core processors, dual-core processors, tri-core processors, quad-core processors, and/or any other device capable of executing or otherwise manipulating computer-executable instructions, such as program code, software modules, and/or functional processes.
Further, the various components of the core network 120 (or CN 120 discussed previously) may be referred to as "network elements. The term "network element" may describe a physical or virtualized device used to provide wired or wireless communication network services. The term "network element" may be considered synonymous with and/or referred to as: a networking computer, networking hardware, network device, network node, router, switch, hub, bridge, radio network controller, radio access network device, gateway, server, Virtualized Network Function (VNF), Network Function Virtualization Infrastructure (NFVI), and so forth.
The application circuitry 805 may include one or more Central Processing Unit (CPU) cores and one or more of the following: a cache memory, a Low Drop Out (LDO) regulator, an interrupt controller, a Serial Interface such as SPI, I2C, or a Universal programmable Serial Interface module, a Real Time Clock (RTC), a timer-counter including interval and watchdog timers, a Universal input/output (I/O or IO), a memory card controller such as a Secure Digital (SD)/multimedia card (MMC), a Universal Serial Bus (USB) Interface, a Mobile Industrial Processor Interface (MIPI) Interface, and a Joint Test Access Group (JTAG) Test Access port. By way of example, the application circuit 805 may include one or more Intels
Figure BDA0002715308680000281
Or
Figure BDA0002715308680000282
A processor; ultramicron semiconductor (Advanced Micro Devices, AMD)
Figure BDA0002715308680000283
A processor, an Accelerated Processing Unit (APU), or
Figure BDA0002715308680000284
A processor; and so on. In some embodiments, system 800 may not utilize application circuitry 805, but may include, for example, a dedicated processor/controller to process reception from the EPC or 5GCIP data of (2).
Additionally or alternatively, the application circuitry 805 may include circuitry such as (but not limited to) the following: one or more Field Programmable Devices (FPDs), such as Field Programmable Gate Arrays (FPGAs), etc.; programmable Logic Devices (PLDs), such as complex PLDs (cplds), high capacity PLDs (hcplds), and the like; ASICs, such as structured ASICs and the like; programmable soc (psoc); and so on. In such embodiments, the circuitry of the application circuitry 805 may comprise a logic block or logic architecture, including other interconnected resources, that may be programmed to perform various functions, such as the processes, methods, functions, etc. of the various embodiments discussed herein. In such embodiments, the circuitry of the application circuit 805 may include a storage unit (e.g., an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a flash memory, a static memory (e.g., Static Random Access Memory (SRAM), an antifuse, etc.) for storing logic blocks, logic architectures, data, etc. in a lookup table (LUT), and so forth.
Baseband circuitry 810 may be implemented, for example, as a solder-in substrate including one or more integrated circuits, a single packaged integrated circuit soldered to a main circuit board, or a multi-chip module containing two or more integrated circuits. Although not shown, baseband circuitry 810 may include one or more digital baseband systems, which may be coupled to a CPU subsystem, an audio subsystem, and an interface subsystem via an interconnection subsystem. The digital baseband subsystem may also be coupled to the digital baseband interface and the mixed signal baseband subsystem via additional interconnect subsystems. Each interconnection subsystem may include a bus system, a point-to-point connection, a Network On Chip (NOC) fabric, and/or some other suitable bus or interconnection technology, such as those discussed herein. The audio subsystem may include digital signal processing circuitry, buffer memory, program memory, voice processing accelerator circuitry, data converter circuitry such as analog-to-digital and digital-to-analog converter circuitry, analog circuitry including one or more amplifiers and filters, and/or other similar components. In an aspect of the disclosure, the baseband circuitry 810 may include protocol processing circuitry having one or more instances of control circuitry (not shown) to provide control functionality for digital baseband circuitry and/or radio frequency circuitry (e.g., radio front end module 815).
The user interface circuitry 850 may include one or more user interfaces designed to enable interaction with a user of the system 800 or peripheral component interfaces designed to enable interaction with peripheral components of the system 800. The user interface may include, but is not limited to, one or more physical or virtual buttons (e.g., a reset button), one or more indicators (e.g., a Light Emitting Diode (LED)), a physical keyboard or keypad, a mouse, a touchpad, a touch screen, a speaker or other audio emitting device, a microphone, a printer, a scanner, a headset, a display screen or display device, and so forth. The peripheral component interfaces may include, but are not limited to, a non-volatile memory port, a Universal Serial Bus (USB) port, an audio jack, a power supply interface, and the like.
The Radio Front End Module (RFEM)815 may include a millimeter wave RFEM and one or more sub-millimeter wave Radio Frequency Integrated Circuits (RFICs). In some implementations, the one or more sub-millimeter wave RFICs may be physically separate from the millimeter wave RFEM. The RFIC may include a connection to one or more antennas or antenna arrays, and the RFEM may be connected to multiple antennas. In alternative implementations, both millimeter wave and sub-millimeter wave radio functions may be implemented in the same physical radio front end module 815. RFEM 815 may include both millimeter wave and sub-millimeter wave antennas.
Memory circuit 820 may include one or more of the following: volatile memory including Dynamic Random Access Memory (DRAM) and/or Synchronous Dynamic Random Access Memory (SDRAM); and nonvolatile memories (NVMs) including high speed electrically erasable memories (generally referred to as flash memories), phase change random access memories (PRAMs), magnetoresistive random access memories (magnetrons)static random access memory, MRAM), and the like, and may include data from
Figure BDA0002715308680000301
And
Figure BDA0002715308680000302
a three-dimensional (3D) cross point (XPOINT) memory. Memory circuit 820 may be implemented as one or more of a solder-in package integrated circuit, a socket memory module, and a plug-in memory card.
PMIC 825 may include a voltage regulator, a surge protector, a power alarm detection circuit, and one or more backup power sources such as a battery or a capacitor. The power alarm detection circuit may detect one or more of power down (under voltage) and surge (over voltage) conditions. Power tee circuit 830 may provide power drawn from a network cable to provide both power supply and data connectivity to infrastructure device 800 using a single cable.
The network controller circuit 835 may provide connectivity to a network using a standard network interface protocol such as ethernet, GRE tunnel based ethernet, Multiprotocol Label Switching (MPLS) based ethernet, or some other suitable protocol. Network connectivity may be provided to/from infrastructure device 800 via network interface connector 840 using a physical connection, which may be electrical (commonly referred to as a "copper interconnect"), optical, or wireless. The network controller circuit 835 may include one or more special purpose processors and/or FPGAs to communicate using one or more of the above-described protocols. In some implementations, the network controller circuit 835 can include multiple controllers to provide connectivity to other networks using the same or different protocols.
The positioning circuitry 845 may include circuitry to receive and decode signals transmitted by one or more constellations of navigation satellites of a Global Navigation Satellite System (GNSS). Examples of a Navigation Satellite Constellation (or GNSS) may include the Global Positioning System (GPS) in the united states, the Global Navigation System (GLONASS) in russia, the galileo System in the european union, the beidou Navigation Satellite System in china, the regional Navigation System or the GNSS augmentation System (e.g., Indian Constellation Navigation with Indian Navigation, NAVIC), the Quasi-Zenith Satellite System (QZSS) in japan, the Satellite Integrated Doppler orbit imaging and Radio Positioning in france (dongler and Radio-Positioning Integrated by Satellite System, DORIS), and so forth. The positioning circuitry 845 may include various hardware elements (e.g., including hardware devices, such as switches, filters, amplifiers, antenna elements, and so forth, to facilitate communication over-the-air (OTA) communication) to communicate with components of a positioning network (e.g., navigation satellite constellation nodes).
Nodes or satellites of the navigation satellite constellation(s) ("GNSS nodes") may provide positioning services by continuously transmitting or broadcasting GNSS signals along a line of sight, which may be used by a GNSS receiver (e.g., positioning circuitry 845 and/or positioning circuitry implemented by the UEs 101, 102, etc.) to determine its GNSS position. The GNSS signals may include a pseudorandom code known to the GNSS receiver (e.g., a sequence of ones and zeros) and a message including a time of transmission ToT (e.g., a defined point in the pseudorandom code sequence) of code epochs and a GNSS node position at ToT. A GNSS receiver may monitor/measure GNSS signals transmitted/broadcast by multiple GNSS nodes (e.g., four or more satellites) and solve various equations to determine a corresponding GNSS location (e.g., spatial coordinates). The GNSS receiver also implements a clock that is generally less stable and accurate than the atomic clock of the GNSS node, and the GNSS receiver may use the measured GNSS signals to determine a deviation of the GNSS receiver from real time (e.g., a deviation of the GNSS receiver clock from the GNSS node time). In some embodiments, the Positioning circuit 845 may include a Micro-Technology for Positioning, Navigation, and Timing (Micro-PNT) IC that uses a master Timing clock to perform position tracking/estimation without GNSS assistance.
The GNSS receiver may measure the time of arrival (ToA) of GNSS signals from multiple GNSS nodes according to its own clock. The GNSS receiver may determine a time of flight (ToF) value for each received GNSS signal based on ToA and ToT, and may then determine a three-dimensional (3D) position and clock bias based on the ToF. The 3D location may then be converted to latitude, longitude, and altitude. The positioning circuitry 845 may provide data to the application circuitry 805, which may include one or more of location data or time data. The application circuit 805 may use the time data to operate synchronously with other radio base stations (e.g., of the RAN nodes 111,112, etc.).
The components shown in fig. 8 may communicate with each other using interface circuitry. As used herein, the term "interface circuit" may refer to, be part of, or include a circuit that supports the exchange of information between two or more components or devices. The term "interface circuit" may refer to one or more hardware interfaces, such as a bus, an input/output (I/O) interface, a peripheral component interface, a network interface card, and so forth. Any suitable bus technology may be used in various implementations, which may include any number of technologies, including Industry Standard Architecture (ISA), Extended ISA (EISA), Peripheral Component Interconnect (PCI), PCI express, or any number of other technologies. The bus may be a dedicated bus, such as used in SoC-based systems. Other bus systems may be included, such as an I2C interface, an SPI interface, a point-to-point interface, and a power bus, among others.
The following paragraphs describe examples of various embodiments.
Example 1 includes an apparatus for a User Equipment (UE), the apparatus comprising: a memory; and a processor circuit coupled with the memory via an interface, wherein the processor circuit is to: encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); decoding first higher layer signaling, wherein the first higher layer signaling is transmitted by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and monitor the PDCCH based on the second value, and wherein the memory is to store the second value.
Example 2 includes the apparatus of example 1, wherein the second value is equal to or less than the first value.
Example 3 includes the apparatus of example 1, wherein the first value is greater than 1.
Example 4 includes the apparatus of example 1, wherein the first increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements supported by the UE for monitoring the PDCCH, and the second increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements applied to the UE for monitoring the PDCCH.
Example 5 includes the apparatus of example 1, wherein the second value is indicated by the AN based on: a time slot, a Component Carrier (CC), a CC set, a cell, a Transmit Receive Point (TRP), a bandwidth part (BWP), or a UE.
Example 6 includes the apparatus of example 1, wherein the processor circuit is to: decoding second higher layer signaling received from the AN, wherein the second higher layer signaling comprises a higher layer index per control resource set (CORESET) basis to enable increased blind decoding/channel estimation capability of the UE; and monitoring the PDCCH based on the second value in response to the per-CORESET based higher layer index.
Example 7 includes the apparatus of example 6, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 8 includes the apparatus of example 6, wherein the processor circuit is to: checking said AN for over-subscription of blind decoding/channel estimation capability based on said per CORESET based higher layer index and said second value.
Example 9 includes the apparatus of any one of examples 1 to 8, wherein the AN comprises a next generation nodeb (gnb).
Example 10 includes a computer-readable medium having instructions stored thereon, wherein the instructions, when executed by processor circuitry of a User Equipment (UE), cause the processor circuitry to: decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling includes a per control resource set (CORESET) -based higher layer index for activating multi-Downlink Control Information (DCI) -based multi-Transmission Receive Point (TRP) operation of the UE; and responsive to the per-CORESET-based higher layer index, performing the multi-DCI based multi-TRP operation.
Example 11 includes the computer-readable medium of example 10, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 12 includes the computer-readable medium of example 10 or 11, wherein the AN includes a next generation nodeb (gnb).
Example 13 includes AN apparatus for AN Access Node (AN), the apparatus comprising: a Radio Frequency (RF) circuit interface; and a processor circuit coupled with the RF circuit interface, wherein the processor circuit is to: decoding an indicator received from a User Equipment (UE) via the RF circuit interface, wherein the indicator includes a first value to indicate a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); encoding first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH; and cause transmission of the first higher layer signaling to the UE via the RF circuitry interface for the UE to monitor the PDCCH based on the second value.
Example 14 includes the apparatus of example 13, wherein the second value is equal to or less than the first value.
Example 15 includes the apparatus of example 13, wherein the first value is greater than 1.
Example 16 includes the apparatus of example 13, wherein the second value is indicated based on: a time slot, a Component Carrier (CC), a CC set, a cell, a Transmit Receive Point (TRP), a bandwidth part (BWP), or a UE.
Example 17 includes the apparatus of example 13, wherein the processor circuit is to: encoding second higher layer signaling, wherein the second higher layer signaling comprises a per control resource set (CORESET) -based higher layer index for enabling increased blind decoding/channel estimation capability of the UE; and cause transmission of the second higher layer signaling to the UE via the RF circuitry interface for the UE to monitor the PDCCH based on the second value.
Example 18 includes the apparatus of example 17, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 19 includes the apparatus of example 17, wherein the processor circuit is to: applying oversubscription to the PDCCH on the UE's primary cell based on the per CORESET-based higher layer index and the second value.
Example 20 includes the apparatus of any one of examples 13 to 19, wherein the AN comprises a next generation nodeb (gnb).
Example 21 includes a method for a User Equipment (UE), the method comprising: encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value for indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); decoding first higher layer signaling, wherein the first higher layer signaling is transmitted by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and monitoring the PDCCH based on the second value.
Example 22 includes the method of example 21, wherein the second value is equal to or less than the first value.
Example 23 includes the method of example 21, wherein the first value is greater than 1.
Example 24 includes the method of example 21, wherein the first increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements supported by the UE for monitoring the PDCCH, and the second increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements applied to the UE for monitoring the PDCCH.
Example 25 includes the method of example 21, wherein the second value is indicated by the AN based on: a time slot, a Component Carrier (CC), a CC set, a cell, a Transmit Receive Point (TRP), a bandwidth part (BWP), or a UE.
Example 26 includes the method of example 21, further comprising: decoding second higher layer signaling received from the AN, wherein the second higher layer signaling comprises a higher layer index per control resource set (CORESET) basis to enable increased blind decoding/channel estimation capability of the UE; and monitoring the PDCCH based on the second value in response to the per-CORESET based higher layer index.
Example 27 includes the method of example 26, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 28 includes the method of example 26, further comprising: checking said AN for over-subscription of blind decoding/channel estimation capability based on said per CORESET based higher layer index and said second value.
Example 29 includes the method of any one of examples 21 to 28, wherein the AN comprises a next generation nodeb (gnb).
Example 30 includes an apparatus for a User Equipment (UE), the apparatus comprising: means for encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); means for decoding first higher layer signaling, wherein the first higher layer signaling is transmitted by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and means for monitoring the PDCCH based on the second value.
Example 31 includes the apparatus of example 30, wherein the second value is equal to or less than the first value.
Example 32 includes the apparatus of example 30, wherein the first value is greater than 1.
Example 33 includes the apparatus of example 30, wherein the first increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements supported by the UE for monitoring the PDCCH, and the second increased blind decoding/channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements applied to the UE for monitoring the PDCCH.
Example 34 includes the apparatus of example 30, wherein the second value is indicated by the AN based on: a time slot, a Component Carrier (CC), a CC set, a cell, a Transmit Receive Point (TRP), a bandwidth part (BWP), or a UE.
Example 35 includes the apparatus of example 30, further comprising: means for decoding second higher layer signaling received from the AN, wherein the second higher layer signaling comprises a higher layer index per control resource set (CORESET) basis to enable increased blind decoding/channel estimation capability of the UE; and means for monitoring the PDCCH based on the second value in response to the per-CORESET based higher layer index.
Example 36 includes the apparatus of example 35, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 37 includes the apparatus of example 35, further comprising: means for checking over-subscription of the AN for blind decoding/channel estimation capability based on the per CORESET based higher layer index and the second value.
Example 38 includes the apparatus of any one of examples 30 to 37, wherein the AN comprises a next generation nodeb (gnb).
Example 39 includes a computer readable medium having instructions stored thereon, wherein the instructions, when executed by processor circuitry of a User Equipment (UE), cause the processor circuitry to perform the method of any of examples 21-29.
Example 40 includes an apparatus for a User Equipment (UE), comprising: a Radio Frequency (RF) circuit interface; and a processor circuit coupled with the RF circuit interface, wherein the processor circuit is to: decoding higher layer signaling received from AN Access Node (AN) via the RF circuit interface, wherein the higher layer signaling includes a per control resource set (CORESET) -based higher layer index for activating multi-Downlink Control Information (DCI) -based multi-Transmit Receive Point (TRP) operation of the UE; and responsive to the per-CORESET-based higher layer index, performing the multi-DCI based multi-TRP operation.
Example 41 includes the apparatus of example 40, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 42 includes the apparatus of example 40 or 41, wherein the AN comprises a next generation nodeb (gnb).
Example 43 includes an apparatus for a User Equipment (UE), comprising: means for decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling comprises a per control resource set (CORESET) -based higher layer index for activating multi-Downlink Control Information (DCI) -based multi-Transmission Receive Point (TRP) operation of the UE; and means for performing the multi-DCI based multi-TRP operation in response to the per-CORESET based higher layer index.
Example 44 includes the apparatus of example 43, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 45 includes the apparatus of examples 43 or 44, wherein the AN comprises a next generation nodeb (gnb).
Example 46 includes a method for a User Equipment (UE), comprising: decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling includes a per control resource set (CORESET) -based higher layer index for activating multi-Downlink Control Information (DCI) -based multi-Transmission Receive Point (TRP) operation of the UE; and responsive to the per-CORESET-based higher layer index, performing the multi-DCI based multi-TRP operation.
Example 47 includes the method of example 46, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 48 includes the method of example 46 or 47, wherein the AN comprises a next generation nodeb (gnb).
Example 49 includes AN apparatus for AN Access Node (AN), the apparatus comprising: means for decoding an indicator received from a User Equipment (UE), wherein the indicator comprises a first value to indicate a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); means for encoding first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH; and means for transmitting the first higher layer signaling to the UE for the UE to monitor the PDCCH based on the second value.
Example 50 includes the apparatus of example 49, wherein the second value is equal to or less than the first value.
Example 51 includes the apparatus of example 49, wherein the first value is greater than 1.
Example 52 includes the device of example 49, wherein the second value is indicated based on: a time slot, a Component Carrier (CC), a CC set, a cell, a Transmit Receive Point (TRP), a bandwidth part (BWP), or a UE.
Example 53 includes the apparatus of example 49, further comprising: means for encoding second higher layer signaling, wherein the second higher layer signaling comprises a per control resource set (CORESET) -based higher layer index for enabling increased blind decoding/channel estimation capability of the UE; and means for transmitting the second higher layer signaling to the UE for the UE to monitor the PDCCH based on the second value.
Example 54 includes the apparatus of example 53, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 55 includes the apparatus of example 53, further comprising: means for applying oversubscription to PDCCH on a primary cell of the UE based on the per CORESET-based higher layer index and the second value.
Example 56 includes the apparatus of any one of examples 49-55, wherein the AN comprises a next generation nodeb (gnb).
Example 57 includes a method for AN Access Node (AN), the method comprising: decoding an indicator received from a User Equipment (UE), wherein the indicator comprises a first value indicating a first increased blind decoding/channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH); encoding first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding/channel estimation capability applied to the UE for monitoring the PDCCH; and transmitting the first higher layer signaling to the UE for the UE to monitor the PDCCH based on the second value.
Example 58 includes the method of example 57, wherein the second value is equal to or less than the first value.
Example 59 includes the method of example 57, wherein the first value is greater than 1.
Example 60 includes the method of example 57, wherein the second value is indicated based on: a time slot, a Component Carrier (CC), a CC set, a cell, a Transmit Receive Point (TRP), a bandwidth part (BWP), or a UE.
Example 61 includes the method of example 57, further comprising: encoding second higher layer signaling, wherein the second higher layer signaling comprises a per control resource set (CORESET) -based higher layer index for enabling increased blind decoding/channel estimation capability of the UE; and transmitting the second higher layer signaling to the UE for the UE to monitor the PDCCH based on the second value.
Example 62 includes the method of example 61, wherein the per-CORESET based higher layer index includes a value of 0 or 1.
Example 63 includes the method of example 61, further comprising: applying oversubscription to the PDCCH on the UE's primary cell based on the per CORESET-based higher layer index and the second value.
Example 64 includes the method of any one of examples 57-63, wherein the AN includes a next generation nodeb (gnb).
Example 65 includes a computer-readable medium having instructions stored thereon, wherein the instructions, when executed by a processor circuit of AN Access Node (AN), cause the processor circuit to perform the method of any of examples 57-64.
Example 66 includes a User Equipment (UE) as described and illustrated in the specification.
Example 67 includes AN Access Node (AN) as described and illustrated in the specification.
Example 68 includes a method performed at a User Equipment (UE) as described and illustrated in the specification.
Example 69 includes a method performed at AN Access Node (AN) as described and illustrated in the specification.
Although certain embodiments have been illustrated and described herein for purposes of description, various alternative and/or equivalent embodiments or implementations calculated to achieve the same purposes may be substituted for the embodiments shown and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the embodiments discussed herein. Therefore, it is manifestly intended that the embodiments described herein be limited only by the claims and the equivalents thereof.

Claims (20)

1. An apparatus for a User Equipment (UE), the apparatus comprising:
a memory; and
a processor circuit coupled with the memory via an interface,
wherein the processor circuit is to:
encoding AN indicator for transmission to AN Access Node (AN), wherein the indicator comprises a first value for indicating a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH);
decoding first higher layer signaling, wherein the first higher layer signaling is transmitted by the AN in response to receiving the indicator, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH, and wherein the second value is based at least in part on the first value; and
monitoring the PDCCH based on the second value, and
wherein the memory is to store the second value.
2. The apparatus of claim 1, wherein the second value is equal to or less than the first value.
3. The apparatus of claim 1, wherein the first value is greater than 1.
4. The apparatus of claim 1, wherein the first increased blind decoding and/or channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements for monitoring the PDCCH supported by the UE, and the second increased blind decoding and/or channel estimation capability indicates a maximum number of PDCCH candidates and/or control channel elements for monitoring the PDCCH applied to the UE.
5. The apparatus of claim 1, wherein the second value is indicated by the AN based on: a time slot, a Component Carrier (CC), a CC set, a cell, a Transmit Receive Point (TRP), a bandwidth part (BWP), or a UE.
6. The apparatus of claim 1, wherein the processor circuit is to:
decoding second higher layer signaling received from the AN, wherein the second higher layer signaling comprises a higher layer index per control resource set (CORESET) basis to enable increased blind decoding and/or channel estimation capability of the UE; and
monitoring the PDCCH based on the second value in response to the per CORESET-based higher layer index.
7. The apparatus of claim 6, wherein the higher layer index per CORESET basis comprises a value of 0 or 1.
8. The apparatus of claim 6, wherein the processor circuit is to: checking over-subscription of the AN to blind decoding and/or channel estimation capabilities based on the per CORESET based higher layer index and the second value.
9. The apparatus of any of claims 1-8, wherein the AN comprises a next generation nodeb (gnb).
10. A computer-readable medium having instructions stored thereon, wherein the instructions, when executed by processor circuitry of a User Equipment (UE), cause the processor circuitry to:
decoding higher layer signaling received from AN Access Node (AN), wherein the higher layer signaling includes a per control resource set (CORESET) -based higher layer index for activating multi-Downlink Control Information (DCI) -based multi-Transmission Receive Point (TRP) operation of the UE; and
performing the multi-DCI based multi-TRP operation in response to the per-CORESET based higher layer index.
11. The computer-readable medium of claim 10, wherein the higher layer index per CORESET basis comprises a value of 0 or 1.
12. The computer-readable medium of claim 10 or 11, wherein the AN comprises a next generation nodeb (gnb).
13. AN apparatus for AN Access Node (AN), the apparatus comprising:
a Radio Frequency (RF) circuit interface; and
a processor circuit coupled with the RF circuit interface,
wherein the processor circuit is to:
decoding an indicator received from a User Equipment (UE) via the RF circuit interface, wherein the indicator comprises a first value to indicate a first increased blind decoding and/or channel estimation capability supported by the UE for monitoring a Physical Downlink Control Channel (PDCCH);
encoding first higher layer signaling based at least in part on the first value, wherein the first higher layer signaling comprises a second value indicating a second increased blind decoding and/or channel estimation capability applied to the UE for monitoring the PDCCH; and
cause transmission of the first higher layer signaling to the UE via the RF circuitry interface for the UE to monitor the PDCCH based on the second value.
14. The apparatus of claim 13, wherein the second value is equal to or less than the first value.
15. The apparatus of claim 13, wherein the first value is greater than 1.
16. The apparatus of claim 13, wherein the second value is indicated based on: a time slot, a Component Carrier (CC), a CC set, a cell, a Transmit Receive Point (TRP), a bandwidth part (BWP), or a UE.
17. The apparatus of claim 13, wherein the processor circuit is to:
encoding second higher layer signaling, wherein the second higher layer signaling comprises a per control resource set (CORESET) -based higher layer index for enabling increased blind decoding and/or channel estimation capability of the UE; and
cause transmission of the second higher layer signaling to the UE via the RF circuitry interface for the UE to monitor the PDCCH based on the second value.
18. The apparatus of claim 17, wherein the per-CORESET based higher layer index comprises a value of 0 or 1.
19. The apparatus of claim 17, wherein the processor circuit is to: applying oversubscription to the PDCCH on the UE's primary cell based on the per CORESET-based higher layer index and the second value.
20. The apparatus of any of claims 13-19, wherein the AN comprises a next generation nodeb (gnb).
CN202011072085.6A 2019-10-11 2020-10-09 Apparatus and method for blind decoding and/or channel estimation capability indication Pending CN112654036A (en)

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