CN112653852B - System and method for avoiding TDI CCD (time delay integration charge coupled device) spectrum crosstalk in high-density circuit - Google Patents
System and method for avoiding TDI CCD (time delay integration charge coupled device) spectrum crosstalk in high-density circuit Download PDFInfo
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Abstract
The invention relates to a system and a method for avoiding cross talk between TDI CCD spectrums in a high-density circuit. The invention relates to the technical field of avoiding crosstalk of an orbit satellite image, and the system comprises: the system comprises a clock management unit, a clock interface, a reset interface, a logic control module, a resistance coding code group, a channel identification interface, a camera lower computer, a reset control unit, a CCD focal plane assembly, a video processor, a TDI CCD power supply control unit, a TDI CCD drive control unit, a video processor configuration unit, a video processor data output unit, an image data output unit, an OC interface and a communication module unit; the invention avoids the inter-spectrum crosstalk between the P spectrum and the B spectrum by continuously adjusting the CCD driving phase, realizes the non-crosstalk output of the satellite image, and improves various indexes such as image uniformity, signal-to-noise ratio, transfer function and the like.
Description
Technical Field
The invention relates to the technical field of avoiding crosstalk of an orbit satellite image, in particular to a system and a method for avoiding crosstalk between TDI CCD spectrums by a high-density circuit.
Background
Today, satellite imaging has come with a variety of sensor types: the CMOS and CCD sensors are two types of image sensors that are currently and generally used, both of which use photodiodes to perform photoelectric conversion to convert images into digital data, and the main difference is that the digital transmission modes are different. In general, the sensitivity, noise and dark current performance of the CCD sensor are far higher than those of a CMOS sensor, the imaging quality is high, and the technical maturity is high; the CMOS sensor has the advantages of low cost and low power consumption; therefore, for application scenes with high imaging quality, the CCD still has irreplaceable advantages. Since the CCD is read out by moving electrons from pixel to pixel, they are shifted one by a sense amplifier at one corner of the sensor, which has the great advantage that each pixel is measured in the same way, making the individual sense amplifier read out very uniform, thus generating high quality data with low fixed pattern noise and read noise, and no wasted space in the pixels, but has the disadvantage of complicated drive circuitry, very high isolation requirements, and very easy introduction of cross talk between spectral segments once not well processed. Generally, for imaging devices with high circuit board density, inter-spectrum crosstalk exists, and how to avoid or reduce inter-spectrum crosstalk through different driving modes is urgently needed to be researched.
Disclosure of Invention
The invention solves the problem of cross talk between TDI CCDs, provides a system and a method for avoiding the cross talk between TDI CCDs by a high-density circuit, and provides the following technical scheme:
a system for high density circuitry to circumvent TDI CCD inter-spectral crosstalk, the system comprising: the system comprises a clock management unit, a clock interface, a reset interface, a logic control module, a resistance coding code group, a channel identification interface, a camera lower computer, a reset control unit, a CCD focal plane assembly, a video processor, a TDI CCD power supply control unit, a TDI CCD drive control unit, a video processor configuration unit, a video processor data output unit, an image data output unit, an OC interface and a communication module unit;
the clock management unit is accessed to the logic control module through a clock interface, the reset control unit is accessed to the logic control module through a reset interface, the CCD focal plane assembly is accessed to the logic control module through a TDI CCD power supply control unit and a TDI CCD drive control unit, the resistance coding code group is accessed to the logic control module through a channel identification interface, the camera lower computer is accessed to the logic control module through a communication module unit and an OC interface, the video processor is accessed to the logic control module through a video processor configuration unit and a video processor data output unit, and the logic control module outputs image data through an image data output unit.
Preferably, the logic control module adopts an FPGA.
A method for avoiding cross talk between TDI CCD spectrums in a high-density circuit comprises the following steps:
step 1: the clock management unit, the resistance coding code group and the reset control unit are controlled by the logic control module to carry out signal synchronization;
step 2: configuring analog sampling points and outputting an image;
and step 3: adjusting the phase of a driving time sequence, and removing the regular stripes of the full-color spectrum image in the row direction and the column direction;
and 4, step 4: and outputting a crosstalk-free image.
Preferably, the step 1 specifically comprises:
the clock management unit ensures the synchronization of data among systems and performs unified clock generation and distribution management; the reset control unit ensures the reset synchronism among systems to carry out synchronous reset processing;
the TDI CCD power supply control unit is used for carrying out power-on control, carrying out peak staggering power-on processing among different systems and carrying out three-step power-on the CCD inside the system so as to avoid sudden power failure caused by overlarge surge of a single machine circuit;
the TDI CCD driving control unit controls driving synchronous output, and the P spectrum and the B spectrum keep fixed phase output; the qualified B spectrum of the P spectrum is independently configured through the configuration unit of the video processor, and a sampling point, a data phase and a gain offset parameter are configured; serial data output by the video processor is subjected to serial-to-parallel processing and cross-clock processing; caching the panchromatic and multispectral data after serial conversion and parallel conversion, and performing data splicing and framing integration;
outputting the spliced parallel data according to a data interface protocol through the image data output unit; carrying out image acquisition and storage on the output data; the communication module unit sends a function instruction to the camera lower computer and the CCD focal plane assembly through communication software and returns the telemetering parameters.
Preferably, a full-color pixel domain TDI vertical transfer signal, a transfer clock and a frequency same-line frequency required by the operation of the TDI CCD are output to the CCD focal plane assembly, and a full-color horizontal transfer signal, a reset signal and an integral series control signal are output;
and outputting multispectral pixel domain TDI vertical transfer signals required by the working of the TDI CCD, clock transfer, multispectral horizontal transfer signals, reset signals, Binning enable signals and integral series control signals to the CCD focal plane assembly.
Preferably, the step 2 specifically comprises:
step 2.1: configuring analog sampling points, and adopting a reverse correlation double sampling mode to reduce noise introduced by signal disturbance;
step 2.2: configuring gain and bias parameters; gain and bias are configured for different taps independently, and signals output by the CCD are in uniform linear response under different light intensities;
step 2.3: configuring a data output mode, and outputting parallel data by adopting double-end data;
step 2.4: configuring a digital signal sampling phase, and performing serial conversion and parallel processing on data serially output by a video processor; adjusting the phase of a data bit and a clock on line to realize the configuration of a bit sampling position; and adjusting the data synchronization word alignment phase on line to realize word alignment.
Preferably, the step 3 specifically comprises:
adjusting the horizontal transfer signal phase and the reset signal phase between the full color spectrum and the multispectral to reduce the column direction crosstalk of the full color spectrum and the multispectral and remove the column direction regular stripes of the full color spectrum image; and adjusting the vertical transfer signal phase and the transfer clock phase between the full color spectrum and the multiple color spectrum to reduce the line direction crosstalk of the full color spectrum and the multiple color spectrum and remove the line direction regular stripes of the full color spectrum image.
Preferably, the step 4 specifically includes:
after the video processor is configured, serial digital data are output, serial data are converted into parallel data through serial conversion and parallel processing in the logic control module, the parallel data are cached in the logic control module, panchromatic data and multispectral data are spliced into parallel data according to a data protocol specified by a lower computer, the parallel data are output at the frequency of 100Mhz through a data interface, and images are output through the image data output unit.
Preferably, the image has column-direction regular stripes due to hardware isolation difference in the horizontal direction of the P spectrum and the B spectrum, and is positioned by a variable control test method, so that crosstalk introduced by the B spectrum horizontal transfer signal to the P spectrum is caused, and the phase of the P spectrum horizontal transfer signal and the phase of the B spectrum horizontal transfer signal are adjusted, so that the interference of the B spectrum to the P spectrum is reduced.
Preferably, the image has line-direction regular stripes due to hardware isolation difference in the vertical direction of the P spectrum and the B spectrum, and is positioned by a variable control test method, so that crosstalk introduced by the B spectrum vertical transfer signal to the P spectrum is caused, and the phase of the P spectrum vertical transfer signal and the phase of the B spectrum vertical transfer signal are adjusted, so that the interference of the B spectrum to the P spectrum is reduced.
The invention has the following beneficial effects:
the invention reduces the column direction stripes of the satellite camera image by adjusting the relative phase of the P-spectrum (panchromatic) and B-spectrum (multispectral) horizontal transfer signals, and reduces the transverse stripes of the satellite camera image by adjusting the relative phase of the P-spectrum (panchromatic) and B-spectrum (multispectral) vertical transfer signals. Firstly, generating all driving time sequences required by a P spectrum and a B spectrum according to a TDI CCD manual, and enabling a CCD to normally output analog signals according to a certain frequency; secondly, the video processor performs analog-to-digital conversion on the analog signal output by the CCD, and the logic control unit performs serial-to-parallel conversion on the serial data output by the video processor; thirdly, the logic control unit caches the converted parallel data, splices and integrates the data, and outputs the integrated data; fourthly, data acquisition is carried out on the image acquisition card, data processing is carried out on the acquired image, and the uniformity in the column direction and the uniformity in the row direction are checked; fifthly, adjusting the phases of the P spectrum driving signal and the B spectrum driving signal, re-collecting the image, and processing the image until the phase of the image with better uniformity, namely no crosstalk, is found.
The invention avoids the inter-spectrum crosstalk between the P spectrum and the B spectrum by continuously adjusting the CCD driving phase, realizes the non-crosstalk output of the satellite image, improves various indexes such as image uniformity, signal-to-noise ratio, transfer function and the like, adopts the image output by the focal plane of the Jilin I wide-width 01A star camera of the Long-light satellite technology Limited company in the test, and verifies the practicability of the invention.
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FIG. 1 is a flow chart of a method of avoiding cross talk between TDI CCD spectra for high density circuits;
FIG. 2 is a schematic block diagram of a system for avoiding cross talk between TDI CCD spectra for a high density circuit;
FIG. 3 is a schematic diagram of adjusting P spectrum and B spectrum driving signals for a method of avoiding cross talk between TDI CCD spectra for a high-density circuit;
fig. 4 is a diagram of a configuration method of a video processor for a method of avoiding cross talk between TDI CCD spectra for high density circuits.
Detailed Description
The present invention will be described in detail with reference to specific examples.
The first embodiment is as follows:
as shown in fig. 1 to 4, the present invention provides a system and a method for avoiding crosstalk between TDI CCD spectra for a high-density circuit, specifically:
a system for high density circuitry to circumvent TDI CCD inter-spectral crosstalk, the system comprising: the system comprises a clock management unit, a clock interface, a reset interface, a logic control module, a resistance coding code group, a channel identification interface, a camera lower computer, a reset control unit, a CCD focal plane assembly, a video processor, a TDI CCD power supply control unit, a TDI CCD drive control unit, a video processor configuration unit, a video processor data output unit, an image data output unit, an OC interface and a communication module unit;
the clock management unit is accessed to the logic control module through a clock interface, the reset control unit is accessed to the logic control module through a reset interface, the CCD focal plane assembly is accessed to the logic control module through a TDI CCD power supply control unit and a TDI CCD drive control unit, the resistance coding code group is accessed to the logic control module through a channel identification interface, the camera lower computer is accessed to the logic control module through a communication module unit and an OC interface, the video processor is accessed to the logic control module through a video processor configuration unit and a video processor data output unit, and the logic control module outputs image data through an image data output unit. The logic control module adopts FPGA.
The invention provides a method for avoiding cross talk between TDI CCD spectrums in a high-density circuit, which comprises the following steps:
step 1: the clock management unit, the resistance coding code group and the reset control unit are controlled by the logic control module to carry out signal synchronization;
the step 1 specifically comprises the following steps:
the clock management unit ensures the synchronization of data among systems and performs unified clock generation and distribution management; the reset control unit ensures the reset synchronism among systems to carry out synchronous reset processing;
the TDI CCD power supply control unit is used for carrying out power-on control, carrying out peak staggering power-on processing among different systems and carrying out three-step power-on the CCD inside the system so as to avoid sudden power failure caused by overlarge surge of a single machine circuit;
the TDI CCD driving control unit controls driving synchronous output, and the P spectrum and the B spectrum keep fixed phase output; the qualified B spectrum of the P spectrum is independently configured through the configuration unit of the video processor, and a sampling point, a data phase and a gain offset parameter are configured; serial data output by the video processor is subjected to serial-to-parallel processing and cross-clock processing; caching the panchromatic and multispectral data after serial conversion and parallel conversion, and performing data splicing and framing integration;
outputting the spliced parallel data according to a data interface protocol through the image data output unit; carrying out image acquisition and storage on the output data; the communication module unit sends a function instruction to the camera lower computer and the CCD focal plane assembly through communication software and returns the telemetering parameters.
Preferably, a full-color pixel domain TDI vertical transfer signal, a transfer clock and a frequency same-line frequency required by the operation of the TDI CCD are output to the CCD focal plane assembly, and a full-color horizontal transfer signal, a reset signal and an integral series control signal are output;
and outputting multispectral pixel domain TDI vertical transfer signals required by the working of the TDI CCD, clock transfer, multispectral horizontal transfer signals, reset signals, Binning enable signals and integral series control signals to the CCD focal plane assembly.
Step 2: configuring analog sampling points and outputting an image;
the step 2 specifically comprises the following steps:
step 2.1: configuring analog sampling points, and adopting a reverse correlation double sampling mode to reduce noise introduced by signal disturbance;
step 2.2: configuring gain and bias parameters; gain and bias are configured for different taps independently, and signals output by the CCD are in uniform linear response under different light intensities;
step 2.3: configuring a data output mode, and outputting parallel data by adopting double-end data;
step 2.4: configuring a digital signal sampling phase, and performing serial conversion and parallel processing on data serially output by a video processor; adjusting the phase of a data bit and a clock on line to realize the configuration of a bit sampling position; and adjusting the data synchronization word alignment phase on line to realize word alignment.
And step 3: adjusting the phase of a driving time sequence, and removing the regular stripes of the full-color spectrum image in the row direction and the column direction;
the step 3 specifically comprises the following steps:
adjusting the horizontal transfer signal phase and the reset signal phase between the full color spectrum and the multispectral to reduce the column direction crosstalk of the full color spectrum and the multispectral and remove the column direction regular stripes of the full color spectrum image; and adjusting the vertical transfer signal phase and the transfer clock phase between the full color spectrum and the multiple color spectrum to reduce the line direction crosstalk of the full color spectrum and the multiple color spectrum and remove the line direction regular stripes of the full color spectrum image.
And 4, step 4: and outputting a crosstalk-free image.
The step 4 specifically comprises the following steps:
after the video processor is configured, serial digital data are output, serial data are converted into parallel data through serial conversion and parallel processing in the logic control module, the parallel data are cached in the logic control module, panchromatic data and multispectral data are spliced into parallel data according to a data protocol specified by a lower computer, the parallel data are output at the frequency of 100Mhz through a data interface, and images are output through the image data output unit.
Preferably, the image has column-direction regular stripes due to hardware isolation difference in the horizontal direction of the P spectrum and the B spectrum, and is positioned by a variable control test method, so that crosstalk introduced by the B spectrum horizontal transfer signal to the P spectrum is caused, and the phase of the P spectrum horizontal transfer signal and the phase of the B spectrum horizontal transfer signal are adjusted, so that the interference of the B spectrum to the P spectrum is reduced.
Preferably, the image has line-direction regular stripes due to hardware isolation difference in the vertical direction of the P spectrum and the B spectrum, and is positioned by a variable control test method, so that crosstalk introduced by the B spectrum vertical transfer signal to the P spectrum is caused, and the phase of the P spectrum vertical transfer signal and the phase of the B spectrum vertical transfer signal are adjusted, so that the interference of the B spectrum to the P spectrum is reduced.
The second embodiment is as follows:
outputting a driving time sequence; referring to fig. 2, the output driving timing sequence of the method for avoiding crosstalk between TDI CCD spectra for a high-density circuit of the present invention includes the following two parts:
outputting a panchromatic pixel domain TDI vertical transfer signal, a transfer clock and a frequency same-line frequency required by the operation of the TDI CCD to the CCD, and outputting a panchromatic horizontal transfer signal, a reset signal and an integral series control signal;
outputting multispectral pixel domain TDI vertical transfer signals required by the operation of the TDI CCD, transferring a clock, outputting multispectral horizontal transfer signals, reset signals, Binning enable signals, integral series control signals and the like to the CCD;
outputting an image;
a. outputting a TDI CCD analog signal; after the driving time sequence of the TDI CCD is written, a CCD power-on instruction is sent through a communication component, after a focal plane receives the instruction, power is supplied in three steps, all driving signals are simultaneously output outwards after power is supplied, and the CCD outputs an analog signal to a video processor;
b. configuring a video processor; referring to fig. 4, the video processor is configured by three lines of SDATA, SL and SCK, the configuration mode adopts serial interface configuration, and the configuration format includes 8-bit address, 12-bit data and 4-bit channel selection, wherein the 4-bit channel selection is performed, and the video processor outputs data by two channels;
i) configuring an analog sampling point:
in the design, a related double sampling mode is adopted, and sampling point configuration is carried out on a video processor through a three-wire interface, wherein the sampling point configuration comprises a reset level sampling position SHP and a signal level position SHD;
ii) configuring parameters such as gain and bias:
in the design, a channel-division independent configuration mode is adopted, and a three-wire interface is used for configuring gain bias for a video processor so as to ensure the uniformity among image taps;
iii) configuration data output mode
In the design, a data output mode is configured for a video processor through a three-wire interface, wherein the data output mode comprises single-channel output and double-channel output, and double-channel output data is adopted in the design;
iv) configuring the digital signal sampling phase:
in the design, a three-wire interface is used for configuring the sampling phase of a digital signal for a video processor, the phase between a clock and data output by the video processor is adjusted in the first step until a stable sampling interval is found, and in the second step, a first bit of a data word output by the video processor and the main frequency clock phase of the video processor are configured, and a register is used for determining the word alignment position;
v) outputting the image
After the video processor is configured, serial digital data are output, serial data are converted into parallel data through internal serial conversion and processing of the logic control unit, the parallel data are cached in the logic control unit, panchromatic data and multispectral data are spliced into parallel data according to a data protocol specified by a lower computer, the parallel data are output through a data interface at the frequency of 100Mhz, and images are output through image acquisition equipment;
vi) adjusting the driving timing phase:
in the design, because the hardware isolation of the P spectrum and the B spectrum in the horizontal direction is poor, the image has column direction regular stripes, and is positioned by a variable control test method, the crosstalk introduced by the B spectrum horizontal transfer signal to the P spectrum is generated, and the phase positions of the P spectrum horizontal transfer signal and the B spectrum horizontal transfer signal are adjusted, so that the interference degree of the B spectrum to the P spectrum is reduced;
in the design, the image has line-direction regular stripes due to poor hardware isolation in the vertical direction of the P spectrum and the B spectrum, is positioned by a variable control test method, is crosstalk introduced by B spectrum vertical transfer signals to the P spectrum, and adjusts the phase of the P spectrum vertical transfer signals and the phase of the B spectrum vertical transfer signals so as to reduce the interference degree of the B spectrum to the P spectrum;
after the time sequence phase of the driving is adjusted, all the three steps are repeated, and a crosstalk-free image is output;
in the embodiment, the images before and after the adjustment of the driving time sequence are respectively processed by adopting data processing software, the images before the adjustment have obvious column-direction bright and dark stripes, the row-direction horizontal stripes are regularly arranged in 4 rows, and the two regular stripes disappear after the adjustment, thereby proving the practicability of the invention.
The above description is only a preferred embodiment of a system and a method for avoiding crosstalk between TDI CCD spectra for a high-density circuit, and the protection scope of the system and the method for avoiding crosstalk between TDI CCD spectra for a high-density circuit is not limited to the above embodiments, and all technical solutions belonging to the idea belong to the protection scope of the present invention. It should be noted that modifications and variations which do not depart from the gist of the invention will be those skilled in the art to which the invention pertains and which are intended to be within the scope of the invention.
Claims (9)
1. A system for avoiding cross talk between TDI CCD spectrums in a high-density circuit is characterized in that: the system comprises: the system comprises a clock management unit, a clock interface, a reset interface, a logic control module, a resistance coding code group, a channel identification interface, a camera lower computer, a reset control unit, a CCD focal plane assembly, a video processor, a TDI CCD power supply control unit, a TDI CCD drive control unit, a video processor configuration unit, a video processor data output unit, an image data output unit, an OC interface and a communication module unit;
the camera lower computer is accessed into the logic control module through a communication module unit and an OC interface, the video processor is accessed into the logic control module through a video processor configuration unit and a video processor data output unit, and the logic control module outputs image data through an image data output unit;
adjusting the horizontal transfer signal phase and the reset signal phase between the full color spectrum and the multispectral to reduce the column direction crosstalk of the full color spectrum and the multispectral and remove the column direction regular stripes of the full color spectrum image; and adjusting the vertical transfer signal phase and the transfer clock phase between the full color spectrum and the multiple color spectrum to reduce the line direction crosstalk of the full color spectrum and the multiple color spectrum and remove the line direction regular stripes of the full color spectrum image.
2. The system of claim 1 for high density circuits to avoid TDI CCD inter-spectral crosstalk, characterized by: the logic control module adopts FPGA.
3. A method for avoiding cross talk between TDI CCD spectra for a high density circuit, said method being based on a system for avoiding cross talk between TDI CCD spectra for a high density circuit according to claim 1 or 2, characterized by: the method comprises the following steps:
step 1: the clock management unit, the resistance coding code group and the reset control unit are controlled by the logic control module to carry out signal synchronization;
step 2: configuring analog sampling points and outputting an image;
and step 3: adjusting the phase of a driving time sequence, and removing the regular stripes of the full-color spectrum image in the row direction and the column direction;
and 4, step 4: and outputting a crosstalk-free image.
4. The method of claim 3 for avoiding cross talk between TDI CCD spectra by a high density circuit, wherein: the step 1 specifically comprises the following steps:
the clock management unit ensures the synchronization of data among systems and performs unified clock generation and distribution management; the reset control unit ensures the reset synchronism among systems to carry out synchronous reset processing;
the TDI CCD power supply control unit is used for carrying out power-on control, carrying out peak staggering power-on processing among different systems and carrying out three-step power-on the CCD inside the system so as to avoid sudden power failure caused by overlarge surge of a single machine circuit;
the TDI CCD driving control unit controls driving synchronous output, and the P spectrum and the B spectrum keep fixed phase output; the P spectrum and the B spectrum are configured independently through the video processor configuration unit, and sampling points, data phases and gain offset parameters are configured; serial data output by the video processor is subjected to serial-to-parallel processing and cross-clock processing; caching the panchromatic and multispectral data after serial conversion and parallel conversion, and performing data splicing and framing integration;
outputting the spliced parallel data according to a data interface protocol through the image data output unit; carrying out image acquisition and storage on the output data; the communication module unit sends a function instruction to the camera lower computer and the CCD focal plane assembly through communication software and returns the telemetering parameters.
5. The method of claim 4 for avoiding cross talk between TDI CCD spectra by a high density circuit, wherein:
outputting a full-color pixel domain TDI vertical transfer signal, a transfer clock and a frequency same-line frequency required by the operation of the TDI CCD to the CCD focal plane assembly, and outputting a full-color spectrum horizontal transfer signal, a reset signal and an integral series control signal;
and outputting multispectral pixel domain TDI vertical transfer signals required by the working of the TDI CCD, clock transfer, multispectral horizontal transfer signals, reset signals, Binning enable signals and integral series control signals to the CCD focal plane assembly.
6. The method of claim 3 for avoiding cross talk between TDI CCD spectra by a high density circuit, wherein: the step 2 specifically comprises the following steps:
step 2.1: configuring analog sampling points, and adopting a reverse correlation double sampling mode to reduce noise introduced by signal disturbance;
step 2.2: configuring gain and bias parameters; gain and bias are configured for different taps independently, and signals output by the CCD are in uniform linear response under different light intensities;
step 2.3: configuring a data output mode, and outputting parallel data by adopting double-end data;
step 2.4: configuring a digital signal sampling phase, and performing serial conversion and parallel processing on data serially output by a video processor; adjusting the phase of a data bit and a clock on line to realize the configuration of a bit sampling position; and adjusting the data synchronization word alignment phase on line to realize word alignment.
7. The method of claim 3 for avoiding cross talk between TDI CCD spectra by a high density circuit, wherein: the step 4 specifically comprises the following steps:
after the video processor is configured, serial digital data are output, serial data are converted into parallel data through serial conversion and parallel processing inside the logic control module, the parallel data are cached inside the logic control module, a full color spectrum and a multispectral are spliced into parallel data according to a data protocol specified by a lower computer, the parallel data are output at the frequency of 100Mhz through a data interface, and images are output through the image data output unit.
8. The method of claim 3 for avoiding cross talk between TDI CCD spectra by a high density circuit, wherein: the image has column direction regular stripes due to hardware isolation difference in the P spectrum and B spectrum horizontal direction, and is positioned by a variable control test method, so that crosstalk introduced by B spectrum horizontal transfer signals to the P spectrum is caused, and the phase positions of the P spectrum horizontal transfer signals and the B spectrum horizontal transfer signals are adjusted to reduce interference of the B spectrum to the P spectrum.
9. The method of claim 3 for avoiding cross talk between TDI CCD spectra by a high density circuit, wherein: the image has line direction regular stripes due to hardware isolation difference in the vertical direction of the P spectrum and the B spectrum, and is positioned by a variable control test method, so that crosstalk introduced by B spectrum vertical transfer signals to the P spectrum is caused, and the phase positions of the P spectrum vertical transfer signals and the B spectrum vertical transfer signals are adjusted to reduce interference of the B spectrum to the P spectrum.
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| CN102263912B (en) * | 2011-07-27 | 2013-01-02 | 中国科学院长春光学精密机械与物理研究所 | Space remote sensing TDI (Time delay integration) CCD (Charge Coupled Device) camera electronics system |
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| CN104243858B (en) * | 2014-09-05 | 2017-07-28 | 北京空间机电研究所 | A kind of circuit system of optical sensor |
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Address after: No. 1299, Mingxi Road, Beihu science and Technology Development Zone, Changchun City, Jilin Province Applicant after: Changguang Satellite Technology Co.,Ltd. Address before: No. 1299, Mingxi Road, Beihu science and Technology Development Zone, Changchun City, Jilin Province Applicant before: CHANG GUANG SATELLITE TECHNOLOGY Co.,Ltd. |
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Denomination of invention: A system and method for avoiding TDI CCD spectral crosstalk in high-density circuits Granted publication date: 20220415 Pledgee: Changchun Rural Commercial Bank Co.,Ltd. Exhibition Center sub branch Pledgor: Changguang Satellite Technology Co.,Ltd. Registration number: Y2024220000024 |