CN112653409B - Manufacturing method for manufacturing metal electrode - Google Patents
Manufacturing method for manufacturing metal electrode Download PDFInfo
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- CN112653409B CN112653409B CN202011492899.5A CN202011492899A CN112653409B CN 112653409 B CN112653409 B CN 112653409B CN 202011492899 A CN202011492899 A CN 202011492899A CN 112653409 B CN112653409 B CN 112653409B
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- 239000002184 metal Substances 0.000 title claims abstract description 64
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 64
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 48
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- 239000000463 material Substances 0.000 claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 33
- 238000005530 etching Methods 0.000 claims abstract description 8
- 239000007769 metal material Substances 0.000 claims abstract description 8
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 238000000034 method Methods 0.000 claims description 30
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 5
- 238000000576 coating method Methods 0.000 claims description 5
- 238000000059 patterning Methods 0.000 claims description 4
- WSMQKESQZFQMFW-UHFFFAOYSA-N 5-methyl-pyrazole-3-carboxylic acid Chemical compound CC1=CC(C(O)=O)=NN1 WSMQKESQZFQMFW-UHFFFAOYSA-N 0.000 claims description 3
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 claims description 3
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 3
- 238000000227 grinding Methods 0.000 claims description 3
- 229910052744 lithium Inorganic materials 0.000 claims description 3
- 230000008569 process Effects 0.000 description 22
- 238000010897 surface acoustic wave method Methods 0.000 description 18
- 239000010949 copper Substances 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 6
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- 229910052802 copper Inorganic materials 0.000 description 5
- 238000013461 design Methods 0.000 description 5
- 239000000126 substance Substances 0.000 description 5
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000005240 physical vapour deposition Methods 0.000 description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 3
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- FGUUSXIOTUKUDN-IBGZPJMESA-N C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 Chemical compound C1(=CC=CC=C1)N1C2=C(NC([C@H](C1)NC=1OC(=NN=1)C1=CC=CC=C1)=O)C=CC=C2 FGUUSXIOTUKUDN-IBGZPJMESA-N 0.000 description 2
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- 239000004065 semiconductor Substances 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- GNFTZDOKVXKIBK-UHFFFAOYSA-N 3-(2-methoxyethoxy)benzohydrazide Chemical compound COCCOC1=CC=CC(C(=O)NN)=C1 GNFTZDOKVXKIBK-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
- H03H3/04—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
- H03H3/04—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
- H03H2003/0407—Temperature coefficient
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H3/00—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators
- H03H3/007—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks
- H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
- H03H3/04—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks for obtaining desired frequency or temperature coefficient
- H03H2003/0414—Resonance frequency
Abstract
The present invention provides a manufacturing method for manufacturing a metal electrode, comprising: forming a first photoresist layer on a piezoelectric material substrate; forming a first pattern; etching the piezoelectric material substrate based on the first pattern to form a landfill trench; removing the first photoresist layer; depositing a metal material on the piezoelectric material substrate to form an electrode metal layer; such that the exposed surface of the piezoelectric material substrate is flush with the exposed surface of the electrode metal layer; forming a first dielectric layer; forming a second photoresist layer on the first dielectric layer; forming a second pattern; etching the first dielectric layer based on the second pattern to form an electrode protection layer pattern; removing the second photoresist layer; and forming a second dielectric layer on the electrode protection layer pattern and the piezoelectric material substrate.
Description
Technical Field
The present invention relates to the manufacture of metal electrodes, and more particularly to the manufacture of metal electrodes in filters.
Background
Surface Acoustic Wave (SAW) filters are widely used in signal receiver front ends as well as in diplexers and receive filters. The SAW filter integrates low insertion loss and good rejection performance, and can achieve wide bandwidth and small volume. In a conventional SAW filter, an electric input signal is converted into an acoustic wave by an interposed metal interdigital transducer (IDT) formed on a piezoelectric substrate.
In the conventional method for manufacturing the interdigital transducer structure of the surface acoustic wave filter, a LIFT-OFF process (LIFT-OFF) is generally adopted, that is, a negative photoresist is used to pattern on a substrate (for example, by means of exposure, development, etc.), then a metal film is deposited thereon, and then the photoresist is removed by using a solvent that does not attack the metal film. As the photoresist is removed, the metal on the photoresist is stripped, leaving a metal structure of a predetermined pattern.
The tuning frequency of the SAW filter is mainly adjusted by IDT electrode line width, i.e. the line width is smaller as the frequency is higher, e.g. the typical line width of 1.9G is 0.5 μm, and the typical line width of 3.5G is 0.25 μm. With the development of technology, SAW filters are increasingly used at high frequencies, especially in the future 5G age, and the requirements on line width are more stringent.
Disclosure of Invention
Technical problem to be solved by the invention
However, in the existing SAW filter manufacturing method, due to the limitation of the negative photoresist and the stripping process, when the IDT electrode line width is smaller than 0.5 μm, the exposure and stripping process cannot be basically completed, and the morphology of the electrode is difficult to control, which limits the application of SAW filter products in the high-frequency field.
In addition, since the interaction force between atoms in the piezoelectric material of the conventional SAW filter generally exhibits a negative temperature characteristic, that is, the interaction force between atoms is weakened as the temperature increases, this results in a decrease in the elastic modulus of the piezoelectric material. The resonant frequency of the SAW filter is proportional to the elastic coefficient of the piezoelectric material, and thus, as the temperature increases, the resonant frequency of the SAW filter decreases. This temperature-frequency drift characteristic affects the application of SAW filters in radio frequency terminals, and thus, in electrical applications, the SAW filters need to be subjected to corresponding temperature compensation to improve their frequency stability.
The present invention has been made in view of the above-described conventional problems, and an object thereof is to provide a manufacturing method for manufacturing a metal electrode, which can complete exposure and peeling processes when an IDT electrode line is wide, and can control the morphology of the electrode to obtain a metal electrode having a trapezoid SiO formed on the surface thereof 2 The dielectric layer is in the form of a novel fully buried IDT electrode covering the electrode, thereby reducing the frequency temperature coefficient and suppressing the frequency drift.
Technical proposal for solving the technical problems
In one embodiment of the present invention to solve the above-described problems, there is provided a manufacturing method for manufacturing a metal electrode, characterized by comprising:
coating photoresist on a piezoelectric material substrate to form a first photoresist layer;
patterning the first photoresist layer to form a first pattern;
etching the piezoelectric material substrate based on the first pattern to form a landfill trench;
removing the first photoresist layer;
depositing a metal material on the piezoelectric material substrate such that the metal material fills the buried trench to form an electrode metal layer;
grinding the piezoelectric material substrate and the electrode metal layer so that an exposed surface of the piezoelectric material substrate is flush with an exposed surface of the electrode metal layer;
forming a first dielectric layer on the exposed surface of the piezoelectric material substrate and the exposed surface of the electrode metal layer;
coating photoresist on the first dielectric layer to form a second photoresist layer;
patterning the second photoresist layer to form a second pattern;
etching the first dielectric layer based on the second pattern to form an electrode protection layer pattern;
removing the second photoresist layer; and
and forming a second dielectric layer on the electrode protection layer pattern and the piezoelectric material substrate.
In an embodiment of the present invention, in the manufacturing method, the second dielectric layer covers the electrode metal layer and has a trapezoid cross section.
In one embodiment of the present invention, in the manufacturing method, a width of the first pattern is the same as a width of the second pattern.
In one embodiment of the present invention, in the manufacturing method, the piezoelectric material substrate is formed of lithium tantalate or lithium titanate.
In one embodiment of the present invention, in the manufacturing method, the electrode metal layer is an Al layer, a combined Al/Cu layer, a combined Ti/Al/Cu layer, or a Pt layer.
In an embodiment of the present invention, in the manufacturing method, the thickness of the first photoresist layer and the thickness of the second photoresist layer are 1um to 2um.
In one embodiment of the present invention, in the manufacturing method, the first dielectric layer and the second dielectric layer are made of SiO 2 And (5) forming.
In one embodiment of the present invention, in the manufacturing method, the depth of the landfill groove is 20nm to 100nm.
In one embodiment of the present invention, in the manufacturing method, the thickness of the first dielectric layer is 100nm to 500nm.
In one embodiment of the present invention, there is provided a metal electrode manufactured by any one of the above manufacturing methods.
Effects of the invention
According to the invention, the exposure and stripping process can be completed when the line width of the IDT electrode is smaller, and the morphology of the electrode can be controlled.
In addition, according to the invention, the addition of a layer of SiO on the periphery of the IDT metal layer can be realized by step-by-step film plating 2 To suppress temperature drift and thereby reduce the frequency temperature coefficient of the IDT electrode.
In addition, according to the present invention, a novel manufacturing method of a fully buried IDT electrode structure is obtained, which forms a trapezoid structure by dielectric layer plating on the surface thereof, thereby improving the electromechanical coupling coefficient and Q value (also referred to as quality factor) and effectively suppressing clutter.
Drawings
So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings, wherein like reference numerals have been used, to facilitate an understanding, to identify identical elements that are common to the various figures. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments, and that:
fig. 1 is a schematic diagram of an IDT copper process manufacturing method of a high-frequency SAW according to a comparative example of the related art.
Fig. 2 is a schematic diagram of a method of manufacturing a metal electrode of a temperature compensated SAW (TC-SAW) filter according to an embodiment of the present invention.
Fig. 3 is a process flow diagram of a method of manufacturing a metal electrode of a TC-SAW filter according to an embodiment of the present invention.
It is contemplated that elements of one embodiment of the present invention may be beneficially employed in other embodiments without further recitation.
Detailed Description
Other advantages and technical effects of the present invention will become apparent to those skilled in the art from the present disclosure, when the following detailed description is given. Furthermore, the present invention is not limited to the following embodiments, and may be practiced or applied by other different embodiments, and various modifications and alterations may be made to the specific contents of the present specification without departing from the spirit of the present invention.
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The drawings are for simplicity and are not drawn to scale, and the actual dimensions of the structures are not shown. For ease of understanding, the same reference numbers are used in the various figures to denote the same elements in common in the figures. The drawings are not to scale and may be simplified for clarity. Elements and features of one embodiment may be advantageously incorporated into other embodiments without further recitation.
Comparative example (Prior Art)
Hereinafter, an IDT copper process manufacturing method of a related-art high-frequency SAW filter, which is a comparative example of the related art, will be described with reference to fig. 1.
Fig. 1 is a schematic diagram of an IDT copper process manufacturing method of a high-frequency SAW filter according to a comparative example of the related art.
The process starts in step a in fig. 1. In step a, a piezoelectric material substrate 1 is provided.
Next, in step b, a dielectric material (e.g., siO 2 ) To form the first dielectric layer 2.
In step c, a positive photoresist is coated to form a positive photoresist layer, and after the positive photoresist layer is patterned (e.g., by exposure, development, etc.), an IDT pattern is formed. For example, a dry etching process is used to etch the first dielectric layer 2 to form a film layer morphology corresponding to the IDT pattern, and the positive photoresist is removed.
In step d, an IDT metal layer 3 is deposited, which IDT metal layer 3 is Cu at least on top.
In step e, the IDT metal layer 3 is polished using a Chemical Mechanical Polishing (CMP) process. Grinding is performed until the IDT metal layer 3 is flush with the first dielectric layer 2, thereby forming IDT metal structures 3a which are separated from each other and correspond to the IDT pattern, and the IDT metal structures 3a have the same thickness as the first dielectric layer 2, as shown by e in fig. 1. The main process principle of CMP is that chemical substances react with substances on the surface of a wafer to form new compounds, and then fine particles in the slurry are used for mechanical polishing, so that the compounds are removed.
In step f, a positive photoresist is coated to form a second positive photoresist layer, and the second positive photoresist layer is patterned (e.g., by exposure, development, etc.) based on the IDT pattern, thereby forming a stripped region of the first dielectric layer 2. Wherein the peeling region of the first dielectric layer 2 is defined to be a certain distance outside the side wall of the IDT metal structure 3 a. The dielectric material in the stripped region is stripped off using a dry process or a wet process, leaving a remaining layer 2a on the sidewall of the metal structure 3a, after which the positive photoresist is removed.
In step g, a secondary deposition of the above-mentioned dielectric material is performed on the surface of the structure formed in step f, thereby forming the second dielectric layer 4. The second dielectric layer 4 covers the surface of the IDT metal structure 3a for frequency adjustment.
In step h, the second dielectric layer 4 of the predetermined area (e.g., the top of a portion of the IDT metal structure) is perforated to obtain connection holes 5, thereby forming a final pattern.
So far, the final structure is formed and the method ends.
< embodiment of the invention >
Hereinafter, a method for manufacturing a metal electrode according to the present invention will be described in detail with reference to fig. 2 and 3.
Fig. 2 is a schematic diagram of a method of manufacturing a metal electrode of the TC-SAW filter according to this embodiment. Fig. 3 is a process flow diagram of a method of manufacturing a metal electrode of a TC-SAW filter according to this embodiment. In the present embodiment, the IDT metal electrode of the TC-SAW filter is described as an example in which the manufacturing method is used, but the manufacturing method of the present invention is not limited to this, and the manufacturing method may be used to manufacture other types of electrodes having a similar structure to the IDT metal electrode of the present embodiment among other types of devices.
The method of manufacturing a metal electrode of the TC-SAW filter of this embodiment starts at step S302. In this step S302, as shown by a in fig. 2, a piezoelectric material substrate 1 may be provided. The piezoelectric material substrate 1 may be formed of, for example, lithium tantalate or lithium titanate wafer or the like.
Next, in step S304, a positive photoresist may be coated on the piezoelectric material substrate 1 to form a first positive photoresist layer 2, as shown by b in fig. 2. As a non-limiting example, the positive photoresist may include a novolac resin. The thickness of the first positive photoresist layer 1 may range from 1um to 2um, for example, 1.2um, which may be adjusted according to the design requirements of the product.
In step S306, the first positive photoresist layer 1 may be patterned (e.g., by exposure, development, etc.) to form a first pattern 2a, as shown by c in fig. 2. The line width of the first pattern 2a (which corresponds to the width of the finger electrode) can be adjusted according to the actual product, and the line width can be in the range of 200nm to 500nm, for example, 300nm.
In step S308, as shown by d in fig. 2, an etching process, such as a dry etching process, may be used to form a buried trench 1a on the piezoelectric material substrate 1 according to the first pattern 2a, and the depth of the buried trench 1a may be in the range of 20 to 100nm, for example, 50nm, which may be adjusted according to the product design requirements.
In step S310, as shown by e in fig. 2, the first positive photoresist layer 1 may be removed. As an example, the first positive photoresist layer 1 may be dissolved by a wet process.
In step S312, a metal material (e.g., al, cu, ti, pt) may be deposited on the piezoelectric material substrate 1 until the metal material fills the buried trench 1a on the piezoelectric material substrate 1 (alternatively, the metal material may be deposited until the buried trench 1a overflows), to form the electrode metal layer 3, as shown by f in fig. 2. The electrode metal layer 3 may be deposited by sputtering or vapor deposition. The electrode metal layer 3 may be Al or a combination of metal layers comprising Al in the top layer, such as Al, al/Cu, ti/Al/Cu, pt, etc. The thickness of the electrode metal layer 3 may be about 50nm to 200nm, for example, 100nm, to facilitate precise control of the thickness of the IDT electrode structure. The material and/or thickness of the electrode metal layer 3 may be adjusted according to the design requirements of the product.
In step S314, as shown in g in fig. 2, a polishing process such as a CMP (chemical mechanical polishing) process may be employed to polish out a portion of the electrode metal layer 3 overflowing the landfill groove 1a so that the exposed surface of the piezoelectric material substrate 2 is flush with the exposed surface of the IDT metal layer 3 to form IDT metal structures 3a (i.e., IDT metal electrodes 3 a) separated from each other corresponding to the first pattern 2 a.
In step S316, a dielectric material may be deposited on the exposed surface of the piezoelectric material substrate 1 and the exposed surface of the electrode metal layer 3 to form a first dielectric layer 4 for protecting the electrode, as shown by h in fig. 2. The dielectric material constituting the first dielectric layer 4 may for example comprise SiO 2 . Can be deposited by Chemical Vapor Deposition (CVD), physical Vapor Deposition (PVD), and/or PECVD (plasma-enhanced chemical vapor)Phase deposition), etc., to deposit the first dielectric layer 4. The thickness of the first dielectric layer 4 may range from 100nm to 500nm, for example, 200nm, which may be adjusted according to the design requirements of the product.
In step S318, a positive photoresist may be coated on the first dielectric layer 4 to form a second positive photoresist layer 5, as shown by i in fig. 2. The thickness of the second positive photoresist layer 5 may range from 1um to 2um, for example, 1.2um, which may be adjusted according to the design requirements of the product.
In step S320, the second positive photoresist layer 5 may be patterned (e.g., by exposure, development, etc.) to form a lift-off pattern 5a (hereinafter referred to as a second pattern 5 a) of the first dielectric layer 4, as shown by j in fig. 2. The width of the second pattern 5a may be the same as the width of the IDT metal electrode 3 a. Accordingly, the width of the second pattern 5a may be the same as the width of the first pattern 2 a.
In step S322, the first dielectric layer 4 may be etched by an etching process, such as a dry etching process, to etch the electrode protection layer pattern 4a according to the second pattern 5a, as shown by k in fig. 2. The electrode protection layer pattern 4a may have the same width as the IDT metal electrode 3 a. Accordingly, the width of the electrode protection layer pattern 4a may be the same as the width of the first pattern 2 a.
In step S324, the second positive photoresist layer 5 may be removed, as shown by l in fig. 2. As an example, the second positive photoresist layer 5 may be dissolved by a wet process.
In step S326, a second dielectric layer 6 may be deposited on the electrode protection layer pattern 4a and the piezoelectric material substrate 1, as shown by m in fig. 2. The dielectric material constituting the second dielectric layer 6 is preferably SiO 2 . The second dielectric layer 6 may be deposited by a deposition method such as Chemical Vapor Deposition (CVD), physical Vapor Deposition (PVD), and/or PECVD (plasma enhanced chemical vapor deposition).
So far, the final structure is formed and the method ends.
In certain embodiments, the operations included in the methods of the embodiments described above may occur simultaneously, substantially simultaneously, or in a different order than shown in the figures.
In some embodiments, all or part of the operations included in the methods in the embodiments described above may optionally be performed automatically by a program. In one example, the invention may be implemented as a program product stored on a computer readable storage medium for use with a computer system. The program(s) of the program product include the functions of the embodiments (including the methods described herein). Illustrative computer-readable storage media include, but are not limited to: (i) A non-writable storage medium (e.g., a read-only memory device within a computer such as a CD-ROM disk readable by a CD-ROM machine, flash memory, ROM chip or any type of solid state non-volatile semiconductor memory) on which information is permanently stored; and (ii) a writable storage medium (e.g., a disk storage or hard disk drive or any type of solid state random access semiconductor memory) on which alterable information is stored. Such computer-readable storage media, when carrying computer-readable instructions that direct the functions of the methods described herein, are embodiments of the present invention.
< comparison between the invention and comparative examples >
Compared with the comparative example, the IDT electrode has a dielectric layer (e.g. SiO 2 ) The invention further suppresses the temperature drift by using the dielectric layer of the trapezoid structure formed by step-by-step coating (i.e., step-by-step formation of the trapezoid structure on the metal electrode). Therefore, the invention realizes the technical effects of reducing the frequency temperature coefficient and inhibiting the frequency drift.
In addition, the dielectric layer formed by the electrode manufacturing method has a trapezoid structure, and the trapezoid structure can effectively inhibit Rayleigh-mode spurious responses stray response (Rayleigh-mode spurious responses) of Rayleigh Li Mo, so that clutter is effectively inhibited.
In addition, in the case of TC-SAW filters, embedding the electrodes in silicon oxide creates spurious emissions such as lateral modes. Embedding electrodes into the piezoelectric layer as described herein suppresses lateral modes and improves the Q of the TC-SAW filter. Also, embedding electrodes in the piezoelectric layer as described herein can effectively suppress waveguide modes in the transducer and reduce resistive losses, improve high frequency conversion, and increase electromechanical coupling coefficients.
The foregoing describes in detail alternative embodiments of the present invention. It will be appreciated that various embodiments and modifications may be resorted to without departing from the broad spirit and scope of the invention. Many modifications and variations will be apparent to those of ordinary skill in the art in light of the concepts of the invention without undue burden. Therefore, all technical solutions which can be obtained by logic analysis, reasoning or limited experiments based on the prior art by a person skilled in the art according to the inventive concept shall fall within the scope of protection defined by the claims of the present invention.
Claims (10)
1. A manufacturing method for manufacturing a metal electrode, characterized by comprising:
coating photoresist on a piezoelectric material substrate to form a first photoresist layer;
patterning the first photoresist layer to form a first pattern;
etching the piezoelectric material substrate based on the first pattern to form a landfill trench;
removing the first photoresist layer;
depositing a metal material on the piezoelectric material substrate such that the metal material fills the buried trench to form an electrode metal layer;
grinding the piezoelectric material substrate and the electrode metal layer so that an exposed surface of the piezoelectric material substrate is flush with an exposed surface of the electrode metal layer;
forming a first dielectric layer on the exposed surface of the piezoelectric material substrate and the exposed surface of the electrode metal layer;
coating photoresist on the first dielectric layer to form a second photoresist layer;
patterning the second photoresist layer to form a second pattern;
etching the first dielectric layer based on the second pattern to form an electrode protection layer pattern;
removing the second photoresist layer; and
and forming a second dielectric layer on the electrode protection layer pattern and the piezoelectric material substrate.
2. The method of manufacturing of claim 1, wherein the second dielectric layer covers the electrode metal layer and has a trapezoidal cross section.
3. The method of manufacturing of claim 1, wherein the width of the first pattern is the same as the width of the second pattern.
4. The method of manufacturing according to claim 1, wherein the piezoelectric material substrate is formed of lithium tantalate or lithium titanate.
5. The method of manufacturing according to claim 1, wherein the electrode metal layer is an Al layer, a combined Al/Cu layer, a combined Ti/Al/Cu layer, or a Pt layer.
6. The method of manufacturing of claim 1, wherein the first photoresist layer thickness and the second photoresist layer thickness are 1um to 2um.
7. The method of manufacturing according to claim 1, wherein the first dielectric layer and the second dielectric layer are made of SiO 2 And (5) forming.
8. The method of claim 1, wherein the landfill trench has a depth of 20nm to 100nm.
9. The method of manufacturing of claim 1, wherein the first dielectric layer has a thickness of 100nm to 500nm.
10. A metal electrode, characterized in that the metal electrode is manufactured by the manufacturing method according to any one of claims 1 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011492899.5A CN112653409B (en) | 2020-12-17 | 2020-12-17 | Manufacturing method for manufacturing metal electrode |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011492899.5A CN112653409B (en) | 2020-12-17 | 2020-12-17 | Manufacturing method for manufacturing metal electrode |
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| Publication Number | Publication Date |
|---|---|
| CN112653409A CN112653409A (en) | 2021-04-13 |
| CN112653409B true CN112653409B (en) | 2024-04-12 |
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| CN202011492899.5A Active CN112653409B (en) | 2020-12-17 | 2020-12-17 | Manufacturing method for manufacturing metal electrode |
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