CN112651285A

CN112651285A - Single chip device, electronic module and electronic apparatus including single chip device

Info

Publication number: CN112651285A
Application number: CN202011074171.0A
Authority: CN
Inventors: 谢子文; 施伟伦; 洪挺轩; 唐煌钦
Original assignee: Novatek Microelectronics Corp
Current assignee: Novatek Microelectronics Corp
Priority date: 2019-10-09
Filing date: 2020-10-09
Publication date: 2021-04-13

Abstract

The invention provides a single-chip element for driving a panel comprising fingerprint sensing pixels, display pixels and a touch sensor, an electronic module and an electronic device comprising the single-chip element. The single-chip component comprises a main body, a first group of welding pads and a second group of welding pads, wherein the first group of welding pads and the second group of welding pads are arranged in the main body. The first set of pads includes a plurality of first pads for driving fingerprint sensing pixels and is arranged on the body having at least one of a left portion and a right portion with respect to an axis. The second set of pads includes a plurality of second pads for driving display pixels and touch sensors and is arranged on at least the other of the left portion and the right portion, wherein at least one group of the first set of pads and the second set of pads is arranged only on the one of the left portion and the right portion.

Description

Single chip device, electronic module and electronic apparatus including single chip device

Technical Field

The present invention relates to a single-chip device, an electronic module, and an electronic apparatus including the single-chip device for driving a panel including fingerprint sensing pixels, display pixels, and touch sensors, and more particularly, to a single-chip device, an electronic module, and an electronic apparatus including the single-chip device for driving a panel including fingerprint sensing pixels, display pixels, and touch sensors.

Background

For computing devices such as smart phones, tablet computers, or other information processing devices, the touch screen is an indispensable component for the interaction between users of the computing devices. In order to simplify the circuit area, the circuit layout, and make the computing device thinner, a Touch and Display Driver Integrated (TDDI) Integrated Circuit (IC) that combines a Touch controller and a display driver circuit into a single chip has been utilized to drive and control the display panel using a Liquid Crystal Display (LCD) display technology, and the associated Touch sensors of the display panel of the computing device such as a smart phone and a tablet computer.

On the other hand, fingerprint sensing is increasingly becoming a standard functionality for such computing devices to meet such emerging needs for increased security in various applications such as fingerprint identification for unlocking such computing devices. With the development of the technology, some smart phones today are equipped with finger print sensors in front of or under the display.

As such, as circuit complexity increases due to the multiple requirements of touch sensing, fingerprint sensing, and display driving associated with the display panel, designing circuits and layouts for circuit routing and control circuits for display panels associated with touch sensing and fingerprint sensing components (elements) in computing devices such as smartphones or tablets is challenging.

Disclosure of Invention

In accordance with at least one embodiment of the present invention, the architecture for driving fingerprint sensing pixels, display pixels, and touch sensors by using a single chip device in a computing device is provided. Based on the architecture, the single-chip component can be implemented such that its pads are arranged in the following way (arraged): electrical connections to the plurality of bond pads and control lines or associated lines for the plurality of fingerprint sensing pixels, display pixels, and touch sensor can be made using non-crossing (cross over) traces with respect to each other. In this way, circuit layout simplification and circuit load balancing of the plurality of traces may be facilitated.

The present invention provides a single-chip device for driving a panel comprising a plurality of display pixels, a plurality of touch sensors, and a plurality of fingerprint sensing pixels, as exemplified in some embodiments below. The single-wafer component includes a body; a first set of pads arranged (dispensed) in the body; and a second set of pads disposed in the body. The body has a left portion and a right portion with respect to an axis. The first set of pads includes a plurality of first pads for driving the plurality of fingerprint sensing pixels, wherein the first set of pads is disposed on at least one of the left site and the right site and configured for coupling to the plurality of fingerprint sensing pixels. The second set of pads includes a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors, wherein the second set of pads is arranged on at least the other of the left portion and the right portion and configured for coupling to the panel, wherein at least one group of the first set of pads and the second set of pads is arranged on only the one of the left portion and the right portion.

Optionally, the plurality of first pads are arranged on only one of the left portion and the right portion.

Alternatively, the plurality of second pads are arranged only on the other of the left portion and the right portion.

Optionally, the plurality of second pads are arranged on the left portion and the right portion.

Optionally, the plurality of first pads are closer to the axis than the plurality of second pads.

Optionally, the plurality of second pads are closer to the axis than the plurality of first pads.

Optionally, the plurality of second pads are arranged only on the other of the left portion and the right portion.

Optionally, the plurality of first pads are arranged on the left portion and the right portion.

Optionally, the body has a rectangular shape having a first side, a second side parallel to and closer to the panel than the first side, a left side on the left portion and perpendicular to the first side and the second side, and a right side on the right portion and parallel to the left side, and the axis intersects the first side and the second side (interrupts).

Optionally, all of the first set of pads and all of the second set of pads are arranged along the first side edge.

Optionally, the first set of pads is closer to the axis than the second set of pads.

Optionally, the second set of pads is closer to the axis than the first set of pads.

Optionally, all of the first set of pads and all of the second set of pads are arranged along the second side.

Optionally, all of the first set of pads are arranged along one of the first side and the second side, and all of the second set of pads are arranged along both the left side and the right side.

Optionally, all of the first set of pads are disposed along both the left side and the right side, and all of the second set of pads are disposed along one of the first side and the second side.

Optionally, all of the first set of pads are arranged along at least one of the left side and the right side, and all of the second set of pads are arranged along at least one other of the left side and the right side.

Optionally, the plurality of first pads are arranged along only the one of the left side and the right side.

Optionally, the plurality of second pads are arranged only along the other of the left side and the right side.

Optionally, the plurality of second pads are arranged along both the left side and the right side.

Optionally, the plurality of first pads are arranged along both the left side and the right side.

Optionally, the first pads include gate-driver-on-array (gate-driver-on-array) select pads for the fingerprint.

Optionally, the plurality of second pads comprise a plurality of gate-driver-on-array (gate-driver-on-array) select pads.

Optionally, the panel further couples to a plurality of data lines of the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and a plurality of selection circuits, each of the plurality of selection circuits is coupled to a corresponding set (set) of the plurality of data lines, and the second set of pads further includes a plurality of third pads configured to couple to the panel and to control the plurality of selection circuits.

Optionally, each of the plurality of selection circuits is further coupled to at least one of the plurality of fingerprint sensing lines.

Optionally, the plurality of third pads are arranged on both the left portion and the right portion.

Optionally, the body has a rectangular shape having a first side and a second side parallel to the first side and closer to the panel than the first side, and the plurality of third pads are arranged along the first side.

Optionally, the body has a rectangular shape having a first side and a second side parallel to the first side and closer to the panel than the first side, and the plurality of third pads are arranged along the second side.

Optionally, the panel further includes a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and the single chip device further includes a third set of pads disposed in the main body for driving the plurality of data lines or receiving fingerprint sensing signals from the plurality of fingerprint sensing lines, or coupled to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

Optionally, the third set of pads includes a first subset of pads for driving the plurality of data lines in a time-division (time-division) manner and receiving the fingerprint sensing signals from the plurality of fingerprint sensing lines; and a second subset of pads configured to couple to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

Optionally, the panel further comprises a plurality of selection circuits, wherein each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines and a corresponding one of the plurality of fingerprint sensing lines, and wherein the first subset of pads is configured for coupling to the plurality of selection circuits.

Optionally, the first subset of pads and the second subset of pads are alternately arranged on the body.

Optionally, the first subset of pads is configured to drive the data lines in a time-separated manner, and the second subset of pads receives touch signals from the touch sensing lines.

Optionally, the body has a rectangular shape with a first side and a second side parallel to the first side and closer to the panel than the first side, and the third set of pads is arranged along the second side.

Optionally, the single-chip device further comprises a fingerprint driver circuit and a touch display driver circuit. The fingerprint driver circuit is disposed in the body and coupled to the plurality of first pads. The touch display driver circuit is disposed in the main body and coupled to the plurality of second pads and the plurality of third pads.

Optionally, in the right portion, none of the plurality of third pads is disposed between the plurality of first pads and the plurality of second pads, and in the left portion, none of the plurality of third pads is disposed between the plurality of first pads and the plurality of second pads.

Optionally, the plurality of third pads are arranged beside the plurality of second pads instead of beside the plurality of first pads.

Optionally, the plurality of second pads are arranged beside the plurality of first pads and beside the plurality of third pads.

Optionally, the body is configured to be disposed on a film as a wafer-on-film (chip-on-film) structure.

Optionally, the body is configured to be disposed on glass as a wafer-on-glass (chip-on-glass) structure.

Optionally, the single-chip device further comprises a fingerprint driver circuit and a touch display driver circuit. The fingerprint driver circuit is disposed in the body and coupled to the first set of pads. The touch display driver circuit is disposed in the body and coupled to the second set of pads.

Optionally, in the right portion, none of the first set of pads is disposed between the second set of pads, and none of the second set of pads is disposed between the first set of pads, and in the left portion, none of the first set of pads is disposed between the second set of pads, and none of the second set of pads is disposed between the first set of pads.

Optionally, the panel further comprises at least one first Gate-on-array (GOA) circuit, and the first set of pads is configured to be coupled to the plurality of fingerprint sensing pixels via the at least one first GOA circuit.

Optionally, the panel further comprises at least one second Gate On Array (GOA) circuit, and the second set of pads is configured for coupling to the plurality of display pixels and the plurality of touch sensors via the at least one second GOA circuit.

The present disclosure further provides an electronic module for driving a panel including a plurality of fingerprint sensing pixels, a plurality of display pixels, and a plurality of touch sensors, as exemplified in some embodiments below. The electronic module comprises a film; and a single-wafer element disposed on the thin film, wherein the single-wafer element is as exemplified in any one of the embodiments or any combination of at least one thereof, where appropriate.

The present disclosure further provides an electronic device, as exemplified in some embodiments below. The electronic device includes a panel including a plurality of display pixels, a plurality of touch sensors, and a plurality of fingerprint sensing pixels; and a monolithic component for coupling to the panel, wherein the monolithic component is as exemplified in any one of the embodiments or any combination of at least one thereof, where appropriate.

Optionally, the plurality of fingerprint sensing pixels correspond to a fingerprint sensing area, the panel has a display area, the plurality of touch sensors correspond to a touch sensing area, and the sizes of the fingerprint sensing area, the display area, and the touch sensing area are substantially the same.

Optionally, the electronic device further includes a substrate, and the plurality of display pixels, the plurality of touch sensors, and the plurality of fingerprint sensing pixels are disposed on the substrate.

Optionally, the substrate comprises glass, and the single-wafer element is disposed on a portion of the glass as a chip-on-glass (chip-on-glass) structure.

Optionally, the substrate further comprises a film, and the single-chip component is disposed on the film as a chip-on-film (chip-on-film) structure.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required to be used in the description of the embodiments will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.

FIG. 1 is a schematic diagram illustrating an architecture for driving fingerprint sensing pixels, display pixels, and touch sensors using a single chip element in a computing device according to various embodiments of the present disclosure.

FIG. 2 is a schematic diagram illustrating a specific embodiment of the architecture of FIG. 1.

Fig. 3 is a schematic diagram illustrating a possible example of an electronic module combining TDDI and a read-out IC (ROIC).

FIG. 4A is a schematic diagram illustrating various embodiments based on the single-chip device of FIG. 1 for driving fingerprint sensing pixels, display pixels, and touch sensors.

Fig. 4B is a diagram illustrating an example of a trace connected to a pad of the single chip device in fig. 4A.

Fig. 5A is a schematic diagram illustrating an exemplary embodiment of a bond pad arrangement of a single wafer element.

FIG. 5B is a schematic diagram illustrating another exemplary embodiment of a bond pad arrangement for a single wafer element.

FIG. 6A is a schematic diagram illustrating a panel coupled to a single wafer element in accordance with an embodiment of the present disclosure.

FIG. 6B illustrates a schematic diagram of a panel including display pixels and fingerprint sensing pixels coupled to a single wafer element according to one embodiment of the present disclosure.

FIG. 6C is a schematic diagram illustrating a panel including display pixels and fingerprint sensing pixels coupled to a single wafer element according to another embodiment of the present disclosure.

FIG. 6D is a schematic diagram illustrating a panel including display pixels and fingerprint sensing pixels coupled to a single wafer element according to yet another embodiment of the present disclosure.

FIG. 6E is a schematic diagram illustrating a panel including display pixels and fingerprint sensing pixels coupled to a single wafer element according to another embodiment of the present disclosure.

FIG. 7 is a schematic diagram illustrating a fingerprint sensing pixel according to an embodiment of the present disclosure.

FIG. 8 is a timing diagram illustrating an embodiment of driving a fingerprint sensing pixel, a display pixel, and a touch sensor.

FIG. 9A is a schematic diagram illustrating an embodiment of a bond pad arrangement of a single-wafer device along a first side thereof.

FIG. 9B is a schematic diagram illustrating an embodiment of a pad placement of a single-wafer element along a first side thereof.

FIG. 9C is a schematic diagram illustrating an embodiment of a pad placement of a single-wafer device along a first side thereof.

FIG. 10A is a schematic diagram illustrating an embodiment of pad placement of a monolithic element along a second side thereof.

FIG. 10B is a schematic diagram illustrating an embodiment of pad placement of a monolithic element along a second side thereof.

FIG. 10C is a schematic diagram illustrating an embodiment of pad placement of a monolithic element along a second side thereof.

FIG. 10D is a diagram illustrating an embodiment of pad placement of a monolithic element along a second side thereof.

FIG. 11A is a schematic diagram illustrating an embodiment of a pad placement of a single-wafer element along a first side thereof.

FIG. 11B is a schematic diagram illustrating an embodiment of a pad placement of a single-wafer element along a first side thereof.

FIG. 11C is a schematic diagram illustrating an embodiment of a pad placement of a single-wafer element along a first side thereof.

FIG. 11D is a schematic diagram illustrating an embodiment of a pad placement of a single-wafer device along a first side thereof.

FIG. 12A is a schematic diagram illustrating an embodiment of a pad arrangement for a single die element along its left and right sides.

FIG. 12B is a schematic diagram illustrating an embodiment of pad placement of a single die element along its left and right sides.

FIG. 12C is a schematic diagram illustrating an embodiment of pad placement of a single die element along its left and right sides.

FIG. 12D is a schematic diagram illustrating an embodiment of a pad arrangement for a single die element along the left and right sides thereof.

FIG. 13A is a diagram illustrating an embodiment of a bond pad arrangement for a single chip device.

FIG. 13B is a diagram illustrating an embodiment of a bond pad arrangement for a single chip device.

FIG. 13C is a diagram illustrating an embodiment of a bond pad arrangement for a single chip device.

FIG. 14 is a diagram illustrating an embodiment of a bond pad arrangement for a single chip device.

FIG. 15 is a schematic diagram illustrating another embodiment of a bond pad arrangement for a single chip device.

FIG. 16 is a schematic diagram illustrating a particular embodiment of a single wafer element.

Fig. 17 is a schematic view illustrating a routing structure between a single chip device (or an electronic module) and the panel according to an embodiment of the present invention.

Fig. 18 is a schematic diagram illustrating the selection circuit on the single chip device (or electronic module) and the panel according to an embodiment of the present invention.

Fig. 19 is a waveform diagram illustrating the plurality of control signals for controlling the switching member depicted in fig. 18.

Reference numerals

1: arithmetic device

5: processing unit

9. 9A, 9B, 9C, 9D, 9E: panel board

9_1A-9_1D, 9_2A-9_ 2D: panel board

9_3A-9_3D, 9_4A-9_4D, 9_5A-9_ 5D: panel board

10. 10A, 20_1A-20_1D, 20_2A-20_2D, 20_3A-20_3D, 20_4A-20_4D, 20_5A-20_5D, 20A, 30B, 40: single-chip component

11. 11A: display driver circuit

11B: integrated circuit integrating touch control and display driver

12. 12A, 49: touch driver circuit

19. 19A, 29B, 41: fingerprint driver circuit

19B: readout integrated circuit

21A, 21B: a touch and display driver integration circuit; touch display driver circuit

30C: single-chip component

90_1C, 90_1D, 90_2C, 90_ 2D: glass part

91: display pixel array

93: touch sensing array

95: fingerprint sensing array

100. 100_1A, 100_1B, 100_2A, 100_2B, 100A, 100_5A-100_ 5D: film(s)

110. 111, 190, T, T11_3A, T12_3A, T11_3B, T12_3B, T11_3C, T12_3C, T11_3D, T12_3D, T21_3A, T22_3A, T21_3B, T22_3B, T21_3C, T22_3C, T21_3D, T22_3D, T30A, T30B, T31A, T31B, T32A, T32B, T40: wiring

126: fingerprint sensor

150. 150_1A-150_1D, 150_2A-150_ 2D: flexible Printed Circuit (FPC)

150_3A-150_3D, 150_4A-150_4D, 150_5A-150_ 5D: flexible Printed Circuit (FPC)

200. 200_1A-200_1D, 200_2A-200_2D, 200_3A-200_3D, 200_4A-200_4D, 200_5A-200_5D, 300A-300C: main body

210. G _ 1_ 1_ 1_ 1_ 1_ 1_ 1_ 2_ 2_ 2_ 2_ 2_ 2_ 2_3 _3 _3 _3 _3 _3 _3 _3 _3 _4 _4 _4 _4 _4 _4 _4 _5 _5 _ 5D: first set of bonding pads

210_1, 210_2 to 210_ N, 240A: bonding pad

220. G21_1A, G22_1A, G21_1B, G22_1B, G21_1C, G22_1C, G21_1D, G22_1D, G21_2A, G22_2A, G21_2B, G22_2B, G21_2C, G22_2C, G21_2D, G22_2D, G21_3A, G22_3A, G21_3B, G22_3B, G21_3C, G22_3C, G21_3D, G22_4D, G22_4D, G22_4D, G22_4D, G22_4D, G22_4D, G22_5 _ D, G22_5D, G22_5D, G22_ 5: second set of bonding pads

230A, 230B: third set of bonding pads

410. 412: gate On Array (GOA) driver

413: fingerprint receiver multiplexing circuit

414: fingerprint analog front-end circuit

415: fingerprint control circuit

416. 496: data interface circuit

493: multiplex circuit of touch panel receiver

494: touch analog front-end circuit

495: touch control circuit

501: first switch component

502: second switch component

502_ 1: a first switch element

502_ 2: second switch element

503: third switch component

504: fourth switch component

AA: active region

AX: axial line

B: blue sub-pixel

B1: block

DAC: signal converter

DP: display pixel

And (2) DS: display driving signal

FGL: fingerprint scanning line

FGOA1, FGOA 2: gate on fingerprint array (GOA) scanning circuit

FP _ S: fingerprint sensing signal

FPR _ GCK: reset signal

FPR _ S1, FPR _ S2: fingerprint drive signal

FPR _ SEL: a selection signal; acquiring a signal

FS: fingerprint sensing pixel

G: green sub-pixel

GOA1, GOA2, RG1, RG2, TG1, TG 2: gate On Array (GOA) circuit

LS: routing; transmission line

N1D, N1F: first terminal

N2: second terminal

N3D, N3F: third terminal

N4: fourth terminal

And (3) OBF: output buffer

P1: left part

P2: the right part

P11A, P12A, P11B, P12B: first bonding pad

P21A, P22A, P21B, P22B: second bonding pad

P31A, P32A, P31B, P32B: third bonding pad

P4A, P4B: fourth bonding pad

P41A, P41B: first sub-set of bonding pads

P42A, P42B: second sub-set of bonding pads

PD: light emitting diode

R: red sub-pixel

S1: the first side edge

S2: second side edge

S3: left side edge

S4: right side edge

SC, SC1, SC 2: selection circuit

SL _ FP: fingerprint sensing line

SLD: a display data line; data line

SLR, SLG, SLB: data line

SM 1: selection module

SM 2: selection module

SW1SD, SW1FP, SW3FP, SW2R, SW2G, SW2B, SW2 FP: control signal

SWR, SWG, SWB, SW _ FP: switch with a switch body

T, T1, T2 to TN: wiring

TS1, TS 2: switch with a switch body

TI 1: display driving phase

TI 2: fingerprint sensing phase

T11_1A, T12_1A, T11_1B, T12_1B, T11_1C, T12_1C, T11_1D, T12_1D, T11_2A, T12_2A, T11_2B, T12_2B, T11_2C, T12_2C, T11_2D, T12_2D, T11_4A, T12_4A, T11_4B, T12_4B, T11_4C, T12_4C, T11_4D, T12_4D, T11_5B, T12_5A, T11_ 5C: first wire

T21_1A, T22_1A, T21_1B, T22_1B, T21_1C, T22_1C, T21_1D, T22_1D, T21_2A, T22_2A, T21_2B, T22_2B, T21_2C, T22_2C, T21_2D, T22_2D, T21_4A, T22_4A, T21_4B, T22_4B, T21_4C, T22_4C, T21_4D, T22_4D, T21_5A, T22_5B, T21_5C, T22_5C, T21_5D, T22_ 5D: second routing

TDDI _ S1: display driving signal

TDDI _ S2: selection signal

TDDI _ SW _ FP: selection signal

TDDI _ SWR, TDDI _ SWG, TDDI _ SWB: selection signal

TGL: scanning line

TP: touch control

Vout: node point

VDD, Vbias: voltage of

Detailed Description

The single chip device, the electronic module and the electronic apparatus including the single chip device for driving a panel including fingerprint sensing pixels, display pixels and a touch sensor according to embodiments of the present invention will be further described with reference to the accompanying drawings.

To facilitate an understanding of the objects, features, and effects of the disclosure, specific embodiments of the disclosed embodiments of the invention are provided along with the accompanying drawings. The following embodiments are provided to illustrate various implementations, however, the disclosure is not limited to the multiple provided embodiments, and the multiple provided embodiments may be combined as appropriate. In the present specification (including claims) of this application, the terms "coupled", "connected", and "connected", may be used to refer to any direct or indirect connection. For example, "a first element is coupled to a second element" (a first device is coupled to a second device) should be interpreted as "the first element is directly connected to the second element" (the first device is directly connected to the second device) or "the first element is indirectly connected to the second element via other elements or connection methods" (the first device is indirectly connected to the second device through the second device or connection means). The term "signal" may refer to a current, a voltage, a charge, a temperature, a datum, an electromagnetic wave, or any one or more signals. Furthermore, the term "and/or" (and/or) may refer to "at least one of" (at least one of). For example, "first signal and/or" second signal "should be interpreted as" at least one of the first signal and the second signal ".

In the following, architectures for driving fingerprint sensing pixels, display pixels, and touch sensors using a single chip device in a computing device will be provided. Based on the architecture, the single-chip component can be implemented to include its pads arranged in the following manner: electrical connections to the plurality of bond pads and control lines or associated lines for the plurality of fingerprint sensing pixels, display pixels, and touch sensor can be made using traces that do not cross over each other. The pad arrangement of the single die element can facilitate circuit layout simplification and circuit load balancing of the plurality of traces.

The following provides an architecture for driving fingerprint sensing pixels, display pixels, and touch sensors by using single chip elements.

Referring to fig. 1, an architecture for driving fingerprint sensing pixels, display pixels, and touch sensors using a single chip device in a computing device is illustrated in accordance with various embodiments of the present disclosure. As shown in fig. 1, the computing device 1 comprises a processing unit 5, a single-chip element 10, and a panel 9, which comprises a plurality of display pixels associated with a plurality of touch sensors; and a plurality of fingerprint sensing pixels. The single-chip component 10 may be configured to be coupled between the processing unit 5 and the panel 9 and to act as a "bridge" between the processing unit 5 and the panel 9, wherein the panel 9 is associated with the plurality of touch sensors and fingerprint sensing pixels. The processing unit 5 may be configured to control the single-chip component 10 to drive the plurality of display pixels, the plurality of fingerprint sensing pixels, and/or the plurality of touch sensors so as to display an image or video, obtain fingerprint data, and/or touch data. The panel 9 may be a display panel, for example, implemented as an in-cell type or an on-cell type display panel of a fingerprint sensor. The single-chip component 10 may be implemented to integrate and include a display driver circuit 11, a touch driver circuit 12, and a fingerprint driver circuit 19. In this manner, the single-chip device 10 may be referred to as a Fingerprint, touch, display driver integration (FTDI) IC. Based on the architecture shown in fig. 1, the single-chip component 10 (as will be exemplified later in various embodiments of fig. 4A, 5B, 9A to 12D, 13A to 13C, 14 to 16, etc.) may be configured to include pads thereof arranged in the following manner: electrical connections between the plurality of bond pads and control lines or associated lines for the plurality of fingerprint sensing pixels, display pixels, and touch sensor can be achieved by using traces that do not cross over each other.

It should be noted that the single chip component 10 may perform the driving directly on the plurality of display pixels, the plurality of fingerprint sensing pixels, and/or the plurality of touch sensors by providing the associated driving signals directly to the plurality of display pixels, the plurality of fingerprint sensing pixels, and/or the plurality of touch sensors. Alternatively, the single chip device 10 may perform the driving indirectly on the display pixels, the fingerprint sensing pixels, and/or the touch sensors by providing related driving or control signals to other control circuits (e.g., gate driver on array (GOA) circuits) that may then provide driving signals directly to the display pixels, the fingerprint sensing pixels, and/or the touch sensors. In other words, the term "driving" may mean "direct driving" which may include generating and directly applying a driving signal, or may mean "indirect driving" which may include causing the plurality of direct driving signals to be generated and/or provided in different implementations.

In some embodiments, the computing device 1 (or electronic device) further comprises a substrate, and the plurality of display pixels, the plurality of touch sensors, and the plurality of fingerprint sensing pixels are disposed on the substrate (e.g., directly attached to, embedded in, or disposed over the substrate, but not limited thereto). For example, the substrate comprises glass, and the single-chip component 10 is disposed on a portion of the glass as a chip-on-glass (chip-on-glass) structure, wherein the portion of the glass may be an extended portion separated from another portion of the glass, such as an Active Area (AA), wherein the plurality of display pixels, the plurality of touch sensors, and the plurality of fingerprint sensing pixels are disposed.

In some embodiments, the substrate comprises a thin film. The single wafer element may be disposed on the thin film as a wafer-on-film (chip-on-film) structure.

Based on the architecture for use in the computing device 1 illustrated in fig. 1, any electronic device such as a smart phone, a tablet computer, or any other information processing device may be implemented, wherein the computing device 1 may further include, but is not limited to, a memory, additional components such as a circuit for wireless or wired communication, image capturing, and the like, as appropriate.

In a specific embodiment, as schematically illustrated in fig. 2, a single chip element 10A (e.g., an FTDI IC) integrates and includes a display driver circuit 11A, a touch driver circuit 12A, and a fingerprint driver circuit 19A for electrically coupling to a display pixel array 91 including display pixels, a touch sensing array 93 including touch sensors, and a fingerprint sensing array 95 including fingerprint sensing pixels, respectively. The design of the FTDI IC (e.g., single-

chip component

10 or 10A) may be performed by combining individual or discrete versions of the display driver circuit 11A, touch driver circuit 12A, and fingerprint driver circuit 19A into a single chip, or by integrating the display driver circuit 11A, touch driver circuit 12A, and fingerprint driver circuit 19A into a single chip in any suitable manner. For example, the FTDI IC (e.g.,

single chip device

10 or 10A) may be implemented as a same set of circuits such as an internal power-sharing circuit, a Multi-time-programmable (MTP) read-only memory (ROM), and/or an oscillator circuit, which may reduce the overall circuit area. In an exemplary implementation of the FTDI IC, the display driver circuit 11A and the touch driver circuit 12A (e.g., a Touch and Display Driver Integrated (TDDI) IC) may be configured to communicate with the fingerprint driver circuit 19A (e.g., including a fingerprint Readout IC (ROIC)) via an internal communication interface that may be readily implemented and controlled in a time sharing manner. In some embodiments, the FTDI IC has different sets of circuitry shared internally, such as that illustrated in U.S. patent publication No.2018/0164943A 1. Of course, the implementation of the present disclosure is not limited to the above examples.

With respect to the hardware structure of the components in the embodiment of fig. 1 or fig. 2, the display driver circuit (e.g., 11 or 11A), the touch driver circuit (e.g., 12 or 12A), and the fingerprint driver circuit (e.g., 19 or 19A) may be implemented individually or integrally based on a control circuit (which includes a microcontroller-type or processor-type core with computing capabilities). Alternatively, the display driver circuit (e.g., 11 or 11A), the touch driver circuit (e.g., 12 or 12A), and the fingerprint driver circuit (e.g., 19 or 19A) may be designed based on a Hardware Description Language (HDL) technique or any other design method for digital circuits familiar to those skilled in the art, and may be designed based on Hardware circuits implemented using Field Programmable Gate Arrays (FPGAs), Complex Programmable Logic Devices (CPLDs), or Application-specific integrated circuits (ASICs).

In some embodiments, the display pixel array 91 is a Liquid Crystal Display (LCD) pixel array, an Organic Light Emitting Diode (OLED) pixel array, or any other suitable pixel array. The panel 9 may be implemented, for example, by an in-cell type or an on-cell type display panel integrated with a fingerprint sensor, wherein the pixel array 91, the touch sensing array 93 and the fingerprint sensing array 95 may be integrated together in a layered manner or in any suitable manner. The touch sense array 93 may be implemented by using a capacitive touch sensor in the form of a touch sense array or other suitable touch sensor. The fingerprint sensing array 95 may be implemented, for example, by an optical fingerprint sensor, a capacitive fingerprint sensor, an ultrasonic fingerprint sensor, or any suitable device for use as a sensor for sensing fingerprint signals. Of course, the implementation of the inventive content is not limited to the above examples.

In some embodiments, the plurality of fingerprint sensing pixels of the fingerprint sensing array 95 correspond to a fingerprint sensing area, the panel (or the display pixel array 91) has a display area, the plurality of touch sensors of the touch sensing array 93 correspond to a touch sensing area, and the fingerprint sensing area, the display area, and the touch sensing area are substantially the same size; for example, the regions are the same, nearly the same, or slightly different or the regions differ by a range, thereby facilitating the panel to implement an all-screen fingerprint sensing function. Of course, implementations of the present disclosure are not limited to the examples. For example, the fingerprint sensing area may be a different size than the display area.

The following shows the criticality of the placement of the bonding pads of the single-chip component.

In a practical implementation, the electrical connections between the single-

chip component

10 or 10A (i.e. FTDI IC) and the plurality of display pixels and the plurality of associated touch sensors and fingerprint sensing pixels of the panel 9 are more complex than those schematically shown in fig. 1 or 2. A plurality of pads of the monolithic element 10 (or 10A) are disposed thereon, and a plurality of corresponding traces need to be arranged to connect the plurality of pads of the monolithic element 10 (or 10A) to the plurality of control and correlation lines of the plurality of display pixels and the plurality of associated touch sensors and fingerprint sensing pixels. In some implementations, the plurality of corresponding traces are arranged to connect the plurality of pads of the single die element 10 (or 10A) to a first GOA circuit for driving fingerprint sensing pixels and a second GOA circuit for driving the plurality of display pixels and the plurality of associated touch sensors. If the pads and the corresponding traces connecting the single-chip component to the control lines and related lines are not properly implemented, signal interference on the traces inevitably becomes severe and the performance of the touch or fingerprint sensing is degraded.

To illustrate the criticality of the pad placement of the single-chip device, a possible implementation as shown in fig. 3 is taken as an example. In this example, display panel 9B associated with touch sensing means (e.g., touch sensors) and fingerprint sensing means (e.g., fingerprint sensing pixels) is configured to operate with the combination of TDDI IC11B and ROIC 19B for fingerprint sensing, as mentioned above. The TDDI IC11B and the ROIC 19B are bonded to the film 100 by a Chip-on-film (COF) method. The film 100 is connected to a flexible printed circuit 150 via which the plurality of Integrated Circuits (ICs) on the film 100 can be electrically connected to a processing unit (as shown in fig. 1 or fig. 2). The display panel 9B includes Gate On Array (GOA) circuits TG1 and TG2 to be driven through the TDDI IC 11B; and GOA circuits RG1 and RG2 to be driven through the ROIC 19B on the plurality of left and right borders of the display panel 9B, respectively. The TDDI IC11B includes pads for outputting corresponding control signals to control the plurality of GOA circuits TG1 and TG2, while the ROIC 19B includes pads for outputting corresponding control signals to control the plurality of GOA circuits RG1 and RG 2. As shown in fig. 3, the TDDI IC11B and ROIC 19B are bonded on the film 100, so that the plurality of traces 190 from the left side of the ROIC 19B inevitably need to cross the plurality of traces from the TDDI IC11B on the display panel 9B, such as the plurality of traces 111 for controlling the data lines (or display data lines or source lines) of the display panel 9B and the plurality of traces 110 for controlling the plurality of GOA circuits TG1 and TG 2. In this way, the following disadvantages will occur. The multiple traces crossing each other will cause signal interference and easily degrade the performance of display, touch sensing, or fingerprint sensing, thereby affecting the user experience. In order to reduce signal interference due to the multiple traces crossing each other, additional processing with certain materials is required in the layers corresponding to the areas where the multiple traces crossing each other occur, which also increases the overall cost. In fig. 3, the TDDI IC11B is located on the left side and the ROIC 19B is located on the right side. Since the bonding positions of the TDDI IC11B and ROIC 19B on the film 100 are asymmetric to the center line of the display panel 9B, the Resistance-capacitance (RC) loads of the traces on the left and right sides of the display panel are not uniform due to the traces having asymmetric lengths. This affects not only the ability of the signals for driving the GOA circuits on the left and right sides of the display panel, but also the performance of display, touch sensing, or fingerprint recognition.

To reduce signal interference, referring to fig. 4A, a single-chip device 20 for driving fingerprint sensing pixels, display pixels, and touch sensors is schematically illustrated according to various embodiments, as will be exemplified below.

In fig. 4A, the single-chip device 20 includes a main body 200, a first set of pads 210, and a second set of pads 220, all of which are disposed in the main body 200. The first set of pads 210 is configured for coupling to the plurality of fingerprint sensing pixels (e.g., via a first GOA circuit) and includes a plurality of first pads for driving the plurality of fingerprint sensing pixels. The second set of pads 220 is configured for coupling to the panel (e.g., 9A, or 9B) (e.g., via a second GOA circuit) and includes a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors. An axis AX (e.g., a midline through the body 200) defines the body 200 as a left portion P1 and a right portion P2. In other words, the body 200 has the left portion P1 and the right portion P2 with respect to the axis AX. The first set of pads 210 is arranged on at least one of the left portion P1 and the right portion P2, and the second set of pads 220 is arranged on at least the other of the left portion P1 and the right portion P2. As illustrated in fig. 4A, for example, the first set of pads 210 (or the second set of pads 220) may be arranged on both the left portion P1 and the right portion P2 in a symmetrical manner or a nearly equal distribution manner, such that a trace (as denoted by T) may be connected to the first set of pads 210 and extend in a similar manner. Of course, the implementation of the single wafer element is not limited to the examples. As will be exemplified later, for example, in fig. 5B, 13A, 13B, 13C, or related embodiments, the first set of pads 210 may be disposed on at least one of the left region P1 and the right region P2, while the second set of pads 220 may be disposed on at least the other of the left region P1 and the right region P2. Further, the first set of pads 210 in the left portion P1 or the right portion P2 are separated from the second set of pads 220, and the second set of pads 220 in the left portion P1 or the right portion P2 are separated from the first set of pads 210. Accordingly, the pad arrangement of the single-chip component 20 (as will be exemplified later in, for example, fig. 5A, fig. 9A to fig. 15, or any of the related embodiments) facilitates that a corresponding plurality of first traces (which can be coupled to the plurality of fingerprint sensing pixels via the first set of pads 210) and a corresponding plurality of second traces (which can be coupled to the panel via the second set of pads 220) do not cross each other and a reduction of signal interference can be effectively achieved.

Specifically, in fig. 4A, the main body 200 represents an integrated circuit of the single-chip device 20, which includes a display driver circuit 11, a touch driver circuit 12, and a fingerprint driver circuit 19 (or those shown in fig. 2), wherein the main body may also be referred to as a chip main body. Referring to fig. 4A and 4B, the first set of pads 210 in fig. 4A represent a plurality of conductive (e.g., metal) pads (e.g., pads 210_1, 210_2 to 210_ N (where N >1) illustrated in fig. 4B) disposed on the body 200, and the plurality of traces T in fig. 4A to the body 200 represent, for example, traces (or wires) T1, T2 to TN illustrated in fig. 4B are engageable so as to be electrically connectable to components or circuitry (as represented by fingerprint driver circuitry 19) in the single-die element 20 for driving the plurality of fingerprint sensing pixels. Likewise, the second set of pads 220 are conductive (e.g., metal) pads disposed on the body 200, and traces (or wires) to the body 200 can be bonded so as to be electrically connectable to components or circuits (as represented by display driver circuitry 11 and touch driver circuitry 12) in the single-chip component 20 for driving the plurality of display pixels and the plurality of touch sensors. In the following drawings, for ease of illustration, the plurality of pads and traces will be as shown in fig. 4A or fig. 4B.

In some embodiments of the single-wafer device 20, the body 200 of FIG. 4A (e.g., in a top or bottom view) has a rectangular shape with a first side S1, a second side S2, a left side S3, and a right side S4. As illustrated in fig. 4A, the second side S2 is parallel to the first side S1 and closer to the display panel than the first side S1 (as shown in fig. 1, 2, or 3). The left side S3 is on the left portion P1 and is perpendicular to the first side S1 and the second side S2, while the right side S4 is on the right portion P2 and is parallel to the left side S3. Further, the axis AX intersects the first side S1 and the second side S2. The single-chip component 20 may be implemented to include the first set of pads (or the second set of pads) distributed over the left portion P1 and the right portion P2. In fig. 4A, although the first and second sets of pads are illustrated on the first side S1 approximately equally with respect to the axis AX, the first and second sets of pads may also be distributed at any location of the second side S2 or on both of the plurality of left and right sides with respect to the axis AX, as schematically represented by the dashed rectangles illustrated in fig. 4A. Of course, implementations of the present disclosure are not limited to the examples.

Referring to fig. 5A, an exemplary embodiment of a bond pad arrangement based on the single-wafer element of fig. 4A is illustrated. As shown in fig. 5A, the single-chip component 20_1A includes a body 200_1A and a plurality of pads. An electronic module including the thin film 100_1A and the single wafer element 20_1A disposed on the thin film 100_1A can be realized based on fig. 5A. The plurality of pads includes a first set of pads, represented by G11_1A and G12_ 1A; and a second set of pads, represented by G21_1A and G22_ 1A. The first set of pads G11_1A and G12_1A includes a plurality of first pads for driving the plurality of fingerprint sensing pixels, and the second set of pads G21_1A and G22_1A includes a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors. In fig. 5A, the first group of pads G11_1A and G12_1A and the second group of pads G21_1A and G22_1A are each disposed along a first side of the body 200_1A, and the first group of pads G11_1A and the second group of pads G21_1A are disposed on a left portion of the body 200_1A with respect to the axis AX, while the first group of pads G12_1A and the second group of pads G22_1A are disposed on a right portion of the body 200_1A with respect to the axis AX. In an example, the single-chip device 20_1A is COF-bonded to the thin film 100_ 1A. A plurality of first traces, represented by T11_1A and T12_1A, may be implemented to connect to the first set of pads G11_1A and G12_1A, respectively, and extend to the plurality of left and right boundaries of the display panel 9_1A to drive a plurality of fingerprint scan lines FGL (partially illustrated) connected to a fingerprint sensing array associated with the display panel 9_1A (partially illustrated as in fig. 6B, 6C, or 6D). A plurality of second traces, represented by T21_1A and T22_1A, may be implemented to connect to the second set of pads G21_1A and G22_1A, respectively, and extend to the plurality of left and right boundaries of the display panel 9_1A to drive a plurality of TDDI scan lines TGL (partially illustrated) connected to a display pixel array and a touch sense array associated with the display panel 9_1A (partially illustrated as partially illustrated in fig. 6B, 6C, or 6D). In addition, alignment marks (e.g., cross-hair symbols) may be optionally marked on the housing of the body, as in fig. 5A.

As illustrated in fig. 5A, the pad arrangement based on the single-chip component 20_1A of fig. 4A can facilitate the implementation of the plurality of traces without the traces crossing each other. In addition, the pad arrangement based on the single-chip device 20_1A of fig. 4A can facilitate the plurality of traces to be implemented in a nearly symmetrical manner in terms of trace length and trace pattern, thereby reducing the influence of unequal RC loading of the plurality of traces. This may not only improve the ability of the signals used to drive the GOA circuits on the left and right sides of the panel, but also improve the performance of display, touch sensing, or fingerprint recognition, as compared to the implementation as shown in fig. 3, where traces need to cross over each other. Also, the pad arrangement based on the single-chip component 20_1A of fig. 4A may save manufacturing costs for additional processing of specific materials that need to be utilized in the layers corresponding to the areas where the plurality of traces cross each other, as compared to the implementation as shown in fig. 3.

As shown in fig. 5A, in an example, the single-chip device 20_1A may further include a third set of pads 230A disposed, for example, along a second side of the main body 200_1A for connecting to the display panel 9_ 1A. For example, the third set of pads 230A is used for driving data lines of the display panel 9_1A or receiving fingerprint sensing signals from fingerprint sensing lines of the display panel 9_1A, or coupled to touch sensing lines of the display panel 9_1A for receiving touch signals from the touch sensing lines. In fig. 5A, a plurality of traces T30A can be implemented as Film-on-glass (FOG) connections connecting the third set of pads 230A to the display panel 9_ 1A.

As shown in fig. 5A, in an example, the single-chip component 20_1A may further include a plurality of pads 240A disposed along the first side of the main body 200_1A for connection to a flexible printed circuit 150_ 1A. In fig. 5A, a plurality of traces T40 may be implemented to connect the plurality of pads 240A to the flexible printed circuit 150_1A through a Film-on-Film (FOF) connection.

Referring to fig. 5B, another exemplary embodiment of a bond pad arrangement based on the single wafer element of fig. 4A is illustrated. As shown in fig. 5B, the single-chip component 20_5A includes a body and a plurality of pads. An electronic module including the thin film 100_5A and the single chip element 20_5A arranged on the thin film 100_5A can be realized based on fig. 5B. The plurality of pads includes a first set of pads, represented by G11_ 5A; and a second set of pads, represented by G21_ 5A. The first set of pads G12_5A includes a plurality of first pads for driving the plurality of fingerprint sensing pixels, and the second set of pads G21_5A includes a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors. In fig. 5B, the first set of pads G12_5A and the second set of pads G21_5A are both disposed on a first side of the body 200_5A, and the second set of pads G21_5A is disposed on a left portion of the body with respect to the axis AX, while the first set of pads G12_5A is disposed on a right portion of the body with respect to the axis AX. In an example, the single-chip device 20_5A is COF-bonded to the thin film 100_ 5A. A plurality of second traces, represented by T21_5A, may be implemented to be respectively connected to the second set of pads G21_5A and extend to the left boundary of the display panel 9_5A to drive a plurality of TDDI scan lines TGL (partially shown) connected to a display pixel array and a fingerprint sensing array associated with the display panel 9_5A (as partially illustrated in fig. 6E or in any of the examples through the modification of fig. 6E). A plurality of first traces, represented by T12_5A, may be implemented to be respectively connected to the first set of pads G12_5A and extend to the right boundary of the display panel 9_5A to drive a plurality of fingerprint scan lines FGL (partially shown) connected to a fingerprint sensing array associated with the display panel 9_5A (as partially illustrated in fig. 6E or in any of the examples through the modification of fig. 6E). Also, in an example, the one-chip component 20_5A may further include a third set of pads 230B, which are disposed, for example, at a second side of the main body of the one-chip component 20_5A for connecting to the display panel 9_ 5A. For example, the third set of pads 230B is used for driving data lines of the display panel 9_5A or receiving fingerprint sensing signals from fingerprint sensing lines of the display panel 9_5A, or coupled to touch sensing lines of the display panel 9_5A for receiving touch signals from the plurality of touch sensing lines. In fig. 5A, a plurality of traces T30A may be implemented to connect the third set of pads 230B to the display panel 9_5A through a glass over Film (FOG) connection.

To demonstrate how the pad placement of the single-chip component affects the implementation of the architecture based on fig. 1, the following embodiments relate to an apparatus for display, touch sensing, and fingerprint sensing based on the architecture using FTDI ICs (as illustrated in fig. 4A, 5B, etc.).

In some of these embodiments related to the electronic device, some embodiments illustrate the grouping and arrangement of TDDI and Fingerprint (FPR) gate output (CGOUT) signals through the FTDI IC output for the display panel via internal leads (leads), external leads, and side leads on the FTDI IC. Both pads for TDDI and fingerprint CGOUT signals may be coupled to TDDI GOA (gate driver on array) and FPR GOA on the display panel, and then the plurality of scan lines of the display pixel array are driven by using the TDDI GOA and the plurality of scan lines of the FPR sensing pixels are driven by using FPR GOA. Additionally, some embodiments of the pad arrangements based on the single die elements show routing arrangements for pads for TDDI and fingerprint CGOUT signals on the display panel. Specific embodiments of the grouping of the plurality of TDDI and FPR CGOUT signals are also provided.

Referring to FIG. 6A, a display panel including display pixels and fingerprint sensing pixels coupled to a single chip element is illustrated according to an embodiment. Taking the panel architecture illustrated in fig. 6A as an example, the Active Area (AA) of the display panel 9C may be divided into a plurality of zones (zones) for a fingerprint sensing array including a plurality of fingerprint sensing pixels, for example, 20 zones in the Y direction, and the number of the plurality of fingerprint sensing pixels in the X direction may be the same as the plurality of display pixels for each display row (display row), wherein each or more display pixels may be provided with a fingerprint sensing pixel. Fig. 6B is an enlarged schematic view of some components (as represented by block B1 in fig. 6A or 6B). As shown in fig. 6A and 6B, the single chip element 20A disposed on the film 100A is used to output a plurality of fingerprint drive signals (as represented by FPR _ S1, FPR _ S2) from the fingerprint driver circuit 29A of the single chip element 20A to a Gate On Array (GOA) circuit GOA1 for the plurality of fingerprint sensing pixels FS. The single-chip component 20A is also used to output a plurality of display drive signals (or touch-related signals) from the TDDI circuit 21A of the single-chip component 20A, as represented by TDDI _ S1, to the GOA circuit GOA2 for the plurality of display pixels DP. Accordingly, the single-chip component 20A includes a first set of pads including a plurality of first pads for driving the plurality of fingerprint sensing pixels; and a second set of pads comprising a plurality of second pads (as illustrated in any of fig. 5A, 9A to 12D, and 15) for driving the plurality of display pixels and the plurality of touch sensors.

In fig. 6A and 6B, for example, the block B1 disposed on the panel 9C includes a selection circuit (as it may include a signal selector, switch, a multiplexer, demultiplexer, or any combination thereof), which is schematically illustrated by switches SWR, SWG, SWB, and SW _ FP. The selection circuit of the block B1 in fig. 6B may be implemented as a combination of a data line selection circuit for selecting one data line from a set of data lines, such as display data lines or source lines for sub-pixels of a display pixel or display pixels, and a fingerprint sensing line selection circuit for selecting at least one fingerprint sensing line. For example, a selection circuit including the plurality of switches SWR, SWG, SWB is arranged in the panel 9C for selecting data lines (as represented by SLR, SLG, and SLB) for a set of red, green, and blue sub-pixels for displaying the pixel DP. The single chip device 20A, for example, generates a driving signal for driving the plurality of selected data lines, and generates a selection signal TDDI _ S2 (as represented by TDDI _ SWR, TDDI _ SWG, TDDI _ SWB, as will be exemplified later in tables 1 and 2) for controlling the plurality of switches SWR, SWG, SWB so as to selectively drive the plurality of data lines SLR, SLG, and SLB. Accordingly, for example, the second set of pads of the single-chip device 20A further includes a plurality of third pads for controlling the selection circuit. In this way, the number of traces and corresponding pads for electrical coupling or connection between the single chip device 20A and the plurality of data lines of the panel 9C can be reduced.

Further, in the block B1, the switch SW _ FP is for selecting a corresponding one of the plurality of fingerprint sensing lines in order to receive a fingerprint sensing signal from a fingerprint sensing pixel (as represented by FS). In an example, the plurality of third pads further includes a pad for outputting a selection signal (e.g., a signal represented by TDDI _ SW _ FP, as will be exemplified in table 1 or table 2 later) to control the block B1 so as to use a trace LS for receiving the fingerprint sensing signal, wherein the trace LS is connected to the pads of the third set of pads of the single chip component 20A. In this example, the pads connected to the traces LS may be employed to drive the plurality of data lines of the panel 9C (such as SLR, SLG, SLB illustrated in fig. 6B), or selectively receive fingerprint sensing signals from the fingerprint sensing line SL _ FP of the panel 9C at different times (time offsets). In this manner, the single die element 20_1A of FIG. 5A can be implemented to include a reduced number of third set of bond pads 230A if the embodiment as shown in FIG. 6B applies to the scenario of FIG. 5A.

In this above-described embodiment, in the configuration of the selection circuit (as in the block B1) in the panel as shown in fig. 6B, it is optional that the single-chip component 20A includes the plurality of third pads for controlling the selection circuit (as for outputting the plurality of selection signals TDDI _ S2), and that corresponding traces need to be arranged.

For example, the single-chip component may be implemented to drive the plurality of display pixels by using a selection circuit, but directly receive a fingerprint sensing signal, as shown in fig. 6C, wherein the single-chip component 20A in fig. 6C needs to include the plurality of third pads (and corresponding traces) for controlling the selection circuit including the plurality of switches SWR, SWG, SWB. In this example, the selection circuits of the block B1 in fig. 6C are data line selection circuits.

In another example, the single-chip component can even be implemented to drive the plurality of display pixels and directly receive the fingerprint sensing signal without using a selection circuit (as in block B1), as shown in fig. 6D, wherein the single-chip component 20A in fig. 6D need not include the plurality of third pads (and corresponding traces).

The above-described examples (as shown in any of fig. 6B-6D) may be employed in any embodiment of the single wafer element, as appropriate, such as illustrated in any of fig. 5A, 5B, and 9A-16.

Moreover, referring to FIG. 6E, a display panel including display pixels and fingerprint sensing pixels coupled to a single-chip element is illustrated according to another embodiment, wherein the panel architecture illustrated in FIG. 6A is also assumed. As compared to the panel in fig. 5A or 5B, whose GOA circuits GOA1 and GOA2 are arranged on its left and right boundaries, the panel in fig. 6E includes a GOA circuit GOA1 on the right boundary of the panel for the plurality of fingerprint sensing pixels FS; and a GOA circuit GOA2 on the left boundary of the panel for the plurality of display pixels DP. Accordingly, the single-chip component 20B disposed on the film 100A includes a first set of pads including a plurality of first pads for driving the plurality of fingerprint sensing pixels (as shown in fig. 5B, 13A, 13B, or 13C); and a second set of pads (as shown in fig. 5B, 13A, 13B, or 13C) including a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors. The single-chip component 20B may be implemented to include a fingerprint driver circuit 29B (as shown in fig. 6E) for outputting a plurality of fingerprint drive signals (as represented by FPR _ S) via the plurality of first pads (as shown in fig. 5B, 13A, 13B, or 13C) connected to the fingerprint driver circuit 29B. The single-chip component 20B may be implemented to include a TDDI circuit 21B for outputting a plurality of display driving signals (or touch-related signals) (as represented by TDDI _ S1) via the plurality of second pads (as shown in fig. 5B, 13A, 13B, or 13C) connected to the TDDI circuit 21B.

The panel in FIG. 6E includes selection circuits (e.g., block B1), each of which is similar to that shown in FIG. 6B. Accordingly, for example, the second set of pads of the single-chip component 20B further includes a plurality of third pads for controlling the selection circuit. In this way, the number of traces and corresponding pads used for electrical coupling or connection between the single chip element 20B and the plurality of data lines of the panel in fig. 6E can be reduced. If the embodiment of fig. 5B applies to the configuration as shown in fig. 6E, the single-chip component 20_5A may be implemented to include a reduced number of third sets of pads 230B for a similar purpose as the third sets of pads 230B illustrated in fig. 5A. In addition, a reduced number of traces T30B can be implemented to connect the third set of pads 230B to the display panel 9_ 5A.

In this above-described embodiment, in the configuration of the selection circuit (as in the block B1) in the panel as shown in fig. 6E, it is required that the single-chip component 20B includes the plurality of third pads for controlling the selection circuit (as for outputting the plurality of selection signals TDDI _ S2), and it is required that corresponding traces are arranged as needed. For example, the single-chip element may be implemented to drive the plurality of display pixels using selection circuitry, but receive the fingerprint sensing signal directly, as shown in FIG. 6C. In another example, the single-chip device may even be implemented to drive the plurality of display pixels and directly receive the fingerprint sensing signal without using a selection circuit (e.g., block B1), as shown in fig. 6D. The above-described examples (as shown in any of fig. 6B-6E) may be employed in any embodiment of the single wafer element, as appropriate, such as illustrated in any of fig. 5B, 13A-13C, or any modification of at least one of fig. 5A, 9A-12D, 14-16 with reference to any of the embodiments of fig. 5B, 13A-13C. For example, a single-chip component can be realized by modifying the embodiments of fig. 5A, 9A-12D, 14-16 such that either the first set of pads or the second set of pads is disposed only on either the left portion or the right portion, resulting in the embodiments being similar to those shown in fig. 5B, 13A-13C. Of course, implementations of the present disclosure are not so limited.

For more information on the structure and operation of the display panel and the FTDI IC, reference may be made to appendix I and appendix II of U.S. provisional patent application No.62/912,666 (incorporated herein by reference) filed on 9/10/2019. However, implementations of the present invention are not limited thereto.

With reference to fig. 7 and 8, a specific embodiment of the circuit architecture and operating principle of the fingerprint sensing pixel is illustrated as follows.

In fig. 7, the fingerprint sensing pixel includes a photodiode PD, a switch, and a capacitor. In fig. 8, a plurality of operating cycles (cycles) in the FTDI IC are illustrated and represented by blocks represented by "display", "touch", and "fingerprint" for display pixel driving, touch sensor driving, and fingerprint sensing pixel driving, respectively. In addition, during each operation cycle for display, touch, and fingerprint, exemplary waveforms of the corresponding control signals are illustrated under blocks representing the operation cycles in fig. 8, wherein the illustrated control signals will be described below by way of example and in tables 1 and 2.

The following is an example of an operation of fingerprint sensing using the fingerprint sensing pixels.

In the first step, the fingerprint driver circuit (or fingerprint recognition circuit) for the Fingerprint (FPR) section sequentially outputs a start pulse signal (e.g., FPR _ STV [4:6], corresponding to the example shown in fig. 6A) to the region of the panel where the finger press occurs (e.g., sections 4-6 in fig. 6A), and the reset signal FPR _ GCK sequentially turns on (turns on) the reset switch TS1 for each relevant section, so that the cathode of the corresponding photodiode PD is reset to the voltage VDD (e.g., 5V) and the anode thereof is at the voltage Vbias (e.g., 0V).

In a second step, the reset signal FPR _ GCK turns off (turns off) the switch TS1 (e.g., acting as a reset switch) and the voltage across the photodiode is 5V. When the light illuminates the fingerprint, it will produce reflected light. The reflected light illuminates the photodiode PD, thereby accelerating the discharge rate of the photodiode. The reflected light of the fingerprint ridge is brighter, which makes the resistance of the photodiode PD smaller, while the discharge rate at the cathode of the photodiode PD is fast and the voltage of the cathode is small (e.g., about 2V). The reflected light of the fingerprint valleys is darker than the fingerprint ridges, which results in a larger resistance of the photodiode PD, while the discharge rate at the cathode of the photodiode PD is slower and the voltage of the cathode is larger (e.g. about 3V).

In the third step, a select signal (or called an acquisition signal) FPR _ SEL sequentially turns on the switch TS2 of each segment, and the cathode voltage of the photodiode PD is transmitted to the fingerprint sensing line connected to the node (Vout). In the FPR section, a TDDI _ SW _ FP signal of the plurality of TDDI CGOUT signals will output a signal at a high level (or asserted) to select an FTDI data line or fingerprint sense line function for fingerprint voltage sensing, and the remaining TDDI _ SWR/TDDI _ SWG/TDDI _ SWB signals of the plurality of TDDI CGOUT signals will be at a low level. Meanwhile, Analog front-end (AFE) circuitry of the FTDI IC may read the corresponding sensing result Vout 1.

In the fourth step, the reset signal FPR _ GCK turns on the switch TS1, the cathode of the photodiode is reset to VDD again (e.g., 5V), and the 5V voltage is transmitted to the node Vout, so the AFE circuit can read the corresponding reset result Vout 2.

In the fifth step, fingerprint information is obtained by subtracting the sensing result Vout1 from the voltage of the reset result Vout 2.

The following provides various embodiments of the CGOUT signal for an FTDI IC (e.g., single chip component 20 or 20_ 1A).

Table 1 and table 2 list the FPR CGOUT signal and TDDI CGOUT signal, respectively, with their brief descriptions in accordance with a specific embodiment, where the "_ L" or "_ R" symbol in the table 1 or table 2 indicates that its pad or trace can be implemented on either the left or right portion of the single die element. Of course, the present invention is not limited thereto. In any panel design, the plurality of signals provided by the FTDI die to the FPR GOA may be varied according to the plurality of design requirements, and the plurality of signals listed in Table 1 may be classified as the plurality of FPR CGOUT signals. Likewise, the plurality of signals provided by the FTDI wafer to the TDDI GOA may vary depending on the plurality of design requirements, and the plurality of signals listed in Table 2 may be classified as the plurality of TDDI CGOUT signals.

TABLE 1

TABLE 2

As illustrated in tables 1 and 2, the plurality of TDDI CGOUT signals and FPR CGOUT signals are grouped due to taking into account the fact that the plurality of operating voltages of circuit components for display, touch sensing, and fingerprint recognition on the panel belong to different classes. Classifying the plurality of CGOUT signals into different groups may facilitate the circuit design simplification and clear panel wiring (wiring). In other words, the plurality of traces and the plurality of FPR CGOUT signals, which are preferably TDDI CGOUT, are not interleaved (interleaved) or span each other. In some implementations, fingerprint sense line selection circuitry for FTDI can be integrated with data line selection circuitry for display data signals, and such integration (as with the selection circuitry of the block B1 in fig. 6B) will bring advantages in terms of the panel design, in terms of the circuit fabrication and design, and in terms of the FTDI in terms of the number of pin out or pad requirements for electrical connections. In this manner, for the selection circuit integration, the TDDI _ SW _ FP signals may be classified into the TDDI CGOUT voltage signal class and placed in the TDDI CGOUT signal group.

Moreover, any group of the plurality of TDDI CGOUT and FPR CGOUT signal groups may be further categorized into subgroups according to design requirements. The traces (etc.) of the signals within the subgroup are adjacent to each other and do not intersect the traces (etc.) of the signals of the other subgroup, but the invention is not limited thereto. In some embodiments, each group of the plurality of TDDI CGOUT and FPR CGOUT signal groups may be divided into at least two subgroups (e.g., left and right subgroups) that are provided to the GOAs on the plurality of left and right sides of the panel, respectively (as illustrated in fig. 6B). Preferably, the plurality of corresponding pads for the plurality of left and right subgroups may be arranged along the plurality of left and right sides of the FTDI IC, respectively.

In some embodiments, signals output to the panel and signals output to the FTDI IC may be further divided into other groups of signals (shown or classified as other Inner-lead-bonding (ILB) pads (or other ILB signal groups) in addition to the TDDI CGOUT and FPR CGOUT in FIGS. 9A-12D below.) in a similar manner for the signal groups mentioned above, the plurality of traces (and pads) for another signal group may be disposed adjacent to one another and not across the plurality of traces of the plurality of two groups of TDDI CGOUT and FPR CGOUT. An independent signal group for one of the power supplies contributes to capacitance on an electrical connection to a Flexible Printed Circuit (FPC).

The plurality of above tables 1 and 2 are just examples. In another example, the plurality of FPR CGOUT signals may further include one or more signals for a power supply (e.g., a high and low voltage signal provided to the FPR GOA, and a bias signal or a voltage source signal provided to the FPR sensor), wherein the plurality of pads and traces for the plurality of signals for the power supply may be disposed adjacent to each other and the traces do not cross the plurality of traces for the left and right subgroups of the plurality of FPR CGOUT signals. Likewise, the TDDI CGOUT signals may include one or more signals for a power supply (e.g., the high and low voltage signals provided to the TDDI GOA and a bias or voltage source signal provided to the FPR sensor), wherein the pads and traces for the signals for the power supply may be disposed adjacent to each other and the traces do not span the traces of the left and right subgroups of the TDDI CGOUT signals.

In some embodiments, some or all of the plurality of pads for signals of the TDDI power supply and/or for the FPR power supply may be classified as other ILB pads. In other embodiments, the plurality of pads for signals of a power supply may be classified as a subgroup of the TDDI CGOUT group or a subgroup of the FPR CGOUT group.

In some embodiments, the plurality of left and right sub-groups of the plurality of FPR CGOUT signals may be further subdivided into at least one of the following sub-groups, such as GOA SEL (as the acquire signal is included in Table 1), GOA Reset (as the Reset signal in Table 1). In one embodiment, since the gate clock shift register circuits on the panel to which any GCK of the plurality of FPR CGOUT signals (e.g., FPR _ GCK1, FPR _ GCK2, FPR _ GCK3) is transmitted can be performed in the same section of the panel, the plurality of GCK CGOUT signals can also be classified into the same reset signal subgroup, wherein the plurality of pads and traces of the plurality of GCK CGOUT signals can be disposed adjacent to each other and the traces do not cross the plurality of traces of other signal subgroups (e.g., acquisition signals). Likewise, the plurality of left and right sub-groups of the plurality of TDDI CGOUT signals may be subdivided into at least one of the following sub-groups: a subgroup of the plurality of select signals (as depicted in table 2), or a subgroup of other control signals (as other signals depicted in table 2), wherein the plurality of pads and traces for these subgroups may be configured to be adjacent to each other without crossing the plurality of pads and traces for other subgroups (as the plurality of signals for the control signal subgroup).

In other words, the signals of the FTDI dies can be divided into at least two groups (e.g., FPR CGOUT signals and TDDI CGOUT signals) or more groups according to design requirements, and the signals in each group can be adjacent to each other without pads and traces interleaved with the signals of another group. The plurality of signals in each group may be further subdivided into at least one sub-group according to design requirements (e.g., the plurality of voltage ranges, functional properties of the plurality of signals, and locations of corresponding GOA circuits on the panel), and the plurality of pads (e.g., the first set of pads) and signal traces of the sub-group may be disposed adjacent to each other and not interleaved (or crossed) with the plurality of pads and traces of signals of other sub-groups.

From the discussion and various embodiments of the signal grouping mentioned above, it can be appreciated that under the architecture shown in fig. 1, the benefits of trace planning and manufacturing, signal interference reduction, and trace RC load balancing are technically facilitated based on the pad assignment (assignment) for the first set of pads and the second set of pads as illustrated in fig. 4A by the embodiment. Overall, such pad assignments may facilitate performance of display, touch sensing, and fingerprint sensing. Moreover, the industry can enjoy the pad assignment provided by the single chip device, and electronic products such as single chip devices, electronic modules based on the single chip devices, and computing devices based on the electronic modules can be easily and efficiently performed and developed accordingly.

The following provides various pad assignments for the first set of pads and the second set of pads, as well as various embodiments of fabrication techniques (e.g., COF or COG) for a single-chip element based on the architecture of fig. 1. In the drawings such as FIGS. 5A, 5B, 9A-17, a single wafer element (e.g., one of 20_1A-20_1D, 20_2A-20_2D, 20_3A-20_3D, 20_4A-20_4D, 20_5A-20_5D, 30A-30C, 40) includes a body (e.g., one of 200_1A-200_1D, 200_2A-200_2D, 200_3A-200_3D, 200_4A-200_4D, 200_5A-200_5D, 300A-300C) disposed on a panel or a film and coupled between the panel and a flexible printed circuit; the panel (e.g., a portion of an exemplary display panel) is represented by, for example, a block corresponding to one of the symbols 9_1A-9_1D, 9_2A-9_2D to 9_5A-9_5D, and the Flexible Printed Circuit (FPC) (e.g., a portion thereof) is represented by, for example, another block corresponding to one of the symbols 150_1A-150_1D to 150_5A-150_ 5D. Furthermore, the third set of pads may also be distributed in any manner (e.g., in a manner similar to the third set of pads of the single-chip component 20_1A or 20_5A shown in fig. 5A or 5B) in any embodiment of the single-chip component shown in fig. 9A-17. In the following embodiments as illustrated in fig. 5A, 5B, 9A-12D, and 13A-13C, the plurality of specific pad assignments in terms of TDDI GOA and FPR GOA are not shown for simplicity.

In some embodiments based on fig. 1 and 4A, as illustrated in fig. 5A, 9A-9C, all of the first set of pads and all of the second set of pads are disposed along the lower side of the single chip element (or the first side S1 in fig. 4A).

As an example of using the COF package, referring again to fig. 5A, the single chip device 20_1A bonded on the film 100_1A has all of the first set of pads G11_1A through G12_1A for fingerprint sensing arranged along the first side (or lower lateral side) and the second set of pads G21_1A through G22_1A for display and touch sensing (e.g., TDDI).

In another example using COF packaging, referring to fig. 9A, a single chip device 20_1B bonded on a film 100_1B includes a first set of pads G11_1B through G12_1B for fingerprint sensing and a second set of pads G21_1B through G22_1B for display and touch sensing (e.g., TDDI) all arranged along the first side (or lower lateral side). A plurality of first traces, represented by T11_1B and T12_1B, may be implemented to connect to the first set of pads G11_1B and G12_1B, respectively, and extend to the plurality of left and right borders of the display panel 9_1B to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_ 1B. A plurality of second traces, represented by T21_1B and T22_1B, may be implemented to be connected to the second set of pads G21_1B and G22_1B, respectively, and extend to the plurality of left and right boundaries of the display panel 9_1B to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a touch sense array associated with the display panel 9_ 1B.

In an example using COG packaging, referring to fig. 9B, a single-chip component 20_1C bonded on a glass portion 90_1C of a display panel 9_1C includes a first set of pads G11_1C through G12_1C for fingerprint sensing and a second set of pads G21_1C through G22_1C for display and touch sensing (e.g., TDDI) all disposed along the first side (or lower lateral side). On the glass portion 90_1C, a plurality of first traces T11_1C and T12_1C may be implemented to be connected to the first set of pads G11_1C and G12_1C, respectively, and extend to the plurality of left and right boundaries of the display panel 9_1C to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_ 1C. A plurality of second tracks T21_1C and T22_1C may be implemented to be connected to the second set of pads G21_1C and G22_1C, respectively, and extend to the plurality of left and right boundaries of the display panel 9_1C to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a touch sense array associated with the display panel 9_ 1C.

In another example using COG packaging, referring to fig. 9C, the single-chip component 20_1D bonded on the glass portion 90_1D of the display panel 9_1D includes all of the first set of pads G11_1D through G12_1D for fingerprint sensing arranged along the first side (or lower lateral side) and the second set of pads G21_1D through G22_1D for display and touch sensing (e.g., TDDI). On the glass portion 90_1D, a plurality of first traces T11_1D and T12_1D may be implemented to be connected to the first group of pads G11_1D and G12_1D, respectively, and extend to the plurality of left and right boundaries of the display panel 9_ 1D. A plurality of second tracks T21_1D and T22_1D may be implemented to be connected to the second group of pads G21_1D and G22_1D, respectively, and extend to the plurality of left and right boundaries of the display panel 9_ 1D. For simplicity, the detailed information is similar to that in FIG. 9B and is not repeated herein.

In the examples as shown in fig. 5A and 9B, the first set of pads is closer to the axis AX than the second set of pads. In the examples as shown in fig. 9A and 9C, the second set of pads is closer to the axis AX than the first set of pads. In some examples, the first set of pads and the second set of pads as in any of fig. 5A, 9A-9C may be inner wirebond pads. However, the present invention is not limited thereto.

In some embodiments based on fig. 1 and 4A, as illustrated in fig. 10A-10D, all of the first set of pads and all of the second set of pads are arranged along the upper side (or the second side S2 as in fig. 4A) of the single chip element.

As an example of using the COF package, referring to fig. 10A, the single chip device 20_2A bonded on the film 100_2A includes all of the first set of pads G11_2A through G12_2A for fingerprint sensing and the second set of pads G21_2A through G22_2A for display and touch sensing (e.g., TDDI) arranged along the second side (or higher lateral side). A plurality of first tracks T11_2A and T12_2A may be implemented to be connected to the first set of pads G11_2A and G12_2A, respectively, and extend to the plurality of left and right borders of the display panel 9_2A to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_ 2A. A plurality of second tracks T21_2A and T22_2A may be implemented to be connected to the second set of pads G21_2A and G22_2A, respectively, and extend to the plurality of left and right boundaries of the display panel 9_2A to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a touch sense array associated with the display panel 9_ 2A.

In another example of using the COF package, referring to fig. 10B, the single chip device 20_2B bonded on the film 100_2B includes all the first set of pads G11_2B through G12_2B for fingerprint sensing and the second set of pads G21_2B through G22_2B for display and touch sensing (e.g., TDDI) arranged along the second side.

In an example using COG packaging, referring to fig. 10C, the single chip device 20_2C bonded on the glass portion 90_2C of the display panel 9_2C includes all the first set of pads G11_2C through G12_2C for fingerprint sensing and the second set of pads G21_2C through G22_2C for display and touch sensing (e.g., TDDI) arranged along the second side edge.

In another example using COG packaging, referring to fig. 10D, the single-chip device 20_2D bonded on the glass portion 90_2D of the display panel 9_2D includes all the first set of pads G11_2D through G12_2D for fingerprint sensing and the second set of pads G21_2D through G22_2D for display and touch sensing (e.g., TDDI) arranged along the second side.

In fig. 10B (or fig. 10C, 10D), a plurality of first tracks T11_2B and T12_2B (or T11_2C and T12_ 2C; T11_2D and T12_2D) may be implemented to connect the first set of pads G11_2B and G12_2B (or G11_2C and G12_ 2C; G11_2D and G12_2D) to the panel 9_2B (or 9_2C, 9_2D), respectively. A plurality of second tracks T21_2B and T22_2B (or T21_2C and T22_ 2C; T21_2D and T22_2D) may be implemented to connect the second groups of pads G21_2B and G22_2B (or G21_2C and G22_ 2C; G21_2D and G22_2D) to the panel 9_2B (or 9_2C, 9_2D), respectively. For simplicity, the detailed information for fig. 10B-10D is similar to the examples described above and thus will not be repeated.

In the examples as shown in fig. 10A and 10C, the first set of pads is closer to the axis AX than the second set of pads. In the examples as shown in fig. 10B and 10D, the second set of pads is closer to the axis AX than the first set of pads. In some examples, the first and second groups of pads as in any of fig. 10A-10D may be Outer-lead-bonding (OLB) pads. As compared to those in fig. 5A, 9A-9C, shorter traces may be implemented in the examples shown in fig. 10A-10D. However, the present invention is not limited to the examples.

In some embodiments based on fig. 1 and 4A, as illustrated in fig. 11A-11D, all of the first set of pads and all of the second set of pads are disposed along the lower side of the single chip element (or the first side S1 in fig. 4A), and traces connected to the first set of pads or the second set of pads may be routed from the shorter side (e.g., the left side S3 and the right side S4). Fig. 11A and 11B employ a COF arrangement, while fig. 11C and 11D employ a COG arrangement. In fig. 11B or 11D, the second set of pads G21_3B through G22_3B or G21_3D through G22_3D (e.g., TDDI CGOUT) are ILB pads of the single die element 20_3B or 20_3D closer to the axis AX than the first set of pads G11_3B through G12_3B or G11_3D through G12_3D (e.g., FPR CGOUT). The plurality of traces T11_3B to T12_3B or T11_3D to T12_3D of the first group of pads G11_3B to G12_3B or G11_3D to G12_3D are routed from the plurality of shorter sides (e.g., the left side S3 and the right side S4) to the display panel via a film-on-film (LOF) Line or a glass-on-glass (LOG) Line, and the plurality of T21_3B to T22_3B or T21_3D to T22_3D of the second group of pads G21_3B to G22_3B or G21_3D to G22_3D are routed from the lower side (e.g., the first side S1). In fig. 11A or 11C, the first set of pads G11_3A through G12_3A or G11_3C through G12_3C (e.g., FPR CGOUT) are ILB pads of the single die element 20_3A or 20_3C closer to the axis AX than the second set of pads G21_3A through G22_3A or G21_3C through G22_3C (e.g., TDDI CGOUT). The plurality of traces T21_3A to T22_3A or T21_3C to T22_3C of the second group of pads G21_3A to G22_3A or G21_3C to G22_3C are routed from the plurality of shorter sides (e.g., the left side S3 and the right side S4) to the display panel via a film over wire (LOF) or a glass over wire (LOG) line, while the plurality of traces T11_3A to T12_3A or T11_3C to T12_3C of the first group of pads G11_3A to G12_3A or G11_3C to G12_3C are routed from the lower side (e.g., the first side S1). This may allow the panel manufacturer flexibility in choosing whether to route the plurality of traces from the plurality of longer sides of the wafer (e.g., FTDI ICs) or route the plurality of traces from the plurality of shorter sides to the display panel.

In some embodiments of the single-chip device based on fig. 1 and 4, as illustrated in fig. 12A to 12D, all of the first set of pads are disposed along the left side S3 and the right side S4, and all of the second set of pads are disposed along the left side S3 and the right side S4.

Fig. 12A and 12B employ a COF arrangement, while fig. 12C and 12D employ a COF arrangement. The first set of pads G11_4A through G12_4A, G11_4B through G12_4B, G11_4C through G12_4C, or G11_4D through G12_4D (e.g., FPR CGOUT) and the second set of pads G21_4A through G22_4A, G21_4B through G22_4B, G21_4C through G22_4C, or G21_4D through G22_4D (e.g., TDDI CGOUT) are the shorter side pads from the single die elements 20_4A, 20_4B, 20_4C, or 20_ 4D. In fig. 12A or 12C, the second set of pads (e.g., TDDI CGOUT) is disposed proximate to the plurality of OLB pads, and the first set of pads (e.g., FPR CGOUT) is disposed proximate to the plurality of ILB pads. In fig. 12B or 12D, the second set of pads is disposed proximate to the plurality of ILB pads, and the first set of pads is disposed proximate to the plurality of OLB pads. In fig. 12A (or fig. 12B, fig. 12C, or fig. 12D), a plurality of first tracks T11_4A and T12_4A (or T11_4B, T12_ 4B; T11_4C, T12_ 4C; T11_4D, T12_4D) may be implemented to connect the first group of pads G11_4A and G12_4A (or G11_4B, G12_ 4B; G11_4C, G12_ 4C; G11_4D, G12_4D) to the panel 9_4A (or 9_4B, 9_4C, 9_4D), respectively. A plurality of second tracks T21_4A and T22_4A (or T21_4B, T22_ 4B; T21_4C, T22_ 4C; T21_4D, T22_4D) may be implemented to connect the second set of pads G21_4A and G22_4A (or G21_4B, G22_ 4B; G21_4C, G22_ 4C; G21_4D, G22_4D) to the panel 9_2B (or 9_2C, 9_2D), respectively.

In some embodiments of the monolithic device based on fig. 1 and 4A, all of the first set of pads are disposed along one of the first side S1 and the second side S2 (as illustrated in fig. 5A, 9A-9C; 10A-10D), and all of the second set of pads are disposed along both the left side S3 and the right side S4 (as illustrated in fig. 12A-12D).

In some embodiments of the single-chip device based on fig. 1 and 4A, all of the first set of pads are disposed along both the left side S3 and the right side S4 (as illustrated in fig. 12A-12D), and all of the second set of pads are disposed along one of the first side S1 and the second side S2 (as illustrated in fig. 5A, 9A-9C; 10A-10D).

Of course, the disclosure of the single wafer element is not limited to the above examples. As will be exemplified below, a single-wafer element based on the architecture of the single-

wafer element

10, 10A, or 20, respectively, can be implemented (e.g., single-wafer elements 20_5B, 20_5C, 20_5D in fig. 13A-13C). In particular, as illustrated in fig. 13A, 13B, 13C (and fig. 5B as exemplified above), the first set of pads of the single die element can be disposed on at least one of the left portion and the right portion, while the second set of pads can be disposed on at least the other of the left portion and the right portion. Further, at least one group of the first set of pads and the second set of pads may be arranged on only the one of the left portion and the right portion. In this way, the following provides further embodiments of the pad arrangement of the single-chip component.

In some embodiments, as shown in fig. 13A (or fig. 5B), the plurality of first pads are arranged on only one of the left portion and the right portion, and the second set of pads are arranged on only the other of the left portion and the right portion. As shown in fig. 13A, the first set of pads (e.g., G11_5B) is disposed only in the left region, while the second set of pads (e.g., G22_5B) is disposed only in the right region.

In addition, in fig. 13A (or fig. 5B), the single-chip element 20_5B (or 20_5A) is COF-bonded on the thin film 100_5B (or 100_ 5A). A first plurality of traces, represented by T11_5B (or T12_5A), may be implemented to connect to the first set of pads G11_5B (or G12_5A) and extend to the left border (or right border) of the display panel 9_5B (or 9_5A) to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_5B (or 9_ 5A). In fig. 13A (or fig. 5B), a plurality of second traces, represented by T22_5B (or T21_5A), may be implemented to connect to the second set of pads G22_5B (or G21_5A), respectively, and extend to the right border (or left border) of the display panel 9_5B (or 9_5A) to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a fingerprint sensing array associated with the display panel 9_5B (or 9_ 5A).

In some embodiments, the first set of pads is disposed in only one of the left portion and the right portion, and the second set of pads may be disposed in both the left portion and the right portion. In an example, as shown in fig. 13B, the first set of pads (e.g., G11_5C) is arranged only in the left site, while the second set of pads (e.g., G21_5C and G22_5C) is arranged in both the left site and the right site. In another example, as shown in fig. 13C, the first set of pads (e.g., G12_5D) is arranged only in the right region, while the second set of pads (e.g., G21_5D and G22_5D) is arranged in both the left region and the right region.

Further, as shown in fig. 13B (or fig. 13C), the single-chip element 20_5C (or 20_5D) is COF-bonded on the thin film 100_5C (or 100_ 5D). A plurality of first traces, represented by T11_5C, may be implemented to be connected to the first set of pads G11_5C (or G12_5D), respectively, and extend to the left boundary (or right boundary) of the display panel 9_5C (or 9_5D) to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_5C (or 9_ 5D). A plurality of second traces, represented by T21_5C and T22_5C (or T21_5D and T22_5D), can be implemented to connect to the second set of pads G21_5C and G22_5C (or G21_5D and G22_5D), respectively, and extend to the plurality of right and left boundaries of the display panel 9_5C (or 9_5D) to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a fingerprint sensing array associated with the display panel 9_5C (or 9_ 5D).

Similar to the examples as shown in fig. 5A or 5B, in some embodiments, the first set of pads are arranged in only one of the left portion and the right portion, and the second set of pads may be arranged in both the left portion and the right portion.

In some embodiments, a single-chip component can be realized by modifying the embodiments of fig. 5A, 9A-12D, 14-16 such that either the first set of pads or the second set of pads is disposed only on either the left portion or the right portion, resulting in the embodiments being similar to those shown in fig. 5B, 13A-13C. Of course, such implementations of the present disclosure are not so limited.

Optionally, the first set of pads is closer to the axis than the second set of pads (e.g., fig. 13B or 13C).

Optionally, the second set of pads is closer to the axis than the first set of pads, which can also be achieved using the examples as shown in fig. 13B or fig. 13C.

Although the first set of bonding pads and the second set of bonding pads are illustrated in positions proximate to the first side (e.g., the lower side of the monolithic element) in the embodiments shown in fig. 13B or 13C, the implementation of the monolithic element is not limited to the above examples. Similar to the embodiments of fig. 13B or 13C, the single die element can be implemented in any manner such that the first set of bond pads is in at least one of the left portion and the right portion and the second set of bond pads is in at least the other of the left portion and the right portion such that no crossing occurs over the plurality of traces coupled to the plurality of display pixels, the plurality of fingerprint sensing pixels, and touch sensor between the first set of bond pads and the second set of bond pads. In this regard, in some embodiments, the single-die component as shown in any of fig. 5A, 9A through 12D can be modified such that the first set of bond pads are disposed only in either the left or right locations. Furthermore, in some embodiments, the single-die component as shown in any of fig. 5A, 9A through 12D can be modified such that the second set of bond pads are disposed only in either the left or right locations.

Thus, as compared to the possible implementation described in fig. 3, the above-described embodiments regarding pad placement (as illustrated in fig. 5A, 5B, 9A-13C, or related embodiments) may facilitate the placement of corresponding traces in an appropriate manner (e.g., with the first set of pads and the second set of pads at either location), or in a manner that is nearly symmetrical with respect to one pad (e.g., the first set of pads or the second set of pads), or in a manner that is nearly symmetrical with respect to both the first set of pads and the second set of pads, without traces crossing over each other. Accordingly, signal interference reduction of touch sensing and fingerprint sensing can be achieved. In addition, the manufacturing cost is also reduced because a special material and an additional process for reducing the influence of the crossing of the wirings can be omitted.

The following further provides embodiments of single-chip components based on the architecture of fig. 1 (with pad assignments for the FPR CGOUT signal and the TDDI CGOUT signal).

In a computing device employing single-chip elements based on the architecture of FIG. 1, a panel of the computing device may be generally implemented by data line selection circuitry, fingerprint sensing line selection circuitry, or both (as illustrated in FIG. 6B, FIG. 6C, or FIG. 6E block B1) arranged beside a boundary of the panel, wherein the boundary is generally adjacent to the single-chip elements. To avoid the possibility of traces for TDDI CGOUT signals crossing the plurality of traces on the panel, the plurality of traces for TDDI _ SWR/TDDI _ SWG/TDDI _ SWB/TDDI _ SW _ FP signals may be implemented as close to the center of the panel as possible. Referring to fig. 14 and 15, a single-chip device is coupled to the panel, which includes, among other components, a plurality of selection circuits SC (each of which may implement the plurality of switches SWR/SWG/SWB/SW _ FP shown in fig. 6B, 6C, or 6E).

As illustrated in fig. 14, the arrangement of pads, for example, of a single-chip component 30A based on the architecture of the single-

chip component

10 or 10A and as illustrated in fig. 4A, comprises a first set of pads, a second set of pads, and a third set of pads.

The first set of pads may include a plurality of first pads P11A and P12A. For example, the first set of bond pads and the second set of bond pads are disposed on both the left portion and the right portion (e.g., on a lower side or a first side), while the third set of bond pads are disposed along an upper side or the second side. As shown in fig. 14, the first group of pads including the plurality of first pads P11A and P12A is closer to the axis AX than the second group of pads including the plurality of second pads P21A and P22A and the plurality of third pads P31A and P32A. For example, the first set of pads includes the plurality of first pads P11A for the FPR _ STV, FPR _ GCK1, FPR _ GCK2, FPR _ GCK3, FPR _ SEL1, FPR _ SEL2, FPR _ SEL3, FPR _ UD, and/or FPR _ UDB signals of the left bit, and the first set of pads further includes the plurality of first pads P12A for the right bit corresponding to the same respective signals as described above, as exemplified in table 1 and table 2.

The second set of pads may include a plurality of second pads P21A and P22A and a plurality of third pads P31A and P32A. The second set of pads includes the plurality of second pads P21A for the TDDI _ STV, TDDI _ UD, TDDI _ UDB, TDDI _ GCK1, TDDI _ GCK2, TDDI _ RST signals of the left portion, and the second set of pads further includes the plurality of second pads P22A for the right portion corresponding to the same respective signals described above, as illustrated in tables 1 and 2. The second set of pads may further include the plurality of third pads P31A for outputting control signals, such as the left portion of TDDI _ SWR, TDDI _ SWG, TDDI _ SWB, and/or TDDI _ SW _ FP signals, and further include the plurality of corresponding third pads P32A pads for the same respective signals thereof of the right portion, as illustrated in tables 1 and 2. In fig. 14, the third pads P31A, P32A (e.g., ILB pads) are configured to be coupled to the selection circuits SC of the panel via traces T31A, T32A, respectively.

The third set of pads includes a plurality of fourth pads (e.g., P4A). In some embodiments, the third set of pads includes the fourth pads P4A for driving the data lines or receiving the fingerprint sensing signals from the fingerprint sensing lines, or the touch sensing lines coupled to the panel for receiving the touch signals from the touch sensing lines.

In one embodiment, the plurality of fourth pads P4A includes a plurality of first subset pads (e.g., P41A) for driving the plurality of data lines in a time-separated manner and receiving the fingerprint sensing signals from the plurality of fingerprint sensing lines; and a second subset of pads (e.g., P42A) configured to be coupled to the plurality of touch sense lines of the panel to receive touch signals from the plurality of touch sense lines. For example, referring to fig. 6B or fig. 6E and fig. 8, 14, one of the first subset of pads connecting trace LS is adapted to transmit the plurality of TDDI _ SWR, TDDI _ SWG, TDDI _ SWB signals at different times during a plurality of time intervals for display (selectively asserted as shown on the left side of fig. 8), and the same pad connecting the trace LS is adapted to receive a fingerprint sensing signal from the fingerprint sensing line when the plurality of correlation signals such as TDD _ SW _ FP signals (selectively asserted as shown on the right side of fig. 8) are during the time intervals for Fingerprints (FP). Furthermore, during the period for Touch Pad (TP) (as illustrated in fig. 8), a second subset of pads (e.g., P42A) is employed to receive touch signals from the plurality of touch sense lines of the panel.

In another example, the first subset of pads (e.g., P41A) is configured to drive the data lines in a time-separated manner, and the second subset of pads receives touch signals from the touch sensing lines. For example, referring to fig. 6C, 14, the first subset of pads connecting traces LS is employed to selectively pass the selection circuits of the block B1, transferring the plurality of TDDI _ SWR, TDDI _ SWG, TDDI _ SWB signals at different times (selectively asserted as shown on the left side of fig. 8).

In some embodiments, the first subset of pads and the second subset of pads are alternately arranged on the body. For example, as shown in fig. 14 or 15, the first subset of pads P41A (or P41B) and the second subset of pads P42A (or P42B) are alternately arranged on the body of the single-chip component 30A (or 30B).

The examples described above with respect to fig. 14 with respect to the third set of pads may be modified to be implemented in the same manner in the context of the modified example of fig. 6E or fig. 6E with respect to the plurality of single-chip elements shown in fig. 5B, fig. 13A-fig. 13C.

As illustrated in fig. 15, for example, the single-chip component 30B (as based on the single-

chip component

10 or 10A) includes a first set of pads including a plurality of first pads P11B and P12B; a second group of pads including a plurality of second pads P21B and P22B and a plurality of third pads P31B and P32B; and a third group of pads including a plurality of fourth pads P4B. As shown in fig. 15, the embodiment of fig. 14 differs from fig. 15 in that in the embodiment of fig. 15, the plurality of third pads P31B and P32B are closer to the axis AX than the plurality of second pads P21B and P22B and the plurality of first pads P11B and P12B. For example, in the embodiment of fig. 15, the plurality of first pads P11B and P12B, the plurality of second pads P21B and P22B, the plurality of third pads P31B and P32B, and the plurality of fourth pads P4B may include pads for the same kind of signals as their counterparts (counters) illustrated in the embodiment of fig. 14. In some implementations, the plurality of traces of the second set of pads, including the plurality of second pads P21B and P22B and the plurality of third pads P31B and P32B, may be routed from the plurality of shorter sides (e.g., the left and right sides) to the display panel via a thin film over film (LOF) line or a glass over glass (LOG) line. In fig. 15, the plurality of tracks T31B, T32B coupled to the plurality of third pads P31B and P32B are used for controlling the plurality of selection circuits SC. In this way, the panel manufacturer has the flexibility to choose whether to route the plurality of traces from the plurality of longer sides of the wafer (e.g., FTDI IC) or route the plurality of traces from the plurality of shorter sides to the display panel.

In the above embodiments of fig. 14 and 15, the SW _ FP signals belong to the TDDI CGOUT signal group, and the pads for the SW _ FP signals are correspondingly included in the second group of pads, but the invention is not limited to these examples. In some other embodiments, the SW _ FP signals may belong to the FPR CGOUT signal group, and in this case, the pads for the SW _ FP signals are included in the first set of pads. Preferably, but not limited to, the locations of the pads and traces for the SW _ FP signals are close to the locations of the pads and traces for the TDDI _ SWR, TDDI _ SWG, and TDDI _ SWB signals in the TDDI group.

In some other embodiments, for example, a driver chip, display system, and driving method for fingerprint recognition and touch display (a display system and a driving method) entitled "driver chip for fingerprint identification and touch display" was filed as accessory 3 of U.S. provisional patent application No.62/912,666, filed on 9.10.2019, and is part of this document, where the SW _ FP signal need not be implemented, and thus TDDI _ SW _ FP is optional and removable.

In addition, any of the pads (e.g., the first set of pads or the first set of pads) for the FPR CGOUT or TDDI CGOUT signal groups may be located on the upper longer side, lower longer side, short side, and upper/lower longer and short sides of the single die element. Even the multiple pads for either TDDI CGOUT and FPR CGOUT may be on different sides. For example, some pads are located on the higher long/short side and some pads are located on the shorter side; or some pads are located on the upper long side or the short side and short-circuited to the short side, partly on the upper/lower long side; or some pads on and short to the higher long/short side and some on the short side. The plurality of pads for TDDI CGOUT and the plurality of pads for FPR CGOUT signals may be configured as two portions of pads of an ILB pad of FTDI, respectively at a position near two ends of a side of the body of the single chip element and at a position between the ends of the side (as illustrated in the example related to fig. 14), or at a position between the ends of the side and at a position near the ends of the side (as illustrated in the example related to fig. 15). Various combinations can be configured according to design requirements. However, the plurality of pads for the TDDI CGOUT and FPR CGOUT signals are not staggered (staggered). Other embodiments are contemplated by analogy, and the details are not repeated here for the sake of simplicity.

In some embodiments, a positional relationship between the plurality of source pads for driving the plurality of data lines of the display panel, a touch RX pad for coupling the receiving line of the touch control sensing data, and a relationship between each other and the CGOUT are provided. In some embodiments, the plurality of pads of both types (e.g., source pads and touch RX pads) may be located on a long side opposite the CGOUT pad, such as in the embodiments of fig. 5A, 9A-12D. Preferably, the plurality of pads of both types may be located on the long side of the FTDI IC closer to the panel, as illustrated in fig. 14 and 15, but the present invention is not limited thereto.

Optionally, the plurality of first pads comprise a plurality of gate driver select pads on the array for fingerprinting. The plurality of gate driver select pads on the array for fingerprints as mentioned above are associated with the plurality of pads for controlling the single chip element of the fingerprint sensing pixel. To illustrate this, referring to fig. 6A, 6B, 6C, 6E, and 7, panel 9C includes a plurality of display rows, each of which includes a plurality of display pixels DP, and one display pixel DP includes a plurality of sub-pixels, such as, but not limited to, a red sub-pixel (R), a green sub-pixel (G), and a blue sub-pixel (B), wherein Gate On Array (GOA) circuits GOA1 and GOA2 are disposed on the left and right boundaries of the display or panel 9C. In fig. 6B (or fig. 6C, 6E), a Gate On Array (GOA) circuit GOA2 of the panel 9C is coupled to the plurality of scan lines (or gate lines) TGL of the plurality of display pixels DP, and the plurality of scan lines are coupled to the plurality of display pixels DP. The GOA circuit GOA2 is for controlling the plurality of display pixels DP via the plurality of scan lines TGL. The GOA circuit GOA2 scans the plurality of scan lines TGL of the plurality of display pixels DP in accordance with the control of the TDDI circuit 21A (e.g., a circuit including a display driver circuit and a touch driver circuit). In an example, each of the plurality of scan lines TGL may be a single conductive line or include a plurality of conductive lines. For example, each of the plurality of scan lines TGL may include a reset conductor and/or a select conductor.

As shown in fig. 6B, 6C, or 6E, each (or more) display pixel DP is associated with a fingerprint sensing pixel FS, as illustrated in fig. 7. The GOA circuit GOA1 of the panel 9C is coupled to the fingerprint sensing pixels FS via a plurality of scan lines (e.g., FGLs). The first set of pads is configured for coupling to the plurality of fingerprint sensing pixels via one or more GOA circuits GOA 1. The GOA circuit GOA1 scans the plurality of fingerprint scan lines FGL of the plurality of fingerprint sensing pixels FS in accordance with the control of the fingerprint driver circuit 29A. In an example, each of the plurality of fingerprint scan lines FGL may be a single wire or include a plurality of wires. For example, each of the plurality of fingerprint scan lines FGL may include a reset conductor for transmitting a reset signal (e.g., as represented by FPR _ GCK in fig. 7) to control a switch (e.g., switch T1); and/or a select line for transmitting an acquisition signal (as represented by FPR _ SEL in FIG. 7) to control another switch (such as switch T2). In the above embodiments, the first set of pads of the single-chip element comprises the plurality of pads (or gate driver select pads on array for fingerprint) for outputting a first set (or group) of signals comprising the reset signal and a second set (or group) comprising the plurality of acquisition signals to the reset conductor and the select conductor for controlling the plurality of fingerprint sensing pixels. In an example, the plurality of on-array gate driver select pads for fingerprinting include the plurality of pads for outputting the plurality of FPR _ GCK1, FPR _ GCK2, FPR _ GCK3, FPR _ SEL1, FPR _ SEL2, FPR _ SEL3 signals, as in the embodiment associated with fig. 14 or fig. 15. In some examples, the GOA circuit GOA2 can be further used to control the plurality of touch sensors of the panel. In practical implementations, if the plurality of touch sensors are self-capacitance touch sensors, the plurality of touch sensors may be implemented as a common electrode of the display panel.

With regard to the implementation of gate driver select pads on the array for the plurality of fingerprints, in a particular embodiment, a panel (as illustrated in any of fig. 5A, 9A-12D, 16, or a related example) may be implemented based on fig. 6A and 6B to include two GOA circuits (as represented by GOA1 in any of fig. 6B-6D) on the plurality of left and right boundaries of the panel for fingerprint sensing, while a single chip element (as illustrated in any of fig. 5A, 9A-12D, 16, or a related example) may be implemented to include the first set of pads for the left and right bits, each bit including at least the plurality of two switches (as switches T1 and T2, such as a transistor). In another embodiment of a panel having two GOA circuits GOA1 as described above (as illustrated in any one of fig. 5A, 9A-12D, 16, or a related example), a single die element (as illustrated in any one of fig. 5A, 9A-12D, 16, or a related example) can be implemented to include the first set of pads for the left bit (or right bit) including the plurality of pads for outputting the first set of signals and to include the first set of pads for the right bit (or left bit) including the plurality of pads for outputting the second set of signals to control at least the plurality of two switches (e.g., switches T1 and T2) for the plurality of fingerprint sensing pixels of the panel, respectively.

Optionally, the plurality of second pads comprises a plurality of gate driver on array select pads. For example, the plurality of gate driver on array select pads are used to output signals (as represented by TDDI _ S1 in fig. 6B) for driving the plurality of display pixels and/or touch sensors. In some examples, the plurality of gate driver on array select pads includes the plurality of pads for outputting the plurality of TDDI _ GCK1, TDDI _ GCK2, TDDI _ RST signals, as illustrated in embodiments associated with fig. 14 or fig. 15.

Optionally, the panel further includes a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and a plurality of selection circuits, each of the plurality of selection circuits being coupled to a set of the plurality of data lines and one of the plurality of fingerprint sensing lines, and the single chip device further includes a plurality of third pads disposed in the body and configured to be coupled to the panel and to control the plurality of selection circuits. In an example, as shown in fig. 6B, the block B1 used as a selection circuit may be implemented by using a multiplexer, a demultiplexer, or a switch, and the plurality of pads of the single chip component 20A connected to the TDDI circuit 21A output the plurality of control signals (as represented by TDDI _ S2 in fig. 6B) to control the block B1. For example, the plurality of third pads may be implemented to include the plurality of pads for outputting the plurality of TDDI _ SWR, TDDI _ SWG, TDDI _ SWB, TDDI _ SW _ FP signals, as illustrated in the embodiments related to fig. 14 or fig. 15. In fig. 6B, the number of the fingerprint sensing pixels FS is controlled by the switch. Of course, the present disclosure is not so limited. In another example, the panel may be implemented such that the plurality of fingerprint sensing pixels are controlled through the single chip element (e.g. FTDI) without using switches. Also, the selection circuit may be implemented in any suitable manner; for example, by time multiplexing, one of the plurality of second pads may be implemented to control three or four (or more) switches in order to achieve signal line reduction.

Optionally, the plurality of third pads are arranged on both the left portion and the right portion (as shown in fig. 14 or fig. 15).

Optionally, the body has a rectangular shape having a first side edge and a second side edge parallel to and closer to the panel than the first side edge, and the plurality of third pads are arranged along the first side edge (as shown in fig. 14 or fig. 15).

In some embodiments, the plurality of third pads may be arranged along the second side in a similar manner to those illustrated in any of fig. 10A to 10D.

Optionally, the panel further includes a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and the single chip device further includes a plurality of fourth pads disposed in the body. For example, the fourth pads can be used to drive the data lines, or receive the fingerprint sensing signals from the fingerprint sensing lines, or couple to the touch sensing lines of the panel for receiving the touch signals from the touch sensing lines (as shown in fig. 14 or fig. 15). One or more of the above examples of the fourth pads may be implemented in different contexts of the panel, as appropriate. In an example, referring to fig. 6A and 6B, a panel for the architecture based on fig. 1 is implemented to include signals for display pixels and fingerprint sensing pixels in a multiplexing circuit; i.e., share the same selection circuitry (e.g., block B1). In another example, referring to FIG. 6D, a panel for the architecture of FIG. 1 may be further modified for implementation without the use of a selection circuit (e.g., block B1). In yet another example, referring to fig. 6A and 6C, a panel for the architecture of fig. 1 may be further modified to implement the control for display pixels having selection circuitry. Of course, implementations of the present disclosure are not so limited.

Optionally, the panel further comprises a plurality of selection circuits, wherein each of the plurality of selection circuits (block B1 illustrated in fig. 6B) is coupled to a set of the plurality of data lines (SLR, SLG, SLB illustrated in fig. 6B) and one of the plurality of fingerprint sensing lines (SL _ FP illustrated in fig. 6B), and wherein the first set of pads is configured to be coupled to the plurality of selection circuits.

Optionally, the body has a rectangular shape having a first side edge and a second side edge parallel to and closer to the panel than the first side edge, and the plurality of fourth pads are arranged along the second side edge (as illustrated in fig. 14 or 15).

Alternatively, fingerprint driver circuitry (e.g., 19; 19A; 29A) and touch display driver circuitry (e.g., 11 and 12; 11A and 12A; 21A) may be implemented in the body of the single die element. The fingerprint driver circuit is disposed in the body and coupled to the first set of pads. The touch display driver circuit is disposed in the main body and coupled to the plurality of second pads. In an implementation with the plurality of third pads, the touch display driver circuit may be further coupled to the plurality of third pads.

Optionally, the plurality of third pads are arranged beside the plurality of second pads instead of beside the plurality of first pads (as shown in fig. 14 or fig. 15).

Optionally, the plurality of second pads are arranged beside the plurality of first pads and beside the plurality of third pads (as shown in fig. 14 or fig. 15).

Optionally, the single-chip device further comprises a fingerprint driver circuit and a touch display driver circuit. The fingerprint driver circuit is disposed in the body and coupled to the plurality of first pads. The touch display driver circuit is disposed in the main body and coupled to the plurality of second pads.

Optionally, in the right portion, none of the first set of pads is disposed between the second set of pads, none of the second set of pads is disposed between the first set of pads, and in the left portion, none of the first set of pads is disposed between the second set of pads, and none of the second set of pads is disposed between the first set of pads (as illustrated in fig. 5A, 5B, 9A-12D, 13A-13C, 14-16).

In some embodiments, the structure of a single wafer element (e.g., an FTDI IC) is illustrated in FIG. 16. In fig. 16, for example, the single chip element 40 includes a fingerprint driver circuit 41 and a touch driver circuit 49. For example, the Fingerprint driver circuit 41 includes a Fingerprint receiver multiplexing circuit (FPR RX MUX)413, a Fingerprint Analog Front End (AFE) circuit 414 (which may include an analog front end (e.g., low noise amplifier) and an analog-to-digital converter), a Fingerprint control circuit 415, and a data interface circuit 416. The fingerprint control circuit 415 may be implemented to be connected to one or

more GOA drivers

410 and 412 to drive the plurality of fingerprint GOA scan circuits FGOA1 and FGOA2 disposed on the panel 9D. For example, the Touch driver circuit 49 includes a Touch panel receiver multiplexing circuit (TP RX MUX)493, a Touch analog front end circuit 494 (which may include an analog-to-digital converter), a Touch control circuit 495 (such as a MCU), and a data interface circuit 496.

Also, the following is provided in fig. 14 or 15, with respect to some specific embodiments of the implementation of the plurality of selection circuits and the configuration of the single die element (or electronic module). These embodiments can also be used in part or in whole, as appropriate, for any of the single-chip devices described above, based on the configurations of FIG. 6B, FIG. 6C, FIG. 6E, or other selection circuitry.

Fig. 17 and 18 are schematic diagrams illustrating a wiring structure between a single chip device (or electronic module) 30C and a display panel 9E according to an embodiment based on the architecture of fig. 1. Referring to fig. 17 and 18, the single-chip device 30C includes a selection module SM1 (or a first switching circuit). The display panel 9E includes a selection module SM2 (or a second switch circuit). The select module SM1 can be configured to couple to the select module SM2 via a trace (or transmission line) LS.

The select module SM1 includes a plurality of first terminals NlD and NlF and a plurality of second terminals N2, wherein the plurality of second terminals N2 can be regarded as or coupled to each pad of the plurality of fourth pads, such as the first subset of pads (i.e., a subgroup of pads) P41A illustrated in fig. 14 or 15. The number of the plurality of first terminals N1D and N1F is greater than the number of the plurality of second terminals N2. The plurality of first terminals N1D are coupled to the display driver circuit (e.g., 11 or 11A) or a touch display driver circuit (e.g., 21A). In this embodiment, the display driver circuit (e.g., 11 or 11A) includes a signal processing circuit including an output buffer OBF and a signal converter DAC, and outputs a display driving signal DS for driving the display panel 9E. The plurality of first terminals N1F are coupled to the fingerprint AFE circuit 414 of the fingerprint driver circuit (e.g., 19A, or 29A). The plurality of second terminals N2 may be configured to be coupled to the selection module SM2 of the display panel 9E via the plurality of traces LS.

In an embodiment of the present invention, the selection module SM1 includes a plurality of selection circuits SC 1. Each of the plurality of selection circuits SC1 comprises a first switch means 501 and a second switch means 502. The first switching means 501 is coupled between the signal processing circuit and a corresponding one of the plurality of second terminals N2. The first switching means 501 is controlled to transmit the plurality of display drive signals DS from the signal processing circuit in a display drive phase (first period). The second switch means 502 is coupled between the fingerprint driver circuit (e.g., 19A, or 29A) and a corresponding one of the plurality of second terminals N2. The second switch member 502 is controlled to transmit the fingerprint sensing signal FP _ S from the display panel 9E to the fingerprint driver circuit (e.g., 19A, or 29A) in the fingerprint sensing phase (second period).

The second switching means 502 may comprise a first switching element 502_1 and a second switching element 502_ 2. The first switch element 502_1 is coupled to the corresponding one of the plurality of second terminals N2 and the fingerprint driver circuit (e.g., 19A, or 29A). The first switching element 502_1 is controlled to transmit the plurality of fingerprint sensing signals FP _ S to the fingerprint driver circuit (e.g. 19, 19A, or 29A) during the fingerprint sensing phase. The second switching element 502_2 is coupled between the first switching element 502_1 and the fingerprint driver circuit (e.g., 19A, or 29A). The second switch element 502_2 is controlled to transmit the plurality of fingerprint sensing signals FP _ S to the fingerprint driver circuit (e.g., 19A, or 29A) in response to the determination of touch information during the fingerprint sensing phase. The first switch element 502_1 and the second switch element 502_2 are controlled by different control signals SW1FP and SW3FP, respectively. That is, the control signal SW1FP is asserted during the fingerprint sensing phase and the control signal SW3FP is asserted during the fingerprint sensing phase according to the touch information.

The select module SM2 includes a plurality of third terminals N3D and N3F and a plurality of fourth terminals N4. The number of the plurality of third terminals N3D and N3F is greater than the number of the plurality of fourth terminals N4. The plurality of third terminals N3D are coupled to the plurality of display data lines SLD. The plurality of third terminals N3F are coupled to the plurality of fingerprint sensing lines SL _ FP. The plurality of fourth terminals N4 can be configured to be coupled to the selection module SM1 of the single chip element 30C via the plurality of traces LS.

In particular, the selection module SM2 comprises a plurality of selection circuits SC 2. Each of the plurality of selection circuits SC2 includes a plurality of third switch members 503 and one or more fourth switch members 504. The plurality of third switching means 503 are coupled between the plurality of third terminals N3D (respective first portions of the plurality of third terminals) and the plurality of fourth terminals N4 (one of the plurality of fourth terminals). The fourth switching means 504 is coupled between the plurality of third terminals N3F (respective second portions of the plurality of third terminals) and the plurality of fourth terminals N4 (one of the plurality of fourth terminals). The first portions (e.g., N3D) of the plurality of third terminals N3D and N3F are coupled to the plurality of data lines SLD of the display panel 9E, and the second portions (e.g., N3F) of the plurality of third terminals N3D and N3F are coupled to the plurality of fingerprint sensing lines SL _ FP. In a specific embodiment of the present invention, the plurality of third switching members 503 are switched to receive the plurality of display driving signals DS from the single-chip element 30C during the display driving phase. The fourth switching means 504 is switched to transmit the plurality of fingerprint sensing signals FP _ S to the single chip element 30C in the fingerprint sensing phase.

In a specific embodiment of the present invention, the single-chip component 30C (e.g., the control circuit of the single-chip component, e.g., 10 or 10A) is configured to generate control signals for controlling the plurality of select modules SM1 and SM 2. For example, the single-chip element 30C generates the plurality of control signals SW1SD, SW1FP, and SW3FP to control corresponding switch members of the plurality of selection circuits SC1 of the selection module SM1, and generates the plurality of control signals SW2R, SW2G, SW2B, and SW2FP to control corresponding switch members of the plurality of switch cells SC2 of the selection module SM 2.

In the display driving phase, the control signal SW1SD turns on the corresponding switch members of the selection module SM1, and the control signals SW2R, SW2G, and SW2B turn on the corresponding switch members of the selection module SM 2. The selection module SM2 is switched to receive the plurality of display driving signals DS from the single-chip element 30C during the display driving phase. Specifically, the plurality of third switching members 503 are switched to receive the plurality of display driving signals DS from the single-chip element 30C in the display driving phase. On the other hand, in the display driving phase, the plurality of control signals SW1FP and SW3FP turn off the plurality of corresponding switch members of the selection module SM1, and the control signal SW2FP turns off the plurality of corresponding switch members of the selection module SM 2.

Accordingly, the plurality of display driving signals DS are output from the single-chip element 30C to the display panel 9E via the plurality of traces LS and the plurality of selection modules SM1 and SM 2. That is, the single chip device 30C generates the plurality of control signals SW1SD, SW2R, SW2G, and SW2B for controlling the plurality of selection modules SM1 and SM2, so as to transmit the plurality of display driving signals DS from the display driver circuit (11 or 11A) or touch display driver circuit (e.g., 21A) to the plurality of data lines SLD via the plurality of selection modules SM1 and SM2 in the display driving phase. In an embodiment of the present invention, the display pixel DP includes three sub-pixels, but the present invention is not limited thereto. In this case, the plurality of display driving signals DS are multiplexed RGB signals and are delivered to the respective data lines SLD on the display panel 9E via the plurality of selection modules SM1 and SM 2.

In the fingerprint sensing phase, the plurality of control signals SW1FP and SW3FP turn on the plurality of corresponding switch members of the select module SM1, and the control signal SW2FP turns on the plurality of corresponding switch members of the select module SM 2. The selection module SM2 is switched to transmit the plurality of fingerprint sensing signals FP _ S from the display panel 9E to the single-chip element 30C in the fingerprint sensing phase. In particular, the plurality of fourth switch means 504 are switched to transmit the plurality of fingerprint sensing signals FP _ S to the single-chip element 30C in the fingerprint sensing phase.

On the other hand, the control signal SW1SD turns off the corresponding switch members of the select module SM1, and the control signals SW2R, SW2G, and SW2B turn off the corresponding switch members of the select module SM 2. Therefore, the plurality of fingerprint sensing signals FP _ S are input from the display panel 9E to the single-chip component 30C via the plurality of traces LS and the plurality of selection modules SM1 and SM 2. That is, the single chip device 30C generates the plurality of control signals SW1FP, SW3FP, and SW2FP for controlling the plurality of selection modules SM1 and SM2, so that the plurality of fingerprint sensing signals FP _ S from the plurality of fingerprint sensors 126 are received to the fingerprint AFE circuit 414 of the fingerprint driver circuit (e.g., 19A, or 29A) via the plurality of selection modules SM1 and SM2 in the fingerprint sensing phase. In an embodiment of the invention, the plurality of traces LS are shared by the plurality of display driving signals DS and the plurality of fingerprint sensing signals FP _ S. The plurality of display driving signals DS and the plurality of fingerprint sensing signals FP _ S are transmitted on the plurality of traces LS with different phases (phases).

In the touch sensing phase (third period), the plurality of control signals for controlling the plurality of corresponding switch members of the plurality of selection modules SM1 and SM2 may be appropriately asserted to allow signals to be transmitted to the plurality of data lines SLD for facilitating the touch sensing operation and/or the plurality of fingerprint sensing lines SL _ FP of the display panel 9E. For example, the control signals SW2R, SW2G, SW2B and SW2FP may turn on the corresponding switch members of the select module SM2 in the touch sensing phase to allow signals to be transmitted to the data lines SLD and/or the fingerprint sensing lines SL _ FP. The signals may be DC voltages or other AC voltages such as ground voltages that can reduce parasitic noise in the touch sensing operation.

Alternatively, the plurality of control signals for controlling the plurality of corresponding switch means of the plurality of selection modules SM1 and SM2 may be appropriately de-asserted (de-asserted) to disable (inhibit) the signals from being transmitted to the plurality of data lines SLD and/or the plurality of fingerprint sensing lines SL _ FP of the display panel 9E. The plurality of control signals SW1SD, SW1FP, and SW3FP may turn off the plurality of corresponding switch members of the selection module SM1, and/or the plurality of control signals SW2R, SW2G, SW2B, and SW2FP may turn off the plurality of corresponding switch members of the selection module SM2 in the touch sensing phase to inhibit signal transmission to the plurality of data lines SLD and/or the plurality of fingerprint sensing lines SL _ FP. The inhibition of signal transmission may cause the plurality of data lines SLD and/or the plurality of fingerprint sensing lines SL _ FP to float (floated) to prevent noise from being coupled from parasitic capacitance in the touch sensing operation. Therefore, the single chip device 30C generates the control signals SW1SD, SW1FP, SW3FP, and SW2R, SW2G, SW2B, SW2FP for controlling the selection modules SM1 and SM2, respectively, so as to float or couple the data lines SLD and/or the fingerprint sensing lines SL _ FP of the display panel 9E to a DC voltage in the touch sensing phase. Since the plurality of data lines SLD and/or the plurality of fingerprint sensing lines SL _ FP of the display panel 9E are floated or coupled to the DC voltage, parasitic capacitance affecting touch sensing signals is reduced.

Fig. 19 is a waveform diagram illustrating the plurality of control signals for controlling the switching member depicted in fig. 18. Referring to fig. 17 to 18, the selection module SM2 is configured to perform, for example, 1: Q demultiplexing (e.g., Q ═ 4). In the display driving phase TI1, the plurality of control signals SW2R, SW2G, and SW2B sequentially turn on the plurality of corresponding switch members of the selection module SM 2. In the fingerprint sensing phase TI2, the control signal SW2FP turns on the plurality of corresponding switch members of the selection module SM 2. It should be noted that additional touch sensing stages may be added. For example, the display driving phase TI1 may further include at least one sub-period (sub-period) (not shown) for touch sensing.

The embodiments illustrated in fig. 17-19 may be applied to or combined with the embodiments described above (e.g., fig. 16, any embodiment based on fig. 6C or 6B, etc.) so as to achieve the functionality of the FTDI single chip device or electronic module as illustrated in the various embodiments described above, wherever appropriate.

In summary, the embodiments of the present invention provide a single-chip device, an electronic module and an electronic apparatus including the single-chip device for driving a panel including a fingerprint sensing pixel, a display pixel and a touch sensor, based on the structure, the single-chip device can be implemented such that its pads are arranged in the following manner (associated): electrical connections to the plurality of bond pads and control lines or associated lines for the plurality of fingerprint sensing pixels, display pixels, and touch sensor can be made using non-crossing (cross over) traces with respect to each other. In this way, circuit layout simplification and circuit load balancing of the plurality of traces may be facilitated.

The above description is only an example of the present invention, and is not intended to limit the scope of the present invention.

Claims

1. A single-chip device for driving a panel including a plurality of fingerprint sensing pixels, a plurality of display pixels, and a plurality of touch sensors, the single-chip device comprising:

a body having a left location and a right location relative to an axis;

a first set of pads disposed in the body and including a plurality of first pads for driving the plurality of fingerprint sensing pixels, wherein the first set of pads is disposed on at least one of the left site and the right site and configured for coupling to the plurality of fingerprint sensing pixels; and

a second set of pads arranged in the body and including a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors, wherein the second set of pads is arranged on at least the other of the left portion and the right portion and configured to be coupled to the panel,

wherein at least one group of the first set of pads and the second set of pads is arranged on only the one of the left portion and the right portion.

2. The single-chip component of claim 1, wherein the plurality of first pads are disposed on only one of the left portion or the right portion.

3. The single-chip component of claim 2 wherein the plurality of second pads are disposed on only the other of the left portion or the right portion.

4. The single-chip component of claim 2 wherein the plurality of second pads are disposed on both the left portion and the right portion.

5. The single wafer element of claim 4, wherein the plurality of first pads are closer to the axis than the plurality of second pads.

6. The single wafer element of claim 4, wherein the plurality of second pads are closer to the axis than the plurality of first pads.

7. The single-chip component of claim 1 wherein the plurality of second pads are disposed on only the other of the left portion and the right portion.

8. The single wafer element of claim 7, wherein the plurality of first pads are disposed on both the left portion and the right portion.

9. The single wafer element of claim 8, wherein the plurality of first pads are closer to the axis than the plurality of second pads.

10. The single wafer element of claim 8, wherein the plurality of second pads are closer to the axis than the plurality of first pads.

11. The single wafer element as recited in claim 1 wherein the body has a rectangular shape with a first side, a second side parallel to the first side and closer to the panel than the first side, a left side on the left portion and perpendicular to the first side and the second side, and a right side on the right portion and parallel to the left side, and the axis intersects the first side and the second side.

12. The single-chip component of claim 11 wherein all of the first set of pads and all of the second set of pads are disposed along the first side.

13. The single-chip component of claim 12 wherein the first set of pads are closer to the axis than the second set of pads.

14. The single-chip component of claim 12 wherein the second set of pads are closer to the axis than the first set of pads.

15. The single-chip component of claim 11 wherein all of the first set of bond pads and all of the second set of bond pads are disposed along the second side.

16. The single-chip component of claim 15 wherein the first set of pads are closer to the axis than the second set of pads.

17. The single-chip component of claim 15 wherein the second set of pads are closer to the axis than the first set of pads.

18. The single-chip component of claim 11 wherein all of the first set of pads are disposed along one of the first side and the second side and all of the second set of pads are disposed along both the left side and the right side.

19. The single-chip component of claim 11 wherein all of the first set of pads are disposed along both the left side and the right side and all of the second set of pads are disposed along one of the first side and the second side.

20. The single-wafer component of claim 11, wherein the first set of pads are disposed along at least one of the left side and the right side and all of the second set of pads are disposed along at least the other of the left side and the right side.

21. The single-wafer component of claim 20, wherein the plurality of first pads are arranged along only the one of the left side and the right side.

22. The single-wafer component of claim 21, wherein the plurality of second pads are arranged along only the other of the left side and the right side.

23. The single-wafer component of claim 21, wherein the plurality of second pads are arranged along both the left side and the right side.

24. The single-wafer component of claim 20, wherein the plurality of second pads are disposed only along the other of the left side and the right side.

25. The single wafer element of claim 24, wherein the plurality of first pads are arranged along both the left side and the right side.

26. The single chip device of claim 1 wherein the first pads comprise a plurality of gate driver select pads on an array for fingerprinting.

27. The single-chip device of claim 1, wherein the plurality of second pads comprises a plurality of gate driver on array select pads.

28. The single chip device of claim 1, wherein the panel further comprises a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and a plurality of selection circuits, each of the selection circuits being coupled to a corresponding set of the plurality of data lines, and the second set of pads further comprises:

a plurality of third pads configured for coupling to the panel and for controlling the plurality of selection circuits.

29. The single chip device of claim 28 wherein each of the plurality of selection circuits is further coupled to at least one of the plurality of fingerprint sensing lines.

30. The single-wafer component of claim 28, wherein the plurality of third pads are disposed on both the left site and the right site.

31. The single wafer component of claim 28,

the body has a rectangular shape with a first side and a second side parallel to and closer to the panel than the first side, an

The plurality of third pads are arranged along the first side.

32. The single wafer component of claim 28,

The plurality of third pads are arranged along the second side.

33. The single chip device of claim 1, wherein the panel further comprises a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and a plurality of touch sensing lines coupled to the plurality of touch sensors, and the single chip device further comprises:

a third set of pads disposed in the main body for driving the plurality of data lines or receiving fingerprint sensing signals from the plurality of fingerprint sensing lines, or coupled to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

34. The single chip device of claim 33 wherein the third set of pads comprises a first subset of pads for driving the plurality of data lines in a time-separated manner and receiving the fingerprint sensing signals from the plurality of fingerprint sensing lines; and a second subset of pads configured to couple to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

35. The single chip device of claim 34, wherein the panel further comprises a plurality of selection circuits, wherein each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines and a corresponding one of the plurality of fingerprint sensing lines, and wherein the first subset of pads is configured for coupling to the plurality of selection circuits.

36. The single-chip component of claim 34 wherein the first subset of pads and the second subset of pads are alternately arranged on the body.

37. The single chip device of claim 34 wherein the first subset of pads are configured to drive the data lines in a time-separated manner, and the second subset of pads receive touch signals from the touch sense lines.

38. The single wafer element of claim 33,

The third set of solder pads is disposed along the second side.

39. The single-wafer device of claim 28, further comprising:

a fingerprint driver circuit disposed in the body and coupled to the plurality of first pads; and

a touch display driver circuit disposed in the body and coupled to the plurality of second pads and the plurality of third pads.

40. The single wafer component of claim 28,

in the right portion, none of the third pads is disposed between the first pads and the second pads, an

In the left portion, none of the plurality of third pads is arranged between the plurality of first pads and the plurality of second pads.

41. The single chip component of claim 28 wherein the plurality of third pads are disposed beside the plurality of second pads rather than beside the plurality of first pads.

42. The single chip component of claim 28 wherein the plurality of second pads are disposed beside the plurality of first pads and beside the plurality of third pads.

43. The single-wafer component of claim 1, wherein the body is configured to be disposed on a thin film as a wafer-on-film structure.

44. The single-wafer component of claim 1, wherein the body is configured to be disposed on glass as a wafer-on-glass structure.

45. The single-wafer device of claim 1, further comprising:

a fingerprint driver circuit disposed in the body and coupled to the first set of pads; and

a touch display driver circuit disposed in the body and coupled to the second set of pads.

46. The single-wafer component of claim 1,

in the right portion, none of the first set of bond pads is disposed between the second set of bond pads, and none of the second set of bond pads is disposed between the first set of bond pads, an

In the left portion, none of the first set of pads is disposed between the plurality of second pads, and none of the second set of pads is disposed between the plurality of first pads.

47. The single-chip device of claim 1, wherein the panel further comprises at least one first Gate On Array (GOA) circuit, and the first set of pads is configured for coupling to the plurality of fingerprint sensing pixels via the at least one first GOA circuit.

48. The single-chip device of claim 33, wherein the panel further comprises at least one second Gate On Array (GOA) circuit, and the second set of pads is configured for coupling to the plurality of display pixels and the plurality of touch sensors via the at least one second GOA circuit.

49. An electronic module for driving a panel including a plurality of fingerprint sensing pixels, a plurality of display pixels, and a plurality of touch sensors, the electronic module comprising:

a thin film configured to be electrically coupled to the plurality of fingerprint sensing pixels, the plurality of display pixels, and the plurality of touch sensors; and

a single-wafer element disposed on the thin film, the single-wafer element comprising:

a body having a left location and a right location relative to an axis;

a first set of pads disposed in the body and including a plurality of first pads for driving the plurality of fingerprint sensing pixels, wherein the first set of pads is disposed on at least one of the left portion and the right portion and configured to electrically couple to the plurality of fingerprint sensing pixels; and

a second set of pads arranged in the body and including a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors, wherein the second set of pads is arranged on at least the other of the left portion and the right portion and configured to be electrically coupled to the plurality of display pixels and the plurality of touch sensors,

50. The electronic module of claim 49, wherein the plurality of first pads are arranged on only the one of the left portion and the right portion.

51. The electronic module of claim 50, wherein the plurality of second pads are disposed only on the other of the left portion and the right portion.

52. The electronic module of claim 50, wherein the plurality of second pads are disposed on the left portion and the right portion simultaneously.

53. The electronic module of claim 52, wherein the first pads are closer to the axis than the second pads.

54. The electronic module of claim 52, wherein the plurality of second pads are closer to the axis than the plurality of first pads.

55. The electronic module of claim 49, wherein the plurality of second pads are disposed only on the other of the left portion and the right portion.

56. The electronic module of claim 55, wherein the plurality of first pads are disposed on both the left portion and the right portion.

57. The electronic module of claim 56, wherein the first pads are closer to the axis than the second pads.

58. The electronic module of claim 56, wherein the plurality of second pads are closer to the axis than the plurality of first pads.

59. The electronic module of claim 49, wherein the body has a rectangular shape with a first side, a second side parallel to the first side and closer to the display than the first side, a left side on the left portion and perpendicular to the first side and the second side, and a right side on the right portion and parallel to the left side, and the axis intersects the first side and the second side.

60. The electronic module of claim 59, wherein all of the first set of solder pads and all of the second set of solder pads are disposed along the first side edge.

61. The electronic module of claim 60, wherein the first set of pads are closer to the axis than the second set of pads.

62. The electronic module of claim 60, wherein the second set of pads are closer to the axis than the first set of pads.

63. The electronic module of claim 59, wherein all of the first set of solder pads and all of the second set of solder pads are disposed along the second side.

64. The electronic module of claim 63, wherein the first set of pads is closer to the axis than the second set of pads.

65. The electronic module of claim 63, wherein the second set of pads are closer to the axis than the first set of pads.

66. The electronic module of claim 59, wherein all of the first set of pads are disposed along one of the first side and the second side, and all of the second set of pads are disposed along both the left side and the right side.

67. The electronic module of claim 59, wherein all of the first set of pads are disposed along both the left side and the right side, and all of the second set of pads are disposed along one of the first side and the second side.

68. The electronic module of claim 59, wherein all of the first set of pads are disposed along the left side and the right side, and all of the second set of pads are disposed along the left side and the right side.

69. The electronic module of claim 68, wherein the plurality of first pads are arranged along only the one of the left side and the right side.

70. The electronic module of claim 69, wherein the plurality of second pads are arranged only along the other of the left side and the right side.

71. The electronic module of claim 69, wherein the plurality of second pads are arranged along both the left side and the right side.

72. The electronic module of claim 68, wherein the plurality of second pads are arranged only along the other of the left side and the right side.

73. The electronic module of claim 72, wherein the plurality of first pads are arranged along both the left side and the right side.

74. The electronic module of claim 49, wherein the plurality of first pads comprises a plurality of gate driver select pads on a fingerprint array.

75. The electronic module of claim 51, wherein the plurality of second pads comprises a plurality of gate driver on array select pads.

76. The electronic module of claim 49, wherein the panel further comprises a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and a plurality of selection circuits, each of the plurality of selection circuits being coupled to a corresponding set of the plurality of data lines, and the second set of pads further comprises:

77. The electronic module of claim 76, wherein each of the plurality of selection circuits is further coupled to at least one of the plurality of fingerprint sensing lines.

78. The electronic module of claim 76, wherein the plurality of third solder pads are disposed on both the left portion and the right portion.

79. The electronic module according to claim 76,

The plurality of third pads are arranged along the first side.

80. The electronic module according to claim 76,

The plurality of third pads are arranged along the second side.

81. The electronic module of claim 49, wherein the panel further comprises a plurality of data lines coupled to the plurality of display pixels and a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, the single-chip device further comprising:

82. The electronic module of claim 81, wherein the third set of pads comprises a first subset of pads for driving the plurality of data lines in a time-separated manner and receiving fingerprint sensing signals from the plurality of fingerprint sensing lines; and a second subset of pads configured to couple to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

83. The electronic module of claim 82, wherein the panel further comprises a plurality of selection circuits, wherein each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines and a corresponding one of the plurality of fingerprint sensing lines, and wherein the first subset of pads is configured for coupling to the plurality of selection circuits.

84. The electronic module of claim 82, wherein the first subset of pads and the second subset of pads are alternately arranged on the body.

85. The electronic module of claim 82, wherein the first subset of pads are configured to drive the data lines in a time-separated manner, and the second subset of pads receive touch signals from the touch sensing lines.

86. The electronic module of claim 81,

The third set of solder pads is disposed along the second side.

87. The electronic module of claim 76, further comprising:

88. The electronic module according to claim 76,

89. The electronic module of claim 76, wherein the plurality of third pads are disposed beside the plurality of second pads rather than beside the plurality of first pads.

90. The electronic module of claim 76, wherein the plurality of second pads are disposed beside the plurality of first pads and beside the plurality of third pads.

91. The electronic module of claim 49, further comprising:

92. The electronic module according to claim 59,

93. The electronic module according to claim 49, wherein the plurality of fingerprint sensing pixels correspond to a fingerprint sensing area, the panel has a display area, the plurality of touch sensors correspond to touch sensing areas, and the fingerprint sensing area, the display area, and the touch sensing area are substantially the same size.

94. The electronic module of claim 49, wherein the panel further comprises at least one first Gate On Array (GOA) circuit, and the first set of pads is configured for coupling to the plurality of fingerprint sensing pixels via the at least one first GOA circuit.

95. The electronic module of claim 94, wherein the panel further comprises at least one second Gate On Array (GOA) circuit, and the second set of pads is configured for coupling to the plurality of display pixels and the plurality of touch sensors via the at least one second GOA circuit.

96. An electronic device, comprising:

a panel including a plurality of display pixels, a plurality of touch sensors, and a plurality of fingerprint sensing pixels; and

a single-wafer element for coupling to the panel, the single-wafer element comprising:

a body having a left location and a right location relative to an axis;

a first set of pads disposed in the body and including a plurality of first pads for driving the plurality of fingerprint sensing pixels, wherein the first set of pads is disposed on at least one of the left portion and the right portion and electrically coupled to the plurality of fingerprint sensing pixels; and

a second set of pads disposed in the body and including a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors, wherein the second set of pads is disposed on at least the other of the left portion and the right portion and is electrically coupled with the plurality of display pixels and the plurality of touch sensors,

97. The electronic device of claim 96, wherein the plurality of first pads are arranged on only the one of the left site and the right site.

98. The electronic device of claim 97, wherein the plurality of second pads are arranged only on the other of the left portion and the right portion.

99. The electronic device of claim 97, wherein the plurality of second pads are arranged on the left site and the right site simultaneously.

100. The electronic device of claim 99, wherein the plurality of first pads are closer to the axis than the plurality of second pads.

101. The electronic device of claim 99, wherein the plurality of second pads are closer to the axis than the plurality of first pads.

102. The electronic device of claim 96, wherein the plurality of second pads are arranged only on the other of the left portion and the right portion.

103. The electronic device of claim 102, wherein the plurality of first pads are disposed on the left portion and the right portion simultaneously.

104. The electronic device of claim 103, wherein the plurality of first pads are closer to the axis than the plurality of second pads.

105. The electronic device of claim 103, wherein the plurality of second pads are closer to the axis than the plurality of first pads.

106. The electronic device according to claim 96, wherein the main body has a rectangular shape having a first side, a second side parallel to the first side and closer to the display than the first side, a left side on the left portion and perpendicular to the first side and the second side, a right side on the right portion and parallel to the left side, and the axis intersects the first side and the second side.

107. The electronic device of claim 106, wherein all of the first set of pads and all of the second set of pads are disposed along the first side.

108. The electronic device of claim 107, wherein the first set of pads are closer to the axis than the second set of pads.

109. The electronic device of claim 107, wherein the second set of pads are closer to the axis than the first set of pads.

110. The electronic device of claim 106, wherein all of the first set of solder pads and all of the second set of solder pads are disposed along the second side.

111. The electronic device of claim 110, wherein the first set of pads is closer to the axis than the second set of pads.

112. The electronic device of claim 110, wherein the second set of pads is closer to the axis than the first set of pads.

113. The electronic device of claim 106, wherein all of the first set of pads are arranged along one of the first side and the second side, and all of the second set of pads are arranged along both the left side and the right side.

114. The electronic device of claim 106, wherein all of the first set of pads are disposed along both the left side and the right side, and all of the second set of pads are disposed along one of the first side and the second side.

115. The electronic device of claim 106, wherein all of the first set of pads are arranged along the left side and the right side, and all of the second set of pads are arranged along the left side and the right side.

116. The electronic device of claim 115, wherein the plurality of first pads are arranged along only one of the left side and the right side.

117. The electronic device of claim 116, wherein the plurality of second pads are arranged only along the other of the left side and the right side.

118. The electronic device of claim 116, wherein the plurality of second pads are arranged along both the left side and the right side.

119. The electronic device of claim 115, wherein the plurality of second pads are arranged only along the other of the left side and the right side.

120. The electronic device of claim 119, wherein the plurality of first pads are arranged along both the left side and the right side.

121. The electronic device of claim 96, wherein the plurality of first pads comprises a plurality of gate driver select pads on an array for fingerprinting.

122. The electronic device of claim 96, wherein the plurality of second pads comprises a plurality of gate driver on array select pads.

123. The electronic device of claim 96, wherein the panel further comprises a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and a plurality of selection circuits, each of the plurality of selection circuits being coupled to a corresponding set of the plurality of data lines, and the second set of pads further comprises:

124. The electronic device of claim 123, wherein each of the plurality of selection circuits is further coupled to at least one of the plurality of fingerprint sensing lines.

125. The electronic device of claim 123, wherein the plurality of third pads are disposed on both the left portion and the right portion.

126. The electronic device of claim 123,

The plurality of third pads are arranged along the first side.

127. The electronic device of claim 123,

The plurality of third pads are arranged along the second side.

128. The electronic device of claim 96, wherein the panel further comprises a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, the single-chip device further comprising:

129. The electronic device of claim 128, wherein the third set of pads comprises a first subset of pads for driving the plurality of data lines in a time-separated manner and receiving fingerprint sensing signals from the plurality of fingerprint sensing lines; and a second subset of pads configured to couple to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

130. The electronic device of claim 129, wherein the panel further comprises a plurality of selection circuits, wherein each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines and a corresponding one of the plurality of fingerprint sensing lines, and wherein the first subset of pads is configured for coupling to the plurality of selection circuits.

131. The electronic device of claim 129 wherein the first subset of pads and the second subset of pads are alternately arranged on the body.

132. The electronic device of claim 129, wherein the first subset of pads are configured to drive the data lines in a time-separated manner, and the second subset of pads receive touch signals from the touch sensing lines.

133. The electronic device of claim 128,

The third set of solder pads is disposed along the second side.

134. The electronic device of claim 123, further comprising:

135. The electronic device of claim 123,

136. The electronic device of claim 123, wherein the plurality of third pads are disposed beside the plurality of second pads rather than beside the plurality of first pads.

137. The electronic device of claim 123, wherein the plurality of second pads are arranged beside the plurality of first pads and beside the plurality of third pads.

138. The electronic device of claim 96, further comprising:

139. The electronic device of claim 96,

In the left portion, none of the first set of pads is disposed between the second set of pads, and none of the second set of pads is disposed between the first set of pads.

140. The electronic device of claim 96, wherein the plurality of fingerprint sensing pixels correspond to fingerprint sensing areas, the panel has a display area, the plurality of touch sensors correspond to touch sensing areas, and the fingerprint sensing areas, the display area, and the touch sensing areas are substantially the same size.

141. The electronic device of claim 96, further comprising a substrate, and the plurality of display pixels, the plurality of touch sensors, and the plurality of fingerprint sensing pixels are disposed on the substrate.

142. The electronic device of claim 141, wherein the substrate comprises glass and the single-wafer element is disposed on a portion of the glass as a chip-on-glass (chip-on-glass) structure.

143. The electronic device of claim 96, wherein the substrate comprises a thin film and the single-wafer component is disposed on the thin film as a wafer-on-film structure.

144. The electronic device of claim 96, wherein the panel further comprises at least one first Gate On Array (GOA) circuit, and the first set of pads is configured for coupling to the plurality of fingerprint sensing pixels via the at least one first GOA circuit.

145. The electronic device of claim 144, wherein the panel further comprises at least one second Gate On Array (GOA) circuit, and the second set of pads is configured for coupling to the plurality of display pixels and the plurality of touch sensors via the at least one second GOA circuit.