MCU chip awakening circuit
Technical Field
The invention relates to the technical field of MCU chip awakening, in particular to an MCU chip awakening circuit.
Background
A Micro Control Unit (MCU), also called a Single Chip Microcomputer (Single Chip Microcomputer) or a Single Chip Microcomputer (MCU), is a Chip-level computer formed by appropriately reducing the frequency and specification of a Central Processing Unit (CPU), and integrating peripheral interfaces such as a memory, a counter (Timer), a USB, an a/D converter, a UART, a PLC, a DMA, etc., and even an LCD driving circuit on a Single Chip, and performing different combination control for different applications. Such as mobile phones, PC peripherals, remote controllers, automotive electronics, industrial stepper motors, robot arm control, etc., can see the figure of the MCU;
the MCU chip of the single chip microcomputer is required to be completely dormant or partially dormant due to working conditions and power consumption requirements in the working process, and is required to be awakened when being restarted.
Disclosure of Invention
The present invention is directed to a wake-up circuit of MCU chip, so as to solve the problems mentioned in the background art.
In order to achieve the purpose, the invention provides the following technical scheme:
a MCU chip wake-up circuit comprises a mainboard, wherein a plurality of MCU chips U1 are arranged on the mainboard, a plurality of MCU chips U1 form an MCU chip set, a plurality of MCU chips U1 are respectively connected with corresponding functional circuits, and a wake-up control module is arranged on the mainboard and used for MCU chip set dormancy and wake-up control; the wake-up control module is connected with a multi-dimensional wake-up signal acquisition unit, a wake-up execution module is arranged between the wake-up control module and the MCU chipset, and the wake-up control module is connected with the MCU chipset through the wake-up execution module and is used for controlling and executing the quick dormancy or wake-up action of each MCU chip U1 in the MCU chipset;
the MCU chip group power-down sleep/wake-up circuit also comprises a functional feedback circuit, wherein the functional circuit is used for feeding back the functional circuit through a functional feedback module and a wake-up control module and assisting in judging whether the corresponding MCU chip in the MCU chip group needs to be in power-down sleep or wake-up.
When the MCU chip is in work, the MCU chip set is dormant through the awakening control module; compared with the traditional wake-up circuit control, the invention has high precision and is convenient for the management of the MCU chip set on the mainboard, in addition, the invention is also provided with a multi-dimensional wake-up signal acquisition unit for assisting in judging whether the corresponding chip in the MCU chip set needs to be woken up or not, so as to realize the multi-dimensional automatic control wake-up, and simultaneously, a function feedback circuit is designed for the feedback of the function circuit and assisting in judging whether the corresponding MCU chip U1 in the MCU chip set needs to be in power-off sleep or wake-up or not, in addition, the invention designs a wake-up execution module for controlling and executing the quick sleep or wake-up action of each MCU chip U1.
As a further scheme of the invention: the awakening signal acquisition unit comprises a voice acquisition unit, an infrared acquisition unit and an image acquisition unit.
As a further scheme of the invention: the wake-up control module is a wake-up control chip U2, and the model number of U2 is STM32F103ZET 6.
As a further scheme of the invention: the voice acquisition unit is connected with a wake-up control chip U2 through a voice acquisition circuit, the voice acquisition circuit comprises a resistor R3-resistor R5, a capacitor C3, a capacitor C4, a diode Q2 and a microphone MK1 which are sequentially numbered, and one end of the resistor R5 is connected with the anode of the MK1 and one end of the capacitor C4; the other end of the resistor R5 is connected with one end of the resistor R3 and is connected with a power supply in parallel; one end of the resistor R4 is connected with the other end of the capacitor C4 and the base of the triode Q2; the other end of the resistor R4 is connected with the other end of the resistor R3 and the collector of the triode Q2 and one end of the capacitor C3; the negative electrode of the microphone MK1 is connected with the emitter of the triode Q2 and grounded; the other end of the capacitor C3 is connected with the PA4 input pin of the U1.
As a further scheme of the invention: the infrared acquisition unit is connected with the awakening control chip U2 through an infrared transceiving circuit, and the infrared transceiving circuit comprises an infrared transmitting circuit and an infrared receiving circuit; the infrared emission circuit comprises a triode Q1, a resistor R1, a resistor R2, a capacitor C1 and an infrared LED lamp D1, one end of the resistor R2 is connected with a collector of the triode Q1, and the other end of the resistor R2 is connected with a negative electrode of the infrared LED lamp D1; the anode of the infrared LED lamp D1 is connected with one end of the capacitor C1 and is connected with a power supply in parallel; the other end of the capacitor C1 and the emitter of the triode Q1 are respectively grounded; one end of the resistor R1 is connected with the base electrode of the triode Q1, and the other end is connected with the PE8 pin of U1;
the infrared receiving circuit comprises a chip U6 and a capacitor C2, wherein one end of the capacitor C2 is connected with a VCC pin of the U6 and is connected with a power supply in parallel; the other end of the capacitor C2 is connected with the GND pin of the U6 and is grounded; the DQ pin of U6 is connected with PE3 pin of U1, wherein the model of U6 is VS 838.
As a further scheme of the invention: the image acquisition unit is connected with a wake-up control chip U2 through a camera circuit, the camera circuit comprises a camera U5, a chip U3, a chip U4 and a connecting plate P1, and a PD6 pin of U2 is connected with a WRST pin of U4 and a4 pin of P1; the PE15 pin of U2 is connected with the OE pin of U4 and the 8 pin of P1; the PE14 pin of U2 is connected with the RRST pin of U4 and the 6 pin of P1; the PB5 pin of U2 is connected with the RCLK pin of U4 and the 15 pin of P1; the PC0 pin of U2 is connected with the DO0 pin of U4 and the 7 pin of P1; the PC1 pin of U2 is connected with the DO1 pin of U4 and the 10 pin of P1; the PC2 pin of U2 is connected with the DO2 pin of U4 and the 9 pin of P1; the PC3 pin of U2 is connected with the DO3 pin of U4 and the 12 pin of P1; the PC4 pin of U2 is connected with the DO4 pin of U4 and the 11 pin of P1; the PC5 pin of U2 is connected with the DO5 pin of U4 and the 14 pin of P1; the PC6 pin of U2 is connected with the DO6 pin of U4 and the 13 pin of P1; the PC7 pin of U2 is connected with the DO7 pin of U4 and the 16 pin of P1; a PA8 pin of U2 is connected with a VSYNC pin of U5 and an 18 pin of P1; pin 1 of P1 is grounded; pin 2 of P1 is connected with power supply; pin 3 of P1 is connected to SIOD pin of U5; pin 5 of P1 to SIOC pin of U5; pin 17 of P1 is connected with pin A of U3; the pin B of U3 is connected with the pin HREF of U5; the Y pin of U3 is connected with the WE pin of U4; the VCC pin of U3 is connected with power supply; the GND pin of U3 is grounded; the WCLK pin of U4 is connected with the PCLK pin of U5; the DI0 pin of U4 is connected with the D0 pin of U5; the DI1 pin of U4 is connected with the D1 pin of U5; the DI2 pin of U4 is connected with the D2 pin of U5; the DI3 pin of U4 is connected with the D3 pin of U5; the DI4 pin of U4 is connected with the D4 pin of U5; the DI5 pin of U4 is connected with the D5 pin of U5; the DI6 pin of U4 is connected with the D6 pin of U5; the DI7 pin of U4 is connected with the D7 pin of U5, wherein the model of U3 is a single-path 2-input NAND gate SN74LVC1G00, the model of U4 is AL422B, and the model of U5 is OV 7670.
As a further scheme of the invention: the wake-up execution module comprises an OR gate P2, an OR gate P3 and a diode D1, wherein the pin A of the P2 is connected with the pin PE11 of the U2; the pin B of P2 is connected with the pin PE12 of U2; pin A of P3 is connected with pin Y of P2; the pin B of P3 is connected with the pin PE13 of U2; the Y pin of P3 is connected with the cathode of diode D2; the anode of the diode D2 is connected with the PA0 pin of U1.
As a further scheme of the invention: the functional circuit is a load circuit, the functional feedback circuit comprises a load P2, a low-voltage early warning power supply P3, a main power supply P4, a relay K1, an operational amplifier P5 and sequentially numbered resistors R6 to R8, and one end of the resistor R6 is connected with a pin 2 of the load P2; the other end of the resistor R6 is connected with one end of the resistor R7 and the same-direction end of the operational amplifier P5; the other end of the resistor R7 is grounded; one end of the resistor R8 is connected with the reverse end of the operational amplifier P5, and the other end is connected with the output end of the operational amplifier P5; the output end of the operational amplifier P5 is connected with a PE10 pin of the wake-up control chip U2; the V + end of the operational amplifier P5 is connected with a +12V power supply, and the V-end of the operational amplifier P5 is grounded; the 1 pin of the load P2 is connected with the armature of the relay K1; two ends of an electromagnetic coil of the relay K1 are respectively connected with a PA5 pin and a PA6 pin of the MCU chip U1; a normally closed contact of the relay K1 is connected with a low-voltage early warning power supply P3; the normally open contact of the relay K1 is connected with a main power supply P3, wherein the model of the operational amplifier P5 is LM 358.
Compared with the prior art, the invention has the following beneficial effects:
1. the invention provides an MCU chip wake-up circuit, which is skillfully arranged and reasonably arranged, and when the MCU chip wake-up circuit works, an MCU chip set is dormant through a wake-up control module; compared with the traditional wake-up circuit control, the invention has high precision and is convenient for the management of the MCU chipset on the mainboard, and in addition, the invention is also provided with a multi-dimensional wake-up signal acquisition unit to assist in judging whether the corresponding chip in the MCU chipset needs to be woken up or not, thereby realizing the multi-dimensional automatic control wake-up;
2. the invention further designs that the wake-up signal acquisition unit comprises a voice acquisition unit, an infrared acquisition unit and an image acquisition unit, thereby realizing multi-dimensional wake-up induction and improving the functionality and reliability of the MCU;
3. the invention further designs a functional feedback circuit which is used for functional circuit feedback and assisting in judging whether the corresponding MCU chip in the MCU chip set needs power-down dormancy or awakening; the control management precision is further improved;
4. the invention further designs a wake-up execution module for controlling and executing the rapid sleep or wake-up action of each MCU chip U1 in the MCU chipset, thereby improving the response efficiency of sleep or wake-up.
Drawings
Fig. 1 is a system block diagram of an MCU chip wake-up circuit.
Fig. 2 is a block diagram of a wake-up signal acquisition unit in the wake-up circuit of the MCU chip.
Fig. 3 is a schematic diagram of an MCU chip wake-up circuit.
Fig. 4 is a connection diagram of a connection board P1 in the MCU chip wake-up circuit.
In the figure: 100. a main board; 101. an MCU chip set; 102. a wake-up execution module; 103. a wake-up control module; 104. a functional feedback circuit; 105. a functional circuit; 106. a wake-up signal acquisition unit; 1061. a voice acquisition unit; 1062. an infrared acquisition unit; 1063. an image acquisition unit.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention; the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance; furthermore, unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly, as they may be fixedly connected, detachably connected, or integrally connected, for example; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
Referring to fig. 1-4, an MCU chip wake-up circuit includes a motherboard 100, wherein the motherboard 100 is provided with a plurality of MCU chips U1, the plurality of MCU chips U1 form an MCU chipset 101, the plurality of MCU chips U1 are respectively connected with corresponding functional circuits 105, and the motherboard 100 is provided with a wake-up control module 103 for sleep and wake-up control of the MCU chipset 101; the wake-up control module 103 is connected with a multi-dimensional wake-up signal acquisition unit 106, a wake-up execution module 102 is arranged between the wake-up control module 103 and the MCU chipset 101, and the wake-up control module 103 is connected with the MCU chipset 101 through the wake-up execution module 102 and is used for controlling and executing the fast dormancy or wake-up action of each MCU chip U1 in the MCU chipset;
the MCU chip power-down sleep/wake-up circuit also comprises a functional feedback circuit 104, wherein the functional circuit 105 is used for feeding back the functional circuit 105 through a functional feedback module and a wake-up control module 103 and assisting in judging whether the corresponding MCU chip in the MCU chip group 101 needs to be in power-down sleep or wake-up.
In this embodiment, the MCU chip 101 is exemplified by a chip U1 of model STM32F103ZET6, and further includes a functional circuit 105 connected to the MCU chip 101, in this embodiment, the functional circuit 105 is a load circuit, and the motherboard 100 is provided with a wake-up control module 103 for wake-up control after the MCU chip 101 is dormant; a multi-dimensional wake-up signal acquisition unit 106 is connected to the wake-up control module 103, a wake-up execution module 102 is arranged between the wake-up control module 103 and the MCU chip 101, and the wake-up control module 103 is connected to the MCU chip 101 through the wake-up execution module 102 and is configured to execute a fast wake-up execution action of the MCU; the MCU chip 101 is also provided with a function feedback circuit 104 which is used for feeding back by the function circuit 105 and assisting in judging whether the MCU chip 101 needs to be awakened or not; the functional circuit 105 is connected with the wake-up control module 103 through a functional feedback module; the wake-up signal acquisition unit 106 comprises a voice acquisition unit 1061, an infrared acquisition unit 1062 and an image acquisition unit 1063; awakening control module 103 is awakening control chip U2, and the model of U2 is STM32F103ZET6, and MCU chip U1 also chooses for use in this embodiment.
The voice acquisition unit 1061 is connected with the wake-up control chip U2 through a voice acquisition circuit, the voice acquisition circuit comprises a resistor R3 to a resistor R5, a capacitor C3, a capacitor C4, a diode Q2 and a microphone MK1 which are sequentially numbered, and one end of the resistor R5 is connected with the anode of the MK1 and one end of the capacitor C4; the other end of the resistor R5 is connected with one end of the resistor R3 and is connected with a power supply in parallel; one end of the resistor R4 is connected with the other end of the capacitor C4 and the base of the triode Q2; the other end of the resistor R4 is connected with the other end of the resistor R3 and the collector of the triode Q2 and one end of the capacitor C3; the negative electrode of the microphone MK1 is connected with the emitter of the triode Q2 and grounded; the other end of the capacitor C3 is connected with the PA4 input pin of the U1; the infrared acquisition unit 1062 is connected with the wake-up control chip U2 through an infrared transceiver circuit, which includes an infrared transmitting circuit and an infrared receiving circuit; the infrared emission circuit comprises a triode Q1, a resistor R1, a resistor R2, a capacitor C1 and an infrared LED lamp D1, one end of the resistor R2 is connected with a collector of the triode Q1, and the other end of the resistor R2 is connected with a negative electrode of the infrared LED lamp D1; the anode of the infrared LED lamp D1 is connected with one end of the capacitor C1 and is connected with a power supply in parallel; the other end of the capacitor C1 and the emitter of the triode Q1 are respectively grounded; one end of the resistor R1 is connected with the base electrode of the triode Q1, and the other end is connected with the PE8 pin of U1;
the infrared receiving circuit comprises a chip U6 and a capacitor C2, wherein one end of the capacitor C2 is connected with a VCC pin of the U6 and is connected with a power supply in parallel; the other end of the capacitor C2 is connected with the GND pin of the U6 and is grounded; the DQ pin of U6 is connected with PE3 pin of U1, wherein the model of U6 is VS 838.
The image acquisition unit 1063 is connected with the wake-up control chip U2 through a camera circuit, the camera circuit comprises a camera U5, a chip U3, a chip U4 and a connecting plate P1, and a PD6 pin of U2 is connected with a WRST pin of U4 and 4 pins of P1; the PE15 pin of U2 is connected with the OE pin of U4 and the 8 pin of P1; the PE14 pin of U2 is connected with the RRST pin of U4 and the 6 pin of P1; the PB5 pin of U2 is connected with the RCLK pin of U4 and the 15 pin of P1; the PC0 pin of U2 is connected with the DO0 pin of U4 and the 7 pin of P1; the PC1 pin of U2 is connected with the DO1 pin of U4 and the 10 pin of P1; the PC2 pin of U2 is connected with the DO2 pin of U4 and the 9 pin of P1; the PC3 pin of U2 is connected with the DO3 pin of U4 and the 12 pin of P1; the PC4 pin of U2 is connected with the DO4 pin of U4 and the 11 pin of P1; the PC5 pin of U2 is connected with the DO5 pin of U4 and the 14 pin of P1; the PC6 pin of U2 is connected with the DO6 pin of U4 and the 13 pin of P1; the PC7 pin of U2 is connected with the DO7 pin of U4 and the 16 pin of P1; a PA8 pin of U2 is connected with a VSYNC pin of U5 and an 18 pin of P1; pin 1 of P1 is grounded; pin 2 of P1 is connected with power supply; pin 3 of P1 is connected to SIOD pin of U5; pin 5 of P1 to SIOC pin of U5; pin 17 of P1 is connected with pin A of U3; the pin B of U3 is connected with the pin HREF of U5; the Y pin of U3 is connected with the WE pin of U4; the VCC pin of U3 is connected with power supply; the GND pin of U3 is grounded; the WCLK pin of U4 is connected with the PCLK pin of U5; the DI0 pin of U4 is connected with the D0 pin of U5; the DI1 pin of U4 is connected with the D1 pin of U5; the DI2 pin of U4 is connected with the D2 pin of U5; the DI3 pin of U4 is connected with the D3 pin of U5; the DI4 pin of U4 is connected with the D4 pin of U5; the DI5 pin of U4 is connected with the D5 pin of U5; the DI6 pin of U4 is connected with the D6 pin of U5; the DI7 pin of U4 is connected with the D7 pin of U5, wherein the model of U3 is a single-path 2-input NAND gate SN74LVC1G00, the model of U4 is AL422B, and the model of U5 is OV 7670.
The wake-up execution module 102 comprises an OR gate P2, an OR gate P3 and a diode D1, wherein the pin A of the P2 is connected with the pin PE11 of the U2; the pin B of P2 is connected with the pin PE12 of U2; pin A of P3 is connected with pin Y of P2; the pin B of P3 is connected with the pin PE13 of U2; the Y pin of P3 is connected with the cathode of diode D2; the anode of the diode D2 is connected with the PA0 pin of U1. The functional feedback circuit comprises a load P2, a low-voltage early warning power supply P3, a main power supply P4, a relay K1, an operational amplifier P5 and a resistor R6 to a resistor R8 which are sequentially numbered, wherein one end of the resistor R6 is connected with a pin 2 of the load P2; the other end of the resistor R6 is connected with one end of the resistor R7 and the same-direction end of the operational amplifier P5; the other end of the resistor R7 is grounded; one end of the resistor R8 is connected with the reverse end of the operational amplifier P5, and the other end is connected with the output end of the operational amplifier P5; the output end of the operational amplifier P5 is connected with a PE10 pin of the wake-up control chip U2; the V + end of the operational amplifier P5 is connected with a +12V power supply, and the V-end of the operational amplifier P5 is grounded; the 1 pin of the load P2 is connected with the armature of the relay K1; two ends of an electromagnetic coil of the relay K1 are respectively connected with a PA5 pin and a PA6 pin of the MCU chip U1; a normally closed contact of the relay K1 is connected with a low-voltage early warning power supply P3; the normally open contact of the relay K1 is connected with a main power supply P3, wherein the model of the operational amplifier P5 is LM 358.
When a PA0 pin of the MCU chip U1 receives a wake-up signal, the chip U1 is woken up, the electromagnetic coil of the relay is controlled to generate magnetic force through the PA5 pin and the PA6 pin, the armature is switched to a normally open contact from a normally closed contact, and a main power supply is connected with a load to supply power for a functional circuit; the voltage signal of the functional circuit is collected through the 2 feet of the load, the voltage signal is amplified through the operational amplifier P5 and then transmitted to the awakening control chip U2, when the awakening control chip U2 detects that the functional circuit is in a non-working state, the MCU chip U1 is controlled to enter a dormant state, the magnetic force in the electromagnetic coil of the relay K1 disappears, the armature hits a normally closed contact again, the low-voltage early warning power supply is connected with the load, and low-voltage power supply is carried out on the functional circuit.
The working principle of the invention is as follows: when the MCU chip is in work, the MCU chip set is dormant through the awakening control module; compared with the traditional wake-up circuit control, the invention has high precision and is convenient for the management of the MCU chip set on the mainboard, in addition, the invention is also provided with a multi-dimensional wake-up signal acquisition unit for assisting in judging whether the corresponding chip in the MCU chip set needs to be woken up or not, so as to realize the multi-dimensional automatic control wake-up, and simultaneously, a function feedback circuit is designed for the feedback of the function circuit 105 and assisting in judging whether the corresponding MCU chip U1 in the MCU chip set 101 needs to be in power-off sleep or wake-up, in addition, the invention designs a wake-up execution module for controlling and executing the quick sleep or wake-up action of each MCU chip U1 in the MCU.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit and principle of the present invention are intended to be included within the scope of the present invention.