CN216485106U

CN216485106U - Power-saving acoustic Doppler current profiler

Info

Publication number: CN216485106U
Application number: CN202122715218.3U
Authority: CN
Inventors: 彭东立; 翟文瑞; 程信羲
Original assignee: Jiangsu Hi Target Ocean Information Technology Co ltd
Current assignee: Jiangsu Hi Target Ocean Information Technology Co ltd
Priority date: 2021-11-08
Filing date: 2021-11-08
Publication date: 2022-05-10
Anticipated expiration: 2031-11-08

Abstract

The utility model discloses a power-saving acoustic Doppler current profiler. It includes DSP chip and power module, the DSP chip is connected respectively with host computer and MCU chip based on the UART signal line, the MCU chip is connected with the main power control circuit among the power module, the UART signal line between MCU chip and DSP chip and the host computer is connected, with through detecting the continuous level state of this UART signal line under the dormancy state, judge whether the host computer issues awakening instruction, the MCU chip is after receiving awakening instruction, control main power control circuit is closed, in order to get into operating condition. The utility model can lead the DSP controller to carry out power saving management more flexibly and conveniently, has two sleep awakening methods of an RTC system and an upper computer system, controls the power supply of the system under different working states, and effectively reduces the power consumption of a transmitting state through precise time-sharing power supply management.

Description

Power-saving acoustic Doppler current profiler

Technical Field

The utility model relates to the technical field of acoustic Doppler current profilers, in particular to a power-saving acoustic Doppler current profiler.

Background

The ADCP (acoustic Doppler current profiler) is a device for measuring the water flow velocity developed based on the acoustic Doppler principle, and is used for telemetering the vertical section distribution of the flow velocity according to the Doppler principle, so that no interference is generated on a flow field, no mechanical inertia and no mechanical abrasion exist, and the flow field can be truly reflected. Because ADCP can be used for monitoring the water velocity of flow, in order to satisfy the market demand, develop the power saving function on ADCP current function, can utilize the battery power supply under some rugged environment, realize all-weather real-time data collection under the environment of unmanned on duty. Some products in the market directly cut off the main power supply in the system in order to realize the power saving function, enter a dormant state, and only wake up the system to work in a RTC mode when working regularly. In the instrument and equipment on the market, in order to consider the problem of hardware cost, the internal power supply of the system is rarely optimized in a working state, and the awakening mode is single. Therefore, it is important to design an efficient power saving scheme for ADCP in an unattended operation scenario.

SUMMERY OF THE UTILITY MODEL

The utility model aims to provide a power-saving acoustic Doppler current profiler aiming at the defects in the prior art.

In order to achieve the purpose, the utility model provides a power-saving acoustic Doppler flow profiler which comprises a DSP chip and a power module, wherein the DSP chip is respectively connected with an upper computer and an MCU chip based on a UART signal line, the DSP chip is used for receiving a sleep instruction sent by the upper computer and sending the sleep instruction to the MCU chip, the MCU chip is connected with a main power control circuit in the power module and controls the main power control circuit to be disconnected after receiving the sleep instruction so as to enter a sleep state, the MCU chip is connected with the UART signal line between the DSP chip and the upper computer so as to judge whether the upper computer sends a wake-up instruction or not by detecting the continuous level state of the UART signal line in the sleep state, and the MCU chip controls the main power control circuit to be closed after receiving the wake-up instruction so as to enter a working state.

Further, the DSP chip is connected with an RTC chip, the DSP chip is used for setting timing sleep time and timing wake-up time of the RTC chip, the RTC chip is connected with the MCU chip, and the RTC chip outputs a timing sleep instruction to the MCU chip when reaching the timing sleep time so as to control the main power control circuit to be disconnected after receiving the timing sleep instruction, so as to enter a sleep state; and the RTC chip outputs a timing awakening instruction to the MCU chip when reaching the timing awakening time so as to control the main power control circuit to be closed after the MCU chip receives the timing awakening instruction, so as to enter a working state.

Furthermore, the rear side of the main power control circuit is connected with the input ends of the first power distribution switch chip, the first power distribution switch chip and the third power distribution switch chip, the first power distribution switch chip and the third power distribution switch chip are respectively connected with the DSP chip, the U disk, the FPGA chip and the sensor, and the DSP chip controls the first power distribution switch chip, the first power distribution switch chip and the third power distribution switch chip to be closed intermittently under the working state, so that the U disk, the FPGA chip and the sensor work intermittently.

Further, the RTC chip is connected with the DSP chip based on the SPI interface.

Further, the RTC chip is connected with the MUC chip based on a GPIO interface.

Further, the main power control circuit comprises a resistor Rp11, one end of which is connected with the MPU chip, the other end of the resistor Rp11 is connected with the resistor Rp12 and the base of the transistor Qp3, the other end of the resistor Rp12 and the emitter of the transistor Qp3 are grounded, the collector of the transistor Qp3 is connected with one end of the resistor Rp15, the other end of the resistor Rp15 is respectively connected with one ends of the resistor Rp13 and the resistor Rp14, the other ends of the resistor Rp13 and the resistor Rp14 are respectively connected with the source and the gate of the MOS transistor Qp4, the source of the MOS transistor Qp4 is a power input end, and the drain thereof is a power output end.

Has the advantages that: in the utility model, the factors of complex functions and numerous functional modules of the ADCP system are considered from the aspect of hardware, power supply of each module is independently designed, so that a DSP controller can more flexibly and conveniently perform power saving management, and meanwhile, two system sleep awakening methods of an RTC (real time clock) and an upper computer are also designed, so that the system is more stable; the power supply of the system is controlled under different working states, meanwhile, aiming at the emission state of the instrument, power supply control is carried out on different modules at different time periods through accurate time-sharing power supply management, the power consumption of the emission state is effectively reduced, and therefore the optimization of the whole power consumption of the instrument is achieved.

Drawings

FIG. 1 is a functional block diagram of a power-saving acoustic Doppler flow profiler according to an embodiment of the present invention;

FIG. 2 is a schematic diagram of the connection of the pins of the MCU chip;

FIG. 3 is a schematic diagram of the wiring of the pins of the RTC chip;

FIG. 4 is a schematic diagram of the main circuit of the power supply module;

fig. 5 is a schematic diagram of a power module subcircuit.

Detailed Description

The present invention will be further illustrated with reference to the accompanying drawings and specific examples, which are carried out on the premise of the technical solution of the present invention, and it should be understood that these examples are only for illustrating the present invention and are not intended to limit the scope of the present invention.

As shown in fig. 1 to 5, an embodiment of the present invention provides a power-saving acoustic doppler flow profiler, including a DSP chip 1 and a power module 2, where the DSP chip 1 is connected to an upper computer 3 and an MCU chip 4 respectively based on a UART signal line, the DSP chip 1 is configured to receive a sleep instruction sent by the upper computer 3 and send the sleep instruction to the MCU chip 4, and the MCU chip 4 is connected to a main power control circuit in the power module 2, and after receiving the sleep instruction, controls the main power control circuit to be disconnected, thereby cutting off the main power supply, so that the flow profiler enters a sleep state. It should be noted that the power supply of the MCU chip 4 is not controlled by the main power control circuit, that is, in the sleep state, the DSP chip 1 and other components except the MCU chip 4 are all in the sleep state. MCU chip 4 is connected with the UART signal line between DSP chip 1 and the host computer 3, and under the dormant state, MCU chip 4 judges whether host computer 3 issues awakening instruction through detecting the continuous level state of this UART signal line, and MCU chip 4 controls main power control circuit closure after receiving awakening instruction to make velocity of flow section appearance get into operating condition. Under operating condition, normal measurement work can be accomplished to the velocity of flow section appearance, and DSP chip 1 can receive the various orders that host computer 3 issued during the period, just enters the dormancy state once more when receiving the dormancy order of host computer 3 issue once more.

In order to realize that the timing control flow profiler enters a sleep state and awakens the work of the flow profiler regularly after sleeping, the DSP chip 1 is connected with the RTC chip 5, and specifically, the RTC chip 5 can be connected with the DSP chip 1 based on the SPI interface. DSP chip 1 is used for setting for the timing dormancy time and the timing wake-up time of RTC chip 5, and RTC chip 1 is connected with MCU chip 4, and is specific, and RTC chip 5 can be based on the GPIO interface and be connected with MUC chip 4. And the RTC chip 5 outputs a timing sleep instruction to the MCU chip 4 when reaching the timing sleep time so as to control the main power control circuit to be disconnected after the MCU chip 4 receives the timing sleep instruction, and further control the flow profiler to enter a sleep state. The RTC chip 5 outputs a timing awakening instruction to the MCU chip 4 when reaching the timing awakening time so as to control the main power control circuit to be closed after the MCU chip 4 receives the timing awakening instruction, and further control the flow profiler to enter a working state. In order to prevent the system from being unable to wake up when the RTC chip 5 fails, the priority of the wake-up by the upper computer 3 is highest in both ways of wake-up.

In order to further save electric quantity, the rear side of the main power control circuit is connected with the input ends of the first power distribution switch chip Ud2, the first power distribution switch chip Ud5 and the third power distribution switch chip Ud40, the first power distribution switch chip Ud2, the first power distribution switch chip Ud5 and the third power distribution switch chip Ud40 are respectively connected with the DSP chip 1, the usb disk, the FPGA chip and the sensor, and the DSP chip intermittently controls the first power distribution switch chip Ud2, the first power distribution switch chip Ud5 and the third power distribution switch chip Ud40 to be closed under the working state so that the usb disk, the FPGA chip and the sensor intermittently work. When equipment during operation, accessible host computer 3 sets up transmission interval, at this moment, all can have idle state between the transmission at every turn, and when idle state, 1 accessible control DSP _ EN _ USB of DSP chip, DSP _ EN _ FPGA, DSP _ EN _ Sensor signal line control USB flash disk, FPGA and Sensor power disconnection respectively, open the power before the transmission, close after the transmission finishes. Under the unattended condition, continuous emission is not needed after long-time work, the power module 2 is controlled in an idle state, and the average power consumption of the equipment is further reduced.

The main power control circuit of the embodiment of the utility model comprises a resistor Rp11, one end of which is connected with an MPU chip 4, the other end of the resistor Rp11 is connected with a resistor Rp12 and a base electrode of a triode Qp3, the other end of the resistor Rp12 and an emitter electrode of the triode Qp3 are grounded, a collector electrode of the triode Qp3 is connected with one end of a resistor Rp15, the other end of the resistor Rp15 is respectively connected with one end of a resistor Rp13 and one end of a resistor Rp14, the other ends of the resistor Rp13 and a resistor Rp14 are respectively connected with a source electrode and a grid electrode of an MOS tube Qp4, the source electrode of the MOS tube Qp4 is a power input end, and the drain electrode thereof is a power output end. When the En _ TP pin of the MCU outputs a high level signal, the MOS transistor Qp4 is controlled to be conducted, so that the main circuit of the power module 2 is closed to supply power normally.

The foregoing is only a preferred embodiment of the present invention, and it should be noted that other parts not specifically described are within the prior art or common general knowledge to those of ordinary skill in the art. Without departing from the principle of the utility model, several improvements and modifications can be made, and these improvements and modifications should also be construed as the scope of the utility model.

Claims

1. The utility model provides an acoustics Doppler velocity of flow section appearance of power saving, its characterized in that, includes DSP chip and power module, the DSP chip is connected respectively with host computer and MCU chip based on the UART signal line, the DSP chip is used for receiving the dormancy instruction that the host computer sent to send the dormancy instruction to MCU chip, MCU chip and power module in main power control circuit be connected, and its receiving the dormancy instruction after, control main power control circuit disconnection to get into the dormancy state, the UART signal line between MCU chip and DSP chip and the host computer is connected to through the continuous level state that detects this UART signal line under the dormancy state, judge whether the host computer issues awakening instruction, the MCU chip is receiving awakening instruction after, control main power control circuit is closed, in order to get into operating condition.

2. The power-saving acoustic Doppler flow profiler according to claim 1, wherein the DSP chip is connected with an RTC chip, the DSP chip is used for setting a timing sleep time and a timing wake-up time of the RTC chip, the RTC chip is connected with the MCU chip, and the RTC chip outputs a timing sleep command to the MCU chip when reaching the timing sleep time, so that the MCU chip controls the main power control circuit to be disconnected after receiving the timing sleep command to enter a sleep state; and the RTC chip outputs a timing awakening instruction to the MCU chip when reaching the timing awakening time so as to control the main power control circuit to be closed after the MCU chip receives the timing awakening instruction, so as to enter a working state.

3. The power-saving acoustic doppler flow profiler according to claim 1, wherein the rear side of the main power control circuit is connected to the input terminals of a first power distribution switch chip, and a third power distribution switch chip, the first power distribution switch chip, and the third power distribution switch chip are respectively connected to the DSP chip, the usb disk, the FPGA chip, and the sensor, and the DSP chip intermittently controls the first power distribution switch chip, and the third power distribution switch chip to be turned on in an operating state, so that the usb disk, the FPGA chip, and the sensor intermittently operate.

4. The power-saving acoustic doppler flow profiler according to claim 2, wherein the RTC chip is connected to the DSP chip based on an SPI interface.

5. The power-saving acoustic doppler flow profiler according to claim 2, wherein the RTC chip is connected to the MUC chip based on a GPIO interface.

6. The power-saving acoustic Doppler flow profiler according to claim 1, wherein the main power control circuit comprises a resistor Rp11 having one end connected to the MPU chip, the other end of the resistor Rp11 is connected to a resistor Rp12 and a base of a transistor Qp3, the other end of the resistor Rp12 and an emitter of the transistor Qp3 are grounded, a collector of the transistor Qp3 is connected to one end of the resistor Rp15, the other end of the resistor Rp15 is connected to one end of a resistor Rp13 and one end of a resistor Rp14, the other ends of the resistor Rp13 and the resistor Rp14 are connected to a source and a gate of the MOS transistor Qp4, the source of the MOS transistor Qp4 is a power input end, and the drain of the MOS transistor Qp4 is a power output end.