CN112649833A - Silicon micro-strip detector reading circuit and method - Google Patents

Silicon micro-strip detector reading circuit and method Download PDF

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CN112649833A
CN112649833A CN202011032263.2A CN202011032263A CN112649833A CN 112649833 A CN112649833 A CN 112649833A CN 202011032263 A CN202011032263 A CN 202011032263A CN 112649833 A CN112649833 A CN 112649833A
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CN112649833B (en
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张鑫
徐婉秋
白超平
张帅
孙越强
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National Space Science Center of CAS
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    • G01MEASURING; TESTING
    • G01TMEASUREMENT OF NUCLEAR OR X-RADIATION
    • G01T1/00Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
    • G01T1/16Measuring radiation intensity
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Abstract

The invention discloses a silicon micro-strip detector reading circuit, which is used for reading a signal output by a silicon micro-strip array detector, converting the signal into a digital quantity and then sending the digital quantity to an upper computer for processing, wherein the circuit comprises a front-end electronic circuit, a rear-end data acquisition circuit and a main control circuit; the front-end electronic circuit is used for converting a charge output signal generated by the silicon micro-strip array detector into a voltage signal, then comparing the voltage value with a threshold value, outputting a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value, and simultaneously converting the voltage signal into a serial differential current signal; the back end data acquisition circuit is used for converting the serial differential current signals into digital quantity; and the main control circuit is used for providing enabling signals for the front-end electronic circuit and the rear-end data acquisition circuit after receiving the trigger signal of data acquisition, reading and storing the data output by the rear-end data acquisition circuit, and sending the data to the upper computer.

Description

Silicon micro-strip detector reading circuit and method
Technical Field
The invention relates to the field of silicon microstrip detectors, in particular to a readout circuit and a readout method of a silicon microstrip detector.
Background
Proton, heavy particle, alpha particle and other kinds of high energy particles are common radiation sources in the operating environment of aerospace devices, and these high energy particles can be incident to the sensitive area of a semiconductor device and generate a large amount of charges, so that the logic state of a circuit is changed, even the performance of an integrated circuit is damaged, the whole circuit system cannot work under a normal state, and catastrophic accidents can be caused seriously. According to research statistics, the method comprises the following steps: more than 71% of aerospace electronics experience failures related to the radiation environment in which the electronics operate, with the total number of failures due to single event effects accounting for 55% of the total number of failures.
In order to better judge the relationship between a Single Event (SEU) and the space particle radiation and further perform early warning, the incident position and energy of the space particle need to be known. With the rapid development of semiconductor technology, various semiconductor detectors have a lot of new developments, wherein the development of silicon microstrip detectors is very prominent and is widely applied to experiments of nuclear physics, high-energy physics, celestial physics and the like. The double-sided silicon microstrip detector is widely used due to the advantages of good position and energy resolution, wide linear range and the like: because the charged particle path reconstruction device has good two-dimensional position resolution capability, the charged particle path reconstruction device is adopted by various high-energy physical laboratories in the world as a vertex detector for charged particle path reconstruction; the JINR of Russian Dubna uses it as a telescope to study celestial physics; in the middle-energy heavy ion collision research of high particle multiplicity, the detector can be used as a delta E/E detector for particle identification.
In addition, the development of highly integrated low-noise front-end electronics further promotes the development and improvement of silicon micro-strip detectors, and ASIC chips aiming at different silicon micro-strip detectors are successfully designed and developed in many laboratories in the world, such as an SVX chip adopted by a proton-antiproton collider system CDF in Fermi national laboratory (FNAL), an APV25 chip adopted by a CMS experiment on a large-scale hadron collider in the European Nuclear research Center (CERN), an ABCD3TA chip adopted by an ALTAS experiment and the like.
However, the arrangement of large-area silicon microstrip detectors not only increases the weight of the aerospace vehicle, but also is expensive. With the continuous development of detectors, the scale of experimental devices is getting larger and larger, the requirements on reading electronic systems are also getting higher and higher, and the required electronic reading channels and data acquisition rates are also sharply increased. Conventional electronic systems typically amplify and process the output signal of the detector with an analog quantity, then convert the useful information quantity into a digital quantity by analog-to-digital conversion, and send the digital quantity to a computer or a data acquisition and processing system for processing. Therefore, conventional front-end electronic readout systems built on discrete components take up too much area as the readout channels increase.
Disclosure of Invention
The invention aims to overcome the technical defects and provides a reading circuit and a reading method of a silicon micro-strip detector.
A silicon microstrip detector reading circuit is used for reading signals output by a silicon microstrip array detector, converting the signals into digital quantity and storing the digital quantity, and comprises a front-end electronic circuit, a rear-end data acquisition circuit and a main control circuit;
the front-end electronic circuit is used for converting a charge output signal generated by the silicon micro-strip array detector into a voltage signal, then comparing the voltage value with a threshold value, outputting a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value, and simultaneously converting the voltage signal into a serial differential current signal;
the back end data acquisition circuit is used for converting the serial differential current signals into digital quantity;
and the main control circuit is used for providing enabling signals for the front-end electronic circuit and the rear-end data acquisition circuit after receiving the trigger signal of data acquisition, reading the data output by the rear-end data acquisition circuit and storing the data.
As an improvement of the above apparatus, the front-end electronics circuit comprises: the device comprises a preamplifier circuit, a forming circuit, a sampling hold circuit and a voltage buffer area; the preamplification circuit is connected with 2N data channels of the silicon microstrip array detector; one data channel outputs a charge output signal of one detection unit of the detector; n is the number of the detection units;
the preamplifier circuit is used for performing pulse integration on the current of the two data channels corresponding to the detection unit with particle incidence, converting the charge quantity of an input signal into voltage, and sending the integrated voltage signal into the forming circuit through a capacitor;
the forming circuit is used for converting the voltage signal output by the pre-amplification circuit into a forming pulse, wherein the signal reaches the highest value of the forming pulse within 1.8-2 mu s; sending the shaped pulse to a sample-and-hold circuit;
the sampling Hold circuit consists of an analog switch and a capacitor, when the Hold signal Hold is invalid, the analog switch is always in a conducting state, the voltage on the capacitor is the output voltage of the forming circuit, and when the Hold signal Hold is valid, the analog switch is not in a disconnecting state, and the voltage on the capacitor is kept unchanged;
the voltage buffer includes: the circuit comprises a comparison circuit, an analog multiplexer and a differential analog current output buffer; the comparison circuit is used for comparing the voltage value with a threshold value, and outputting a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value; the analog multiplexer is used for switching the voltage to the differential analog current output buffer after receiving a control reading signal shift _ in _ b of the main control circuit; and the differential analog current output buffer is used for generating and outputting a differential current value, and the magnitude of the current value is in direct proportion to the charge value input by the silicon micro-strip array detector.
As an improvement of the above apparatus, the back-end data acquisition circuit includes: the differential current-to-analog voltage sub-circuit and the analog-to-digital voltage sub-circuit;
the differential current-to-analog voltage sub-circuit comprises two feedback resistors and a subtracter, wherein the two feedback resistors convert a differential current value into differential voltage, and the differential voltage is converted into single-ended voltage through the subtracter and output to the analog voltage-to-digital sub-circuit;
the analog-to-digital sub-circuit comprises: the analog-to-digital conversion ADC is used for converting the analog voltage into a digital quantity; the power consumption of the analog-to-digital conversion ADC is 100mW, the sampling rate is 220KHz, the resolution is 16 bits, and the input dynamic range is-10V to +10V under the condition of +5V single power supply;
the analog-to-digital converter ADC is controlled by two input signals: reading/converting input signals
Figure BDA0002704112230000031
And chip select input signal
Figure BDA0002704112230000032
Wherein the content of the first and second substances,
Figure BDA0002704112230000033
for controlling the analog-to-digital conversion process and the reading of the output data when
Figure BDA0002704112230000034
The content of the organic acid is low,
Figure BDA0002704112230000035
the falling edge starts to switch; when in use
Figure BDA0002704112230000036
The height of the steel is high,
Figure BDA0002704112230000037
the falling edge outputs data; when in use
Figure BDA0002704112230000038
Is low in the content of the content,
Figure BDA0002704112230000039
the falling edge starts sampling conversion;
Figure BDA00027041122300000310
outputting rising edge data; when in use
Figure BDA00027041122300000311
When high, the data output bit is in a high impedance state; in will
Figure BDA00027041122300000312
Before the falling edge of the pulse is applied to the analog-to-digital conversion ADC, the pulse is required to be transmitted
Figure BDA00027041122300000313
Pulling down the signal by at least 10 ns; when the two input signals are applied to the analog-to-digital conversion ADC, the output signal of the analog-to-digital conversion ADC
Figure BDA00027041122300000314
Will go low and remain low until the transition is complete; after 4 mus
Figure BDA00027041122300000315
The high level will be returned again when the parallel data is valid on the analog to digital conversion ADC output.
As an improvement of the above device, the main control circuit is an FPGA chip, and the specific control process includes:
after receiving a trigger signal of the front-end electronic circuit, activating a hold signal hold and sending the hold signal hold to the front-end electronic circuit; then activating a control reading signal shift _ in _ b and a clock signal ck _ b, wherein the control reading signal shift _ in _ b is used for selecting the analog multiplexer to be switched to the differential analog current output buffer; activating a read/convert input signal when the clock signal ck _ b is at a falling edge
Figure BDA00027041122300000316
And chip select input signal
Figure BDA00027041122300000317
And collecting 16-bit data output by the analog-to-digital conversion ADC, judging whether the 16-bit data is data output by a data channel corresponding to the silicon micro-strip array detector, if so, storing the 16-bit data, and otherwise, discarding the data.
The invention also provides a silicon micro-strip detector reading method, which is realized based on the circuit and comprises the following steps:
after the space particles are incident to the silicon microstrip array detector, energy is deposited in a detection unit to generate charges;
the front-end electronic circuit converts charge output signals of the two data channels into voltage signals, then compares a voltage value with a threshold value, outputs a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value, and simultaneously converts the voltage signals into serial differential current signals; the back-end data acquisition circuit converts the serial differential current signal into a digital quantity;
after receiving a trigger signal of the front-end electronic circuit, the FPGA chip activates a hold signal hold and sends the hold signal hold to the front-end electronic circuit; when the hold signal arrives, the output of a shaping circuit in the front-end electronic circuit just reaches the peak value, and the peak voltage is kept in the capacitor;
the FPGA chip then activates the control reading signal shift _ in _ b and the clock signal ck _ b,
the front-end electronic circuit shifts and outputs the peak voltage of each data channel in turn under the action of ck _ b, and reads/converts the input signal at each falling edge of ck _ b
Figure BDA00027041122300000318
And chip select input signal
Figure BDA00027041122300000319
At this point the analog-to-digital converter ADC begins conversion,
Figure BDA0002704112230000041
the height is reduced, and after the conversion is finished,
Figure BDA0002704112230000042
changing high and outputting 16bit digital quantity;
the FPGA chip collects 16bit data, whether the 16bit data are output data of a data channel corresponding to the silicon micro-strip array detector or not is judged, if yes, the 16bit data are stored, and if not, the data are discarded.
The invention has the advantages that:
the invention adopts a special high-integration ASIC chip to carry out charge integration, forming, amplification and holding on an output signal, then digitalizes the output signal by an analog-to-digital conversion device, and finally receives and uploads and stores the digitalized code value through an FPGA and the like; the area occupied by the reading circuit is greatly reduced, and the reading value is more accurate and stable.
Drawings
FIG. 1 is a block diagram of a silicon microstrip detector and a separate circuit of the present invention;
FIG. 2 is a diagram of a silicon micro-strip sensor according to the present invention;
FIG. 3 is a schematic diagram of a silicon micro-strip array probe unit according to the present invention;
FIG. 4 shows the output signals of the silicon micro-strip array detecting unit of the present invention;
FIG. 5 is a schematic timing diagram of an "all channel sample-hold read" mode;
FIG. 6 is a differential current-analog voltage schematic;
FIG. 7 is a schematic diagram of analog voltage to digital conversion;
FIG. 8 shows the use
Figure BDA0002704112230000043
A schematic diagram controlling the conversion and reading;
fig. 9 is a flow chart of a readout method of the silicon microstrip detector of the present invention.
Detailed Description
The technical solution of the present invention will be described in detail below with reference to the accompanying drawings.
As shown in fig. 1, the present invention provides a readout circuit of a silicon microstrip detector, which is used for reading out signals output by a silicon microstrip array detector, converting the signals into digital quantities, and storing the digital quantities, wherein the readout circuit comprises a front-end electronic circuit, a back-end data acquisition circuit and a main control circuit;
the front-end electronic circuit is used for converting a charge output signal generated by the silicon micro-strip array detector into a voltage signal, then comparing the voltage value with a threshold value, outputting a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value, and simultaneously converting the voltage signal into a serial differential current signal;
the back end data acquisition circuit is used for converting the serial differential current signals into digital quantity;
and the main control circuit is used for providing enabling signals for the front-end electronic circuit and the rear-end data acquisition circuit after receiving the trigger signal of data acquisition, reading and storing the data output by the rear-end data acquisition circuit, and sending the data to the upper computer.
1. Silicon micro-strip array detector
The silicon microstrip array detector consists of 2 silicon microstrip sensors, each having 5 detection units (10mm × 10mm), as shown in fig. 2.
The two silicon micro-strip sensors form a 5 multiplied by 5 micro-strip array in a vertical, horizontal and vertical crossing mode, each micro-strip has the size of 2mm multiplied by 2mm, and signals can be independently output. The structure of the silicon micro-strip array detector is shown in FIG. 3: from top to bottom are silicon microstrip sensor 1 and silicon microstrip sensor 2 in proper order, and silicon microstrip sensor 1 and the perpendicular alternately overall arrangement of silicon microstrip sensor 2, and wherein silicon microstrip sensor 1 realizes the location in the X direction, and silicon microstrip sensor 2 realizes the location in the Y direction, and both combine to realize the location of space particle.
The positioning process is that under the ionization action of space particle radiation, electron-hole pairs are formed in the sensor and are collected to the output end of the sensor under the action of a high-voltage electric field in the sensor to generate a charge output signal. Each micro strip can independently output signals, so that 10 paths of output signals are totally used for dividing the silicon micro strip array detector into 25 parts, and the incident position of the space particle can be positioned by reading the value of the output signals. As shown in fig. 4, if there is a signal output from X1 or Y1, the particles are incident on portion (i); if X2 and Y3 have signals to be output, the particles are incident into the part (b); … … and so on.
2. Front-end electronics circuit
As described above, the silicon micro-strip array detector has 10 circuits of charge output signals, and in order to read out the output signals, a charge integration type ASIC chip IDE3160 is selected as a front-end electronics unit.
IDE3160 is a multi-channel, highly integrated charge measurement chip using charge-voltage technology circuitry, with the main parameters shown in Table 1.
TABLE 1 Main parameters of IDE3160
Parameter(s) Typical value
Number of channels 32
Dynamic range -5pC~+13pC
Noise level 3516e+7.6e/pF
Differential output gain 0.14uA/fC
Power consumption 203mW
The charge measurement channel of the IDE3160 is mainly composed of a preamplifier (Pre-Amplifier), a shaping circuit (Shaper), a sample-and-hold circuit (S/H), and a voltage Buffer (Buffer). When the circuit works, the preamplifier integrates the input current pulse, and the charge quantity of the input signal is converted into voltage. The integrated voltage signal is sent into a forming circuit through a capacitor, the height (peak value) of the forming pulse is in direct proportion to the output of a preamplifier, and the signal reaches the maximum value in about 1.8-2 mu s. The forming pulse is sent to a sampling holding circuit for holding, the sampling holding circuit consists of an analog switch and a capacitor, when a holding signal is invalid Hold, the analog switch is always in a conducting state, the voltage obtained on the capacitor is the output voltage of the forming amplifier, when the holding signal Hold is valid, the analog switch is not in a disconnecting state, the voltage on the capacitor is kept unchanged, and finally, under the action of a control signal, a differential current value is output through an output circuit of a Buffer, and the magnitude of the current value is in direct proportion to the charge value input by a detector.
IDE3160 has three modes of operation, here we choose the "full channel sample-hold read" mode: the radiation sensor generates a current pulse in the channel N due to interaction with ionizing radiation. The chip generates a trigger, namely ta rises; after the current pulse is generated, the external system activates hold for a period of time, and at the rising edge of hold, the shaper output is sampled and held. The external system then activates shift _ in _ b and generates a falling edge at ck _ b, at which time the sampled pulse height for channel 0 occurs at outm and outp. The falling edge of ck b switches the sampling pulse height of the next channel to the analog output buffer. For channel N, which receives current, the sampling pulse height is greater than for the other channels that do not receive current. On the 32 rising edges of the ck _ b, the signal shift _ out _ b is active. The external system applies one more cycle at ck _ b, generating a pulse at shift _ out _ b. As shown in fig. 5.
3. Back-end data acquisition circuit
The back-end data acquisition circuit consists of two parts of converting differential current into analog voltage and converting the analog voltage into digital voltage.
3.1 differential Current to analog Voltage
The multi-channel charge output signal generated by the silicon microstrip array detector is converted into a serial differential current signal through the front-end electronics unit, and is converted into a single-ended voltage for reading convenience, as shown in fig. 6.
A structure using a transimpedance amplifierThe differential current is converted into differential voltage on feedback resistors R30 and R31 respectively, and then converted into single-ended voltage through a subtracter. In order to suppress common mode noise, the upper and lower branches should be as symmetrical as possible. When R30-R31, R27-R29, R34/R32-R35/R33, the output voltage V isinComprises the following steps:
Vin=R34/R32×R30×(outp-outm)
therefore, when the differential currents outp and outm are output, the dynamic range of the analog output voltage can be changed by adjusting the corresponding resistance values.
3.2 analog to digital conversion
Analog voltage is converted into digital quantity through the analog-to-digital conversion ADC, and an upper PC is convenient to analyze data. Here, AD976A is selected as the analog-to-digital converter ADC. The power consumption of the AD976A is 100mW, the sampling rate is about 220KHz, the resolution is 16 bits, and the input dynamic range is-10V- +10V under the condition of +5V single power supply. The method is mainly characterized in that an ADC, a reference power supply and a clock are integrated on a chip, and meanwhile, a switched capacitor/charge redistribution structure is adopted, so that internal nonlinearity can be corrected by internal automatic correction logic. The analog voltage to digital schematic is shown in fig. 7.
AD976A is controlled by two signals:
Figure BDA0002704112230000061
and
Figure BDA0002704112230000062
as used herein
Figure BDA0002704112230000063
To control the conversion process and the reading of the output data as shown in fig. 8. In will
Figure BDA0002704112230000064
Before the falling edge of the pulse (50 ns wide) is applied to the ADC, it is necessary to apply
Figure BDA0002704112230000065
The signal is pulled low for at least 10 ns. Once the two pulses have been applied, the pulse is,
Figure BDA0002704112230000066
will go low and remain low until the transition is complete. After 4 mus
Figure BDA0002704112230000067
The high level will be returned again when the parallel data is active on the ADC output.
4. Master control circuit
The main control circuit is an FPGA chip, and the control flow comprises the following steps:
after receiving a trigger signal of the front-end electronic circuit, activating a hold signal hold and sending the hold signal hold to the front-end electronic circuit; then activating a control reading signal shift _ in _ b and a clock signal ck _ b, wherein the control reading signal shift _ in _ b is used for selecting the analog multiplexer to be switched to the differential analog current output buffer; activating a read/convert input signal when the clock signal ck _ b is at a falling edge
Figure BDA0002704112230000071
And chip select input signal
Figure BDA0002704112230000072
And collecting 16-bit data output by the analog-to-digital conversion ADC, judging whether the 16-bit data is data output by a data channel corresponding to the silicon micro-strip array detector, if so, storing the 16-bit data, and otherwise, discarding the data.
As shown in fig. 9, the present invention further provides a readout method for a silicon microstrip detector, which is implemented based on the above circuit, and includes:
after the space particles are incident to the silicon microstrip array detector, energy is deposited in a detection unit to generate charges;
the front-end electronic circuit converts charge output signals of the two data channels into voltage signals, then compares a voltage value with a threshold value, outputs a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value, and simultaneously converts the voltage signals into serial differential current signals; the back-end data acquisition circuit converts the serial differential current signal into a digital quantity;
after receiving a trigger signal of the front-end electronic circuit, the FPGA chip activates a hold signal hold and sends the hold signal hold to the front-end electronic circuit; when the hold signal arrives, the output of a shaping circuit in the front-end electronic circuit just reaches the peak value, and the peak voltage is kept in the capacitor;
the FPGA chip then activates the control reading signal shift _ in _ b and the clock signal ck _ b,
the front-end electronic circuit shifts and outputs the peak voltage of each data channel in turn under the action of ck _ b, and reads/converts the input signal at each falling edge of ck _ b
Figure BDA0002704112230000073
And chip select input signal
Figure BDA0002704112230000074
At this point the analog-to-digital converter ADC begins conversion,
Figure BDA0002704112230000075
the height is reduced, and after the conversion is finished,
Figure BDA0002704112230000076
changing high and outputting 16bit digital quantity;
the FPGA chip collects 16bit data, whether the 16bit data are output data of a data channel corresponding to the silicon micro-strip array detector or not is judged, if yes, the 16bit data are stored, and if not, the data are discarded.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention and are not limited. Although the present invention has been described in detail with reference to the embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (5)

1. A silicon microstrip detector reading circuit is used for reading signals output by a silicon microstrip array detector, converting the signals into digital quantity and storing the digital quantity, and is characterized in that the circuit comprises a front-end electronic circuit, a rear-end data acquisition circuit and a main control circuit;
the front-end electronic circuit is used for converting a charge output signal generated by the silicon micro-strip array detector into a voltage signal, then comparing the voltage value with a threshold value, outputting a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value, and simultaneously converting the voltage signal into a serial differential current signal;
the back end data acquisition circuit is used for converting the serial differential current signals into digital quantity;
and the main control circuit is used for providing enabling signals for the front-end electronic circuit and the rear-end data acquisition circuit after receiving the trigger signal of data acquisition, reading the data output by the rear-end data acquisition circuit and storing the data.
2. The silicon microstrip detector readout circuit of claim 1 wherein the front-end electronics comprises: the device comprises a preamplifier circuit, a forming circuit, a sampling hold circuit and a voltage buffer area; the preamplification circuit is connected with 2N data channels of the silicon microstrip array detector; one data channel outputs a charge output signal of one detection unit of the detector; n is the number of the detection units;
the preamplifier circuit is used for performing pulse integration on the current of the two data channels corresponding to the detection unit with particle incidence, converting the charge quantity of an input signal into voltage, and sending the integrated voltage signal into the forming circuit through a capacitor;
the forming circuit is used for converting the voltage signal output by the pre-amplification circuit into a forming pulse, wherein the signal reaches the highest value of the forming pulse within 1.8-2 mu s; sending the shaped pulse to a sample-and-hold circuit;
the sampling Hold circuit consists of an analog switch and a capacitor, when the Hold signal Hold is invalid, the analog switch is always in a conducting state, the voltage on the capacitor is the output voltage of the forming circuit, and when the Hold signal Hold is valid, the analog switch is not in a disconnecting state, and the voltage on the capacitor is kept unchanged;
the voltage buffer includes: the circuit comprises a comparison circuit, an analog multiplexer and a differential analog current output buffer; the comparison circuit is used for comparing the voltage value with a threshold value, and outputting a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value; the analog multiplexer is used for switching the voltage to the differential analog current output buffer after receiving a control reading signal shift _ in _ b of the main control circuit; and the differential analog current output buffer is used for generating and outputting a differential current value, and the magnitude of the current value is in direct proportion to the charge value input by the silicon micro-strip array detector.
3. The silicon microstrip detector readout circuit of claim 2 wherein said back-end data acquisition circuitry comprises: the differential current-to-analog voltage sub-circuit and the analog-to-digital voltage sub-circuit;
the differential current-to-analog voltage sub-circuit comprises two feedback resistors and a subtracter, wherein the two feedback resistors convert a differential current value into differential voltage, and the differential voltage is converted into single-ended voltage through the subtracter and output to the analog voltage-to-digital sub-circuit;
the analog-to-digital sub-circuit comprises: the analog-to-digital conversion ADC is used for converting the analog voltage into a digital quantity; the power consumption of the analog-to-digital conversion ADC is 100mW, the sampling rate is 220KHz, the resolution is 16 bits, and the input dynamic range is-10V to +10V under the condition of +5V single power supply;
the analog-to-digital converter ADC is controlled by two input signals: reading/converting input signals
Figure FDA0002704112220000021
And chip select input signal
Figure FDA0002704112220000022
Wherein the content of the first and second substances,
Figure FDA0002704112220000023
for controlling the analog-to-digital conversion process and the reading of the output data when
Figure FDA0002704112220000024
The content of the organic acid is low,
Figure FDA0002704112220000025
the falling edge starts to switch; when in use
Figure FDA0002704112220000026
The height of the steel is high,
Figure FDA0002704112220000027
the falling edge outputs data; when in use
Figure FDA0002704112220000028
Is low in the content of the content,
Figure FDA0002704112220000029
the falling edge starts sampling conversion;
Figure FDA00027041122200000210
outputting rising edge data; when in use
Figure FDA00027041122200000211
When high, the data output bit is in a high impedance state; in will
Figure FDA00027041122200000212
Before the falling edge of the pulse is applied to the analog-to-digital conversion ADC, the pulse is required to be transmitted
Figure FDA00027041122200000213
Pulling down the signal by at least 10 ns; when the two input signals are applied to the analog-to-digital conversion ADC, the output signal of the analog-to-digital conversion ADC
Figure FDA00027041122200000214
Will go low and remain low until the transition is complete; after 4 mus
Figure FDA00027041122200000215
The high level will be returned again when the parallel data is valid on the analog to digital conversion ADC output.
4. The silicon microstrip detector readout circuit according to claim 3, wherein the main control circuit is an FPGA chip, and the specific control process comprises:
after receiving a trigger signal of the front-end electronic circuit, activating a hold signal hold and sending the hold signal hold to the front-end electronic circuit; then activating a control reading signal shift _ in _ b and a clock signal ck _ b, wherein the control reading signal shift _ in _ b is used for selecting the analog multiplexer to be switched to the differential analog current output buffer; activating a read/convert input signal when the clock signal ck _ b is at a falling edge
Figure FDA00027041122200000216
And chip select input signal
Figure FDA00027041122200000217
And collecting 16-bit data output by the analog-to-digital conversion ADC, judging whether the 16-bit data is data output by a data channel corresponding to the silicon micro-strip array detector, if so, storing the 16-bit data, and otherwise, discarding the data.
5. A silicon microstrip detector readout method implemented based on the silicon microstrip detector readout circuit of claim 4, the method comprising:
after the space particles are incident to the silicon microstrip array detector, energy is deposited in a detection unit to generate charges;
the front-end electronic circuit converts charge output signals of the two data channels into voltage signals, then compares a voltage value with a threshold value, outputs a trigger signal for data acquisition to the main control circuit if the voltage value exceeds the threshold value, and simultaneously converts the voltage signals into serial differential current signals; the back-end data acquisition circuit converts the serial differential current signal into a digital quantity;
after receiving a trigger signal of the front-end electronic circuit, the FPGA chip activates a hold signal hold and sends the hold signal hold to the front-end electronic circuit; when the hold signal arrives, the output of a shaping circuit in the front-end electronic circuit just reaches the peak value, and the peak voltage is kept in the capacitor;
the FPGA chip then activates the control reading signal shift _ in _ b and the clock signal ck _ b,
the front-end electronic circuit shifts and outputs the peak voltage of each data channel in turn under the action of ck _ b, and reads/converts the input signal at each falling edge of ck _ b
Figure FDA0002704112220000031
And chip select input signal
Figure FDA0002704112220000032
At this point the analog-to-digital converter ADC begins conversion,
Figure FDA0002704112220000033
the height is reduced, and after the conversion is finished,
Figure FDA0002704112220000034
changing high and outputting 16bit digital quantity;
the FPGA chip collects 16bit data, whether the 16bit data are output data of a data channel corresponding to the silicon micro-strip array detector or not is judged, if yes, the 16bit data are stored, and if not, the data are discarded.
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