CN112639601A - Dual-function circuit, display panel, test method of display panel and electrostatic protection method of display panel - Google Patents

Dual-function circuit, display panel, test method of display panel and electrostatic protection method of display panel Download PDF

Info

Publication number
CN112639601A
CN112639601A CN201880095912.8A CN201880095912A CN112639601A CN 112639601 A CN112639601 A CN 112639601A CN 201880095912 A CN201880095912 A CN 201880095912A CN 112639601 A CN112639601 A CN 112639601A
Authority
CN
China
Prior art keywords
thin film
film transistor
sub
signal
display panel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201880095912.8A
Other languages
Chinese (zh)
Inventor
张盛鹉
张祖强
倪杰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Royole Technologies Co Ltd
Original Assignee
Shenzhen Royole Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Royole Technologies Co Ltd filed Critical Shenzhen Royole Technologies Co Ltd
Publication of CN112639601A publication Critical patent/CN112639601A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device

Abstract

The invention provides a dual-function circuit (10), which comprises at least one sub-circuit unit (100), wherein each sub-circuit unit (100) is connected with a corresponding sub-pixel unit (100) through a corresponding data line (30) of a display panel (20); when the test function is performed, each sub-circuit unit (10) transmits a test signal to the corresponding sub-pixel unit (100) through the corresponding data line (30) so as to test the corresponding sub-pixel unit (100); when the sub-pixel unit is in the electrostatic protection function, each sub-circuit unit (10) receives the electrostatic signal of the corresponding sub-pixel unit (100) through the corresponding data line (30) and discharges the electrostatic signal. The invention also provides a display panel and a testing method and an electrostatic protection method thereof. The dual-function circuit provided by the invention has a test function and an electrostatic protection function for the sub-pixel units in the display panel, so that the number of devices in the display panel or the circuit wiring can be reduced, and the space can be saved.

Description

Dual-function circuit, display panel, test method of display panel and electrostatic protection method of display panel Technical Field
The invention belongs to the technical field of display, and particularly relates to a dual-function circuit, a display panel, a test method of the display panel and an electrostatic protection method of the display panel.
Background
With the development of display technology, display panel products of organic light emitting display or liquid crystal light emitting display are widely applied to the fields of work, life, operation, aerospace and the like, such as liquid crystal televisions, digital televisions, computers, mobile phones, vehicle-mounted displays, cameras, electronic watches, calculators and the like. The production line of the display panel comprises a dot screen testing procedure which is mainly used for detecting bad phenomena, including various spots, blocks, stains and the like, of the display screen in the preparation process. When the display panel works normally, an electrostatic discharge phenomenon also exists, and the electrostatic discharge can cause the damage of electronic elements in the display panel, so that the problem of function failure is caused. The circuit that has the point screen test to display panel alone among the prior art, perhaps carry out the circuit of static protection to display panel alone, but the test circuit and the static protection circuit that set up alone can occupy more wiring space.
Disclosure of Invention
In view of this, the present invention provides a dual-function circuit having both a testing function and an electrostatic protection function, so as to save the routing space. The specific technical scheme is as follows.
A dual function circuit comprising at least one sub-circuit unit, each sub-circuit unit being connected to a corresponding sub-pixel unit by a corresponding data line of a display panel;
when the dual-function circuit is in a test function, each sub-circuit unit transmits a test signal to the corresponding sub-pixel unit through the corresponding data line of the display panel so as to test the corresponding sub-pixel unit;
when the dual-function circuit is in the electrostatic protection function, each sub-circuit unit receives the electrostatic signal of the corresponding sub-pixel unit through the corresponding data line of the display panel and releases the electrostatic signal.
Preferably, each sub-circuit unit includes a first terminal, a second terminal, a third terminal and a fourth terminal, wherein the fourth terminal is used for connecting with a corresponding data line of the display panel and connecting with a corresponding sub-pixel unit;
when the dual-function circuit is in a test function, the first end is connected with a first control signal, the second end is connected with a second control signal, and when the third end is connected with a test signal, the sub-circuit unit transmits the test signal to the fourth end from the third end under the control of the first control signal and the second control signal, and transmits the test signal to a data line of the display panel through the fourth end so as to test a corresponding sub-pixel unit of the display panel.
Preferably, each sub-circuit unit includes a first terminal, a second terminal, a third terminal and a fourth terminal, wherein the fourth terminal is used for connecting with a corresponding data line of the display panel and connecting with a corresponding sub-pixel unit;
when the dual-function circuit is in an electrostatic protection function, the first end is connected to a first level signal, the second end is connected to a second level signal, the third end is connected to a third level signal, and the sub-circuit unit releases an electrostatic signal transmitted by the data line received at the fourth end under the control of the first level signal, the second level signal and the third level signal.
Preferably, the sub-circuit unit includes a first thin film transistor and a second thin film transistor;
the first thin film transistor is connected with the second thin film transistor, the first end and the fourth end, and the second thin film transistor is also connected with the second end, the third end and the fourth end;
when the dual-function circuit is in a test function, the first end is connected with a first control signal, the second end is connected with a second control signal, when the third end is connected with a test signal, the first control signal controls the first thin film transistor to be turned off, the second control signal controls the second thin film transistor to be turned on, the test signal connected with the third end is transmitted to the fourth end through the turned-on second thin film transistor, and the test signal is transmitted to a data line of the display panel through the fourth end so as to be used for testing a corresponding sub-pixel unit of the display panel.
Preferably, the sub-circuit unit includes a first thin film transistor and a second thin film transistor;
the first thin film transistor is connected with the second thin film transistor, the first end and the fourth end, and the second thin film transistor is also connected with the second end, the third end and the fourth end;
when the dual-function circuit is in an electrostatic protection function, the first thin film transistor is in a cut-off or cut-off state according to the electrostatic signal received by the fourth terminal and the first level signal received by the first terminal, and the second thin film transistor is in a cut-on or cut-off state according to the electrostatic signal received by the fourth terminal, the second level signal received by the second terminal and the third level signal received by the third terminal; the electrostatic signal is released through the first thin film transistor or the second thin film transistor which is in a conducting state.
Preferably, the first thin film transistor and the second thin film transistor respectively include a gate, a first pole and a second pole;
the grid electrode of the first thin film transistor is connected with the fourth end, the first pole of the first thin film transistor is connected with the first end, and the second pole of the first thin film transistor is connected with the fourth end; the grid electrode of the second thin film transistor is connected with the second end, the first pole of the second thin film transistor is connected with the third end, and the second pole of the second thin film transistor is connected with the fourth end.
Preferably, when the dual function circuit is in the test function, the first control signal is a high level signal, the second control signal is a high level signal, the first thin film transistor is an N-type transistor, and the second thin film transistor is an N-type transistor.
Preferably, when the dual function circuit is in the test function, the first control signal is a low level signal, the second control signal is a low level signal, the first thin film transistor is a P-type transistor, and the second thin film transistor is a P-type transistor.
Preferably, when the dual function circuit is in the electrostatic protection function; the first level signal is greater than the second level signal and the third level signal; when the voltage value of the electrostatic signal is greater than that of a first level signal, the first thin film transistor is turned on, the second thin film transistor is turned off, and the electrostatic signal is released from the fourth end to the first end through the turned-on first thin film transistor; when the voltage value of the electrostatic signal is smaller than the voltage values of the second level signal and the third level signal, the first thin film transistor is turned off, the second thin film transistor is turned on, and the electrostatic signal is released from the third end to the first end through the turned-on second thin film transistor.
Preferably, every three sub-circuit units form a circuit unit, each circuit unit corresponds to one pixel unit in the display panel, and the three sub-circuit units forming the circuit unit are respectively connected with the red sub-pixel unit, the green sub-pixel unit and the blue sub-pixel unit in the corresponding pixel unit.
Preferably, a first terminal of each of the three sub-circuit units is connected to the same first control signal or the same first level signal, and a second terminal of each of the three sub-circuit units is connected to the same second control signal or the same second level signal.
Preferably, the third terminals of the three sub-circuit units are respectively connected with different test signal lines or different third level signal lines.
The invention also provides a display panel comprising the dual function circuit as described in any of the above.
Preferably, the display panel further includes a display area and a non-display area, and the display panel further includes:
an output line connected to the pixels in the display area and disposed in the non-display area;
the dual-function circuit is arranged on one side of the output circuit, which is far away from the display area, and is arranged in the non-display area.
Preferably, the non-display area of the display panel further includes a binding area, the binding area is connected to the output line, and the binding area is disposed on a side of the output line away from the display area; the dual-function circuit is connected with the binding region and is arranged on one side of the binding region, which is far away from the output line.
The invention also provides a test method of the display panel, the display panel comprises a dual-function circuit, the dual-function circuit comprises at least one sub-circuit unit, and each sub-circuit unit is connected with the corresponding sub-pixel unit through the corresponding data line of the display panel; the sub-circuit unit comprises a first end, a second end, a third end and a fourth end, wherein the fourth end is used for being connected with a corresponding data line of the display panel and connected with a corresponding sub-pixel unit; the test method of the display panel comprises the following steps:
providing a first control signal to the first terminal; and
providing a second control signal to the second terminal; and
providing a test signal to the third terminal;
and controlling the test signal to be transmitted from the third end to the fourth end according to the first control signal and the second control signal, and transmitting the test signal to a data line of the display panel through the fourth end so as to test a corresponding sub-pixel unit of the display panel.
Preferably, the sub-circuit unit includes a first thin film transistor and a second thin film transistor; the first thin film transistor is connected with the second thin film transistor, the first end and the fourth end, and the second thin film transistor is also connected with the second end, the third end and the fourth end;
the "controlling the test signal to be transmitted from the third terminal to the fourth terminal according to the first control signal and the second control signal" includes:
the first control signal controls the first thin film transistor to be turned off, the second control signal controls the second thin film transistor to be turned on, and the test signal is transmitted to the second thin film transistor through the third terminal and is transmitted to the fourth terminal through the second thin film transistor.
The invention also provides an electrostatic protection method of the display panel, wherein the display panel comprises a dual-function circuit, the dual-function circuit comprises at least one sub-circuit unit, and each sub-circuit unit is connected with a corresponding sub-pixel unit through a corresponding data line of the display panel; the sub-circuit unit comprises a first end, a second end, a third end and a fourth end, wherein the fourth end is used for being connected with a corresponding data line of the display panel and connected with a corresponding sub-pixel unit; the test method of the display panel comprises the following steps:
providing a first level signal to the first terminal; and
providing a second level signal to the second terminal; and
providing a third level signal to the third terminal;
and controlling the electrostatic signal transmitted by the data line received by the fourth terminal to be released according to the first level signal, the second level signal and the third level signal.
The invention has the beneficial effects that: compared with the circuit which only can realize the test function or the electrostatic protection function independently, the dual-function circuit provided by the invention can reduce the number of devices in the display panel or reduce circuit wiring, and can save space.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic diagram of a dual-function circuit according to a first embodiment of the present invention.
Fig. 2 is a schematic diagram of another dual-function circuit according to the first embodiment of the present invention.
Fig. 3 is a schematic diagram of a dual-function circuit in a test function according to the present invention.
Fig. 4 is a schematic diagram of another dual function circuit provided by the present invention in a test function.
Fig. 5 is a schematic diagram of the dual-function circuit in an electrostatic discharge protection function.
Fig. 6 is a schematic diagram of another dual-function circuit provided by the present invention in an electrostatic discharge protection function.
Fig. 7 is a schematic diagram of a dual-function circuit according to a second embodiment of the present invention.
FIG. 8 is a signal timing diagram of the dual function circuit in the test phase according to the second embodiment.
Fig. 9 is a level signal diagram of the dual function circuit in the electrostatic discharge protection stage according to the second embodiment.
Fig. 10 is a schematic view of a display panel according to the present invention.
Fig. 11 is a flowchart of a testing method of a display panel according to the present invention.
Fig. 12 is a flowchart of an electrostatic discharge protection method for a display panel according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," and the like in the description and in the claims, and in the drawings, are used for distinguishing between different objects and not necessarily for describing a particular sequential order. Furthermore, the terms "include" and "have," as well as any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. It is explicitly and implicitly understood by one skilled in the art that the embodiments described herein can be combined with other embodiments.
Referring to fig. 1, a dual function circuit 10 according to a first embodiment of the present invention includes at least one sub-circuit unit 100, and each sub-circuit unit 100 is connected to a corresponding sub-pixel unit 40 through a corresponding data line 30 of a display panel 20.
When the dual function circuit 10 is in the test function, each sub-circuit unit 100 transmits a test signal to the corresponding sub-pixel unit 40 through the corresponding data line 30 of the display panel 20 to test the corresponding sub-pixel unit 40. It can be understood that, when a test signal is input for testing, if the corresponding sub-pixel unit 40 is not lit, it indicates that the sub-pixel unit 40 is damaged or the line from the test signal to the sub-pixel unit 40 is damaged, and if the corresponding sub-pixel unit 40 is lit, it indicates that the line or the device from the test signal to the sub-pixel unit 40 has good performance and is not damaged, so as to achieve the purpose of testing.
When the dual function circuit 10 is in the esd protection function, each sub-circuit unit 100 receives the electrostatic signal of the corresponding sub-pixel unit 40 through the corresponding data line 30 of the display panel 20 and discharges the electrostatic signal. When the display panel 20 is in normal operation, the sub-pixel unit will generate electrostatic discharge, which will damage the electronic components connected to the sub-pixel unit, and further disable the functions of the components in the display panel 20, so that the electrostatic discharge needs to be protected, and the dual-function circuit 10 of the present invention can be used to release the electrostatic signal of the sub-pixel unit 40 to achieve the purpose of protection. It is understood that the electrostatic signal may be a high voltage electrostatic signal or a low voltage electrostatic signal.
The dual-function circuit 10 provided by the present invention has both a test function and an electrostatic protection function for the sub-pixel unit 40 in the display panel 20, and compared with a circuit that can only implement a test function or an electrostatic protection function separately, the dual-function circuit 10 of the present invention can reduce the number of devices in the display panel 20 or reduce circuit routing, thereby saving space.
Referring to fig. 2, in a further embodiment, each sub-circuit unit 100 includes a first terminal 110, a second terminal 120, a third terminal 130, and a fourth terminal 140, wherein the fourth terminal 140 is used for connecting with a corresponding data line 30 of the display panel 20 and further connecting with a corresponding sub-pixel unit 40.
When the dual function circuit 10 is in the test function, the first terminal 110 receives the first control signal, the second terminal 120 receives the second control signal, and the third terminal 130 receives the test signal, the sub-circuit unit 100 transmits the test signal from the third terminal 130 to the fourth terminal 140 under the control of the first control signal and the second control signal, and transmits the test signal to the data line 30 of the display panel 20 through the fourth terminal 140, so as to test the corresponding sub-pixel unit 40 of the display panel 20.
It is understood that the first control signal, the second control signal, and the test signal are provided to the sub circuit unit 100 through their respective lines.
In a further embodiment, each sub-circuit unit 100 includes a first terminal 110, a second terminal 120, a third terminal 130, and a fourth terminal 140, wherein the fourth terminal 140 is used for connecting with a corresponding data line 30 of the display panel 20 and further connecting with a corresponding sub-pixel unit 40.
When the dual function circuit 10 is in the electrostatic protection function, the first terminal 110 is connected to the first level signal, the second terminal 120 is connected to the second level signal, the third terminal 130 is connected to the third level signal, and the sub circuit unit 100 releases the electrostatic signal received by the fourth terminal 140 and transmitted by the data line 30 under the control of the first level signal, the second level signal, and the third level signal. That is, the electrostatic signal generated by the sub-pixel unit 40 in the display panel 20 is transmitted from the fourth terminal 140 to the sub-circuit unit 100 and discharged.
In a further embodiment, each sub-circuit unit 100 comprises a first thin film transistor 150 and a second thin film transistor 160. The first thin film transistor 150 is connected to the second thin film transistor 160, the first terminal 110 and the fourth terminal 140, and the second thin film transistor 160 is further connected to the second terminal 120, the third terminal 130 and the fourth terminal 140.
When the dual function circuit 10 is in the test function, the first terminal 110 of the corresponding sub circuit unit 100 is connected to the first control signal, the second terminal 120 is connected to the second control signal, and when the third terminal 130 is connected to the test signal, the first control signal controls the first thin film transistor 150 to be turned off, the second control signal controls the second thin film transistor 160 to be turned on, the test signal connected to the third terminal 130 is transmitted to the fourth terminal 140 through the second thin film transistor 160 which is turned on, and the test signal is transmitted to the data line 30 of the display panel 20 through the fourth terminal 140, so as to test the corresponding sub pixel unit 40 of the display panel 20. It is to be understood that, in the case of ensuring that the signal between the third terminal 130 and the fourth terminal 140 is conducted and the signal between the first terminal 110 and the fourth terminal 140 is not conducted, the type of the first control signal and the element to control the signal to be conducted or cut off in other embodiments are not limited to the thin film transistor of the present invention.
When the dual function circuit 10 is in the esd protection function, the first thin film transistor 150 is in an off or on state according to the electrostatic signal received by the fourth terminal 140 and the first level signal received by the first terminal 110, and the second thin film transistor 160 is in an on or off state according to the electrostatic signal received by the fourth terminal 140, the second level signal received by the second terminal 120, and the third level signal received by the third terminal 130; the electrostatic signal is discharged through the first thin film transistor 150 or the second thin film transistor 160 in a turned-on state. The electrostatic signal received by the fourth terminal 140 may be a high-voltage or low-voltage electrostatic signal.
In a further embodiment, the first thin film transistor 150 includes a gate 151, a first pole 152 and a second pole 153, and the second thin film transistor 160 includes a gate 161, a first pole 162 and a second pole 163, respectively. The first poles 152 and 162 can be sources, and the second poles 153 and 163 can be drains.
The gate 151 of the first thin film transistor 150 is connected to the fourth terminal 140, the first pole 152 of the first thin film transistor 150 is connected to the first terminal 110, and the second pole 130 of the first thin film transistor 150 is connected to the fourth terminal 140. The gate 161 of the second thin film transistor 160 is connected to the second terminal 120, the first pole 162 of the second thin film transistor 160 is connected to the third terminal 130, and the second pole 163 of the second thin film transistor 160 is connected to the fourth terminal 140.
In a further embodiment, when the dual function circuit 10 is in the test function, the first control signal is a high level signal, the second control signal is a high level signal, the first thin film transistor 150 is an N-type transistor, and the second thin film transistor 160 is an N-type transistor. It is understood that the high signal can control the N-type transistor to be turned on and the low signal can control the N-type transistor to be turned off. Referring to fig. 3, in the embodiment, the first control signal for controlling the first tft 150 is a high-level signal P1, and the high-level signal P1 is inputted from the first electrode 152 of the first tft 150 and is high-voltage with respect to the voltage of the gate 151 of the first tft 150, that is, the gate 151 of the first tft 150 is connected with a low-level signal L1, and the low-level signal L1 controls the first tft 150 to be turned off. The second control signal for controlling the second thin film transistor 160 is a high level signal P2, and the high level signal P2 is inputted from the gate 161 of the second thin film transistor 160, i.e., controls the second thin film transistor 160 to be turned on. That is, in this embodiment, the first thin film transistor 150 is turned off, the second thin film transistor 160 is turned on, and the test signal M can be transmitted from the third terminal 130 to the fourth terminal 140 through the turned-on second thin film transistor 160, and then transmitted to the corresponding sub-pixel unit 40 for testing.
In a further embodiment, when the dual function circuit 10 is in the test function, the first control signal is a low level signal, the second control signal is a low level signal, the first thin film transistor 150 is a P-type transistor, and the second thin film transistor 160 is a P-type transistor. It is understood that the low signal can control the P-type transistor to be turned on, and the high signal can control the P-type transistor to be turned off. Referring to fig. 4, in the embodiment, the first control signal for controlling the first thin film transistor 150 is a low level signal L2, and the low level signal L2 is inputted from the first electrode 152 of the first thin film transistor 150 and is low voltage relative to the voltage of the gate 151 of the first thin film transistor 150, that is, the gate 151 of the first thin film transistor 150 is connected with a high level signal P3, and the high level signal P3 controls the first thin film transistor 150 to be turned off. The second control signal for controlling the second thin film transistor 160 is a low level signal L3, and the low level signal L3 is inputted from the gate 161 of the second thin film transistor 160, i.e., controls the second thin film transistor 160 to be turned on. That is, in this embodiment, the first thin film transistor 150 is turned off, the second thin film transistor 160 is turned on, and the test signal M can be transmitted from the third terminal 130 to the fourth terminal 140 through the turned-on second thin film transistor 160, and then transmitted to the corresponding sub-pixel unit 40 for testing.
In a further embodiment, when dual function circuit 10 is in an electrostatic protection function; the first level signal is greater than the second level signal and the third level signal. It is understood that the first level signal can be set to a high level, the second level signal can be set to a low level, and the third level signal can be set to a low level, and each specific voltage value can be set according to actual situations. The voltage of the static electricity discharged from the sub-pixel unit 40 is generally positive and negative voltages with large absolute values, such as +1000V (volt) or-1000V (volt), and the absolute values of the voltage of the static electricity are all larger than the voltages of the first level signal, the second level signal and the third level signal.
When the voltage value of the electrostatic signal is greater than the voltage value of the first level signal, the first thin film transistor 150 is turned on, the second thin film transistor 160 is turned off, and the electrostatic signal is discharged from the fourth terminal 140 to the first terminal 110 through the turned-on first thin film transistor 150. As shown in fig. 5, when the voltage value of the electrostatic signal J1 is a positive voltage and is greater than the first level signal H1, for the first thin film transistor 150, the electrostatic signal J1 with a high voltage value is transmitted to the gate 151 of the first thin film transistor 150, the first level signal H1 with a voltage value relatively lower than the electrostatic signal J1 is transmitted to the first pole 152 of the first thin film transistor 150, at this time, the voltage of the gate 151 is greater than the voltage of the first pole 152, the first thin film transistor 150 is turned on, and the electrostatic signal J1 with a high voltage is released from the fourth end 140 to the first end 110. The voltage applied to the gate 161 of the second tft 160 is low, the electrostatic signal J1 applied to the second pole 163 is high, and the second tft 160 is turned off. That is, when the electrostatic signal J1 is a higher-voltage electrostatic signal, the electrostatic signal J1 is discharged by the first thin film transistor 150. It is to be understood that, in this embodiment, the first thin film transistor 150 and the second thin film transistor 160 are N-type transistors. When the first thin film transistor 150 and the second thin film transistor 160 are P-type transistors, the electrostatic signal J1 is discharged from the second thin film transistor 160.
When the voltage value of the electrostatic signal is smaller than the voltage values of the second level signal and the third level signal, the first thin film transistor 150 is turned off, the second thin film transistor 160 is turned on, and the electrostatic signal is discharged from the third terminal 130 to the first terminal 110 through the turned-on second thin film transistor 160. As shown in fig. 6, when the voltage value of the electrostatic signal J2 is a negative voltage and is less than the first level signal H1, for the first thin film transistor 150, the electrostatic signal J2 with a low voltage value is transmitted to the gate 151 of the first thin film transistor 150, the first level signal H1 with a relatively higher voltage value than the electrostatic signal J2 is transmitted to the first pole 152 of the first thin film transistor 150, and at this time, the voltage of the gate 151 is less than the voltage of the first pole 152, and the first thin film transistor 150 is turned off. The second level signal H2 inputted to the gate 161 of the second thin film transistor 160 is at a high voltage relative to the electrostatic signal J2 inputted to the second pole 163, at this time, the second thin film transistor 160 is turned on, and the electrostatic signal J2 at the low voltage is released from the fourth terminal 140 to the first terminal 110. That is, when the electrostatic signal J2 is a relatively low voltage electrostatic signal, the electrostatic signal J2 is discharged by the second thin film transistor 160. It is to be understood that, in this embodiment, the first thin film transistor 150 and the second thin film transistor 160 are N-type transistors. When the first thin film transistor 150 and the second thin film transistor 160 are P-type transistors, the electrostatic signal J2 is discharged from the first thin film transistor 150.
Referring to fig. 7, a second embodiment of the present invention provides a dual function circuit 10a, in the dual function circuit 10a, every three sub-circuit units 100 form a circuit unit 200, each circuit unit 200 corresponds to a pixel unit 300 in the display panel 20, and the three sub-circuit units 100 forming the circuit unit 200 are respectively connected to a red sub-pixel unit 310, a green sub-pixel unit 320 and a blue sub-pixel unit 330 in the corresponding pixel unit 300. In fig. 7, the sub-circuit unit 100a is connected to the red sub-pixel unit 310, the sub-circuit unit 100b is connected to the green sub-pixel unit 320, and the sub-circuit unit 100c is connected to the blue sub-pixel unit 330.
In a further embodiment, the first terminals 110 of the three sub-circuit units 100 receive the same first control signal or first level signal, and the second terminals 120 of the three sub-circuit units 100 receive the same second control signal or second level signal. As shown in fig. 7, the first terminals 110 of the three sub-circuit units 100 are connected to the same signal line a, which is used for providing the first control signal or the first level signal. The second terminals 120 of the three sub-circuit units 100 are connected to the same signal line B, which is used for providing a second control signal or a second level signal.
In a further embodiment, the third terminals 130 in the three sub-circuit units 100 are respectively connected to different test signal lines or different third level signal lines. As shown in fig. 7, the third terminal 130 of the sub-circuit unit 100a is connected to the signal line C, the third terminal 130 of the sub-circuit unit 100b is connected to the signal line D, and the third terminal 130 of the sub-circuit unit 100C is connected to the signal line E.
Referring to fig. 7 to 9, the operation of this embodiment is illustrated. FIG. 8 is a signal timing diagram during the testing phase of the second embodiment, and FIG. 9 is a level signal diagram during the ESD phase of the second embodiment. In this implementation, the first thin film transistor 150 and the second thin film transistor 160 are N-type transistors.
Referring to fig. 7 and 8, when the dual function circuit 10a is in the test function, the first control signal provided by the signal line a and the second control signal provided by the signal line B are both high voltage high, and at this time, the first thin film transistor 150 in the sub-circuit unit 100a and the sub-circuit unit 100B and the second thin film transistor 160 in the sub-circuit unit 100c are turned off, and the second thin film transistor 160 is turned on. The third terminal 130 in the sub-circuit unit 100a provides the test signal M1, M1 to test the corresponding connected red sub-pixel unit 310 through the signal line C during the time period t 1. Similarly, during the time period t2, the third terminal 130 in the sub-circuit unit 100b provides the test signal M2 through the signal line D, and M2 tests the corresponding connected green sub-pixel unit 320, and during the time period t3, the third terminal 130 in the sub-circuit unit 100c provides the test signal M3 through the signal line E, and M3 tests the corresponding connected blue sub-pixel unit 330.
When the dual function circuit 10a is in the esd protection function, the first level signal provided by the signal line a is high voltage high, the second level signal provided by the signal line B is low voltage low, and the third level signals H3 provided by the signal lines C, D and E are all low voltage low. At this time, when the electrostatic signal received at the fourth terminal 140 in the sub-circuit unit 100a and the sub-circuit unit 100b and the sub-circuit unit 100c is a high-voltage electrostatic signal, the first thin film transistor 150 is turned on and the second thin film transistor 160 is turned off. The electrostatic signals output from the red, green and blue sub-pixel cells 310, 320 and 330 are discharged from the fourth terminal 140 to the first terminal 110. In other embodiments, when the electrostatic signal received at the fourth terminal 140 of the sub-circuit unit 100a or 100b of the sub-circuit unit 100c is a low-voltage electrostatic signal, the first thin film transistor 150 is turned off, and the second thin film transistor 160 is turned on. The electrostatic signals output from the red sub-pixel unit 310, the green sub-pixel unit 320, and the blue sub-pixel unit 330 are discharged from the fourth terminal 140 to the third terminal 130.
In this embodiment, the red sub-pixel unit 310, the green sub-pixel unit 320 and the blue sub-pixel unit 330 in the circuit unit 200 are tested in different time periods respectively. It is understood that, in other embodiments, the test signals may be provided to the signal line C, the signal line D, and the signal line E at the same time, or two of the test signals may be tested at the same time, and the order of the test modes is not limited. It is also understood that the circuit unit 200 may include other numbers of sub-pixel units 100, and the combination may be various and is not limited to the combination provided in the second embodiment.
Referring to fig. 10, the present invention further provides a display panel 20, wherein the display panel 20 includes the dual function circuit 10 as described in any one of the above embodiments. The dual-function circuit 10 in the display panel 20 provided by the invention has both the test function and the electrostatic protection function, so that the number of the wires of the display panel 20 is reduced, and the circuit layout space in the display panel 20 is saved.
In a further embodiment, the display panel 20 comprises a display area 21 and a non-display area 22. The display area 21 indicates an area of the display panel 20 where light emission is displayed, and the non-display area 22 indicates an area other than the display area 21. The display panel 20 further includes output lines 23, and the output lines 23 are connected to the pixels in the display area 21 and disposed in the non-display area 22. It will be appreciated that a plurality of lines are included in the output line 23, with each line corresponding to a sub-pixel in a pixel. The dual function circuit 10 is disposed on a side of the output line 23 remote from the display area 21 and in the non-display area 22. The output line 23 is arranged between the dual-function circuit 10 and the display area 21, so that the dual-function circuit 10 can detect whether the output line 23 is conducted or not when in a test function, when the output line 23 is not conducted, the sub-pixel in the display area 21 corresponding to the output line 23 is not lightened, and further, whether the damage in the display panel 20 occurs between the output line 23 or the sub-pixel can be judged, and the specific damaged position can be further eliminated through other detection modes. That is, the display panel 20 can be tested to determine whether the output lines 23 are on or off.
In a further embodiment, the non-display area 22 of the display panel 20 further includes a bonding area 24, the bonding area 24 is connected to the output line 23, the bonding area 24 is disposed on a side of the output line 23 away from the display area 21, and the dual function circuit 10 is connected to the bonding area 24 and is disposed on a side of the bonding area 24 away from the output line 23. Wherein the bonding area 24 is an area where the respective lines in the output lines 23 are concentrated. In this embodiment, dual function circuit 10 may test its binding region 24 with display region 21.
In addition, the electrostatic discharge phenomenon in the display panel 20 is more likely to occur at the beginning of the line, i.e. the end far away from the display area 21, and the dual-function circuit 10 is disposed at the end far away from the display area 21 in the present invention, so that the electrostatic damage can be effectively avoided, and the components and lines in the display panel 20 can be better protected.
Referring to fig. 2 and 11, the present invention further provides a method for testing a display panel 20, the display panel 20 includes a dual function circuit 10, the dual function circuit 10 includes at least one sub circuit unit 100, each sub circuit unit 100 is connected to a corresponding sub pixel unit 40 through a corresponding data line 30 of the display panel 20, the sub circuit unit 100 includes a first terminal 110, a second terminal 120, a third terminal 130, and a fourth terminal 140, wherein the fourth terminal 140 is used for being connected to the corresponding data line 30 of the display panel 20 and being connected to the corresponding sub pixel unit 40, and the method for testing the display panel 20 includes steps S100-i, S200-i, S300-i, and S400-i. The detailed procedure is as follows.
A first control signal is provided to the first terminal 110 (step S100-i), and a second control signal is provided to the second terminal 120 (step S200-i), and a test signal is provided to the third terminal 130 (step S300-i).
The test signal is controlled to be transmitted from the third terminal 130 to the fourth terminal 140 according to the first control signal and the second control signal, and the test signal is transmitted to the data line 30 of the display panel 20 through the fourth terminal 140 for testing the corresponding sub-pixel unit 100 of the display panel 20 (step S400-i).
The structural design of the dual-function circuit 10 in the testing method of the display panel 20 provided by the invention can have both the testing function and the electrostatic protection function, and the display panel 20 is tested when the dual-function circuit 10 is in the testing function.
In a further embodiment, the sub-circuit unit 100 includes a first thin film transistor 150 and a second thin film transistor 160, the first thin film transistor 150 is connected to the second thin film transistor 160, the first terminal 110 and the fourth terminal 140, and the second thin film transistor 160 is further connected to the second terminal 120, the third terminal 130 and the fourth terminal 140.
"controlling the test signal to be transmitted from the third terminal 130 to the fourth terminal 140 according to the first control signal and the second control signal" includes that the first control signal controls the first thin film transistor 150 to be turned off, the second control signal controls the second thin film transistor 160 to be turned on, and the test signal is transmitted to the second thin film transistor 160 through the third terminal 130 and transmitted to the fourth terminal 140 through the second thin film transistor 160.
Referring to fig. 2 and 12, the present invention further provides an electrostatic discharge protection method for a display panel 20, the display panel 20 includes a dual function circuit 10, the dual function circuit 10 includes at least one sub circuit unit 100, each sub circuit unit 100 is connected to a corresponding sub pixel unit 40 through a corresponding data line 30 of the display panel 20, the sub circuit unit 100 includes a first terminal 110, a second terminal 120, a third terminal 130, and a fourth terminal 140, wherein the fourth terminal 140 is used for being connected to the corresponding data line 30 of the display panel 20 and being connected to the corresponding sub pixel unit 40, and the test method for the display panel 20 includes steps S100-ii, S200-ii, S300-ii, and S400-ii. The detailed procedure is as follows.
Providing a first level signal to the first terminal 110 (step S100-ii); and providing a second level signal to the second terminal 120 (step S200-ii); and provides a third level signal to the third terminal 130 (step S300-ii).
The electrostatic signal transmitted by the data line received by the fourth terminal 140 is controlled to be released according to the first level signal, the second level signal and the third level signal (steps S400-ii).
The structural design of the dual-function circuit 10 in the testing method of the display panel 20 provided by the invention can have both the testing function and the electrostatic protection function, and when the dual-function circuit 10 is in the electrostatic protection function, the static in the display panel 20 is released.
The above examples only show some embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (18)

  1. A dual function circuit, comprising at least one sub-circuit unit, each sub-circuit unit being connected to a corresponding sub-pixel unit via a corresponding data line of a display panel;
    when the dual-function circuit is in a test function, each sub-circuit unit transmits a test signal to the corresponding sub-pixel unit through the corresponding data line of the display panel so as to test the corresponding sub-pixel unit;
    when the dual-function circuit is in the electrostatic protection function, each sub-circuit unit receives the electrostatic signal of the corresponding sub-pixel unit through the corresponding data line of the display panel and releases the electrostatic signal.
  2. The dual function circuit of claim 1, wherein each sub-circuit unit comprises a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein the fourth terminal is used for connecting with a corresponding data line of the display panel and further connecting with a corresponding sub-pixel unit;
    when the dual-function circuit is in a test function, the first end is connected with a first control signal, the second end is connected with a second control signal, and when the third end is connected with a test signal, the sub-circuit unit transmits the test signal to the fourth end from the third end under the control of the first control signal and the second control signal, and transmits the test signal to a data line of the display panel through the fourth end so as to test a corresponding sub-pixel unit of the display panel.
  3. The dual function circuit of claim 1, wherein each sub-circuit unit comprises a first terminal, a second terminal, a third terminal, and a fourth terminal, wherein the fourth terminal is used for connecting with a corresponding data line of the display panel and further connecting with a corresponding sub-pixel unit;
    when the dual-function circuit is in an electrostatic protection function, the first end is connected to a first level signal, the second end is connected to a second level signal, the third end is connected to a third level signal, and the sub-circuit unit releases an electrostatic signal transmitted by the data line received at the fourth end under the control of the first level signal, the second level signal and the third level signal.
  4. The dual function circuit of claim 2, wherein the sub-circuit cell comprises a first thin film transistor and a second thin film transistor;
    the first thin film transistor is connected with the second thin film transistor, the first end and the fourth end, and the second thin film transistor is also connected with the second end, the third end and the fourth end;
    when the dual-function circuit is in a test function, the first end is connected with a first control signal, the second end is connected with a second control signal, when the third end is connected with a test signal, the first control signal controls the first thin film transistor to be turned off, the second control signal controls the second thin film transistor to be turned on, the test signal connected with the third end is transmitted to the fourth end through the turned-on second thin film transistor, and the test signal is transmitted to a data line of the display panel through the fourth end so as to be used for testing a corresponding sub-pixel unit of the display panel.
  5. The dual function circuit of claim 3, wherein the sub-circuit cell comprises a first thin film transistor and a second thin film transistor;
    the first thin film transistor is connected with the second thin film transistor, the first end and the fourth end, and the second thin film transistor is also connected with the second end, the third end and the fourth end;
    when the dual-function circuit is in an electrostatic protection function, the first thin film transistor is in a cut-off or cut-off state according to the electrostatic signal received by the fourth terminal and the first level signal received by the first terminal, and the second thin film transistor is in a cut-on or cut-off state according to the electrostatic signal received by the fourth terminal, the second level signal received by the second terminal and the third level signal received by the third terminal; the electrostatic signal is released through the first thin film transistor or the second thin film transistor which is in a conducting state.
  6. The dual function circuit of claim 4 or 5, wherein the first thin film transistor and the second thin film transistor comprise a gate, a first pole, and a second pole, respectively;
    the grid electrode of the first thin film transistor is connected with the fourth end, the first pole of the first thin film transistor is connected with the first end, and the second pole of the first thin film transistor is connected with the fourth end; the grid electrode of the second thin film transistor is connected with the second end, the first pole of the second thin film transistor is connected with the third end, and the second pole of the second thin film transistor is connected with the fourth end.
  7. The dual function circuit of claim 6, wherein the first control signal is a high signal, the second control signal is a high signal, the first thin film transistor is an N-type transistor, and the second thin film transistor is an N-type transistor when the dual function circuit is in a test function.
  8. The dual function circuit of claim 6, wherein the first control signal is a low signal, the second control signal is a low signal, the first thin film transistor is a P-type transistor, and the second thin film transistor is a P-type transistor when the dual function circuit is in a test function.
  9. The dual function circuit of claim 6, wherein when the dual function circuit is in an electrostatic protection function; the first level signal is greater than the second level signal and the third level signal; when the voltage value of the electrostatic signal is greater than that of a first level signal, the first thin film transistor is turned on, the second thin film transistor is turned off, and the electrostatic signal is released from the fourth end to the first end through the turned-on first thin film transistor; when the voltage value of the electrostatic signal is smaller than the voltage values of the second level signal and the third level signal, the first thin film transistor is turned off, the second thin film transistor is turned on, and the electrostatic signal is released from the third end to the first end through the turned-on second thin film transistor.
  10. The dual function circuit of claim 1, wherein each three of the sub-circuit units constitutes a circuit unit, each circuit unit corresponds to a pixel unit in the display panel, and the three sub-circuit units constituting a circuit unit are respectively connected to a red sub-pixel unit, a green sub-pixel unit, and a blue sub-pixel unit in the corresponding pixel unit.
  11. The dual function circuit of claim 10, wherein a first terminal of three of said sub-circuit elements is coupled to a same said first control signal or said first level signal, and a second terminal of three of said sub-circuit elements is coupled to a same said second control signal or said second level signal.
  12. The dual function circuit of claim 11, wherein the third terminals of the three sub-circuit units are connected to different test signal lines or different third level signal lines, respectively.
  13. A display panel characterized in that the display panel comprises a dual function circuit as claimed in any one of claims 1 to 12.
  14. The display panel of claim 13, wherein the display panel displays an area and a non-display area, the display panel further comprising:
    an output line connected to the pixels in the display area and disposed in the non-display area;
    the dual-function circuit is arranged on one side of the output circuit, which is far away from the display area, and is arranged in the non-display area.
  15. The display panel according to claim 14, further comprising a bonding region in the non-display region of the display panel, wherein the bonding region is connected to the output line, and the bonding region is disposed on a side of the output line away from the display region; the dual-function circuit is connected with the binding region and is arranged on one side of the binding region, which is far away from the output line.
  16. The test method of a display panel, characterized by, the said display panel includes the dual function circuit, the said dual function circuit includes at least one sub-circuit unit, each sub-circuit unit is connected with corresponding sub-pixel unit through the corresponding data link of the display panel; the sub-circuit unit comprises a first end, a second end, a third end and a fourth end, wherein the fourth end is used for being connected with a corresponding data line of the display panel and connected with a corresponding sub-pixel unit; the test method of the display panel comprises the following steps:
    providing a first control signal to the first terminal; and
    providing a second control signal to the second terminal; and
    providing a test signal to the third terminal;
    and controlling the test signal to be transmitted from the third end to the fourth end according to the first control signal and the second control signal, and transmitting the test signal to a data line of the display panel through the fourth end so as to test a corresponding sub-pixel unit of the display panel.
  17. The test method of claim 16, wherein the sub-circuit unit includes a first thin film transistor and a second thin film transistor; the first thin film transistor is connected with the second thin film transistor, the first end and the fourth end, and the second thin film transistor is also connected with the second end, the third end and the fourth end;
    the "controlling the test signal to be transmitted from the third terminal to the fourth terminal according to the first control signal and the second control signal" includes:
    the first control signal controls the first thin film transistor to be turned off, the second control signal controls the second thin film transistor to be turned on, and the test signal is transmitted to the second thin film transistor through the third terminal and is transmitted to the fourth terminal through the second thin film transistor.
  18. The display panel comprises a dual-function circuit, wherein the dual-function circuit comprises at least one sub-circuit unit, and each sub-circuit unit is connected with a corresponding sub-pixel unit through a corresponding data line of the display panel; the sub-circuit unit comprises a first end, a second end, a third end and a fourth end, wherein the fourth end is used for being connected with a corresponding data line of the display panel and connected with a corresponding sub-pixel unit; the test method of the display panel comprises the following steps:
    providing a first level signal to the first terminal; and
    providing a second level signal to the second terminal; and
    providing a third level signal to the third terminal;
    and controlling the electrostatic signal transmitted by the data line received by the fourth terminal to be released according to the first level signal, the second level signal and the third level signal.
CN201880095912.8A 2018-12-24 2018-12-24 Dual-function circuit, display panel, test method of display panel and electrostatic protection method of display panel Pending CN112639601A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2018/123101 WO2020132805A1 (en) 2018-12-24 2018-12-24 Dual-function circuit, display panel and testing method thereof, and electrostatic protection method

Publications (1)

Publication Number Publication Date
CN112639601A true CN112639601A (en) 2021-04-09

Family

ID=71129402

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880095912.8A Pending CN112639601A (en) 2018-12-24 2018-12-24 Dual-function circuit, display panel, test method of display panel and electrostatic protection method of display panel

Country Status (2)

Country Link
CN (1) CN112639601A (en)
WO (1) WO2020132805A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113834992A (en) * 2021-09-24 2021-12-24 昆山龙腾光电股份有限公司 Test circuit and display panel

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113570989B (en) * 2021-07-30 2024-04-05 友达光电（昆山）有限公司 Test circuit and display panel

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202550507U (en) * 2012-03-15 2012-11-21 京东方科技集团股份有限公司 Electrostatic protection circuit, array substrate and display device
CN102854679A (en) * 2012-09-25 2013-01-02 南京中电熊猫液晶显示科技有限公司 Liquid crystal display panel and repairing method thereof
CN105070239A (en) * 2015-08-27 2015-11-18 武汉华星光电技术有限公司 Liquid crystal display panel
CN206040646U (en) * 2016-04-26 2017-03-22 京东方科技集团股份有限公司 Electrostatic protection and test combined unit , array substrate and display device
CN107564416A (en) * 2017-09-15 2018-01-09 上海天马微电子有限公司 A kind of display panel and display device
CN108847176A (en) * 2018-07-13 2018-11-20 京东方科技集团股份有限公司 A kind of array substrate, display panel and display device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN202550507U (en) * 2012-03-15 2012-11-21 京东方科技集团股份有限公司 Electrostatic protection circuit, array substrate and display device
CN102854679A (en) * 2012-09-25 2013-01-02 南京中电熊猫液晶显示科技有限公司 Liquid crystal display panel and repairing method thereof
CN105070239A (en) * 2015-08-27 2015-11-18 武汉华星光电技术有限公司 Liquid crystal display panel
CN206040646U (en) * 2016-04-26 2017-03-22 京东方科技集团股份有限公司 Electrostatic protection and test combined unit , array substrate and display device
CN107564416A (en) * 2017-09-15 2018-01-09 上海天马微电子有限公司 A kind of display panel and display device
CN108847176A (en) * 2018-07-13 2018-11-20 京东方科技集团股份有限公司 A kind of array substrate, display panel and display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113834992A (en) * 2021-09-24 2021-12-24 昆山龙腾光电股份有限公司 Test circuit and display panel

Also Published As

Publication number Publication date
WO2020132805A1 (en) 2020-07-02

Similar Documents

Publication Publication Date Title
CN108281124B (en) Shifting register unit and driving method thereof, grid driving circuit and display device
US9459730B2 (en) Shift register unit, display device and driving method
US10229619B2 (en) Test circuit, test method, display panel and display apparatus
WO2020215906A1 (en) Array substrate, driving method, and display device
US10964268B2 (en) Scan driving circuit, driving method, and display device
US11004375B2 (en) Signal protection circuit, driving method thereof, and device
US20170262119A1 (en) Touch control device drive method, touch control device drive circuit and touch control device
CN109448627B (en) Display panel, driving method of display panel and display device
CN102117607A (en) Gate driver, and thin film transistor substrate and liquid crystal display having the same
US20160163244A1 (en) Array Substrate and Detecting Method for an Array Substrate
US11929031B2 (en) Display substrate comprising pixel electrode disposed in same layer as transparent conductive electrode, and detection method therefor, and display apparatus
CN110737140B (en) Display panel, control method thereof and display device
CN100426106C (en) Display device for displaying images
CN110992861A (en) Display panel and display device
CN111739453A (en) Display panel and display device
CN112639601A (en) Dual-function circuit, display panel, test method of display panel and electrostatic protection method of display panel
CN103869516B (en) display panel discharge circuit and display device
CN105301859A (en) Array base plate and liquid crystal display device
CN114360438B (en) Display device, driving chip and electronic equipment
CN110910803B (en) Display panel, detection method thereof and display device
US11315451B1 (en) Display device and electronic device
US10971102B2 (en) Shift register unit and driving method, gate driving circuit, and display device
CN108492758B (en) Test control circuit, control method, display substrate and display device
CN113823216B (en) Display device, driving chip and electronic equipment
US20220293037A1 (en) Array substrate, driving method thereof, and display apparatus

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20210409