CN112630544A - High-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance measurement and modeling method - Google Patents

High-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance measurement and modeling method Download PDF

Info

Publication number
CN112630544A
CN112630544A CN202011534487.3A CN202011534487A CN112630544A CN 112630544 A CN112630544 A CN 112630544A CN 202011534487 A CN202011534487 A CN 202011534487A CN 112630544 A CN112630544 A CN 112630544A
Authority
CN
China
Prior art keywords
capacitance
drain
source
sic mosfet
miller platform
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202011534487.3A
Other languages
Chinese (zh)
Other versions
CN112630544B (en
Inventor
王来利
李华清
杨成子
朱梦宇
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xian Jiaotong University
Original Assignee
Xian Jiaotong University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xian Jiaotong University filed Critical Xian Jiaotong University
Priority to CN202011534487.3A priority Critical patent/CN112630544B/en
Publication of CN112630544A publication Critical patent/CN112630544A/en
Application granted granted Critical
Publication of CN112630544B publication Critical patent/CN112630544B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
    • G01R27/2605—Measuring capacitance
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/26—Testing of individual semiconductor devices
    • G01R31/2607—Circuits therefor
    • G01R31/2621—Circuits therefor for testing field effect transistors, i.e. FET's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/33—Design verification, e.g. functional simulation or model checking
    • G06F30/3308—Design verification, e.g. functional simulation or model checking using simulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

The invention discloses a method for measuring and modeling a high-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance, which comprises the following steps: 1) capacitance C between drain and source outside Miller platformdsCarrying out segmentation characterization; 2) measuring and representing the capacitance between a drain electrode and a source electrode of the Miller platform area in the dynamic switching process; 3) based on the capacitance C between drain and source outside the Miller platformdsPerforming SiC MOSFET drain-source interelectrode capacitance C by subsection characterization and capacitance measurement characterization in Miller platform region in switching dynamic processdsThe modeling method can realize accurate measurement and modeling of the nonlinear capacitance between the drain and the source of the high-voltage SiC MOSFET, and has a wide application range.

Description

High-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance measurement and modeling method
Technical Field
The invention relates to a nonlinear capacitance measuring and modeling method, in particular to a nonlinear capacitance measuring and modeling method between drain and source electrodes of a high-voltage SiC MOSFET.
Background
In recent years, the manufacturing technology and the application technology of wide bandgap semiconductor devices are rapidly developed, and SiC MOSFETs are widely applied to high-voltage, high-efficiency and high-temperature power electronic devices with excellent switching performance, in particular to the fields of photovoltaic inverters, new energy electric vehicles, special industrial power supplies, wireless power transmission and the like. Accurately representing the interelectrode nonlinear capacitance of the SiC MOSFET has very important significance on device behavior model establishment, circuit switching loss analysis optimization and power electronic equipment design. An accurate, simple-to-operate and easy-to-design method for realizing accurate measurement and characterization of the nonlinear interelectrode capacitance is urgently needed.
Nonlinear capacitor C between drain and source of existing SiC MOSFETdsThe modeling method can be divided into two types, wherein the first type is based on the capacitance along with the drain-source voltage v in a device data manualdsThe variation curve is directly fitted by a mathematical formula to obtain Cds-vdsAnd performing functional expression, thereby realizing the establishment of the model. The second method is based on capacitance measurement experimental equipment such as an impedance analyzer, a network analyzer and the like, and the capacitance is obtained through measurement of the equipment, and then subsequent characterization fitting and modeling are carried out. The defects of the two methods are mainly 1) the capacitance of the SiC MOSFET device data manual is dependent on the drain-source voltage vdsThe curve is measured under external high frequency signals, and the data sheet only shows the capacitance value in a section of voltage range, and the capacitance value at high voltage or close to the rated voltage of the device is not written. 2) The capacitance measurement experimental equipment can only measure the grid-source voltage v of the SiC MOSFETgsThe capacitance value when the gate-source voltage is not zero in the switching process of the device cannot be measured. 3) The capacitance measurement experimental equipment is based on the principle of a small-signal analysis method, has a hysteresis effect during measurement, and is not as accurate as a large-signal analysis method in measurement. 4) The measurement precision of the capacitance measurement experimental equipment and the parasitic parameters introduced by measurement also influence the actual measurement result of the capacitance. 5) The measurement device voltage class is not suitable for high voltage SiC MOSFETs. Based on the above, the existing measurement has the problems of inaccurate measurement and narrow application range.
Disclosure of Invention
The invention aims to overcome the defects of the prior art and provides a method for measuring and modeling the nonlinear capacitance between the drain and the source of a high-voltage SiC MOSFET, which can realize the accurate measurement and modeling of the nonlinear capacitance between the drain and the source of the high-voltage SiC MOSFET and has wider application range.
In order to achieve the purpose, the method for measuring and modeling the non-linear capacitance between the drain and the source of the high-voltage SiC MOSFET comprises the following steps:
1) capacitance C between drain and source outside Miller platformdsCarrying out segmentation characterization;
2) measuring and representing the capacitance between a drain electrode and a source electrode of the Miller platform area in the dynamic switching process;
3) based on the capacitance C between drain and source outside the Miller platformdsPerforming SiC MOSFET drain-source interelectrode capacitance C by subsection characterization and capacitance measurement characterization in Miller platform region in switching dynamic processdsTo model (3).
Capacitance C between drain and source outside Miller platformdsThe segmentation is characterized as follows:
Figure BDA0002852738150000021
wherein v isdsFor drain-source voltages, a, b, and c are node voltages, and A, B, C, D, E, F, G, H and I are fitting coefficients.
The measurement of the capacitance between the drain and the source of the Miller platform area in the dynamic process of the switch is characterized in that:
Figure BDA0002852738150000031
wherein ichFor channel current of SiC MOSFET, idsFor the SiC MOSFET conduction current, vdsIs the drain-source voltage, CgdIs a miller capacitance.
SiC MOSFET on-current idsComprises the following steps:
Figure BDA0002852738150000032
the invention has the following beneficial effects:
according to the method for measuring and modeling the nonlinear capacitance between the drain and the source of the high-voltage SiC MOSFET, when the method is specifically operated, the capacitance is measured in the Miller platform area in the dynamic process of the SiC MOSFET switch, so that the actual value of the capacitance is accurately represented, the defect that the traditional measuring instrument can only measure the junction capacitance when the device is turned off is overcome, meanwhile, complex mathematical function fitting is not needed, the method can be applied to a high-voltage environment, the self heating loss of the device is small, and the application range is wide; in addition, the capacitance segmented characterization outside the Miller platform adopts polynomial fitting, and a transcendental equation does not need to be solved.
Drawings
FIG. 1a is a schematic diagram of a SiC MOSFET drive circuit;
FIG. 1b shows the drain-source voltage vdsA time domain variation waveform map;
FIG. 2 is a flow chart of modeling in the present invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying drawings:
the invention discloses a method for measuring and modeling the non-linear capacitance between the drain and the source of a high-voltage SiC MOSFET, which comprises the following steps:
1) capacitance C between drain and source outside Miller platformdsCarrying out segmentation characterization;
in order to realize excellent switching performance of the SiC MOSFET in industrial application occasions, a driving resistor R is externally connectedg_deUsually a few ohms, the Miller platform time is very short, and a capacitance segmentation characterization method based on a SiC MOSFET data manual is adopted outside the Miller platform for segmentation characterization, namely
Figure BDA0002852738150000041
Extraction of C based on SiC MOSFET data Manualds-vdsThe voltages at each data point on the curve determine the node voltages a, b, c and the fitting coefficients A, B, C, D, E, F, G, H and I.
2) Capacitor C between drain and source of Miller platform area in dynamic switching processdsMeasuringAnd (5) characterizing.
A SiC MOSFET driver circuit is shown in fig. 1 a. Wherein R isg_inAnd Rg_drInternal gate resistances, R, of the SiC MOSFET chip and of the gate driver, respectivelyg_inAnd Rg_drUsually given in the chip data sheet, Rg_deIs an external drive resistor, R, selected to obtain good switching performanceg_deIs one of the important factors in determining the width of the miller platform. When R isg_deLarger, e.g., 200 ohms, with a larger width of the miller plateau. The gate source electrode voltage is v in the dynamic process of opening the SiC MOSFETgsDrain-source voltage vdsThe time domain variation waveform is shown in fig. 1 b. With a period of gate-source voltage v during switchinggsKept unchanged to form a Miller platform region, at which time the drain-source voltage vdsFalls rapidly according to the driving supply voltage VggAnd gate-source voltage V at the Miller stageMillerThe Miller capacitance C is characterized by the formula (2)gdThe values of (A) are:
Figure BDA0002852738150000042
Cgdrepresenting Miller capacitance, VggIndicating the driving supply voltage, VMillerRepresenting the gate-source voltage at the miller plateau. SiC MOSFET on-current idsExpressed as:
Figure BDA0002852738150000043
wherein, CdsRepresents the drain-source interelectrode capacitance ichRepresenting the channel current, i, of the SiC MOSFETchIs an on-state resistance Rds_onA function of (a);
for SiC MOSFET channel current ichPerforming characterization to complete drain-source capacitance C of the Miller platform regiondsAnd (5) characterizing.
Figure BDA0002852738150000051
3) C outside the Miller platform obtained according to step 1)dsPerforming segmentation characterization and capacitance measurement characterization of the Miller platform region in the dynamic process of the switch obtained in the step 2) to perform capacitance C between drain and source of the SiC MOSFETdsTo model (3).
The modeling flow chart is shown in FIG. 2, and particularly, the drain-source voltage v is acquired in real timedsAnd gate-source voltage vgsWhen v is a value ofgsWhen the Miller platform area is adopted, the capacitance representation in the dynamic process of the switch is adopted, and the formula is shown as (4);
when v isgsIn the region of Miller platform, C outside the Miller platform is adopteddsAnd (4) segment characterization, as shown in formula (1).
The present invention can be applied to voltage-driven power electronic power devices such as Si MOSFETs, Si IGBTs, and SiC IGBTs.

Claims (4)

1. A method for measuring and modeling the non-linear capacitance between the drain and the source of a high-voltage SiC MOSFET is characterized by comprising the following steps:
1) capacitance C between drain and source outside Miller platformdsCarrying out segmentation characterization;
2) measuring and representing the capacitance between a drain electrode and a source electrode of the Miller platform area in the dynamic switching process;
3) based on the capacitance C between drain and source outside the Miller platformdsPerforming SiC MOSFET drain-source interelectrode capacitance C by subsection characterization and capacitance measurement characterization in Miller platform region in switching dynamic processdsTo model (3).
2. The method of claim 1, wherein the drain-to-source capacitance C outside the Miller platform is the drain-to-source capacitance CdsThe segmentation is characterized as follows:
Figure FDA0002852738140000011
wherein v isdsFor drain-source voltages, a, b, and c are node voltages, and A, B, C, D, E, F, G, H and I are fitting coefficients.
3. The method of claim 1, wherein the measurement of the drain-source capacitance of the miller platform region during switching dynamics is characterized by:
Figure FDA0002852738140000012
wherein ichFor channel current of SiC MOSFET, idsFor the SiC MOSFET conduction current, vdsIs the drain-source voltage.
4. The method of claim 3, wherein the SiC MOSFET conduction current i is measured and modeled as a drain-source nonlinear capacitancedsComprises the following steps:
Figure FDA0002852738140000013
CN202011534487.3A 2020-12-22 2020-12-22 High-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance measurement and modeling method Active CN112630544B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011534487.3A CN112630544B (en) 2020-12-22 2020-12-22 High-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance measurement and modeling method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011534487.3A CN112630544B (en) 2020-12-22 2020-12-22 High-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance measurement and modeling method

Publications (2)

Publication Number Publication Date
CN112630544A true CN112630544A (en) 2021-04-09
CN112630544B CN112630544B (en) 2022-12-09

Family

ID=75321332

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011534487.3A Active CN112630544B (en) 2020-12-22 2020-12-22 High-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance measurement and modeling method

Country Status (1)

Country Link
CN (1) CN112630544B (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113191104A (en) * 2021-05-24 2021-07-30 杭州电子科技大学 SiC MOSFET SPICE behavior model construction method and device
CN113391180A (en) * 2021-05-07 2021-09-14 西安交通大学 Dynamic characteristic test platform for silicon carbide device at extremely high temperature

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104899350A (en) * 2015-04-27 2015-09-09 北京交通大学 Method for modeling SiC MOSFET simulation model
JP2017204575A (en) * 2016-05-12 2017-11-16 株式会社日立製作所 Power module, power conversion device, and method of manufacturing power module
CN109918857A (en) * 2019-04-19 2019-06-21 南京大学 The non-linear piecewise temporal model method for building up of GaNHEMT device high frequency dynamic loss
CN110502805A (en) * 2019-07-31 2019-11-26 中国人民解放军海军工程大学 IGBT physical model statistic property extracting method
CN111767634A (en) * 2020-05-19 2020-10-13 中国人民解放军海军工程大学 Method for establishing IGBT switch transient model

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104899350A (en) * 2015-04-27 2015-09-09 北京交通大学 Method for modeling SiC MOSFET simulation model
JP2017204575A (en) * 2016-05-12 2017-11-16 株式会社日立製作所 Power module, power conversion device, and method of manufacturing power module
CN109918857A (en) * 2019-04-19 2019-06-21 南京大学 The non-linear piecewise temporal model method for building up of GaNHEMT device high frequency dynamic loss
CN110502805A (en) * 2019-07-31 2019-11-26 中国人民解放军海军工程大学 IGBT physical model statistic property extracting method
CN111767634A (en) * 2020-05-19 2020-10-13 中国人民解放军海军工程大学 Method for establishing IGBT switch transient model

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113391180A (en) * 2021-05-07 2021-09-14 西安交通大学 Dynamic characteristic test platform for silicon carbide device at extremely high temperature
CN113391180B (en) * 2021-05-07 2022-03-01 西安交通大学 Dynamic characteristic test platform for silicon carbide device at extremely high temperature
CN113191104A (en) * 2021-05-24 2021-07-30 杭州电子科技大学 SiC MOSFET SPICE behavior model construction method and device
CN113191104B (en) * 2021-05-24 2024-04-09 杭州电子科技大学 SiC MOSFET SPICE behavior model construction method and device

Also Published As

Publication number Publication date
CN112630544B (en) 2022-12-09

Similar Documents

Publication Publication Date Title
CN112630544B (en) High-voltage SiC MOSFET drain-source interelectrode nonlinear capacitance measurement and modeling method
CN108062442B (en) AlGaN/GaN HEMT microwave power device small-signal intrinsic parameter extraction method
CN106199366B (en) A kind of method of power MOS (Metal Oxide Semiconductor) device temperature measurement on-line
CN105956228B (en) The transistor modeling method of high efficiency switch power-like amplifier
JP6251310B2 (en) Measuring method of current-voltage characteristics
CN111368454B (en) SiC MOSFET SPICE model establishment method based on bare chip packaging structure
CN111310395A (en) Equivalent circuit model and method of SiC MOSFET nonlinear device
CN103838939B (en) Method for simulating direct current characteristics and capacitance characteristics of vertical type field effect transistor
CN114004067A (en) MOSFET switching tube characteristic model establishing method, device, equipment and medium
CN102497185B (en) Equivalent circuit of LDMOS (laterally diffused metal oxide semiconductor)
Wang et al. Improved SiC MOSFET model considering channel dynamics of transfer characteristics
CN110346703B (en) Method for eliminating parasitic capacitance influence in ultra-fast semiconductor component test
Pace et al. S-parameter characterization of gan hemt power transistors for high frequency modeling
CN112710940B (en) SiC MOSFET reverse transfer capacitance measuring method
CN110673009B (en) Grid leakage short circuit and grid voltage supply device for measuring SiC MOS thermal resistance under high voltage
CN112213562A (en) Method for measuring and calculating internal resistance of grid electrode of power semiconductor device
Xie et al. Modeling the gate driver IC for GaN transistor: A black-box approach
CN114362491A (en) Method for calculating half-bridge crosstalk voltage peak value of resistive load silicon carbide MOSFET (metal oxide semiconductor field effect transistor)
CN114002572B (en) Test circuit and test method for testing common-source inductance of power device
CN112906334A (en) Groove type MOSFET circuit model based on physical structure and establishing method thereof
CN107144775B (en) Device and method for measuring transconductance coefficient of CMOS inverter
CN103792478A (en) Method for simulating direct-current feature of insulated gate bipolar transistor
CN116047171B (en) Characterization method and device for dynamic on-resistance of power semiconductor field effect transistor
Bęczkowski et al. Calorimetric measurement methodology for comprehensive soft and hard switching loss characterisation
CN109239566B (en) Method for pre-adjusting driving signal by simulating parasitic capacitance of power type switching tube

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant