Disclosure of Invention
Based on the above-mentioned shortcomings and drawbacks of the prior art, it is an object of the present invention to at least solve one or more of the above-mentioned problems of the prior art, in other words, to provide an asynchronous secure communication system that satisfies one or more of the above-mentioned needs.
In order to achieve the purpose, the invention adopts the following technical scheme:
an asynchronous secret communication system comprises a sending end and a receiving end, wherein the sending end is in communication connection with the receiving end, and the sending end is provided with a first electric chaotic signal generating device, a second electric chaotic signal generating device, a first delayer, an encoder, a modulator, a signal processor and an original signal input end; the first electric chaotic signal generating device and the encoder are sequentially connected; the second electric chaotic signal generating device, the first delayer and the encoder are sequentially connected; the encoder is connected with the modulator, the original signal input end receives an original signal and is connected with the signal processor, the signal processor is connected with the modulator, and the modulator is connected with the transmitter;
the receiving end is provided with a receiving end modulator, a second delayer, a comparator and a demodulator, the receiver, the second delayer, the comparator and the demodulator are sequentially connected, and the receiver is also directly connected with the comparator; the signal transmitted by the transmitter is received by the receiver.
As a preferred scheme, the first electric chaotic signal generating device comprises a first chaotic laser and a first photoelectric converter which are connected in sequence, wherein the first photoelectric converter is connected with the encoder; the second electric chaotic signal generating device comprises a second chaotic laser and a second photoelectric converter which are connected, and the second photoelectric converter is connected with the first delayer.
Preferably, the encoder works in the following manner: and selecting one of four different coding modes according to a comparison result of the first electric chaotic signal directly sent to the encoder and the second electric chaotic signal sent to the encoder after being delayed by the delayer.
Preferably, the four encoding modes of the encoder are respectively as follows: let the first electric chaotic signal directly sent to the encoder be x
1(n), the second electric chaotic signal which is sent to the encoder after being delayed by the delayer is x
2(n +1), n representing a discrete time, is taken
The minimum value and the maximum value A, E, three interval values B, C, D are selected in sequence from A-E, and the encoder is used for encoding the signals according to the time of each interval
The signal is encoded in correspondence with the section in which the value belongs to (a, B) (B, C) (C, D) (D, E), and the encoded signal x (n) and x (n +1) are x (n) - | x
1(n)|、x(n+1)=-|x
2(n+1)|;x(n)=-|x
1(n)|、x(n+1)=|x
2(n+1)|;x(n)=|x
1(n)|、x(n+1)=-|x
2(n+1)|;x(n)=|x
1(n)|、x(n+1)=|x
2(n+1)|。
Preferably, the signal processor receives an original signal composed of "0" and "1" sent from the original signal input terminal, changes "0" to "-1" therein, and keeps "1" as it is.
Preferably, the comparator operates in a manner that if the modulation signal directly sent to the comparator by the receiver is l (n), the delayed modulation signal sent to the comparator after being delayed by the second delayer is l (n +1), n represents a discrete time, and the discrete time is taken
Three interval values B, C, D are sequentially selected from A-E, and the minimum value and the maximum value A, E of each time are compared
Respectively belongs to which interval of (A, B) (B, C) (C, D) (D, E).
Preferably, four kinds of demodulation circuits are arranged in the demodulator, and the four kinds of demodulation circuits are obtained corresponding to the comparators
The affiliated sections are respectively provided with
demodulation circuits 1, 2, 3 and 4 in sequence; the algorithm of the
demodulation circuit 1 is: when l (n)<0 and l (n +1)<When 0, let the reduction signal s (n) 1, s (n +1) 0; when l (n)<0 and l (n +1)>When 0, the reduction signal s (n) is 1, s (n +1) is 1; when l (n)>0 and l (n +1)<When 0, let the reduction signal s (n) be 0, s (n +1) be 0; when l (n)>0 and l (n +1)>When 0, let the reduction signal s (n) 0, s (n +1) 1; the algorithm of the
demodulation circuit 2 is: when l (n)<0 and l (n +1)<When 0, the reduction signal s (n) is 1, s (n +1) is 1; when l (n)<0 and l (n +1)>When 0, let the reduction signal s (n) 1, s (n +1) 0; when l (n)>0 and l (n +1)<When 0, let the reduction signal s (n) 0, s (n +1) 1; when l (n)>0 and l (n +1)>When 0, let the reduction signal s (n) be 0, s (n +1) be 0; the algorithm of the
demodulation circuit 3 is: when l (n)<0 and l (n +1)<When 0, let the reduction signal s (n) be 0 and s (n +1) be 1; when l (n)<0 and l (n +1)>When 0, let the reduction signal s (n) be 0, s (n +1) be 0; when l (n)>0 and l (n +1)<When 0, the reduction signal s (n) is 1, s (n +1) is 1; when l (n)>0 and l (n +1)>When 0, let the reduction signal s (n) 1, s (n +1) 0; the algorithm of the
demodulation circuit 4 is: when l (n)<0 and l (n +1)<When 0, let the reduction signal s (n) be 0, s (n +1) be 0; when l (n)<0 and l (n +1)>When 0, let the reduction signal s (n) 0, s (n +1) 1; when l (n)>0 and l (n +1)<When 0, let the reduction signal s (n) 1, s (n +1) 0; when l (n)>0 and l (n +1)>At 0, the reduction signal s (n) is 1, and s (n +1) is 1. Connecting s (n) and s (n +1) at each time in sequence to obtain final reduction signal
Preferably, the demodulator is provided with four kinds of demodulation circuits corresponding to four sections of the encoding by the encoder.
Preferably, the delay of the first chaotic laser is 2.67ns, and the delay of the second chaotic laser is 1.50 ns; the threshold current of the first chaotic laser is 32mA, and the threshold current of the second chaotic laser is 14.7 mA; the number of transparent carriers of the first chaotic laser is 1.6633 multiplied by 108The number of transparent carriers of the second chaotic laser is 1.5000 multiplied by 108(ii) a The working wavelength of the first chaotic laser and the second chaotic laser is 1550 nm.
Compared with the prior art, the invention has the beneficial effects that:
1) the chaotic secure communication without synchronization at the receiving end is realized;
2) the method has the characteristics of low cost, stable performance, low error rate and strong confidentiality.
Detailed Description
In order to more clearly illustrate the embodiments of the present invention, the following description will explain the embodiments of the present invention with reference to the accompanying drawings. It is obvious that the drawings in the following description are only some examples of the invention, and that for a person skilled in the art, other drawings and embodiments can be derived from them without inventive effort.
Example 1: as shown in fig. 1, the present embodiment relates to an asynchronous secret communication system, which is composed of a transmitting end and a receiving end that can be connected in communication, wherein the transmitting end includes a first chaotic laser 11 and a second chaotic laser 21; the first photoelectric converter 12, the second photoelectric converter 22; first of allA delayer 23, an encoder 3, a modulator 5, a signal processor 41. The receiving end comprises a second delayer 6, a comparator 7 and a demodulator 8. The first delay 23 and the second delay 6 have the same specification parameters. The first chaotic laser 11, the first photoelectric converter 12 and the encoder 3 are connected in sequence; the second chaotic laser 21, the second photoelectric converter 22, the first delayer 23 and the encoder 3 are connected in sequence; the encoder 3 is connected to the modulator 5, the original signal input terminal receives the original signal 40, and is connected to the signal processor 41, the signal processor 41 is connected to the modulator 5, and the modulator 5 is connected to the transmitter. The parameters of the first chaotic laser 11 and the second chaotic laser 21 are different, the delay of the first chaotic laser 11 is 2.67ns, the threshold current is 32mA, and the number of transparent carriers is 1.6633 multiplied by 108The delay of the second chaotic laser 21 is 1.50s, the threshold current is 14.7mA, and the number of transparent carriers is 1.5000X 108. The operating wavelengths of the first chaotic laser 11 and the second chaotic laser 21 are both 1550 nm. Two chaotic lasers are used for generating two different optical chaotic signals which are converted into electric chaotic signals through photoelectric conversion. An original chaotic signal which is more complicated than a chaotic signal generated by a circuit used only can be generated.
In the transmitting end, the first chaotic laser 11 generates a first chaotic optical signal, sends the first chaotic optical signal to the first photoelectric converter 12 to be converted into a first electric chaotic signal, and the second chaotic laser 21 generates a second chaotic optical signal, sends the second chaotic optical signal to the first photoelectric converter 22 to be converted into a second electric chaotic signal. The first electrical chaotic signal is directly fed to the encoder 3. The second electric chaotic signal is sent to the first delayer first, and then sent to the encoder 3 after being delayed.
In the
encoder 3, let x be the first electrical chaotic signal directly fed to the encoder 3
1(n), the second electric chaotic signal sent to the
encoder 3 after time delay is x
2(n +1), dividing the first electric chaotic signal by the delayed second electric chaotic signal, and taking the absolute value of the division result
Let the minimum value of the division result be A and the maximum value be E, in the order of A-E from small to largeSelecting three interval values B, C, D, and mixing [ A, E ]]Divided into 4 ranges (i.e., (A, B) (B, C) (C, D) (D, E)), each range being encoded differently if
Belongs to (A, B) (B, C) (C, D) (D, E), and the coded signals x (n) and x (n +1) are x (n) -x
1(n)|、x(n+1)=-|x
2(n+1)|;x(n)=-|x
1(n)|、x(n+1)=|x
2(n+1)|;x(n)=|x
1(n)|、x(n+1)=-|x
2(n+1)|;x(n)=|x
1(n)|、x(n+1)=|x
2(n +1) |. Thereby enabling the encoded signal to be switched continuously. And sending out the coded signal after the coding is finished. After the time delay, the signals are compared and then encoded, different encoding modes can be realized, and therefore the transmitted signals can be switched in various different modes.
The original signal 40 is processed by a signal processor 41, and in the signal processor 41, a "0" in the original signal 40 changes to a "-1", and a "1" remains as a "1". The processed original signal and the coded signal sent by the coder 3 are sent to the modulator 5 together, and the modulated signal image generated by multiplying the processed original signal by the modulator 5 is shown in fig. 2, and the modulated signal is used for signal transmission and is sent to a receiving end by a sender.
As shown in fig. 1, at the receiving end, the receiver, the
second delay 6, the
comparator 7, and the
demodulator 8 are sequentially connected, the receiver is further directly connected to the
comparator 7, the received modulated signal from the
modulator 5 is divided into two paths, one path is directly sent to the
comparator 7, the other path is delayed by the
second delay 6 and then sent to the
comparator 7, in the
comparator 7, the signal l (n) that has not been delayed is divided by the signal l (n +1) that has been delayed by the
second delay 6, an absolute value is obtained, and it is determined which range of the 4 ranges (i.e., (a, B) (B, C) (C, D) (D, E)) it falls in the coding division, when the absolute value falls in the coding division, the range is determined
When the signals belong to (a, B), (B, C), (C, D), (D, E), the
corresponding demodulation circuits 1, 2, 3, 4 are used; corresponding to comparison by
comparator 7
The
corresponding demodulation circuits 1, 2, 3 and 4 are used in sequence; the algorithm of the
demodulation circuit 1 is: when l (n)<0 and l (n +1)<When 0, let the reduction signal s (n) 1, s (n +1) 0; when l (n)<0 and l (n +1)>When 0, let reduction signal s (n) 1, s (n +1) 1; when l (n)>0 and l (n +1)<When 0, let the reduction signal s (n) be 0, s (n +1) be 0; when l (n)>0 and l (n +1)>When 0, let the reduction signal s (n) be 0 and s (n +1) be 1; the algorithm of the
demodulation circuit 2 is: when l (n)<0 and l (n +1)<When 0, the reduction signal s (n) is 1, s (n +1) is 1; when l (n)<0 and l (n +1)>When 0, let the reduction signal s (n) 1, s (n +1) 0; when l (n)>0 and l (n +1)<When 0, let the reduction signal s (n) be 0 and s (n +1) be 1; when l (n)>0 and l (n +1)>When 0, let the reduction signal s (n) be 0, s (n +1) be 0; the algorithm of the
demodulation circuit 3 is: when l (n)<0 and l (n +1)<When 0, let the reduction signal s (n) be 0 and s (n +1) be 1; when l (n)<0 and l (n +1)>When 0, let the reduction signal s (n) be 0, s (n +1) be 0; when l (n)>0 and l (n +1)<When 0, let reduction signal s (n) 1, s (n +1) 1; when l (n)>0 and l (n +1)>When 0, let the reduction signal s (n) 1, s (n +1) 0; the algorithm of the
demodulation circuit 4 is: when l (n)<0 and l (n +1)<When 0, let the reduction signal s (n) be 0, s (n +1) be 0; when l (n)<0 and l (n +1)>When 0, let the reduction signal s (n) 0, s (n +1) 1; when l (n)>0 and l (n +1)<When 0, let the reduction signal s (n) 1, s (n +1) 0; when l (n)>0 and l (n +1)>At 0, the reduction signal s (n) is 1, and s (n +1) is 1. S (n), s (n +1) at each time are connected in sequence to obtain final restored signals, for example, l (1), l (1+1) input to the
demodulator 8 can obtain s (1), s (2); inputting l (3) and l (3+1) to obtain s (3) and s (4) … …, and connecting s (1), s (2), s (3) and s (4) … … in sequence to obtain final reduction signal
To better illustrate this demodulation process, the following procedure is attached to the demodulation section:
the modulated signals are compared and then demodulated by different demodulation circuits in different ranges, so that the original signals can be recovered under the condition that a receiving end does not carry out synchronization. As can be seen from fig. 3 and 4, the restored signal demodulated by the demodulator is identical to the original signal.
It should be noted that the above-mentioned only illustrates the preferred embodiments and principles of the present invention, and that those skilled in the art will be able to make modifications to the embodiments based on the idea of the present invention, and that such modifications should be considered as the protection scope of the present invention.