CN112612715A - System testing method and device based on chaotic engineering, computer equipment and storage medium - Google Patents
System testing method and device based on chaotic engineering, computer equipment and storage medium Download PDFInfo
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Abstract
The embodiment of the invention discloses a system testing method and device based on chaotic engineering, computer equipment and a storage medium. The method belongs to the technical field of system testing, and comprises the following steps: acquiring a target IP address input by a user, and judging whether the acquired target IP address meets a preset condition or not; if the acquired target IP address meets the preset condition, judging whether a preset creating instruction for creating the chaotic experiment is received or not; if a preset creating instruction is received, acquiring fault information of the chaotic experiment, and sending the fault information to a target program corresponding to a target IP address through a first preset instruction; and obtaining an execution result corresponding to the target program through a second preset instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result. The embodiment of the application can improve the accuracy and reliability of system test, and further improve the high availability of the system.
Description
Technical Field
The invention relates to the technical field of system testing, in particular to a system testing method and device based on chaotic engineering, computer equipment and a storage medium.
Background
In the background of the era with information technology as the core, people put higher demands on the functionality and stability of a computer software system, the traditional system test at present is a verification method for a specific condition and variable, the test generally only generates a binary result, only tests possible values of the known system attributes, and the defense capability of the system for unpredictable but possibly occurring faults cannot be improved.
Disclosure of Invention
The embodiment of the invention provides a system testing method and device based on chaotic engineering, computer equipment and a storage medium, aiming at solving the problems of inaccurate and low availability of the existing system testing.
In a first aspect, an embodiment of the present invention provides a system testing method based on chaotic engineering, including:
acquiring a target IP address input by a user, and judging whether the acquired target IP address meets a preset condition or not;
if the acquired target IP address meets a preset condition, judging whether a preset creating instruction for creating the chaotic experiment is received or not;
if the preset creating instruction is received, acquiring fault information of the chaotic experiment, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction;
and obtaining an execution result corresponding to the target program through a second preset instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In a second aspect, an embodiment of the present invention further provides a system testing apparatus based on chaotic engineering, including:
the first judgment unit is used for acquiring a target IP address input by a user and judging whether the acquired target IP address meets a preset condition or not;
the second judging unit is used for judging whether a preset creating instruction for creating the chaotic experiment is received or not if the obtained target IP address meets a preset condition;
the sending unit is used for acquiring fault information of the chaotic experiment if the preset creating instruction is received, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction;
and the acquisition unit is used for acquiring an execution result corresponding to the target program through a second preset instruction and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In a third aspect, an embodiment of the present invention further provides a computer device, which includes a memory and a processor, where the memory stores a computer program, and the processor implements the above method when executing the computer program.
In a fourth aspect, the present invention also provides a computer-readable storage medium, which stores a computer program, and the computer program can implement the above method when being executed by a processor.
The embodiment of the invention provides a system testing method and device based on chaotic engineering, computer equipment and a storage medium. Wherein the method comprises the following steps: acquiring a target IP address input by a user, and judging whether the acquired target IP address meets a preset condition or not; if the acquired target IP address meets a preset condition, judging whether a preset creating instruction for creating the chaotic experiment is received or not; if the preset creating instruction is received, acquiring fault information of the chaotic experiment, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction; and obtaining an execution result corresponding to the target program through a second preset instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result. According to the technical scheme of the embodiment of the invention, the acquired fault information of the chaotic experiment is sent to the target program corresponding to the target IP address on the basis of judging the preset condition, so that the accuracy and the reliability of system test can be improved, and the high availability of the system is further improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a schematic flow chart of a system testing method based on chaotic engineering according to an embodiment of the present invention;
fig. 2 is a schematic sub-flow diagram of a system testing method based on chaotic engineering according to an embodiment of the present invention;
fig. 3 is a sub-flow diagram of a system testing method based on chaotic engineering according to an embodiment of the present invention;
fig. 4 is a sub-flow diagram of a system testing method based on chaotic engineering according to an embodiment of the present invention;
fig. 5 is a schematic flow chart of a system testing method based on chaotic engineering according to another embodiment of the present invention;
fig. 6 is a schematic flow chart of a system testing method based on chaotic engineering according to another embodiment of the present invention;
fig. 7 is a schematic block diagram of a system testing apparatus based on chaotic engineering according to an embodiment of the present invention;
fig. 8 is a schematic block diagram of a first determining unit of the system testing apparatus based on chaotic engineering according to the embodiment of the present invention;
fig. 9 is a schematic block diagram of a transmitting unit of the system testing apparatus based on chaotic engineering according to the embodiment of the present invention;
fig. 10 is a schematic block diagram of a first transmitting subunit of the system testing apparatus based on chaotic engineering according to the embodiment of the present invention;
fig. 11 is a schematic block diagram of an obtaining unit of the system testing apparatus based on chaotic engineering according to the embodiment of the present invention;
fig. 12 is a schematic block diagram of a system testing apparatus based on chaotic engineering according to another embodiment of the present invention;
fig. 13 is a schematic block diagram of a system testing apparatus based on chaotic engineering according to another embodiment of the present invention; and
fig. 14 is a schematic block diagram of a computer device according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
It is also to be understood that the terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification of the present invention and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.
It should be further understood that the term "and/or" as used in this specification and the appended claims refers to and includes any and all possible combinations of one or more of the associated listed items.
As used in this specification and the appended claims, the term "if" may be interpreted contextually as "when", "upon" or "in response to a determination" or "in response to a detection". Similarly, the phrase "if it is determined" or "if a [ described condition or event ] is detected" may be interpreted contextually to mean "upon determining" or "in response to determining" or "upon detecting [ described condition or event ]" or "in response to detecting [ described condition or event ]".
Referring to fig. 1, fig. 1 is a schematic flow chart of a system testing method based on chaotic engineering according to an embodiment of the present invention. The chaotic engineering-based system testing method can be applied to terminals, such as intelligent terminal equipment of a laptop, a notebook computer, a desktop computer and the like, and is realized through application programs installed on the terminals, so that the accuracy and the efficiency of system testing are improved, and the high availability of the system is further improved, for example, the chaotic experiment platform developed by the embodiment of the invention. As shown in fig. 1, the method includes the following steps S100-S130.
S100, acquiring a target IP address input by a user, and judging whether the acquired target IP address meets a preset condition.
In the embodiment of the invention, when a user logs in the chaotic experiment platform through a user name and a target IP address, the chaotic experiment platform firstly acquires the target IP address input by a login interface user of the chaotic experiment platform and judges whether the acquired target IP address meets a preset condition. The preset condition is that the user has the use authority of using the target IP address and the use time of the target IP address does not exceed the preset time.
It should be noted that, in the present application, both the usage right and the usage time of the target IP address are set or input by the user when applying to the process management platform.
Referring to fig. 2, in an embodiment, for example, in the embodiment of the present invention, the step S100 includes the following steps S101 to S102.
S101, judging whether the user has the use authority for using the target IP address or not according to preset user authority information, if so, executing a step S102, otherwise, executing a step S104;
s102, judging whether the service time of the target IP address exceeds a preset time, if not, executing a step S103, otherwise, executing a step S104;
s103, judging that the target IP address meets a preset condition;
and S104, sending out the prompting information of forbidding use to the user.
In the application, the chaotic experiment platform firstly acquires a target IP address input by a login interface of the chaotic experiment platform, and then judges whether the acquired target IP address meets a preset condition. Specifically, whether a user has the use authority to use the target IP address is judged according to preset user authority information; if the user has the use authority of using the target IP address, continuously judging whether the use time of the target IP address exceeds the preset time; and if the service time of the target IP address does not exceed the preset time, judging that the target IP address meets the preset condition. If the user does not have the use authority for using the target IP address or if the use time of the target IP address exceeds the preset time, the user can not log in the chaotic experiment platform, and prompting information for forbidding use is sent to the user so as to remind the user to apply for the use authority and the use time of the target IP address to the process management platform.
S110, if the acquired target IP address meets a preset condition, judging whether a preset creating instruction for creating the chaotic experiment is received.
In the embodiment of the invention, if the acquired target IP address meets the preset condition, that is, the user has the use permission to use the target IP address and the use time of the target IP address does not exceed the preset time, whether the preset creating instruction for creating the chaotic experiment is received or not is continuously judged.
It should be noted that, in the embodiment of the present invention, after the user successfully logs in the chaotic experiment platform, the chaotic experiment can be created through the creation button on the interface.
And S120, acquiring fault information of the chaotic experiment, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction.
In the embodiment of the invention, after a user successfully logs in a chaotic experiment platform, a chaotic experiment is established through an establishment button on an interface, if a preset establishment instruction is received, fault information of the chaotic experiment is acquired, and the fault information is sent to a target program corresponding to a target IP address through a first preset instruction; and if the preset creating instruction is not received, performing corresponding processing according to the user operation. For example, the user turns off the chaotic experimental platform. The first predetermined instruction is an Http request instruction.
Referring to fig. 3, in an embodiment, for example, in the embodiment of the present invention, the step S120 includes the following steps S121 to S122.
S121, if the preset creating instruction is received, acquiring fault information of the chaotic experiment, wherein the fault information comprises a target experiment scene, a fault type corresponding to the target experiment scene and a fault parameter corresponding to the fault type;
and S122, sending the fault information to a target program corresponding to the target IP address through an Http request instruction.
In the embodiment of the invention, if a preset creating instruction is received, fault information of a chaotic experiment is acquired, wherein the fault information comprises a target experiment scene, a fault type corresponding to the target experiment scene and a fault parameter corresponding to the fault type; and sending the fault information to a target program corresponding to the target IP address through an Http request instruction. The target experiment scene is a specific scene of experiment simulation, the experiment targets (namely, components generated by the experiment) are different, and the experiment scenes are also different. One experiment scene comprises a scene name, parameters required by the scene, some experiment rule matchers and the like. For example, the ORACLE JDK method throws an abnormal experimental scenario: an intra-program method call exception. And the fault type corresponding to the abnormal experiment throwing scene of the ORACLE JDK method is the abnormal fault throwing type of the ORACLE JDK method. The fault information is a preset section of code, and the target program added with the code can enable the system to be in a target experiment scene. The preset code segment can be set according to actual needs, and is not limited in this respect.
Referring to fig. 4, in an embodiment, for example, in the embodiment of the present invention, the step S122 includes the following steps S1221 to S1223.
S1221, sending the fault information and the preset target program name to a server corresponding to the target IP address through an Http request instruction;
s1222, searching the target program on the server according to the preset target program name;
and S1223, adding the fault information to the target program.
In the embodiment of the invention, firstly, fault information and a preset target program name are sent to a server corresponding to a target IP address through an Http request instruction; then quickly searching a target program on the server according to a preset target program name; and finally, adding the fault information to the target program corresponding to the preset target program name. In the embodiment of the invention, the target program can be accurately and quickly found through the setting of the preset application program name.
S130, obtaining an execution result corresponding to the target program through a second preset instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In the embodiment of the invention, after the fault information is sent to the target program corresponding to the target IP address through the Http request instruction, the execution result corresponding to the target program is obtained through the second preset instruction, and the experiment result corresponding to the chaotic experiment is determined according to the execution result and the preset standard result. The second preset instruction is an Http Response instruction, and specifically, an execution result corresponding to the target program is obtained through the Http Response instruction, and the execution result is compared with a preset standard result to determine an experiment result corresponding to the chaotic experiment.
It should be noted that, in the embodiment of the present invention, the preset standard result may be set according to actual needs, which is not limited to this.
Fig. 5 is a schematic flow chart of a system testing method based on chaotic engineering according to another embodiment of the present invention, and as shown in fig. 5, in the embodiment of the present invention, the method includes steps S100-S140. That is, in the present embodiment, after step S130 of the above embodiment, the method further includes step S140.
And S140, generating an experiment report according to the experiment result and displaying the experiment report.
In the embodiment of the invention, after the execution result corresponding to the target program is obtained through the Http Response instruction and the experiment result corresponding to the chaotic experiment is determined according to the execution result and the preset standard result, the experiment report is generated and displayed according to the experiment result, so that the experiment report can be conveniently checked by a user.
Fig. 6 is a schematic flow chart of a system testing method based on chaotic engineering according to another embodiment of the present invention, and as shown in fig. 6, in the embodiment of the present invention, the method includes steps S100 to S150. That is, in this embodiment, after step S140 of the above-mentioned another embodiment, the method further includes step S150.
And S150, if a preset storage instruction is received, generating a chaotic experiment test case template by the chaotic experiment.
In the embodiment of the invention, after the experiment report is generated and displayed according to the experiment result, if the user feels that the created chaotic experiment has better test effect, the chaotic experiment can be stored to generate the chaotic experiment test case template for convenient subsequent reuse.
It should be noted that, by setting the timer, the chaotic experiment platform in the embodiment of the present invention also supports the functions of automatically executing, activating, and turning off the chaotic experiment by one key.
Fig. 7 is a schematic block diagram of a system testing apparatus 200 based on chaotic engineering according to an embodiment of the present invention. As shown in fig. 7, the present invention also provides a system testing apparatus 200 based on the chaotic engineering, corresponding to the above system testing method based on the chaotic engineering. The chaotic engineering based system test apparatus 200 includes a unit for performing the chaotic engineering based system test method described above, and the apparatus may be configured in a terminal. Specifically, referring to fig. 7, the system testing apparatus 200 based on the chaotic engineering includes a first determining unit 201, a second determining unit 202, a sending unit 203, and an obtaining unit 204.
The first judging unit 201 is configured to acquire a target IP address input by a user, and judge whether the acquired target IP address meets a preset condition; the second judging unit 202 is configured to judge whether a preset creating instruction for creating a chaotic experiment is received if the obtained target IP address meets a preset condition; the sending unit 203 is configured to, if the preset creation instruction is received, obtain fault information of the chaotic experiment, and send the fault information to a target program corresponding to the target IP address through a first preset instruction; the obtaining unit 204 is configured to obtain an execution result corresponding to the target program through a second preset instruction, and determine an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In some embodiments, for example, in the present embodiment, as shown in fig. 8, the first determining unit 201 includes a first determining subunit 2011, a second determining subunit 2012 and a determining unit 2013.
The first determining subunit 2011 is configured to determine, according to preset user permission information, whether the user has a permission to use the target IP address; the second determining subunit 2012 is configured to determine whether the usage time of the target IP address exceeds a preset time if the user has a usage right to use the target IP address; the determining unit 2013 is configured to determine that the target IP address meets a preset condition if the usage time of the target IP address does not exceed a preset time.
In some embodiments, for example, in this embodiment, as shown in fig. 9, the sending unit 203 includes an acquiring sub-unit 2031 and a first sending sub-unit 2032.
The obtaining subunit 2031 is configured to obtain fault information of the chaotic experiment if the preset creation instruction is received, where the fault information includes a target experiment scene, a fault type corresponding to the target experiment scene, and a fault parameter corresponding to the fault type; the first sending subunit 2032 is configured to send the fault information to the target program corresponding to the target IP address through an Http request instruction.
In some embodiments, for example, in this embodiment, as shown in fig. 10, the first sending sub-unit 2032 includes a second sending sub-unit 20321, a searching unit 20322, and an adding unit 20323.
The second sending subunit 20321 is configured to send the fault information and the preset target program name to a server corresponding to the target IP address through an Http request instruction; the searching unit 20322 is configured to search for the target program on the server according to the preset target program name; an adding unit 20323 is configured to add the failure information to the target program.
In some embodiments, such as this embodiment, as shown in fig. 11, the obtaining unit 204 includes a obtaining subunit 2041.
The obtaining subunit 2041 is configured to obtain an execution result corresponding to the target program through an Http Response instruction, and determine an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In some embodiments, such as the present embodiment, the apparatus 200 further includes a first generating unit 205, as shown in fig. 12.
The first generating unit 205 is configured to generate an experiment report according to the experiment result and display the experiment report.
In some embodiments, such as this embodiment, the apparatus 200 further includes a second generating unit 206, as shown in fig. 13.
The second generating unit 206 is configured to generate a chaos experiment test case template from the chaos experiment if a preset saving instruction is received.
Referring to fig. 14, fig. 14 is a schematic block diagram of a computer device according to an embodiment of the present application. The computer device 300 is a terminal, and the terminal may be an electronic device with a communication function, such as a tablet computer, a notebook computer, and a desktop computer.
Referring to fig. 14, the computer device 300 includes a processor 302, memory, and a network interface 305 connected by a system bus 301, wherein the memory may include a non-volatile storage medium 503 and an internal memory 304.
The nonvolatile storage medium 303 may store an operating system 3031 and a computer program 3032. The computer program 3032, when executed, causes the processor 302 to perform a method for chaotic engineering based system testing.
The processor 302 is used to provide computing and control capabilities to support the operation of the overall computer device 300.
The internal memory 304 provides an environment for running the computer program 3032 in the non-volatile storage medium 303, and when the computer program 3032 is executed by the processor 302, the processor 302 can be enabled to execute a system testing method based on chaotic engineering.
The network interface 305 is used for network communication with other devices. Those skilled in the art will appreciate that the configuration shown in fig. 14 is a block diagram of only a portion of the configuration associated with the present application and does not constitute a limitation of the computer apparatus 300 to which the present application is applied, and that a particular computer apparatus 300 may include more or less components than those shown, or may combine certain components, or have a different arrangement of components. Wherein the processor 302 is configured to run a computer program 3032 stored in the memory to implement the following steps: acquiring a target IP address input by a user, and judging whether the acquired target IP address meets a preset condition or not; if the acquired target IP address meets a preset condition, judging whether a preset creating instruction for creating the chaotic experiment is received or not; if the preset creating instruction is received, acquiring fault information of the chaotic experiment, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction; and obtaining an execution result corresponding to the target program through a second preset instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In some embodiments, for example, in this embodiment, when the processor 302 performs the step of determining whether the obtained target IP address meets the preset condition, the following steps are specifically performed: judging whether the user has the use authority for using the target IP address or not according to preset user authority information; if the user has the use authority of using the target IP address, judging whether the use time of the target IP address exceeds preset time or not; and if the service time of the target IP address does not exceed the preset time, judging that the target IP address meets the preset condition.
In some embodiments, for example, in this embodiment, when implementing the step of obtaining the fault information of the chaotic experiment if the preset creation instruction is received, and sending the fault information to the target program corresponding to the target IP address through the first preset instruction, the processor 302 specifically implements the following steps: if the preset creating instruction is received, acquiring fault information of the chaotic experiment, wherein the fault information comprises a target experiment scene, a fault type corresponding to the target experiment scene and a fault parameter corresponding to the fault type; and sending the fault information to a target program corresponding to the target IP address through an Http request instruction.
In some embodiments, for example, in this embodiment, when implementing the step of sending the fault information to the target program corresponding to the target IP address through the Http request instruction, the processor 302 specifically implements the following steps: sending the fault information and a preset target program name to a server corresponding to the target IP address through an Http request instruction; searching a target program on the server according to the preset target program name; adding the fault information to the target program.
In some embodiments, for example, in this embodiment, when the step of obtaining the execution result corresponding to the target program through the second preset instruction and determining the experiment result corresponding to the chaotic experiment according to the execution result and the preset standard result is implemented by the processor 302, the following steps are specifically implemented: and obtaining an execution result corresponding to the target program through an Http Response instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In some embodiments, for example, in this embodiment, after implementing the step of obtaining the execution result corresponding to the target program through the second preset instruction, and determining the experiment result corresponding to the chaotic experiment according to the execution result and the preset standard result, the specific implementation further includes the following steps: and generating an experiment report according to the experiment result and displaying the experiment report.
In some embodiments, for example, in this embodiment, after the step of generating and displaying the experiment report according to the experiment result is implemented by the processor 302, the specific implementation further includes the following steps: and if a preset storage instruction is received, generating a chaotic experiment test case template by the chaotic experiment.
It should be understood that, in the embodiment of the present Application, the Processor 302 may be a Central Processing Unit (CPU), and the Processor 302 may also be other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs) or other Programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, and the like. Wherein a general purpose processor may be a microprocessor or the processor may be any conventional processor or the like.
It will be understood by those skilled in the art that all or part of the flow of the method implementing the above embodiments may be implemented by a computer program instructing associated hardware. The computer program may be stored in a storage medium, which is a computer-readable storage medium. The computer program is executed by at least one processor in the computer system to implement the flow steps of the embodiments of the method described above. Accordingly, the present invention also provides a storage medium. The storage medium may be a computer-readable storage medium. The storage medium stores a computer program. The computer program, when executed by a processor, causes the processor to perform the steps of: acquiring a target IP address input by a user, and judging whether the acquired target IP address meets a preset condition or not; if the acquired target IP address meets a preset condition, judging whether a preset creating instruction for creating the chaotic experiment is received or not; if the preset creating instruction is received, acquiring fault information of the chaotic experiment, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction; and obtaining an execution result corresponding to the target program through a second preset instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In some embodiments, for example, in this embodiment, when the processor executes the computer program to implement the step of determining whether the obtained target IP address meets the preset condition, the following steps are specifically implemented: judging whether the user has the use authority for using the target IP address or not according to preset user authority information; if the user has the use authority of using the target IP address, judging whether the use time of the target IP address exceeds preset time or not; and if the service time of the target IP address does not exceed the preset time, judging that the target IP address meets the preset condition.
In some embodiments, for example, in this embodiment, when the processor executes the computer program to implement a step of obtaining fault information of the chaotic experiment if the preset creation instruction is received, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction, the following steps are specifically implemented: if the preset creating instruction is received, acquiring fault information of the chaotic experiment, wherein the fault information comprises a target experiment scene, a fault type corresponding to the target experiment scene and a fault parameter corresponding to the fault type; and sending the fault information to a target program corresponding to the target IP address through an Http request instruction.
In some embodiments, for example, in this embodiment, when the processor executes the computer program to implement the step of sending the failure information to the target program corresponding to the target IP address through an Http request instruction, the following steps are specifically implemented: sending the fault information and a preset target program name to a server corresponding to the target IP address through an Http request instruction; searching a target program on the server according to the preset target program name; adding the fault information to the target program.
In some embodiments, for example, in this embodiment, when the processor executes the computer program to obtain an execution result corresponding to the target program through a second preset instruction, and determines an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result, the following steps are specifically implemented: and obtaining an execution result corresponding to the target program through an Http Response instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
In some embodiments, for example, in this embodiment, after the step of executing the computer program to obtain the execution result corresponding to the target program through the second preset instruction and determining the experiment result corresponding to the chaotic experiment according to the execution result and the preset standard result, the specific implementation of the processor further includes the following steps: and generating an experiment report according to the experiment result and displaying the experiment report.
In some embodiments, for example, in this embodiment, after the processor executes the computer program to implement the step of generating and displaying the experiment report according to the experiment result, the specific implementation further includes the following steps: and if a preset storage instruction is received, generating a chaotic experiment test case template by the chaotic experiment.
The storage medium may be a usb disk, a removable hard disk, a Read-Only Memory (ROM), a magnetic disk, or an optical disk, which can store various computer readable storage media.
Those of ordinary skill in the art will appreciate that the elements and algorithm steps of the examples described in connection with the embodiments disclosed herein may be embodied in electronic hardware, computer software, or combinations of both, and that the components and steps of the examples have been described in a functional general in the foregoing description for the purpose of illustrating clearly the interchangeability of hardware and software. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative. For example, the division of each unit is only one logic function division, and there may be another division manner in actual implementation. For example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented.
The steps in the method of the embodiment of the invention can be sequentially adjusted, combined and deleted according to actual needs. The units in the device of the embodiment of the invention can be merged, divided and deleted according to actual needs. In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a storage medium. Based on such understanding, the technical solution of the present invention essentially or partially contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a terminal, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
It will be apparent to those skilled in the art that various changes and modifications may be made in the present invention without departing from the spirit and scope of the invention. Thus, while the invention has been described with respect to the above-described embodiments, it will be understood that the invention is not limited thereto but may be embodied with various modifications and changes.
While the invention has been described with reference to specific embodiments, the invention is not limited thereto, and various equivalent modifications and substitutions can be easily made by those skilled in the art within the technical scope of the invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A system testing method based on chaotic engineering is characterized by comprising the following steps:
acquiring a target IP address input by a user, and judging whether the acquired target IP address meets a preset condition or not;
if the acquired target IP address meets a preset condition, judging whether a preset creating instruction for creating the chaotic experiment is received or not;
if the preset creating instruction is received, acquiring fault information of the chaotic experiment, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction;
and obtaining an execution result corresponding to the target program through a second preset instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
2. The method according to claim 1, wherein the determining whether the obtained target IP address meets a preset condition comprises:
judging whether the user has the use authority for using the target IP address or not according to preset user authority information;
if the user has the use authority of using the target IP address, judging whether the use time of the target IP address exceeds preset time or not;
and if the service time of the target IP address does not exceed the preset time, judging that the target IP address meets the preset condition.
3. The method according to claim 1, wherein if the preset creation instruction is received, acquiring fault information of the chaotic experiment, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction, includes:
if the preset creating instruction is received, acquiring fault information of the chaotic experiment, wherein the fault information comprises a target experiment scene, a fault type corresponding to the target experiment scene and a fault parameter corresponding to the fault type;
and sending the fault information to a target program corresponding to the target IP address through an Http request instruction.
4. The method of claim 3, wherein sending the failure information to the target program corresponding to the target IP address through an Http request instruction comprises:
sending the fault information and a preset target program name to a server corresponding to the target IP address through an Http request instruction;
searching a target program on the server according to the preset target program name;
adding the fault information to the target program.
5. The method according to claim 1, wherein the obtaining of the execution result corresponding to the target program through a second preset instruction and the determining of the experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result comprise:
and obtaining an execution result corresponding to the target program through an Http Response instruction, and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
6. The method according to claim 1, wherein after the step of obtaining the execution result corresponding to the target program through a second preset instruction and determining the experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result, the method further comprises:
and generating an experiment report according to the experiment result and displaying the experiment report.
7. The method of claim 6, wherein the step of generating and displaying the experimental report according to the experimental result further comprises:
and if a preset storage instruction is received, generating a chaotic experiment test case template by the chaotic experiment.
8. A chaotic engineering based system testing device is characterized by comprising:
the first judgment unit is used for acquiring a target IP address input by a user and judging whether the acquired target IP address meets a preset condition or not;
the second judging unit is used for judging whether a preset creating instruction for creating the chaotic experiment is received or not if the obtained target IP address meets a preset condition;
the sending unit is used for acquiring fault information of the chaotic experiment if the preset creating instruction is received, and sending the fault information to a target program corresponding to the target IP address through a first preset instruction;
and the acquisition unit is used for acquiring an execution result corresponding to the target program through a second preset instruction and determining an experiment result corresponding to the chaotic experiment according to the execution result and a preset standard result.
9. A computer arrangement, characterized in that the computer arrangement comprises a memory having stored thereon a computer program and a processor implementing the method according to any of claims 1-7 when executing the computer program.
10. A computer-readable storage medium, characterized in that the storage medium stores a computer program which, when executed by a processor, implements the method according to any one of claims 1-7.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113515449A (en) * | 2021-05-19 | 2021-10-19 | 中国工商银行股份有限公司 | Chaos test method, system, electronic equipment and storage medium |
| CN113835987A (en) * | 2021-11-25 | 2021-12-24 | 北京世纪好未来教育科技有限公司 | Chaotic experiment execution file generation method and device, electronic equipment and storage medium |
| CN113973068A (en) * | 2021-10-20 | 2022-01-25 | 重庆紫光华山智安科技有限公司 | Chaos test method and device, chaos test platform and storage medium |
| CN115081410A (en) * | 2022-07-19 | 2022-09-20 | 中电金信软件有限公司 | Method and device for automatically generating experiment report |
| CN115840716A (en) * | 2023-02-28 | 2023-03-24 | 云账户技术(天津)有限公司 | Method, system, electronic device and medium for realizing online chaos experiment |
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2020
- 2020-12-30 CN CN202011604902.8A patent/CN112612715A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113515449A (en) * | 2021-05-19 | 2021-10-19 | 中国工商银行股份有限公司 | Chaos test method, system, electronic equipment and storage medium |
| CN113973068A (en) * | 2021-10-20 | 2022-01-25 | 重庆紫光华山智安科技有限公司 | Chaos test method and device, chaos test platform and storage medium |
| CN113973068B (en) * | 2021-10-20 | 2023-05-26 | 重庆紫光华山智安科技有限公司 | Chaos testing method and device, chaos testing platform and storage medium |
| CN113835987A (en) * | 2021-11-25 | 2021-12-24 | 北京世纪好未来教育科技有限公司 | Chaotic experiment execution file generation method and device, electronic equipment and storage medium |
| CN115081410A (en) * | 2022-07-19 | 2022-09-20 | 中电金信软件有限公司 | Method and device for automatically generating experiment report |
| CN115840716A (en) * | 2023-02-28 | 2023-03-24 | 云账户技术(天津)有限公司 | Method, system, electronic device and medium for realizing online chaos experiment |
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