CN112599065B - Display device - Google Patents
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- 239000004973 liquid crystal related substance Substances 0.000 description 3
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
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Abstract
The invention discloses a display device, which comprises a time schedule controller, a pixel unit and a signal processing module, wherein one end of the signal processing module is connected with the time schedule controller, the other end of the signal processing module is connected with at least two sub-pixels, and the time schedule controller is arranged to output at least two control signals to the signal processing module in sequence when source driving data are input to the source electrode of each sub-pixel; the signal processing module is arranged to sequentially generate a charging signal corresponding to each sub-pixel according to at least two control signals and input the generated charging signal to the gate of the corresponding sub-pixel. The invention aims to reduce the data channel for transmitting source driving data so as to reduce the cost of the display device.
Description
Technical Field
The invention relates to the technical field of display devices, in particular to a display device.
Background
A pixel of a display device (e.g., a liquid crystal display) generally includes three sub-pixels, namely, red, green, and blue sub-pixels, and a light-emitting structure of each sub-pixel generally includes a source and a gate, and a timing controller controls a source driver to input driving data to the source of the sub-pixel, and the gate is turned on in accordance with a scanning signal generated by the source driver, so that light-emitting display of the sub-pixel can be achieved.
However, currently, three sub-pixels in a pixel are arranged along the row direction, and the scan signal from the source driver generally opens the gates of the entire row at the same time, which determines that a separate data channel needs to be arranged between each sub-pixel and the source driver to ensure that the source driving data is input to the source at the same time, so as to achieve the matching conduction of the source and the gate to make the sub-pixels emit light, for example, three data channels are needed for three sub-pixels. This results in a large number of independent data channels for driving all pixels of the display device, which increases the wiring difficulty and material consumption of the display device, and increases the cost of the display device.
Disclosure of Invention
The present invention is directed to a display device, which reduces the number of data channels for transmitting source driving data, thereby reducing the cost of the display device.
In order to achieve the above object, the present invention provides a display device, which includes a timing controller, a pixel unit and a signal processing module, wherein the pixel unit includes at least two sub-pixels, one end of the signal processing module is connected to the timing controller, and the other end of the signal processing module is connected to at least two of the sub-pixels;
the time schedule controller is arranged to output at least two control signals to the signal processing module in sequence when source electrode driving data are input to the source electrode of each sub-pixel;
the signal processing module is arranged to sequentially generate a charging signal corresponding to each sub-pixel according to at least two control signals and input the generated charging signal to the gate of the corresponding sub-pixel.
Optionally, any two sub-pixels adjacent to each other in the driving order in at least two of the sub-pixels are defined as a first sub-pixel and a second sub-pixel;
the timing controller is further configured to output a first control signal to the signal processing module in a first signal period and output a second control signal to the signal processing module in a second signal period when there is source driving data input to the first subpixel and the second subpixel;
wherein a start time of the first signal period is earlier than a start time of the second signal period.
Optionally, the signal processing module is a potential boosting module, and the potential boosting module is configured to perform a potential boosting operation on at least two of the control signals received in sequence, obtain a charging signal corresponding to each of the sub-pixels, and input the generated charging signal to a gate of the corresponding sub-pixel.
Optionally, the potential boosting module includes a first potential boosting unit and a second potential boosting unit;
the time schedule controller is also set to output the first control signal to the first potential boosting unit in the first signal period and output the second control signal to the second potential boosting unit in the second signal period;
the input end of the first potential boosting unit is connected with the time sequence controller, the output end of the first potential boosting unit is connected with the first sub-pixel, and the first potential boosting unit is configured to boost the potential of the first control signal to obtain a first charging signal and input the first charging signal to the first sub-pixel;
the input end of the second potential boosting unit is connected with the time sequence controller, the output end of the second potential boosting unit is connected with the second sub-pixel, and the second potential boosting unit is set to boost the potential of the second control signal to obtain a second charging signal and input the second charging signal to the second sub-pixel.
Optionally, the signal processing module is a level shift circuit, and the level shift circuit is configured to perform a level shift operation on at least two of the control signals received in sequence, obtain a corresponding high level signal as a charging signal corresponding to each of the sub-pixels, and input the generated charging signal to a gate of the corresponding sub-pixel.
Optionally, the display device further includes a source driver, the pixel unit has a source signal input terminal, each of the sub-pixels is connected to the source signal input terminal, and the source signal input terminal is connected to the source driver;
the source driver is configured to input source driving data to the source of the corresponding sub-pixel through the source signal input end; and/or the presence of a gas in the atmosphere,
the display device further comprises a display panel packaging structure, and the pixel unit and the signal processing module are arranged in the display panel packaging structure.
Optionally, the timing controller is further configured to set an end time of the first signal period as a start time of the second signal period.
Optionally, the timing controller is further configured to perform the following steps:
acquiring first source electrode driving data corresponding to the first sub-pixel and second source electrode driving data corresponding to the second sub-pixel;
determining a time interval according to a quantitative relationship between the first source driving data and the second source driving data;
determining the second signal period based on the first signal period and the time interval.
Optionally, the timing controller is further configured to determine a data deviation of the first source driving data and the second source driving data, and determine the time interval according to the data deviation.
Optionally, the timing controller is further configured to determine a start time of the second signal period according to an end time of the first signal period and the time interval;
wherein the starting time of the second signal period is earlier than the ending time of the first signal period.
The invention provides a display device, which is characterized in that a signal processing module is arranged between a time schedule controller and a pixel unit, when source driving data is input to the sources of at least two sub-pixels in the pixel unit through the time schedule controller, at least two corresponding control signals are sequentially output to the signal processing module, the signal processing module sequentially generates a charging signal of each sub-pixel based on the at least two control signals and inputs the charging signal to the grid electrode of the corresponding sub-pixel, the charging of the grid electrode can lead the light-emitting structure of the sub-pixel to be conducted to realize light-emitting display, in the process, the grid electrode of each sub-pixel in the pixel unit can be opened in time-sharing sequence instead of being opened at the same time through the cooperation of the time schedule controller and the signal processing module, and on the basis, the source electrode of each sub-pixel in the pixel unit can adopt the same data channel to carry out data transmission, the data channel for transmitting the source electrode driving data is effectively reduced, the difficulty of wiring of the display device is reduced, and consumable materials required by data lines are reduced, so that the cost of the display device is effectively reduced.
Drawings
FIG. 1 is a diagram illustrating a hardware structure of a display device according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating a hardware structure of another embodiment of a display device according to the present invention;
FIG. 3 is a timing control diagram of the display device according to the present invention.
The reference numbers illustrate:
| reference numerals | Name (R) | Reference numerals | Name (R) |
| 1 | |
3 | |
| 2 | |
31 | |
| 201 | First |
32 | |
| 202 | Second |
33 | |
| 203 | Third |
4 | Source driver |
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
The embodiment of the invention provides a display device. For example, a liquid crystal display, an organic light emitting diode display, or the like includes a display device having a light emitting structure with a source electrode and a drain electrode.
In an embodiment of the present invention, referring to fig. 1 and 2, the display device includes a timing controller 1, a pixel unit 3, and a signal processing module 2.
Specifically, the display device may include a plurality of pixel units 3 arranged in an array, each pixel unit 3 includes at least two sub-pixels, and at least two sub-pixels in one pixel unit 3 are arranged along a row direction. In the present embodiment, one pixel unit 3 includes three sub-pixels, i.e., a first sub-pixel 31, a second sub-pixel 32, and a third sub-pixel 33, such as a red pixel, a green pixel, and a blue pixel. In other embodiments, one pixel unit 3 may further be provided with 2 sub-pixels, 4 sub-pixels, or even more sub-pixels according to actual display requirements, such as a red pixel, a green pixel, a blue pixel, a white pixel, and so on. Each sub-pixel has a light-emitting structure, such as a Thin Film Transistor (TFT), having a source, a drain and a gate, the source is used for receiving display driving data corresponding to the sub-pixel, when a positive voltage greater than a threshold voltage is applied to the gate, the source and the drain are conducted to charge a pixel electrode corresponding to the sub-pixel, and when a pixel voltage is formed between the charged pixel electrode and a common electrode of the display device, the light-emitting molecules between the two electrodes are caused to emit light.
In the embodiment of the present invention, one end of the signal processing module 2 is connected to the timing controller 1, and the other end of the signal processing module 2 is connected to at least two of the sub-pixels. The timing controller 1 may send a control signal to the signal processing module 2 based on the connected channel, and the signal processing module 2 may process the received control signal and output a corresponding signal to the corresponding sub-pixel.
Specifically, the timing controller 1 is configured to sequentially output at least two control signals to the signal processing module 2 when there is source driving data input to the source of each of the sub-pixels; the signal processing module 2 is configured to sequentially generate a charging signal corresponding to each sub-pixel according to at least two control signals, and input the generated charging signal to the gate of the corresponding sub-pixel.
Here, the at least two control signals are signals for controlling the gate openings of the at least two sub-pixels, and the number of the at least two control signals is greater than or equal to the number of sub-pixels in one pixel unit 3. When the timing controller 1 recognizes a specific timing based on the set timing logic or receives an instruction from the source driver 4, it can be considered that there is currently source driving data input to the source of each sub-pixel in the pixel unit 3. At this time, the timing controller 1 may sequentially output at least two control signals to the signal processing module 2, the signal processing module 2 processes the received control signals based on the receiving sequence of the control signals to obtain a charging signal corresponding to each sub-pixel, and the charging signals are sequentially input to the gates of the corresponding sub-pixels based on the generating sequence of the charging signals. The charging signal is specifically an electrical signal greater than or equal to a threshold voltage corresponding to the gate turn-on, and based on this, the charging signal is input to the gate to charge the gate, so as to cause the source and the drain of the light emitting structure in the corresponding sub-pixel. Specifically, the signal processing module 2 can process the received control signal in real time, and send the charging signal formed after processing the control signal to the gate of the corresponding sub-pixel in real time, so as to ensure that the gate of the sub-pixel can be accurately matched with the control time sequence of the time schedule controller 1, ensure that the gate is opened at different times of each sub-pixel, and also ensure the timeliness of opening the gate of each sub-pixel.
The corresponding relation between the control signal and the sub-pixel required to be opened can be preset and stored, and the signal processing module 2 can identify the sub-pixel corresponding to the received control signal based on the stored corresponding relation, so that the charging signal corresponding to the control signal is sent to the gate of the corresponding sub-pixel. In addition, the corresponding relation between the control signal and the sub-pixel to be opened can also be realized through the structure of hardware, the signal processing module 2 can respectively correspond to each sub-pixel and correspondingly set a sub-processing module, each sub-processing module is connected with the time schedule controller 1, the time schedule controller 1 can sequentially send at least two control signals to each sub-processing module, and the sub-processing modules can process the control signals in real time after receiving the control signals to obtain the charging signals for opening the grid and input the charging signals to the grid of the corresponding sub-pixel.
In the display device provided in this embodiment, by arranging the signal processing module 2 between the timing controller 1 and the pixel unit 3, when the source driving data is input to the sources of at least two sub-pixels in the pixel unit 3 through the timing controller 1, the signal processing module 2 sequentially outputs at least two corresponding control signals to the signal processing module 2, the signal processing module 2 sequentially generates a charging signal for each sub-pixel based on the at least two control signals and inputs the charging signal to the gate of the corresponding sub-pixel, and the charging of the gate can turn on the light emitting structure of the sub-pixel to realize light emitting display, in this process, the gate of each sub-pixel in the pixel unit 3 can be turned on in time division sequentially instead of simultaneously through the cooperation of the timing controller 1 and the signal processing module 2, thereby facilitating the data transmission of the sources of each sub-pixel in the pixel unit 3 by using the same data channel, the data channel for transmitting the source electrode driving data is effectively reduced, the difficulty of wiring of the display device is reduced, and consumable materials required by data lines are reduced, so that the cost of the display device is effectively reduced.
In one embodiment, the display device further includes a source driver 4, the pixel unit 3 has source signal input terminals, each of the sub-pixels is connected to the source signal input terminal, the source signal input terminal is connected to the source driver 4, and the source driver 4 is configured to input source driving data to the source of the corresponding sub-pixel through the source signal input terminal. Specifically, the source driver 4 sequentially inputs the source driving data corresponding to each sub-pixel in the pixel unit 3 to the source signal input end of the pixel unit 3 according to the driving sequence, establishes a data transmission channel with the sub-pixel through the source signal input end, and inputs the corresponding source driving data to the source of the corresponding sub-pixel. The driving sequence can be obtained by acquiring the timing control signal sent by the timing controller 1. In this embodiment, the source driver 4 is connected to the source signal input end, and the time-sharing opening of the gate of each sub-pixel in the pixel unit 3 in the above embodiment is matched, so that only one data line needs to be passed between the source driver 4 and the pixel unit 3, and a plurality of sub-pixels in the pixel unit 3 can be driven, and each sub-pixel does not need to be connected to the source driver 4 through an independent data line, thereby ensuring the reduction of the difficulty of wiring of the display device and the reduction of consumable materials required by wiring, and effectively reducing the cost of the display device.
In one embodiment, any two sub-pixels adjacent to each other in the driving order among at least two of the sub-pixels are defined as a first sub-pixel 31 and a second sub-pixel 32; the timing controller 1 is further configured to output a first control signal to the signal processing module 2 in a first signal period and output a second control signal to the signal processing module 2 in a second signal period when there is source driving data input to the first subpixel 31 and the second subpixel 32; wherein a start time of the first signal period is earlier than a start time of the second signal period.
The driving sequence here is specifically the preset sequence of the gate opening of each sub-pixel in one pixel unit 3. For example, when one pixel unit 3 includes the first sub-pixel 31, the second sub-pixel 32, and the third sub-pixel 33, the driving sequence may be to drive the first sub-pixel 31, drive the second sub-pixel 32, and drive the third sub-pixel 33; the driving sequence may also be first driving the third sub-pixel 33, then driving the second sub-pixel 32, and finally driving the third sub-pixel 33.
The starting time of the second signal period can be set to be earlier than, equal to or later than the ending time of the first signal period according to actual needs. Specifically, in this embodiment, the timing controller 1 is further configured to set the ending time of the first signal period as the starting time of the second signal period.
Specifically, referring to fig. 3, the horizontal direction of fig. 3 represents time, the vertical direction represents a signal value of a control signal, the convex portion represents the presence of the control signal, and the concave portion represents the absence of the control signal. In the present embodiment, the pixel unit 3 includes a first sub-pixel 31, a second sub-pixel 32, and a third sub-pixel 33. The driving sequence is first driving the first sub-pixel 31, then driving the second sub-pixel 32, and finally driving the third sub-pixel 33. L in FIG. 21、L2And L3The timing control curves corresponding to the first sub-pixel 31, the second sub-pixel 32 and the third sub-pixel 33 are sequentially formed. Based on this, time T1 to time T2 are the first signal period, time T2 to time T3 are the second signal period, time T3 to time T4 are the third signal period, time T5 to time T6 are the first signal period when the pixel unit 3 needs to be driven next time, time T7 to time T8 are the second signal period when the pixel unit 3 needs to be driven next time, and so on. Based on this, the signal timing controller 1 may continuously transmit the first control signal to the signal processing module 2 between the time T1 and the time T2, stop transmitting the first control signal between the time T2 and the time T5, continuously transmit the second control signal to the signal processing module 2 between the time T2 and the time T3, stop transmitting the second control signal between the time T4 and the time T7, continuously transmit the third control signal to the signal processing module 2 between the time T3 and the time T4, and stop transmitting the third control signal after the time T4 until the start time of the third signal period when the pixel unit 3 needs to be driven next time. On the basis, the signal processing module 2 can process in real time after receiving the first control signal, the second control signal and the third control signal in sequence and generateThe corresponding charging signal is generated and input to the gate of the corresponding sub-pixel, wherein the charging signal corresponding to the first control signal is output to the gate of the first sub-pixel 31, the charging signal corresponding to the second control signal is output to the gate of the second sub-pixel 32, and the charging signal corresponding to the third control signal is output to the gate of the third sub-pixel 33. When the signal processing module 2 does not receive the first control signal, the corresponding charging signal cannot be generated and input to the gate of the first sub-pixel 31, and the gate of the first sub-pixel 31 is turned off; when the signal processing module 2 does not receive the second control signal, the corresponding charging signal cannot be generated and input to the gate of the second sub-pixel 32, and the gate of the second sub-pixel 32 is closed; when the signal processing module 2 does not receive the third control signal, the corresponding charging signal cannot be generated and input to the gate of the third sub-pixel 33, and the gate of the third sub-pixel 33 is turned off.
The source driver 4 can input the source driving data to the first sub-pixel 31 through the source signal input terminal in the first signal period, the source driver 4 can input the source driving data to the second sub-pixel 32 through the source signal input terminal in the second signal period, and the source driver 4 can input the source driving data to the third sub-pixel 33 through the source signal input terminal in the third signal period. Specifically, the starting time of the source driver 4 sending the source driving data corresponding to each sub-pixel may be later than the starting time of the signal period corresponding to each sub-pixel by a set time length, and the source driving data that is not opened by the gate is prevented from being input to the sub-pixel, so that the accuracy of the sub-pixel in driving and displaying based on the input source driving data is ensured, and the display quality of the display picture is ensured.
In this embodiment, the timing controller 1 outputs the control signal based on different signal periods in sequence, so as to implement the time-sharing turn-on of the gates of different pixels in the pixel unit 3, and continuously output the corresponding control signal in each signal period, which is beneficial to ensuring the charging amount of the gate, so as to ensure the successful turn-on of the gate of the corresponding sub-pixel.
In an embodiment, the timing controller 1 is further configured to perform the following steps: acquiring first source driving data corresponding to the first sub-pixel 31 and second source driving data corresponding to the second sub-pixel 32; determining a time interval according to a quantitative relationship between the first source driving data and the second source driving data; determining the second signal period based on the first signal period and the time interval.
Specifically, the quantitative relationship between the first source driving data and the second source driving data may specifically include a magnitude relationship between the first source driving data and the second source driving data, a data deviation between the first source driving data and the second source driving data, a data ratio between the first source driving data and the second source driving data, and the like.
In the present embodiment, the first sub-pixel 31 and the second sub-pixel 32 are specifically two pixels adjacent to each other in a spatial arrangement.
For example, when the magnitude relationship between the first source driving data and the second source driving data is a magnitude relationship, different magnitude relationships correspond to different time intervals. The time interval is Δ T1 when the first source driving data is greater than the second source driving data, and the time interval is Δ T2 when the first source driving data is less than the second source driving data, where Δ T1 is less than Δ T2.
Specifically, in this embodiment, the timing controller 1 is further configured to determine a data deviation of the first source driving data and the second source driving data, and determine the time interval according to the data deviation. That is, the above-mentioned quantity relationship between the first source driving data and the second source driving data is a data deviation between two data, different data deviations correspond to different time intervals, and the larger the data deviation is, the smaller the corresponding time interval may be.
Based on the obtained time interval Δ T, the start time Tb of the second signal period may be calculated in conjunction with the end time Ta of the first signal period, specifically, Tb ═ Ta ± Δ T.
In this embodiment, by the above manner, the gate opening process of the sub-pixel to be driven later is controlled based on the relationship between the source driving data of the sequentially driven sub-pixels, so that the gate of the sub-pixel to be driven later can be accurately matched with the light emitting characteristic of the sub-pixel driven earlier after being opened, and the fusion effect of the two lights can effectively improve the picture display quality.
Specifically, in this embodiment, the timing controller 1 is further configured to determine a start time of the second signal period according to the end time of the first signal period and the time interval, wherein the start time of the second signal period is earlier than the end time of the first signal period. In this way, the gate of the sub-pixel driven later is opened when the gate of the sub-pixel driven earlier is not closed, so that the optical fusion effect between two sub-pixels driven successively is improved, and the image display quality of the display device is further improved.
Further, based on any of the above embodiments, referring to fig. 1, the signal processing module 2 is a potential boosting module, and the potential boosting module is configured to perform a potential boosting operation on at least two of the control signals received in sequence, obtain a charging signal corresponding to each of the sub-pixels, and input the generated charging signal to a gate of the corresponding sub-pixel.
The potential lifting module can adopt an integral module to carry out potential lifting on the control signals received in sequence, and can also adopt a plurality of split units to respectively carry out potential lifting on the control signals received in sequence. After the control signal is subjected to the potential boosting operation, the control signal can be converted into a signal with the potential greater than or equal to the threshold voltage of the gate turn-on corresponding to the sub-pixel from a signal with the potential less than the threshold voltage of the gate turn-on corresponding to the sub-pixel.
Specifically, in this embodiment, the timing controller 1 is further configured to output the first control signal to the first potential boosting unit 201 in the first signal period, and output the second control signal to the second potential boosting unit 202 in the second signal period; the input end of the first potential boosting unit 201 is connected to the timing controller 1, the output end of the first potential boosting unit 201 is connected to the first sub-pixel 31, and the first potential boosting unit 201 is configured to boost the potential of the first control signal to obtain a first charging signal and input the first charging signal to the first sub-pixel 31; the input end of the second potential boosting unit 202 is connected to the timing controller 1, the output end of the second potential boosting unit 202 is connected to the second sub-pixel 32, and the second potential boosting unit 202 is configured to boost the potential of the second control signal to obtain a second charging signal, and input the second charging signal to the second sub-pixel 32.
Specifically, in the present embodiment, the pixel unit 3 includes a first sub-pixel 31, a second sub-pixel 32, and a third sub-pixel 33. Defining the control signal sent by the timing controller 1 as TP, the timing controller 1 sends a TP1 signal to the first potential boosting unit 201 in the first signal period, and the first potential boosting unit 201 boosts the potential of the TP1 signal to obtain TP 1' which is input to the gate of the first sub-pixel 31, so as to cooperate with the source driving data of the first sub-pixel 31 to realize the driving display of the first sub-pixel 31; the timing controller 1 sends a TP2 signal to the second potential boosting unit 202 in the second signal period, and the second potential boosting unit 202 boosts the potential of the TP2 signal to obtain TP 2' which is input to the gate of the second sub-pixel 32, so as to cooperate with the source driving data of the second sub-pixel 32 to realize the driving display of the second sub-pixel 32; the timing controller 1 sends a TP3 signal to the third potential boosting unit 203 in the third signal period, and the third potential boosting unit 203 boosts the potential of the TP3 signal to obtain TP 3' which is input to the gate of the third sub-pixel 33, so as to implement the driving display of the third sub-pixel 33 by matching with the source driving data of the third sub-pixel 33.
In this embodiment, the potential boosting module is used as the signal processing module 2, so that the control signals sequentially sent by the timing controller 1 are converted into the charging signals capable of opening the gates of the sub-pixels corresponding to the control signals through potential boosting, time-sharing opening of the gates of different sub-pixels in the pixel unit 3 is realized, and reduction of data channels corresponding to the source driver 4 is facilitated.
In an embodiment, referring to fig. 2, the signal processing module 2 is a level shift circuit configured to perform a level shift operation on at least two of the control signals received in sequence, obtain a corresponding high level signal as a charging signal corresponding to each of the sub-pixels, and input the generated charging signal to the gate of the corresponding sub-pixel.
In this embodiment, the level shift circuit is provided with a signal input port and a signal output port corresponding to each sub-pixel, the timing controller 1 is connected to each signal input port, and the signal output port is connected to the gate of the corresponding sub-pixel. Specifically, the pixel unit 3 includes a first sub-pixel 31, a second sub-pixel 32, and a third sub-pixel 33. Defining a control signal sent by the timing controller 1 as TP, sending a TP1 signal to the level conversion circuit through a signal input port corresponding to the first sub-pixel 31 by the timing controller 1 in a first signal period, receiving a TP1 signal input by the signal input port corresponding to the first sub-pixel 31 by the level conversion circuit, performing level conversion on the signal to obtain a high-level signal EN1, and inputting EN1 to a gate of the first sub-pixel 31 so as to realize driving display of the first sub-pixel 31 in cooperation with source driving data of the first sub-pixel 31; the timing controller 1 sends a TP2 signal to the level shift circuit through the signal input port corresponding to the second sub-pixel 32 in the second signal period, the level shift circuit receives a TP2 signal input from the signal input port corresponding to the second sub-pixel 32, performs level shift on the signal to obtain a high level signal EN2, and inputs EN2 to the gate of the second sub-pixel 32 to match with the source driving data of the second sub-pixel 32 to realize the driving display of the second sub-pixel 32; the timing controller 1 sends the TP3 signal to the level shift circuit through the signal input port corresponding to the third sub-pixel 33 in the third signal period, the level shift circuit receives the TP3 signal input from the signal input port corresponding to the third sub-pixel 33, performs level shift on the signal to obtain a high level signal EN3, and inputs EN3 to the gate of the third sub-pixel 33, so as to implement driving display of the third sub-pixel 33 by matching with the source driving data of the third sub-pixel 33.
In this embodiment, the level shift circuit is used as the signal processing module 2, so that the control signals sequentially sent by the timing controller 1 are converted into the charging signals capable of opening the gates of the sub-pixels corresponding to the control signals through level shift, and the gates of different sub-pixels in the pixel unit 3 are opened in a time-sharing manner, thereby facilitating reduction of data channels corresponding to the source driver 4.
Further, according to any of the above embodiments, the display device further includes a display panel package structure (not shown), and the pixel unit 3 and the signal processing module 2 are disposed in the display panel package structure (not shown). In the manufacturing process of the display device, for example, a liquid crystal display panel, a panel on which the pixel units 3 are arranged is generally packaged to form a display panel package structure, and then the display panel package structure is connected to an external control device (for example, the timing controller 1, the source driver 4, and the like), based on this, the signal processing module 2 and the pixel units 3 are embedded in the package structure, so that compared with the existing display device structure, the data channel between the source driver 4 and the package structure is effectively reduced, and the wiring difficulty and the consumable material requirement between the source driver 4 and the package structure are reduced.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. The display device is characterized by comprising a time schedule controller, a pixel unit and a signal processing module, wherein the pixel unit comprises at least two sub-pixels, one end of the signal processing module is connected with the time schedule controller, and the other end of the signal processing module is connected with at least two sub-pixels;
the time schedule controller is arranged to output at least two control signals to the signal processing module in sequence when source electrode driving data are input to the source electrode of each sub-pixel; the source electrode of each sub-pixel adopts the same data channel to carry out source electrode driving data transmission;
the signal processing module is arranged to sequentially generate a charging signal corresponding to each sub-pixel according to at least two control signals and input the generated charging signal to the gate of the corresponding sub-pixel.
2. The display device according to claim 1, wherein any two sub-pixels adjacent in drive order among at least two of the sub-pixels are defined as a first sub-pixel and a second sub-pixel;
the timing controller is further configured to output a first control signal to the signal processing module in a first signal period and output a second control signal to the signal processing module in a second signal period when there is source driving data input to the first subpixel and the second subpixel;
wherein a start time of the first signal period is earlier than a start time of the second signal period.
3. The display device according to claim 2, wherein the signal processing module is a potential boosting module, and the potential boosting module is configured to perform a potential boosting operation on at least two of the control signals received in sequence, obtain a charging signal corresponding to each of the sub-pixels, and input the generated charging signal to a gate of the corresponding sub-pixel.
4. The display device according to claim 3, wherein the potential boosting module includes a first potential boosting unit and a second potential boosting unit;
the time schedule controller is also set to output the first control signal to the first potential boosting unit in the first signal period and output the second control signal to the second potential boosting unit in the second signal period;
the input end of the first potential boosting unit is connected with the time sequence controller, the output end of the first potential boosting unit is connected with the first sub-pixel, and the first potential boosting unit is configured to boost the potential of the first control signal to obtain a first charging signal and input the first charging signal to the first sub-pixel;
the input end of the second potential boosting unit is connected with the time sequence controller, the output end of the second potential boosting unit is connected with the second sub-pixel, and the second potential boosting unit is set to boost the potential of the second control signal to obtain a second charging signal and input the second charging signal to the second sub-pixel.
5. The display device according to claim 2, wherein the signal processing module is a level shift circuit configured to perform a level shift operation on at least two of the control signals received in sequence, obtain a corresponding high level signal as a charging signal corresponding to each of the sub-pixels, and input the generated charging signal to a gate of the corresponding sub-pixel.
6. The display device of claim 1, further comprising a source driver, the pixel cell having a source signal input, each of the sub-pixels being connected to the source signal input, the source signal input being connected to the source driver;
the source driver is configured to input source driving data to the source of the corresponding sub-pixel through the source signal input end; and/or the presence of a gas in the atmosphere,
the display device further comprises a display panel packaging structure, and the pixel unit and the signal processing module are arranged in the display panel packaging structure.
7. The display device according to any one of claims 2 to 5, wherein the timing controller is further configured to take an end timing of the first signal period as a start timing of the second signal period.
8. The display device according to any one of claims 2 to 5, wherein the timing controller is further configured to perform the steps of:
acquiring first source electrode driving data corresponding to the first sub-pixel and second source electrode driving data corresponding to the second sub-pixel;
determining a time interval according to a quantitative relationship between the first source driving data and the second source driving data;
determining the second signal period based on the first signal period and the time interval.
9. The display device of claim 8, wherein the timing controller is further configured to determine a data deviation of the first source driving data from the second source driving data, the time interval being determined based on the data deviation.
10. The display device of claim 9, wherein the timing controller is further configured to determine a start time of the second signal period based on an end time of the first signal period and the time interval;
wherein the starting time of the second signal period is earlier than the ending time of the first signal period.
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