CN112597035A - FPGA image algorithm verification method and system based on LABVIEW - Google Patents
FPGA image algorithm verification method and system based on LABVIEW Download PDFInfo
- Publication number
- CN112597035A CN112597035A CN202011577046.1A CN202011577046A CN112597035A CN 112597035 A CN112597035 A CN 112597035A CN 202011577046 A CN202011577046 A CN 202011577046A CN 112597035 A CN112597035 A CN 112597035A
- Authority
- CN
- China
- Prior art keywords
- image
- fpga
- data
- labview
- image data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
- G06F11/3604—Software analysis for verifying properties of programs
- G06F11/3612—Software analysis for verifying properties of programs by runtime analysis
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Software Systems (AREA)
- Computer Hardware Design (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Apparatus For Radiation Diagnosis (AREA)
- Image Processing (AREA)
Abstract
The invention discloses an FPGA image algorithm verification method based on LABVIEW, which comprises the following steps: acquiring an input image and characteristic data by using LABVIEW; carrying out binary conversion on an input image to obtain first image data; converting the first image data into second image data by using an FPGA image algorithm; and generating an output image according to the second image data and displaying the output image. The invention also discloses an FPGA image algorithm verification system based on LABVIEW. The FPGA image algorithm verification method based on LABVIEW aims to solve the problem of low FPGA image algorithm verification efficiency.
Description
Technical Field
The invention relates to the technical field of FPGA algorithm verification, in particular to an FPGA image algorithm verification method and system based on LABVIEW.
Background
At present, a verification method for an FPGA (Field Programmable Gate Array) image algorithm mainly simulates the algorithm through professional simulation software Modelsim or FPGA simulation software ISIM and the like. According to the method, simulation codes need to be written, meanwhile, the images need to be preprocessed, image data suitable for simulation software are obtained, simulation results are reflected in a waveform mode, and the correctness of image algorithms under various time sequences is determined by observing the waveform. The method has the advantages of high accuracy, and can carry out pixel-level analysis on the algorithm through the waveform to ensure the absolute accuracy of the algorithm. The method has the advantages that the waveform analysis needs a user to understand the operation principle of an FPGA image algorithm program, the method has hardware programming capability, the waveform analysis consumes a large amount of manpower and time, and the waveform form is not as intuitive as that of an image algorithm field.
In view of the above, those skilled in the art need to provide an FPGA image algorithm verification method and system based on the LABVIEW to solve the above problems.
Disclosure of Invention
Technical problem to be solved
The invention aims to provide an FPGA image algorithm verification method and system based on LABVIEW, and aims to solve the technical problem of low FPGA image algorithm verification efficiency.
(II) technical scheme
The invention provides a FPGA image algorithm verification method based on LABVIEW, which comprises the following steps:
acquiring an input image and characteristic data by using LABVIEW;
performing binary conversion on the input image to obtain first image data;
converting the first image data into second image data by using an FPGA image algorithm;
and generating an output image according to the second image data and displaying the output image.
Further, the image feature data includes the number of pixels, the number of bits of pixels, and a resolution.
Further, the acquiring the input image and the image feature data by using the LABVIEW specifically includes:
and the LABVIEW reads the input image according to the instruction of a user, obtains the characteristic data of the input image, and sends the characteristic data and the input image to the MATLAB module in real time.
Further, the binary conversion of the input image to obtain the first image data specifically includes the following steps:
obtaining the input image and the feature data;
running the MATLAB program after determining that the characteristic data are variable parameters;
the input image is subjected to binary conversion to obtain first image data.
Further, the binarizing processing the input image to obtain the first image data further includes:
and saving the first image data to a specified path.
Further, the converting the first image data into second image data by using an FPGA image algorithm specifically includes:
and selecting any filtering window, wherein the starting position of the filtering window is the position of the image, each clock filtering window moves one pixel to the right, and the whole image is traversed in sequence.
The second aspect of the invention provides an FPGA image algorithm verification system based on LABVIEW, which comprises an FPGA image algorithm module, an MATLAB image generation module and an LABVIEW display control module;
the FPGA image algorithm module is used for running an FPGA image algorithm and sending the processed first image data to the MATLAB image generation module;
the MATLAB image generation module is used for processing the specified picture, generating binary image data, sending the binary image data to the FPGA image algorithm module, and processing the first image data to generate second image data;
and the LABVIEW display and control module is used for calling the second image data, generating and displaying an output image, and sending characteristic data and a control command to the MATLAB image generating module.
(III) advantageous effects
The FPGA image algorithm verification method based on LABVIEW provided by the invention comprises the following steps: acquiring an input image and characteristic data by using LABVIEW; performing binary conversion on the input image to obtain first image data; converting the first image data into second image data by using an FPGA image algorithm; and generating an output image according to the second image data and displaying the output image. The method can verify the FPGA image algorithm according to the picture input by the user, has clear and visual effect, remarkably reduces the requirement of the user on FPGA programming compared with the simulation waveform of simulation software, reduces the threshold of FPGA image algorithm verification, and improves the working efficiency.
Drawings
Fig. 1 is a schematic flowchart of an FPGA image algorithm verification method based on LABVIEW according to an embodiment of the present invention;
fig. 2 is a schematic diagram illustrating a principle of a filtering algorithm in an FPGA image algorithm verification method based on the LABVIEW according to an embodiment of the present invention;
fig. 3 is a block diagram of a FPGA image algorithm verification system based on the LABVIEW according to an embodiment of the present invention.
In the figure:
100-FPGA image algorithm module; a 200-MATLAB image generation module; 300-LABVIEW display and control module.
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings.
According to a first aspect of the present invention, which is provided by an embodiment of the present invention, there is provided an FPGA image algorithm verification method based on a LABVIEW, as shown in fig. 1, where the method includes the following steps:
s1, acquiring an input image and characteristic data by utilizing LABVIEW;
s2, carrying out binary conversion on the input image to obtain first image data;
s3, converting the first image data into second image data by using an FPGA image algorithm;
s4, generating an output image based on the second image data and displaying the output image.
In some alternative embodiments, the image characteristic data includes a number of pixels, a number of bits of pixels, and a resolution.
In the embodiment, the method can verify the FPGA image algorithm according to the picture input by the user, the effect is clear and intuitive, compared with the simulation waveform of simulation software, the requirement of the user on the FPGA programming aspect is obviously reduced, the threshold of FPGA image algorithm verification is reduced, and the working efficiency is improved.
Specifically, the first image data is binary image data, and the FPGA image algorithm calls ISE software to read the binary image data under the specified path.
In some optional embodiments, in step S1, the LABVIEW is used to acquire the input image and the image feature data, specifically:
the LABVIEW reads the input image according to the instruction of the user, obtains the feature data of the input image, and sends the feature data and the input image to a MATLAB (Matrix Laboratory) module in real time.
In some optional embodiments, in step S2, binary converting the input image to obtain the first image data specifically includes the following steps:
s201, obtaining an input image and feature data;
s202, an MATLAB program is operated after the characteristic data are determined to be variable parameters;
s203, binary conversion is carried out on the input image to obtain first image data.
In some optional embodiments, in step S203, after binary converting the input image to obtain the first image data, the method further includes:
s204, storing the first image data to a designated path.
In some optional embodiments, in step S3, the first image data is converted into the second image data by using an FPGA image algorithm, specifically:
and selecting any filtering window, wherein the starting position of the filtering window is the position of the image, each clock filtering window moves one pixel to the right, and the whole image is traversed in sequence.
In the above embodiment, as shown in fig. 2, the image data is processed by using a filtering algorithm, specifically, a 32 × 1 filtering window is selected, the starting position of the filtering window is the (1, 1) position of the image, each filtering window moves to the right by one pixel, and the whole image is sequentially traversed.
A second aspect of the present invention provides an FPGA image algorithm verification system based on the LABVIEW, as shown in fig. 2, including an FPGA image algorithm module 100, an MATLAB image generation module 200, and an LABVIEW (laboratory virtual Instrument Engineering platform) display and control module 300;
the FPGA image algorithm module 100 is configured to run an FPGA image algorithm and send the processed first image data to the MATLAB image generation module 200;
the MATLAB image generation module 200 is configured to process the designated picture, generate binary image data, send the binary image data to the FPGA image algorithm module 100, and process the first image data to generate second image data;
the LABVIEW display and control module 300 is configured to call the second image data, generate an output image and display the output image, and send feature data and a control command to the MATLAB image generation module 200.
In the above embodiment, the FPGA image algorithm verification system based on LABVIEW can realize one-click control, image input, image generation and image display for FPGA algorithm verification, intuitively display the operation effect of the FPGA image algorithm in a picture form, and remarkably improve the efficiency of FPGA algorithm verification. Compared with the method for simulating the image algorithm by using FPGA simulation software, the method for displaying the image algorithm by using the FPGA simulation software is clearer and more intuitive, can obviously improve the development speed of the FPGA image algorithm, obviously reduces the requirements of a user on the aspects of FPGA algorithm development and FPGA programming debugging, and reduces the verification threshold of the FPGA image algorithm.
The above-described embodiments are merely preferred embodiments of the present invention, and general changes and substitutions by those skilled in the art within the technical scope of the present invention are included in the protection scope of the present invention.
The present invention has not been described in detail as is known to those skilled in the art.
Claims (7)
1. An FPGA image algorithm verification method based on LABVIEW is characterized by comprising the following steps:
acquiring an input image and characteristic data by using LABVIEW;
performing binary conversion on the input image to obtain first image data;
converting the first image data into second image data by using an FPGA image algorithm;
and generating an output image according to the second image data and displaying the output image.
2. The LABVIEW-based FPGA image algorithm verification method of claim 1, wherein the image feature data comprises a number of pixels, a number of bits of pixels, and a resolution.
3. The method of claim 1, wherein the obtaining of the input image and the image feature data by the LABVIEW comprises:
and the LABVIEW reads the input image according to the instruction of a user, obtains the characteristic data of the input image, and sends the characteristic data and the input image to the MATLAB module in real time.
4. The method of claim 1, wherein the binary conversion of the input image to obtain the first image data comprises the following steps:
obtaining the input image and the feature data;
running the MATLAB program after determining that the characteristic data are variable parameters;
the input image is subjected to binary conversion to obtain first image data.
5. The method of claim 4, wherein the binary converting the input image to obtain the first image data further comprises:
and saving the first image data to a specified path.
6. The method according to claim 1, wherein the transforming the first image data into the second image data by using the FPGA image algorithm is specifically:
and selecting any filtering window, wherein the starting position of the filtering window is the position of the image, each clock filtering window moves one pixel to the right, and the whole image is traversed in sequence.
7. An FPGA image algorithm verification system based on LABVIEW is characterized by comprising an FPGA image algorithm module, an MATLAB image generation module and an LABVIEW display control module;
the FPGA image algorithm module is used for running an FPGA image algorithm and sending the processed first image data to the MATLAB image generation module;
the MATLAB image generation module is used for processing the specified picture, generating binary image data, sending the binary image data to the FPGA image algorithm module, and processing the first image data to generate second image data;
and the LABVIEW display and control module is used for calling the second image data, generating and displaying an output image, and sending characteristic data and a control command to the MATLAB image generating module.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011577046.1A CN112597035B (en) | 2020-12-28 | 2020-12-28 | FPGA image algorithm verification method and system based on LABVIEW |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN202011577046.1A CN112597035B (en) | 2020-12-28 | 2020-12-28 | FPGA image algorithm verification method and system based on LABVIEW |
Publications (2)
Publication Number | Publication Date |
---|---|
CN112597035A true CN112597035A (en) | 2021-04-02 |
CN112597035B CN112597035B (en) | 2023-09-19 |
Family
ID=75202637
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN202011577046.1A Active CN112597035B (en) | 2020-12-28 | 2020-12-28 | FPGA image algorithm verification method and system based on LABVIEW |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN112597035B (en) |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102223470A (en) * | 2011-06-13 | 2011-10-19 | 中国科学院西安光学精密机械研究所 | CCD camera image signal processing method and system |
WO2014048112A1 (en) * | 2012-09-27 | 2014-04-03 | 华为技术有限公司 | Method, device and system for measuring parameter of optical communication medium |
US20140344614A1 (en) * | 2013-05-14 | 2014-11-20 | National Instruments Corporation | Specifying and Implementing Relative Hardware Clocking in a High Level Programming Language |
CN104458206A (en) * | 2014-12-08 | 2015-03-25 | 天津大学 | Labview-based image sensor testing system |
CN104536807A (en) * | 2014-12-30 | 2015-04-22 | 武汉理工大学 | DC/DC real-time simulator based on FPGA and method |
CN107480323A (en) * | 2017-06-27 | 2017-12-15 | 浙江大学 | Vector mode finite element Parallel implementation emulation mode based on LabVIEW and FPGA |
CN108984871A (en) * | 2018-06-29 | 2018-12-11 | 苏州真感微电子科技有限公司 | FPGA design emulation mode and system based on LabVIEW module |
CN111641823A (en) * | 2020-05-06 | 2020-09-08 | 深圳市爱协生科技有限公司 | MIPI interface-based image algorithm verification system |
-
2020
- 2020-12-28 CN CN202011577046.1A patent/CN112597035B/en active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102223470A (en) * | 2011-06-13 | 2011-10-19 | 中国科学院西安光学精密机械研究所 | CCD camera image signal processing method and system |
WO2014048112A1 (en) * | 2012-09-27 | 2014-04-03 | 华为技术有限公司 | Method, device and system for measuring parameter of optical communication medium |
US20140344614A1 (en) * | 2013-05-14 | 2014-11-20 | National Instruments Corporation | Specifying and Implementing Relative Hardware Clocking in a High Level Programming Language |
CN104458206A (en) * | 2014-12-08 | 2015-03-25 | 天津大学 | Labview-based image sensor testing system |
CN104536807A (en) * | 2014-12-30 | 2015-04-22 | 武汉理工大学 | DC/DC real-time simulator based on FPGA and method |
CN107480323A (en) * | 2017-06-27 | 2017-12-15 | 浙江大学 | Vector mode finite element Parallel implementation emulation mode based on LabVIEW and FPGA |
CN108984871A (en) * | 2018-06-29 | 2018-12-11 | 苏州真感微电子科技有限公司 | FPGA design emulation mode and system based on LabVIEW module |
CN111641823A (en) * | 2020-05-06 | 2020-09-08 | 深圳市爱协生科技有限公司 | MIPI interface-based image algorithm verification system |
Non-Patent Citations (5)
Title |
---|
BRUNO SANTOS等: "Intelligent Control based on Fuzzy logic embedded in FPGA applied in Ventricular Assist Devices (VADs)", pages 138 - 6 * |
SUMERA SULTANA: "FPGA Implementation of Binary Morphological Processing for Image Feature Extraction", pages 1 - 10 * |
杨硕等: "数字图像处理中FPGA图形化编程设计", vol. 28, no. 2, pages 259 - 263 * |
芦挺: "基于FPGA与LabVIEW图像增强系统的设计", pages 54 - 56 * |
雷建胜: "多通道可变采样率采集存储技术研究与实现", pages 140 - 313 * |
Also Published As
Publication number | Publication date |
---|---|
CN112597035B (en) | 2023-09-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102013246B (en) | Establishing method for gamma comparison table of display apparatus | |
CN102468827B (en) | A kind of random waveform edit methods and device | |
CN112633077B (en) | Face detection method, system, storage medium and terminal based on in-layer multi-scale feature enhancement | |
CN116681959B (en) | Machine learning-based frontal line identification method and device, storage medium and terminal | |
CN110400362A (en) | A kind of ABAQUS two dimension crack modeling method, system and computer readable storage medium based on image | |
CN117292039B (en) | Vertex coordinate generation method, vertex coordinate generation device, electronic equipment and computer storage medium | |
CN110782391B (en) | Image processing method and device in driving simulation scene and storage medium | |
CN102105868B (en) | Performance analysis during visual creation of graphics images | |
CN115830165A (en) | Chinese painting drawing process generation method, device and equipment based on confrontation generation network | |
CN107291992B (en) | Comprehensive environment test simulation system and method suitable for electronic equipment in desert area | |
CN117194276B (en) | Chip software and hardware joint simulation debugging system | |
CN118038776A (en) | Fault detection method, device, equipment and medium of time sequence display driving circuit | |
KR100860673B1 (en) | Apparatus and method for generating image to generate 3d image | |
CN112597035A (en) | FPGA image algorithm verification method and system based on LABVIEW | |
CN107908455B (en) | Browser page switching method and system | |
CN108346396A (en) | A kind of display device and highlight method | |
CN114463400A (en) | Texture sampling method and system based on texture object segmentation | |
CN110148077B (en) | Method for accelerating ELBP-IP core and MR intelligent glasses | |
CN113935360B (en) | Method, device and equipment for identifying auxiliary line in video and readable storage medium | |
Vila-Blanco et al. | IDALib: a Python library for efficient image data augmentation | |
KR102194303B1 (en) | System and Method for Preprocessing and Data Set Augmentation for training AIwith 3D Data Processing | |
CN118365810A (en) | Robot map recovery method and device and related products | |
CN117519497A (en) | Conversion method of paper chart software electromagnetic pen coordinate system-screen coordinate system-chart coordinate system | |
CN116912315A (en) | Human body posture estimation method and device, intelligent terminal and storage medium | |
CN114996491A (en) | Method and system for optimizing display performance of all-liquid-crystal instrument |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |