CN112596153B - On-chip sub-wavelength bound waveguide and preparation method thereof - Google Patents
On-chip sub-wavelength bound waveguide and preparation method thereof Download PDFInfo
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- CN112596153B CN112596153B CN202011461216.XA CN202011461216A CN112596153B CN 112596153 B CN112596153 B CN 112596153B CN 202011461216 A CN202011461216 A CN 202011461216A CN 112596153 B CN112596153 B CN 112596153B
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- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/107—Subwavelength-diameter waveguides, e.g. nanowires
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- G—PHYSICS
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- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
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- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
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- G—PHYSICS
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- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
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- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
- G02B6/13—Integrated optical circuits characterised by the manufacturing method
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- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
- G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
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- G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
- G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
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Abstract
The invention relates to an on-chip sub-wavelength bound optical waveguide, which comprises a substrate and a metal nano structure, wherein a high-refractive-index dielectric layer is arranged between the substrate and the metal nano structure, and the refractive index of the material of the high-refractive-index dielectric layer is higher than that of the substrate. Due to the existence of the high-refractive-index dielectric layer on the substrate, the waveguide is more easily coupled into the plasmon, the plasmon can be excited by adopting the air objective, and the optical fiber laser is more practical in certain use scenes, such as gas detection and the like by needing an electric field to leak in the air. The thickness of the plasmon polariton optical chip can be used for modulating the conduction behavior of the plasmon polariton, and the plasmon polariton optical chip can be made into a modulatable photonic chip such as an optical switch, and has an active promoting effect on application fields such as the plasmon polariton optical chip.
Description
Technical Field
The invention relates to an on-chip sub-wavelength bound waveguide and a preparation method thereof.
Background
Surface plasmon resonance is the collective oscillation behavior of electron gas in metal under the action of an external electromagnetic field. The dispersion of the fluctuation behavior of the surface plasmon resonance is closer to the fluctuation behavior of the electron gas, and the surface plasmon resonance has strong evanescent wave propagation behavior and electromagnetic energy binding capacity. The metal plasmon waveguide based on surface plasmon resonance provides a key technical path for the optical waveguide with the size on the chip breaking through the diffraction limit of the optical wavelength, and has an important application prospect in the aspect of high-integration-level optical chips.
One problem with surface plasmon waveguides is that due to the presence of resistive losses in the metal, excessive energy distribution in the metal leads to increased losses, while excessive distribution in the medium leads to increased waveguide size. Selecting an appropriate waveguide structure has a great influence on the propagation behavior of the plasmon waveguide. In scientific research, chemically synthesized metal nanowires are used, the surfaces of the nanowires are smooth and have a circular-like cross section, and the plasmon waveguide has excellent propagation characteristics, but the nanowires are difficult to grow selectively in specific use, so that industrialization is difficult to realize.
In the industry, micro-nano processing technology is used for electronic chips, and similarly, micro-nano processing technology can be used for plasmon waveguide, however, the section of the metal waveguide formed by micro-nano processing is generally rectangular. In the process of propagation, the rectangular plasmon waveguide and the substrate form a plane contact surface, so that a leakage mode is formed, and large energy leaks out of the substrate.
In addition, the effective refractive index of the bound mode plasmon waveguide is generally higher and thus more localized, but in such a mode with a high effective refractive index, when photons in free space are coupled into the plasmon waveguide, the efficiency is very low due to momentum mismatch.
Therefore, the improvement of the plasmon waveguide characteristics of the rectangular waveguide on the substrate can play a great role in promoting the nano-photonic chip.
Disclosure of Invention
The invention provides an on-chip sub-wavelength bound waveguide and a preparation method thereof, aiming at inhibiting the formation of a leakage mode in a rectangular plasmon waveguide, improving the transmission efficiency and increasing the coupling efficiency of photons in a free space.
The scheme adopted by the invention for solving the technical problems is as follows:
an on-chip sub-wavelength bound optical waveguide comprises a substrate and a metal nano structure, wherein a high-refractive-index dielectric layer is arranged between the substrate and the metal nano structure, and the refractive index of the material of the high-refractive-index dielectric layer is higher than that of the substrate.
Preferably, the cross section of the metal nano structure is a rectangular structure, the thickness is 50 to 250 nanometers, and the width is 50 to 500 nanometers.
Preferably, the substrate material is silicon dioxide; the high-refractive-index dielectric layer material is silicon or aluminum oxide; the metal nano structure is made of gold, silver, aluminum and copper.
Preferably, the thickness of the high-refractive-index dielectric layer is 10-500 nm.
Preferably, the thickness of the high-refractive-index medium layer is 0.225 to 0.275 times of the transmission wavelength of light in the medium.
Preferably, the effective refractive index of the on-chip subwavelength waveguide is 1.06 to 1.1.
Another object of the present invention is to provide a method for preparing the above on-chip sub-wavelength-constrained optical waveguide, comprising the steps of:
(1) providing a substrate with a high-refractive-index medium layer on the surface, and flattening the surface of the high-refractive-index medium layer;
(2) and manufacturing a pattern template on the upper surface of the high-refractive-index dielectric layer, then depositing metal, and stripping the template to obtain the metal nano structure.
Preferably, before the pattern template is manufactured on the surface of the high-refractive-index medium layer, a layer of trimethoxy silane molecules is self-assembled on the surface of the high-refractive-index medium layer, and the thickness of the trimethoxy silane molecule layer is 0.7 to 3.5 nanometers.
Preferably, before stripping the template, a layer of isolation layer is deposited on the surface of the metal nano structure in the step (2), and the thickness of the isolation layer is 0-10 nm.
The invention also aims to provide the application of the on-chip sub-wavelength bound optical waveguide, which is used as a modulator for modulating the conduction behavior of plasmons by adjusting the thickness of the high-refractive-index dielectric layer.
In the invention, due to the existence of the high-refractive-index dielectric layer on the substrate, the energy which should be leaked into the substrate due to the mode is influenced by the high-refractive-index layer, and the mode in the high-refractive-index layer is coupled with the mode in the original plasmon waveguide to form a new hybrid mode. The final mode energy is mainly distributed on the side far away from the substrate and is mainly distributed in air, so that the effective refractive index is smaller, free space photons are easier to carry out momentum compensation, and therefore the free space photons are easier to couple into plasmons. The invention is also compatible with commercial silicon-based nano-fabrication without cold gate and complex process techniques. The air objective lens is adopted to excite the plasmon, complex refractive index matching oil (possibly polluting a sample) is not needed, and the method is more practical in certain use scenes, for example, the electric field is required to be leaked in the air to realize gas detection and the like. The invention utilizes the high-refractive-index thin layer to inhibit the leakage of the rectangular plasmon waveguide on the dielectric substrate, improves the conduction efficiency, increases the coupling of free photons into the waveguide, provides a new thought for solving the problem of large loss of plasmons on the substrate, possibly modulates the conduction behavior of the plasmons through the thickness of the plasmons, possibly makes a tunable photonic chip such as an optical switch and the like, and has positive promotion effect on the application fields of the plasmon optical chip and the like.
Drawings
FIG. 1 is a schematic diagram of the structure of an on-chip sub-wavelength confinement waveguide and a plasmon excitation mode in example 1, wherein (a) is a yz cross section of a substrate structure, and (b) is an xz cross section;
FIG. 2 is a scanning electron microscope image of a fabricated metal nanowire with a rectangular cross section on a layered substrate;
FIG. 3 is a process flow for fabricating the structure;
FIG. 4 is a microscopic image of the conductivity properties of the same size nanometer waveguide (300 nm cross-sectional width, 150 nm height, 8 μm length) of different high index thin layers, illustrating the tip scattering intensity variation;
FIG. 5 is a graph of variation of scattering intensity of the tip with thickness in FIG. 4, represented by the asterisk, with the solid line being the simulation result;
FIG. 6 is a fitting of the conduction characteristics of three high refractive index layers of different thicknesses in the experiment, and it can be seen that the results of enhanced coupling efficiency and reduced conduction loss are significant for a specific thickness (45 nm);
fig. 7 is a simulated conducted electric field distribution with energy distributed primarily on the side away from the substrate.
Detailed Description
The following examples are provided to further illustrate the present invention for better understanding, but the present invention is not limited to the following examples.
Example 1
As shown in fig. 1, the sub-wavelength bound waveguide on the chip of this embodiment adopts a commercial SOI substrate, which includes a bottom silicon layer, a top silicon layer, and a silicon dioxide layer located therebetween, the top silicon layer is used as a high refractive index dielectric layer, and the plasmon waveguide is located on the top silicon layer, wherein the thickness of the top silicon layer is 50 nm, the thickness of the silicon dioxide layer is 3 microns, the thickness of the bottom silicon layer is 750 microns, the plasmon waveguide is a rectangular structure made of gold, and the cross section has a height of 150 nm, a width of 300 nm, and a length of 8 microns. Fig. 2 is a scanning electron micrograph of the fabricated silicon waveguide, and the right-hand small figure shows a shape with a nearly rectangular cross section.
The manufacturing process is as shown in fig. 3, firstly, cleaning a commercial SOI substrate with a top silicon thickness of 220 nm, etching the top silicon into a silicon thin layer with a thickness of 50 nm by a reactive ion etching technology, and then soaking the substrate in toluene dissolved with MPTMS (alcohol-based propyl trimethoxy silane) to modify a layer of MPTMS molecules (0.7 nm) on the silicon thin layer to increase the adhesion of metal and improve the surface roughness of the nanogold waveguide. And then, manufacturing a photoresist (polymethyl methacrylate, PMMA) waveguide pattern by using an electron beam exposure technology. A 150 nm thick gold film is then deposited by thermal evaporation and the desired plasmonic waveguide is formed by a dissolution process, with further reduction of surface roughness by annealing. Some protective layer (e.g., alumina) may be made to protect the metal waveguide.
The prepared sample is placed under a 100-time air objective (NA is 0.9), 660-nanometer-wavelength laser is vertically focused to one end of a plasmon waveguide through the objective, the polarization direction is parallel to the long axis direction of the waveguide, scattered light of the other end is collected through the same objective, imaging is carried out through a camera, the laser power is 1 microwatt, and the exposure time of the camera is 33 milliseconds.
A microscopic picture of the conduction behavior of the same size nano-waveguide, showing different high index thin layer thicknesses, is shown in fig. 4, which graphically represents the tip scattering intensity variation. In the 7 figures, the thicknesses of the silicon thin layers are 0 nanometer (without silicon), 53 nanometer, 69 nanometer, 97 nanometer, 149 nanometer, 177 nanometer and 220 nanometer in sequence, wherein a focused laser spot (in the up-down direction of the polarization mode) is arranged below each figure, and an upper bright spot is a scattering spot of a plasmon at the other end of the metal waveguide. It can be seen that the propagation effect is different in the case of silicon layers of different thicknesses. The tip scattering intensity results are plotted in fig. 5, represented by stars, and compared with the results of the finite difference time domain simulation to obtain more consistent results. It can be known that the conduction strength is greatly enhanced under certain thicknesses, and the conduction is very poor under certain thicknesses, which shows that the thickness of the silicon layer has a periodic modulation effect on the conduction behavior of the plasmon waveguide, and the plasmon switch can be realized. Essentially no end scattered light was detected in the absence of the silicon layer, while a strong propagation was seen at 50 nm of the silicon layer, indicating that the presence of the silicon layer greatly increased its conductivity.
Four different sets of data points in fig. 6 represent the scattering intensity of the tip as a function of the metal waveguide length (5 to 14 microns) at four different silicon layer thicknesses (0 nm, 17 nm, 45 nm, 77 nm). And its propagation length L and coupling strength a are fitted from a curve, which is represented by a solid line. The propagation length represents the length of energy that passes when it decays to the original 1/e intensity, using the formula
It can be seen that the silicon layer serves not only to reduce losses but also to improve coupling efficiency.
It is shown in fig. 7 that the waveguide has better conduction effect when the silicon layer with thickness of 45 nm is thicker than the waveguide with thickness of 95 nm (upper diagram), the waveguide with thickness of 45 nm is obviously better than the waveguide with thickness of 95 nm when the end is scattered, the mode distribution is more localized in the upper air when the end is 45 nm, and much of the mode distribution is distributed in the substrate when the end is 95 nm, which causes a leakage mode to dissipate a large amount of energy in the substrate, resulting in very large loss.
In the embodiment, due to the structural design, the good conduction effect of the plasmons on the substrate can be achieved without matching of the oil and the like, and the conduction effect can be modulated by the substrate. So that the method is very suitable for manufacturing and applying photonic chips such as optical switches in the fields of plasmon photonic chips and the like.
While the foregoing is directed to the preferred embodiment of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Claims (10)
1. An on-chip sub-wavelength bound optical waveguide is characterized by comprising a substrate and a metal nano structure, wherein a high-refractive-index dielectric layer is arranged between the substrate and the metal nano structure, and the refractive index of the material of the high-refractive-index dielectric layer is higher than that of the substrate; the thickness of the high-refractive-index medium layer is 0.225-0.275 times of the transmission wavelength of light in the medium.
2. The on-chip sub-wavelength-tied optical waveguide of claim 1, wherein the metal nanostructure has a rectangular cross-section, a thickness of 50 to 250 nm, and a width of 50 to 500 nm.
3. The on-chip sub-wavelength-tied optical waveguide of claim 1, wherein the substrate material is silicon dioxide; the high-refractive-index dielectric layer material is silicon or aluminum oxide; the metal nano structure is made of gold, silver, aluminum and copper.
4. The on-chip sub-wavelength-binding optical waveguide of claim 1, wherein the high refractive index dielectric layer has a thickness of 10 to 500 nm.
5. The on-chip sub-wavelength-tied optical waveguide of claim 1, wherein the effective refractive index of the on-chip sub-wavelength waveguide is from 1.06 to 1.1.
6. The method for manufacturing an on-chip sub-wavelength-binding optical waveguide according to any one of claims 1 to 5, comprising the steps of:
(1) providing a substrate with a high-refractive-index medium layer on the surface, and flattening the surface of the high-refractive-index medium layer;
(2) and manufacturing a pattern template on the upper surface of the high-refractive-index dielectric layer, then depositing metal, and stripping the template to obtain the metal nano structure.
7. The method according to claim 6, wherein a layer of trimethoxysilane molecules is self-assembled on the surface of the high refractive index medium layer before the patterned template is formed on the surface of the high refractive index medium layer, and the thickness of the layer of trimethoxysilane molecules is 0.7 to 3.5 nm.
8. The method for preparing an on-chip sub-wavelength-constrained optical waveguide according to claim 6, wherein in the step (2), before the template is stripped, an isolation layer is deposited on the surface of the metal nanostructure, and the thickness of the isolation layer is 0-10 nm.
9. A method for modulating the conduction behavior of plasmons is characterized in that an on-chip sub-wavelength bound optical waveguide is used as a modulator and comprises a substrate and a metal nano structure, a high-refractive-index dielectric layer is arranged between the substrate and the metal nano structure, the refractive index of the material of the high-refractive-index dielectric layer is higher than that of the substrate, the conduction efficiency and the coupling efficiency of plasmons are modulated by adjusting the thickness of the high-refractive-index dielectric layer, the periodic modulation effect is achieved, and switching of plasmons can be achieved.
10. The method for modulating the conduction behavior of plasmons as in claim 9, wherein the thickness of the high refractive index dielectric layer is 10-500 nm.
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| CN202011461216.XA CN112596153B (en) | 2020-12-09 | 2020-12-09 | On-chip sub-wavelength bound waveguide and preparation method thereof |
| PCT/CN2021/128981 WO2022121585A1 (en) | 2020-12-09 | 2021-11-05 | On-chip subwavelength binding waveguide and preparation method therefor |
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