CN112565738A - Video source state detection method and device - Google Patents
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Abstract
The embodiment of the invention discloses a video source state detection method and a video source state detection device. The video source state detection method comprises the following steps: receiving first frame image data; acquiring the number of first line synchronizing signal cycles of first frame image data, the number of effective signal cycles of the first image data and the high level duration of an effective signal of the first image data; receiving second frame image data adjacent to the first frame image data; acquiring the number of second line synchronizing signal cycles of second frame image data, the number of effective signal cycles of the second image data and the high level duration of an effective signal of the second image data; judging whether the number of line synchronization signal cycles and the number of effective signal cycles of image data in the first frame of image data and the second frame of image data meet preset conditions or not and obtaining a judgment result; and determining the video source state according to the judgment result.
Description
Technical Field
The invention relates to the technical field of video source detection, in particular to a video source state detection method and a video source state detection device.
Background
Generally, a video processing apparatus processes an input video source. The video source provides a plurality of frames of image data to the video processor. When image data processing is performed, image data analysis and image data output are required according to a standard timing provided by VESA (Video Electronics Standards Association), as shown in fig. 1 and 2. And a so-called 1920 x 1080 resolution picture, which corresponds to the active picture area in fig. 1 and 2, with the rest of the interval being the blanking period. Generally, the values of the upper, lower, left, and right frames are zero, i.e., there may be no frame. The period of the field synchronization (VSync) signal, i.e. the refresh rate of the image, is commonly 60Hz, 30Hz, 25Hz, etc. The regions of the effective image are different in size at different resolutions. Similarly, the left frame, the right frame, the front shoulder, the back shoulder, etc. of the image are different, i.e., the blanking period changes with the change of the resolution. Both standard image input and output must be performed in accordance with the VESA standard timing to ensure the best compatibility and stability. However, when detecting the video source status, the image data will generate different data values according to different pictures, so the image data is an uncontrollable or unpredictable value, and the bit width of the image data is also large, which cannot be used as the detection basis of the image status. The existing detection method generally determines whether the state of the video source is stable by detecting whether a low level time difference value in field synchronization signals of two adjacent frames of image data is greater than a time threshold or whether a high level time is greater than the time threshold. However, it can be determined that only the field synchronization signal VSync is used as a decision basis in the technique, and the accuracy only depends on the field synchronization signal VSync, so that the accuracy cannot be guaranteed, and the detection efficiency is also affected when the field synchronization signal determination threshold of the video source state is a fixed value. In addition, in the prior art, a control chip reads a register representing the video source state in a video decoding chip for identification, but the video source state detection algorithm is unknown, and the detection accuracy cannot be guaranteed.
Disclosure of Invention
The embodiment of the invention provides a video source state detection method and a video source state detection device, which are used for enhancing the reliability of a video source detection result and improving the detection accuracy.
On one hand, a video source state detection method provided by the embodiment of the invention includes: receiving first frame image data; acquiring the number of first line synchronizing signal cycles of the first frame of image data, the number of first image data effective signal cycles and the high level duration of first image data effective signals; receiving second frame image data adjacent to the first frame image data; acquiring the number of second line synchronization signal cycles of the second frame of image data, the number of effective signal cycles of the second image data and the high level duration of an effective signal of the second image data; judging whether the first line of the number of the periods of the synchronous signals and the second line of the periods of the synchronous signals meet a first preset condition or not, and obtaining a first judgment result; judging whether the number of the first image data effective signal cycles and the number of the second image data effective signal cycles meet a second preset condition or not, and obtaining a second judgment result; judging whether the duration time of the high level of the first image data effective signal and the duration time of the high level of the second image data effective signal meet a third preset condition or not, and obtaining a third judgment result; and determining the video source state according to the first judgment result, the second judgment result and the third judgment result.
The embodiment of the invention determines whether the video source state is stable or not by acquiring three parameters of the number of line synchronization signal cycles, the number of effective signal cycles of image data and the high level duration of the effective signal of the image data of a first frame and a second frame which are adjacent and judging whether the three parameters simultaneously meet respective preset conditions, thereby enhancing the reliability of the detection result of the video source and improving the detection accuracy.
In an embodiment of the present invention, the first preset condition is: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles.
In an embodiment of the present invention, the second preset condition is: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles.
In an embodiment of the present invention, the third preset condition is: and the time difference value between the high level duration of the first image data effective signal and the high level duration of the second image data effective signal is less than a preset high level duration threshold value.
In an embodiment of the present invention, the determining a video source state according to the first determination result, the second determination result, and the third determination result specifically includes: and when any one of the first judgment result, the second judgment result and the third judgment result is negative, the video source is in an unstable state.
On the other hand, a video source state detection apparatus provided by an embodiment of the present invention includes: the first data receiving module is used for receiving the first frame of image data; the first parameter acquisition module is used for acquiring the number of first line synchronization signal cycles of the first frame of image data, the number of first image data effective signal cycles and the high level duration of first image data effective signals; a second data receiving module, configured to receive second frame image data adjacent to the first frame image data; the second parameter acquisition module is used for acquiring the second line synchronization signal periodicity of the second frame of image data, the effective signal periodicity of the second frame of image data and the high level duration of the effective signal of the second frame of image data; the first condition judgment module is used for judging whether the first line of synchronous signal periodicity and the second line of synchronous signal periodicity meet a first preset condition or not and obtaining a first judgment result; the second condition judgment module is used for judging whether the number of the effective signal cycles of the first image data and the number of the effective signal cycles of the second image data meet a second preset condition or not and obtaining a second judgment result; the third condition judgment module is used for judging whether the duration time of the high level of the first image data effective signal and the duration time of the high level of the second image data effective signal meet a third preset condition or not and obtaining a third judgment result; and a video source state determining module, configured to determine a video source state according to the first determination result, the second determination result, and the third determination result.
In an embodiment of the present invention, the first preset condition is: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles.
In an embodiment of the present invention, the second preset condition is: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles.
In an embodiment of the present invention, the third preset condition is: and the time difference value between the high level duration of the first image data effective signal and the high level duration of the second image data effective signal is less than a preset high level duration threshold value.
In an embodiment of the present invention, the video source state determining module is specifically configured to: and when any one of the first judgment result, the second judgment result and the third judgment result is negative, the video source is in an unstable state.
One or more of the above technical solutions may have the following advantages or beneficial effects: the embodiment of the invention determines whether the video source state is stable or not by acquiring three parameters of the number of line synchronization signal cycles, the number of effective signal cycles of image data and the high level duration of the effective signal of the image data of a first frame and a second frame which are adjacent and judging whether the three parameters simultaneously meet respective preset conditions, thereby enhancing the reliability of the detection result of the video source and improving the detection accuracy.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a one-dimensional diagram of the video output timing of the VESA standard.
FIG. 2 is a two-dimensional diagram of the video output timing of the VESA standard.
Fig. 3 is a flowchart illustrating a video source status detection method according to a first embodiment of the present invention.
FIG. 4 is a diagram illustrating the relationship between the field sync signal, the line sync signal and the image data valid signal of two adjacent video frames according to the first embodiment of the present invention.
Fig. 5 is a block diagram of a video source status detection apparatus according to a second embodiment of the present invention.
Fig. 6 is a schematic structural diagram of a video source status detection system according to a third embodiment of the present invention.
Fig. 7 is a schematic structural diagram of a computer-readable medium according to a fourth embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
[ first embodiment ] A method for manufacturing a semiconductor device
As shown in fig. 3, a first embodiment of the invention provides a video source status detection method. Specifically, the video source state detection method provided by the embodiment of the present invention includes, for example, the steps of:
s11: receiving first frame image data;
s12: acquiring the number of first line synchronizing signal cycles of the first frame of image data, the number of first image data effective signal cycles and the high level duration of first image data effective signals;
s13: receiving second frame image data adjacent to the first frame image data;
s14: acquiring the number of second line synchronization signal cycles of the second frame of image data, the number of effective signal cycles of the second image data and the high level duration of an effective signal of the second image data;
s15: judging whether the first line of the number of the periods of the synchronous signals and the second line of the periods of the synchronous signals meet a first preset condition or not, and obtaining a first judgment result;
s16: judging whether the number of the first image data effective signal cycles and the number of the second image data effective signal cycles meet a second preset condition or not, and obtaining a second judgment result;
s17: judging whether the duration time of the high level of the first image data effective signal and the duration time of the high level of the second image data effective signal meet a third preset condition or not, and obtaining a third judgment result; and
s18: and determining the video source state according to the first judgment result, the second judgment result and the third judgment result.
In order to facilitate understanding of the present invention, the steps of the video source status detection method of the present embodiment will be described in detail with reference to fig. 3 and 4.
The video source state detection method provided by the embodiment of the invention can be realized by video source state detection software. The video source state detection software may be, for example, software installed on a display control apparatus or a video processing apparatus or the like. The embodiment of the invention takes the display control equipment as an example to explain the video source state detection method. Typically, the display control device is, for example, a display controller (or transmission card) which includes, for example, a programmable logic device. The Programmable logic device is, for example, an FPGA (Field-Programmable Gate Array), and is configured to process an input video source and output processed video data to a subsequent device, such as a display control card and a display device. Generally, a programmable logic device receives image data continuously from frame to frame (or from field). In addition, the display controller may also include a controller, such as an MCU (Microcontroller Unit) or ARM processor, for sending relevant control instructions for video processing and interacting, communicating with other devices. The video source state detection method of the embodiment of the invention judges three parameters of the number of line synchronization signal cycles, the number of effective signal cycles of image data and the high level duration of the effective signal of the image data of two adjacent frames of image data by a programmable logic device on a display controller at the same time so as to determine whether the image data input to the display controller is stable or not, and the specific process is as follows.
First, the programmable logic device receives a first frame of image data, for example, through a video input interface.
Then, as shown in fig. 4, the programmable logic device acquires a first line synchronizing signal cycle number NHs1, a first image data valid signal cycle number NDe1, and a first image data valid signal high duration TpDE1 of the first frame image data.
The programmable logic device then receives a second frame of image data, for example, via the video input interface. The second frame of image data is, for example, one frame of image data located before and immediately adjacent to the first frame of image data, or one frame of image data located after and immediately adjacent to the first frame of image data, among the plurality of frames of image data received by the programmable logic device.
Next, as shown in fig. 4, the programmable logic device obtains a second line synchronizing signal cycle number NHs2, a second image data valid signal cycle number NDe2, and a second image data valid signal high level duration TpDE2 of the second frame of image data.
Then, the programmable logic device detects the state of the video source by determining whether the first row sync cycle number NHs1 and the second row sync cycle number NHs2, the first image data valid signal cycle number NDe1 and the second image data valid signal cycle number NDe2, and the first image data valid signal high level duration TpDE1 and the second image data valid signal high level duration TpDE2 respectively satisfy the preset conditions.
Generally, according to the VESA standard, the number of periods of the line synchronization signal HSync within each frame (field) is the same at the same resolution. The programmable logic device counts the number of cycles of the line synchronizing signal of two frames (fields) before and after in real time and then compares the counted number of cycles. If the two are found to be unequal, then the video source is deemed unstable. Therefore, uncertainty caused by the jitter of the field synchronizing signal VSync or the line synchronizing signal HSync in time can be removed, and the accuracy of video source state detection is improved. Specifically, the programmable logic device determines whether the first row sync signal cycle number NHs1 and the second row sync signal cycle number NHs2 satisfy a first predetermined condition and obtains a first determination result. The first preset condition is as follows: the number of first image data valid signal periods NHs1 is equal to the number of second image data valid signal periods NHs 2. The first determination result specifically includes: the first determination result is yes when the number NHs1 of first image data valid signal periods is equal to the number NHs2 of second image data valid signal periods, otherwise the first determination result is no.
In addition, the number of lines per field (frame) is fixed in the same resolution, and the number of cycles of the image data valid signal DE per field image data is fixed in the VESA standard. The programmable logic device counts the number of cycles of the image data valid signal DE in each field of image data in real time and then compares the number of cycles of the image data valid signal DE with the number of cycles of the image data valid signal DE in an adjacent frame of image data. If the two are found to be unequal, it indicates that the video source is unstable. Therefore, the stability of the video source is determined by the number of cycles of the valid image data signal DE, and the uncertainty caused by the timing jitter of the line synchronization signal HSync or the valid image data signal DE can be removed. Specifically, the programmable logic device determines whether the first image data valid signal cycle number NDe1 and the second image data valid signal cycle number NDe2 satisfy a second preset condition, and obtains a second determination result. The second preset condition is as follows: the number of first image data valid signal periods NDe1 is equal to the number of second image data valid signal periods NDe 2. The second judgment result specifically includes: the second determination result is yes when the first number of image data valid signal periods NDe1 is equal to the second number of image data valid signal periods NDe2, otherwise the second determination result is no.
In addition, for image data in the same resolution, the number of column pixels per row signal is fixed, which corresponds to the VESA standard, i.e., the high level duration of the image data valid signal DE (or the number of clock cycles of the high level of the image data valid signal DE) is fixed. Because the clock input together with the video source is not necessarily stable, and meanwhile, in order to ensure the accuracy of the time sequence in time, the embodiment of the invention selects the clock in the more accurate programmable logic device control chip as the sampling clock so as to determine the high level duration length of the image data effective signal DE. In consideration of sampling errors, the embodiment of the invention introduces a preset high level duration threshold value to measure the stability of the video source. The preset high duration threshold here may be, for example, 2 clocks long. Of course, the value of the preset high level duration threshold may also be other durations, which may be determined according to actual situations, and the present invention is not limited thereto. And when the time difference value of the high level duration of the effective image indicating signals of the two adjacent fields of image data is smaller than a preset high level duration threshold value, the video source is stable, otherwise, the video source is unstable. Specifically, the programmable logic device determines whether the first image data valid signal high level duration TpDE1 and the second image data valid signal high level duration TpDE2 satisfy a third preset condition, and obtains a third determination result. The third preset condition is as follows: the time difference between the first image data valid signal high level duration TpDE1 and the second image data valid signal high level duration TpDE2 is less than a preset high level duration threshold, i.e., | TpDE1-TpDE2| < the preset high level duration threshold. The third determination result specifically includes: the third determination result is yes when | TpDE1-TpDE2| < the preset high level duration threshold, otherwise the third determination result is no.
And finally, the programmable logic device determines a video source state detection result according to the first judgment result, the second judgment result and the third judgment result. Specifically, when any one of the first determination result, the second determination result, and the third determination result is "no", the detection result of the video source state is: the video source is unstable. When the first determination result, the second determination result, and the third determination result are all "yes", the detection result of the video source state is: the video source is stable.
Furthermore, the programmable logic device can also output a video source state detection result, for example, to remind a user through sound or light flashing and other modes, so that the user can timely learn about the video source state, timely perform corresponding processing according to actual conditions, and improve user experience.
In summary, in the embodiments of the present invention, three parameters, namely the number of line synchronization signal cycles, the number of valid signal cycles of image data, and the high level duration of valid signal of image data, of adjacent first frame image data and second frame image data are obtained, and it is determined whether the video source state, for example, the video source is stable or not, so that the reliability of the video source detection result is enhanced, and the detection accuracy is improved. The video source state detection method provided by the embodiment of the invention judges in two dimensions of signal duration and cycle number, simultaneously detects three signals of a field synchronizing signal VSync, a line synchronizing signal HSync and an image data effective signal DE in real time, detects whether the currently input video source meets VESA standard or not in real time, and avoids the problem caused by signal jitter due to poor quality of input image data. Because the field synchronization signal VSync is not determined by timing, the comparison with the previous frame is not required after the current frame is timed, but any one of the VSync, HSync and DE in the current frame has a problem, the unstable state of the video source can be obtained, the real-time performance of detection is improved, and the result detected in one frame is realized.
It should be noted that the implementation sequence of the steps in the video source state detection method provided in the embodiment of the present invention is only an example of the implementation steps of the video source state detection method provided in the present invention, and the implementation steps may be changed when the conditions allow and do not conflict with each other, for example, the execution sequence of the three steps S15, S16, and S17 may be the sequential execution of S15, S16, and S17, or the sequential execution of S17, S16, and S15, or the simultaneous execution of three steps or some steps therein, and the present invention is not limited thereto.
[ second embodiment ]
As shown in fig. 5, a second embodiment of the present invention provides a video source status detection apparatus 300. The video source status detection apparatus 300 includes, for example, a first data receiving module 310, a first parameter obtaining module 320, a second data receiving module 330, a second parameter obtaining module 340, a first condition determining module 350, a second condition determining module 360, a third condition determining module 370, and a video source status determining module 380.
The first data receiving module 310 is configured to receive first frame image data.
The first parameter obtaining module 320 is configured to obtain a first line synchronization signal cycle number, a first image data valid signal cycle number, and a first image data valid signal high level duration of the first frame of image data.
The second data receiving module 330 is configured to receive second frame image data adjacent to the first frame image data.
The second parameter obtaining module 340 is configured to obtain a second line synchronization signal cycle number, a second image data valid signal cycle number, and a second image data valid signal high level duration of the second frame of image data.
The first condition determining module 350 is configured to determine whether the first row of synchronization signal cycles and the second row of synchronization signal cycles satisfy a first preset condition and obtain a first determination result. Wherein the first preset condition is as follows: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles. The first determination result specifically includes: and when the number of the first image data effective signal cycles is equal to that of the second image data effective signal cycles, the first judgment result is yes, otherwise, the first judgment result is no.
The second condition determining module 360 is configured to determine whether the number of valid signal cycles of the first image data and the number of valid signal cycles of the second image data satisfy a second preset condition, and obtain a second determination result. The second preset condition is as follows: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles. The second judgment result specifically includes: and when the number of the first image data effective signal cycles is equal to the number of the second image data effective signal cycles, the second judgment result is yes, otherwise, the second judgment result is no.
The third condition determining module 370 is configured to determine whether the duration of the high level of the first image data valid signal and the duration of the high level of the second image data valid signal satisfy a third preset condition, and obtain a third determination result. The third preset condition is as follows: and the time difference value between the high level duration of the first image data effective signal and the high level duration of the second image data effective signal is less than a preset high level duration threshold value. The preset high duration threshold is, for example, 2 clock cycles long. Of course, other time lengths may be set, and the user may set the time lengths according to actual requirements, which is not limited in the present invention. The third determination result specifically includes: and when the time difference value between the high level duration of the first image data effective signal and the high level duration of the second image data effective signal is smaller than a preset high level duration threshold value, the third judgment result is yes, otherwise, the third judgment result is no.
A video source state determining module 380, configured to determine a video source state according to the first determination result, the second determination result, and the third determination result. Specifically, when any one of the first determination result, the second determination result, and the third determination result is "no", the detection result of the video source state is: the video source is unstable. When the first determination result, the second determination result, and the third determination result are all "yes", the detection result of the video source state is: the video source is stable.
Further, video source state detection device 300 may further include a video source state output module (not shown in the figure) for outputting a video source state detection result, for example, for reminding the user through sound or light flashing, so that the user can timely learn about the video source state, and timely perform corresponding processing according to actual conditions, thereby improving user experience.
For the specific working process and technical effects among the modules in the video source state detection apparatus 300 in this embodiment, reference is made to the description of the first embodiment, and details are not repeated here.
[ third embodiment ]
As shown in fig. 6, a third embodiment of the present invention provides a video source status detection system 500. The video source status detection system 500 includes, for example, a memory 510 and a processor 530 coupled to the memory 510. The memory 510 may be, for example, a non-volatile memory having stored thereon a computer program 511. Processor 530 may be, for example, an embedded processor. The processor 530, when running the computer program 511, performs the video source state detection method in the first embodiment described above.
The detailed operation and technical effects of the video source status detection system 500 in this embodiment are described in the foregoing first embodiment.
[ fourth example ] A
As shown in FIG. 7, a fourth embodiment of the invention provides a computer-readable medium 600. The computer-readable medium 600 is, for example, a non-volatile memory, such as: magnetic media (e.g., hard disks, floppy disks, and magnetic tape), optical media (e.g., CDROM disks and DVDs), magneto-optical media (e.g., optical disks), and hardware devices specially constructed for storing and executing computer-executable instructions (e.g., Read Only Memories (ROMs), Random Access Memories (RAMs), flash memories, etc.). Computer-readable medium 600 has stored thereon computer-executable instructions 610. The computer-readable medium 600 may execute the computer-executable instructions 610 by one or more processors or processing devices to implement the video source state detection method in the first embodiment described above.
In addition, it should be understood that the foregoing embodiments are merely exemplary illustrations of the present invention, and the technical solutions of the embodiments can be arbitrarily combined and collocated without conflict between technical features and structural contradictions, which do not violate the purpose of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other ways. For example, the above-described embodiments of the apparatus are merely illustrative, and for example, a division of a unit is merely a division of one logic function, and an actual implementation may have another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may also be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
Claims (10)
1. A video source state detection method is characterized by comprising the following steps:
receiving first frame image data;
acquiring the number of first line synchronizing signal cycles of the first frame of image data, the number of first image data effective signal cycles and the high level duration of first image data effective signals;
receiving second frame image data adjacent to the first frame image data;
acquiring the number of second line synchronization signal cycles of the second frame of image data, the number of effective signal cycles of the second image data and the high level duration of an effective signal of the second image data;
judging whether the first line of the number of the periods of the synchronous signals and the second line of the periods of the synchronous signals meet a first preset condition or not, and obtaining a first judgment result;
judging whether the number of the first image data effective signal cycles and the number of the second image data effective signal cycles meet a second preset condition or not, and obtaining a second judgment result;
judging whether the duration time of the high level of the first image data effective signal and the duration time of the high level of the second image data effective signal meet a third preset condition or not, and obtaining a third judgment result; and
and determining the video source state according to the first judgment result, the second judgment result and the third judgment result.
2. The video source status detecting method according to claim 1, wherein the first predetermined condition is: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles.
3. The video source status detecting method according to claim 1, wherein the second predetermined condition is: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles.
4. The video source status detecting method according to claim 1, wherein the third predetermined condition is: and the time difference value between the high level duration of the first image data effective signal and the high level duration of the second image data effective signal is less than a preset high level duration threshold value.
5. The method for detecting video source status according to claim 1, wherein the determining the video source status according to the first determination result, the second determination result, and the third determination result specifically comprises:
and when any one of the first judgment result, the second judgment result and the third judgment result is negative, the video source is in an unstable state.
6. A video source status detection apparatus, comprising:
the first data receiving module is used for receiving the first frame of image data;
the first parameter acquisition module is used for acquiring the number of first line synchronization signal cycles of the first frame of image data, the number of first image data effective signal cycles and the high level duration of first image data effective signals;
a second data receiving module, configured to receive second frame image data adjacent to the first frame image data;
the second parameter acquisition module is used for acquiring the second line synchronization signal periodicity of the second frame of image data, the effective signal periodicity of the second frame of image data and the high level duration of the effective signal of the second frame of image data;
the first condition judgment module is used for judging whether the first line of synchronous signal periodicity and the second line of synchronous signal periodicity meet a first preset condition or not and obtaining a first judgment result;
the second condition judgment module is used for judging whether the number of the effective signal cycles of the first image data and the number of the effective signal cycles of the second image data meet a second preset condition or not and obtaining a second judgment result;
the third condition judgment module is used for judging whether the duration time of the high level of the first image data effective signal and the duration time of the high level of the second image data effective signal meet a third preset condition or not and obtaining a third judgment result; and
and the video source state determining module is used for determining the video source state according to the first judgment result, the second judgment result and the third judgment result.
7. The video source status detecting device as claimed in claim 6, wherein the first predetermined condition is: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles.
8. The video source status detecting device as claimed in claim 6, wherein the second predetermined condition is: the number of first image data valid signal cycles is equal to the number of second image data valid signal cycles.
9. The video source status detecting device as claimed in claim 6, wherein the third predetermined condition is: and the time difference value between the high level duration of the first image data effective signal and the high level duration of the second image data effective signal is less than a preset high level duration threshold value.
10. The video source state detection method of claim 6, wherein the video source state determination module is specifically configured to:
and when any one of the first judgment result, the second judgment result and the third judgment result is negative, the video source is in an unstable state.
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| CN116758855A (en) * | 2023-08-22 | 2023-09-15 | 联士光电（深圳）有限公司 | Input signal phase relation self-adapting circuit in micro display panel |
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