CN112563377A - Flip-chip light emitting diode chips grown on a substrate with an array of heterogeneous materials - Google Patents
Flip-chip light emitting diode chips grown on a substrate with an array of heterogeneous materials Download PDFInfo
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- CN112563377A CN112563377A CN202011446962.1A CN202011446962A CN112563377A CN 112563377 A CN112563377 A CN 112563377A CN 202011446962 A CN202011446962 A CN 202011446962A CN 112563377 A CN112563377 A CN 112563377A
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- 239000000463 material Substances 0.000 title claims abstract description 74
- 239000000758 substrate Substances 0.000 title claims abstract description 71
- 150000001875 compounds Chemical class 0.000 claims abstract description 10
- 238000002161 passivation Methods 0.000 claims abstract description 10
- 230000017525 heat dissipation Effects 0.000 claims abstract description 8
- 238000004544 sputter deposition Methods 0.000 claims abstract description 6
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 claims abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract 2
- 229910052749 magnesium Inorganic materials 0.000 claims abstract 2
- 239000011777 magnesium Substances 0.000 claims abstract 2
- 229910052710 silicon Inorganic materials 0.000 claims abstract 2
- 239000010703 silicon Substances 0.000 claims abstract 2
- 229920002120 photoresistant polymer Polymers 0.000 claims description 18
- 238000000034 method Methods 0.000 claims description 7
- 238000005516 engineering process Methods 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 5
- 238000001035 drying Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 239000003960 organic solvent Substances 0.000 claims description 3
- 238000002791 soaking Methods 0.000 claims description 3
- 238000004528 spin coating Methods 0.000 claims description 3
- 238000001459 lithography Methods 0.000 claims description 2
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000000605 extraction Methods 0.000 abstract description 9
- 229910052594 sapphire Inorganic materials 0.000 description 11
- 239000010980 sapphire Substances 0.000 description 11
- 229910052681 coesite Inorganic materials 0.000 description 10
- 229910052906 cristobalite Inorganic materials 0.000 description 10
- 239000000377 silicon dioxide Substances 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- 229910052682 stishovite Inorganic materials 0.000 description 10
- 229910052905 tridymite Inorganic materials 0.000 description 10
- 238000010586 diagram Methods 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000001000 micrograph Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000006911 nucleation Effects 0.000 description 1
- 238000010899 nucleation Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/0004—Devices characterised by their operation
- H01L33/002—Devices characterised by their operation having heterojunctions or graded gap
- H01L33/0025—Devices characterised by their operation having heterojunctions or graded gap comprising only AIIIBV compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/24—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
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Abstract
The invention provides a flip-chip light-emitting diode chip growing on a substrate with a heterogeneous material array, which comprises the substrate with the heterogeneous material array, a sputtering III-V family compound nucleating layer, an undoped III-V family buffer layer, a silicon doped III-V family layer, a multi-quantum well active layer, a magnesium doped III-V family layer, a transparent conducting layer, a reflecting layer, a passivation layer, an electrode and a heat dissipation substrate, wherein the substrate with the heterogeneous material array is sequentially arranged from top to bottom; the substrate with the heterogeneous material array comprises a flat substrate and a concave-convex heterogeneous material array on the surface of the substrate; and the refractive index of the heterogeneous material array is smaller than that of the flat substrate. According to the invention, the concave-convex heterogeneous material array with smaller refractive index is arranged on the flat substrate, so that the refractive index difference between the substrate and air can be reduced, the top light emission of the chip is improved, and higher light extraction efficiency is finally obtained.
Description
Technical Field
The invention belongs to the technical field of photoelectron, and particularly relates to a flip-chip light emitting diode chip grown on a substrate with a heterogeneous material array.
Background
The GaN-based flip-chip light-emitting diode chip has high luminous efficiency, long service life and low energy consumption, and is widely applied to the fields of high-resolution display, visible light communication, automobile front lighting, common lighting and the like. At present, the commercial GaN-based flip-chip light-emitting diode chip generally epitaxially grows III-V family compounds on a sapphire patterned substrate, and because the patterning breaks through the total reflection interface of the substrate and the III-V family compounds, higher light extraction efficiency can be obtained at the interface. However, the difference between the refractive indexes of sapphire and air is large, so that the total reflection angle formed by the substrate and the air interface is large, part of light generated by the light-emitting layer is reflected back to the inside of the chip at the sapphire and air interface and is finally absorbed by the material, and the light extraction efficiency of the light-emitting diode is reduced.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: provided is a flip chip light emitting diode chip grown on a substrate having an array of heterogeneous materials, capable of improving light extraction efficiency.
The technical scheme adopted by the invention for solving the technical problems is as follows: a flip-chip light-emitting diode chip growing on a substrate with a heterogeneous material array comprises the substrate with the heterogeneous material array, a sputtering III-V group compound nucleating layer, an undoped III-V group buffer layer, a silicon-doped III-V group layer, a multi-quantum well active layer, a magnesium-doped III-V group layer, a transparent conducting layer, a reflecting layer, a passivation layer, an electrode and a heat dissipation substrate, wherein the substrate with the heterogeneous material array is sequentially arranged from top to bottom;
the substrate with the heterogeneous material array comprises a flat substrate and a concave-convex heterogeneous material array on the surface of the substrate; and the refractive index of the heterogeneous material array is smaller than that of the flat substrate.
According to the scheme, the heterogeneous material array is formed by a convex array structure in any one or any combination of a plurality of shapes of a cone, a pyramid, a hemisphere and an ellipsoid.
According to the scheme, the heterogeneous material array is a conical bulge array, the height of a bulged cone is 0.1-5 mu m, the diameter of the bottom of the cone is 0.1-10 mu m, and the vertex angle of the cross section of the formed cone is 0-180 degrees.
The preparation method of the flip-chip light-emitting diode chip grown on the substrate with the heterogeneous material array comprises the following steps:
depositing a layer of heterogeneous material with the refractive index smaller than that of the substrate on the flat substrate;
step two, spin-coating a layer of positive photoresist layer on the surface of the heterogeneous material, and forming a concave-convex array on the positive photoresist layer;
etching the heterogeneous material by using the positive photoresist of the concave-convex array as a mask until the concave-convex array of the heterogeneous material is formed on the surface of the substrate;
step four, removing the residual photoresist on the surface of the concave-convex heterogeneous material array and drying the photoresist;
sputtering a III-V group compound nucleating layer on the surface of the heterogeneous material array;
and sixthly, epitaxially growing an undoped III-V group buffer layer, a silicon-doped III-V group layer, a multi-quantum well active layer and a magnesium-doped III-V group layer on the sputtered III-V group compound nucleating layer in sequence, then depositing a transparent conducting layer, a reflecting layer, a passivation layer and an electrode, and finally bonding the transparent conducting layer, the reflecting layer, the passivation layer and the electrode on a heat dissipation substrate to form the flip-chip light-emitting diode chip.
According to the method, in the second step, the concave-convex array is formed on the positive photoresist layer by utilizing laser direct writing gray scale photoetching combined with a thermal reflow technology or adopting a nano imprinting technology.
According to the method, the thickness of the heterogeneous material in the step one is more than 500 nm.
And soaking the concave-convex heterogeneous material array structure in an organic solvent to remove the residual photoresist on the surface according to the method.
The invention has the beneficial effects that: through the concave-convex heterogeneous material array with smaller refractive index arranged on the flat substrate, the refractive index difference between the substrate and the air can be reduced, so that the top light emission of the chip is improved, and higher light extraction efficiency is finally obtained.
Drawings
Fig. 1 is a schematic structural diagram of a first embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a second embodiment of the present invention.
FIG. 3 is a scanning electron microscope image of a second embodiment of the present invention.
FIG. 4 is a growth on no array, with an array of Sapphire homogeneous material, with SiO2Simulated ray tracing contrast plots of flip-chip light emitting diode chips on a substrate of a heterogeneous material array.
Fig. 5 is a far-field distribution diagram of experimental measurements of a second embodiment of the present invention.
FIG. 6 is a growth on no array, with an array of Sapphire homogeneous material, with SiO2Top light extraction efficiency analysis plot of flip-chip light emitting diode chips on a substrate of heterogeneous material array.
Detailed Description
The invention is further illustrated by the following specific examples and figures.
The first embodiment is as follows:
as shown in fig. 1, the present embodiment provides a flip-chip light emitting diode chip grown on a substrate with a heterogeneous material array, comprising a substrate with a heterogeneous material array, a sputtered group iii-v compound nucleation layer, an undoped group iii-v buffer layer, a silicon-doped group iii-v layer, a multiple quantum well active layer, a magnesium-doped group iii-v layer, a transparent conductive layer, a reflective layer, a passivation layer, an electrode, and a heat dissipation substrate, which are sequentially disposed from top to bottom; the substrate with the heterogeneous material array comprises a flat substrate and a concave-convex heterogeneous material array on the surface of the substrate; and the refractive index of the heterogeneous material array is smaller than that of the flat substrate.
Example two:
as a refinement scheme of the first embodiment, the following technical scheme is adopted in the present embodiment, as shown in FIG. 2, from top to bottom, sequentially having SiO2A Sapphire substrate of a heterogeneous material array, an AlN nucleating layer, a u-GaN buffer layer, a Si-doped n-GaN layer, an InGaN/GaN multi-quantum well, a Mg-doped p-GaN layer, ITO, DBR and SiO2Passivation layer, electrode and heat dissipation base plate.
As shown in FIG. 3, having SiO2The substrate of the heterogeneous material array comprises a Sapphire flat substrate and SiO on the surface of the substrate2Array of heterogeneous materials，SiO2The heterogeneous material array is conical, the height of the cone is 1.8 mu m, and when the diameter of the bottom of the cone is 2.7 mu m, the vertex angle of the cross section of the formed cone is 68 degrees. The heterogeneous material array can also be made of other materials with the refractive index smaller than that of the substrate, and the convex shape can also be a conical shape, a pyramid shape, a hemispherical shape, an ellipsoid shape or a composite structure of any combination of the conical shape, the pyramid shape, the hemispherical shape and the ellipsoid shape.
Simulated ray trace plots as shown in figure 4 grown on a substrate with an array of Sapphire homogenous materials compared to a flip-chip light emitting diode grown on a substrate with an array of Sapphire homogenous materials2The light emitted by the light emitting layer of the flip-chip light emitting diode on the substrate of the heterogeneous material array will have a greater probability of exiting into the air and a higher degree of collimation. This is also confirmed by the experimentally measured far field profile shown in fig. 5.
Top light extraction efficiency analysis as shown in FIG. 6, because of SiO2Has a refractive index less than that of Sapphire, reduces the difference between the refractive index of the substrate and that of air, and is grown on a substrate having SiO2The light extraction efficiency of the flip-chip light emitting diode on the substrate of the heterogeneous material array is improved.
Grown on SiO2The manufacturing method of the flip-chip light-emitting diode chip on the substrate of the heterogeneous material array comprises the following steps:
step one, depositing a layer of SiO 2 microns thick on a Sapphire flat substrate2A heterogeneous material.
Step two, in SiO2And spin-coating a positive photoresist layer on the surface of the heterogeneous material, and forming a conical array on the positive photoresist layer by utilizing laser direct-writing gray scale lithography combined with a thermal reflow technology or adopting a nano-imprinting technology.
Step three, etching SiO by taking the conical array positive photoresist as a mask2Heterogeneous material until a conical SiO is formed on the surface of the substrate2An array of heterogeneous materials.
And step four, soaking the conical heterogeneous material array in an organic solvent to remove the residual photoresist on the surface and drying.
And fifthly, sputtering a layer of AlN on the surface of the conical heterogeneous material array structure to be used as a nucleating layer.
Step six, epitaxially growing a u-GaN buffer layer, a Si-doped n-GaN layer, an InGaN/GaN multi-quantum well, a Mg-doped p-GaN layer, ITO, DBR and SiO on the sputtered AlN nucleating layer2And finally, bonding the passivation layer and the electrode to the heat dissipation substrate to form the flip-chip light emitting diode chip.
The heterogeneous material array of the flip-chip light-emitting diode chip grown on the substrate with the heterogeneous material array can reduce the difference of the refractive indexes of the substrate and air, so that the top light emission of the chip is improved, and higher light extraction efficiency is finally obtained.
The above embodiments are only used for illustrating the design idea and features of the present invention, and the purpose of the present invention is to enable those skilled in the art to understand the content of the present invention and implement the present invention accordingly, and the protection scope of the present invention is not limited to the above embodiments. Therefore, all equivalent changes and modifications made in accordance with the principles and concepts disclosed herein are intended to be included within the scope of the present invention.
Claims (7)
1. A flip-chip light emitting diode chip grown on a substrate having an array of heterogeneous materials, comprising: the semiconductor device comprises a substrate with a heterogeneous material array, a sputtering III-V group compound nucleating layer, an undoped III-V group buffer layer, a silicon doped III-V group layer, a multi-quantum well active layer, a magnesium doped III-V group layer, a transparent conducting layer, a reflecting layer, a passivation layer, an electrode and a heat dissipation substrate, wherein the substrate is sequentially arranged from top to bottom;
the substrate with the heterogeneous material array comprises a flat substrate and a concave-convex heterogeneous material array on the surface of the substrate, and the refractive index of the heterogeneous material array is smaller than that of the flat substrate.
2. The flip-chip light emitting diode chip of claim 1, wherein: the heterogeneous material array is formed by a convex array structure in any one or a plurality of arbitrary combination shapes of a cone, a pyramid, a hemisphere and an ellipsoid.
3. The flip-chip light emitting diode chip of claim 1, wherein: the heterogeneous material array is a conical bulge array, the height of a bulged cone is 0.1-5 mu m, the diameter of the bottom of the cone is 0.1-10 mu m, and the vertex angle of the cross section of the formed cone is 0-180 degrees.
4. The method of fabricating a flip chip light emitting diode chip grown on a substrate having an array of heterogeneous materials as claimed in claim 1, wherein: the method comprises the following steps:
depositing a layer of heterogeneous material with the refractive index smaller than that of the substrate on the flat substrate;
step two, spin-coating a layer of positive photoresist layer on the surface of the heterogeneous material, and forming a concave-convex array on the positive photoresist layer;
etching the heterogeneous material by using the positive photoresist of the concave-convex array as a mask until the concave-convex array of the heterogeneous material is formed on the surface of the substrate;
step four, removing the residual photoresist on the surface of the concave-convex heterogeneous material array and drying the photoresist;
sputtering a III-V group compound nucleating layer on the surface of the heterogeneous material array;
and sixthly, epitaxially growing an undoped III-V group buffer layer, a silicon-doped III-V group layer, a multi-quantum well active layer and a magnesium-doped III-V group layer on the sputtered III-V group compound nucleating layer in sequence, then depositing a transparent conducting layer, a reflecting layer, a passivation layer and an electrode, and finally bonding the transparent conducting layer, the reflecting layer, the passivation layer and the electrode on a heat dissipation substrate to form the flip-chip light-emitting diode chip.
5. The method of claim 4, wherein: and step two, forming a concave-convex array on the positive photoresist layer by utilizing laser direct writing gray level lithography combined with a thermal reflow technology or adopting a nano imprinting technology.
6. The method of claim 4, wherein: the thickness of the heterogeneous material in the step one is more than 500 nm.
7. The method of claim 4, wherein: and fourthly, soaking the concave-convex heterogeneous material array structure in an organic solvent to remove the residual photoresist on the surface.
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| CN111864019A (en) * | 2020-07-10 | 2020-10-30 | 武汉大学 | Flip light-emitting diode with embedded scattering layer and preparation method thereof |
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2020
- 2020-12-09 CN CN202011446962.1A patent/CN112563377A/en active Pending
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