CN112559273A - QSPI verification system and method based on UVM - Google Patents
QSPI verification system and method based on UVM Download PDFInfo
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- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/221—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test buses, lines or interfaces, e.g. stuck-at or open line faults
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2247—Verification or detection of system hardware configuration
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/36—Preventing errors by testing or debugging software
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- G06F11/3684—Test management for test design, e.g. generating new test cases
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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Abstract
The invention relates to the technical field of chip verification, in particular to a QSPI verification system and a QSPI verification method based on UVM, wherein a scoreboard comprises a reference model and a comparator; the excitation generator is used for generating various types of randomized data packets according to the test cases under the constraint condition and sending the randomized data packets to the driver; the driver is used for converting the randomized data packet into an excitation signal which can be processed by the QSPI module to be tested and sending the excitation signal to the QSPI module to be tested; the first monitor is used for collecting the excitation signal output by the driver and sending the excitation signal to the reference model; the second monitor is used for collecting the data processed by the QSPI module to be tested and sending the data to the comparator; and the comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and outputting a verification result. The invention applies UVM verification methodology, adopts randomized test, takes coverage rate as guidance and realizes automatic comparison.
Description
Technical Field
The invention relates to the technical field of chip verification, in particular to a QSPI verification system and a QSPI verification method based on UVM.
Background
With the rapid development of integrated circuits, the functional complexity of chips is greatly increased, so that verification occupies more than half of the whole design cycle, the traditional directional verification cannot meet the verification requirements of very large scale integrated circuits, and the verification work becomes more difficult.
QSPI is a special communication interface, which is connected with single, double or four (data line) SPI Flash storage media. Compared with SPI application, the QSPI bus has multiple working modes, each working mode needs a large number of test cases to verify the correctness of the QSPI bus, and the accuracy and efficiency of the traditional verification method are low.
Disclosure of Invention
In order to solve the problems, the invention provides a QSPI verification system and a QSPI verification method based on UVM.
A UVM-based QSPI verification system comprising a stimulus generator, a driver, a first monitor, a second monitor and a scoreboard, the scoreboard comprising a reference model and a comparator;
the excitation generator is used for generating various types of randomized data packets according to the test cases under the constraint condition and sending the randomized data packets to the driver;
the driver is used for converting the randomized data packet into an excitation signal which can be processed by the QSPI module to be tested and sending the excitation signal to the QSPI module to be tested;
the first monitor is used for collecting the excitation signal output by the driver and sending the excitation signal to the reference model;
the second monitor is used for collecting the data processed by the QSPI module to be tested and sending the data to the comparator;
and the comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and outputting a verification result.
Preferably, the test case name of the test case is specified after UVM _ TESTNAME of makefile, and the corresponding test case instance is automatically instantiated according to the specified test case name by using a factory mechanism.
Preferably, the device further comprises an agent for completing the integrated packaging of the driver, the excitation generator, the first monitor and the second monitor.
Preferably, in a bus system environment, the agent, the reference model and the scoreboard are packaged integrally, and communication among each other is realized through a TLM mechanism.
Preferably, the comparator is configured to compare the data processed by the QSPI module to be tested with the data output by the reference model and calculate a coverage rate:
if the coverage rate reaches one hundred percent, judging that the result is that the verification is passed;
and if the coverage rate does not reach one hundred percent, judging that the verification is failed.
A QSPI verification method based on UVM comprises the following steps:
the excitation generator generates various types of randomized data packets according to the test cases under the constraint condition and sends the randomized data packets to the driver;
the driver converts the randomized data packet into an excitation signal which can be processed by the QSPI module to be tested and sends the excitation signal to the QSPI module to be tested;
the first monitor collects the excitation signal output by the driver and sends the excitation signal to the reference model;
the second monitor collects the processed data of the QSPI module to be tested and sends the data to the comparator;
and the comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and outputting a verification result.
Preferably, the test case name of the test case is specified after UVM _ TESTNAME of makefile, and the corresponding test case instance is automatically instantiated according to the specified test case name by using a factory mechanism.
Preferably, the comparator is configured to compare data processed by the QSPI module to be tested with data output by the reference model, and output a verification result, where the verification result includes:
comparing the data processed by the QSPI module to be tested with the data output by the reference model and calculating the coverage rate:
if the coverage rate reaches one hundred percent, judging that the result is that the verification is passed;
and if the coverage rate does not reach one hundred percent, judging that the verification is failed.
The invention has the following beneficial effects: the excitation generator generates various types of randomized data packets according to the test cases under the constraint condition and sends the randomized data packets to the driver; the driver converts the randomized data packet into an excitation signal which can be processed by the QSPI module to be tested and sends the excitation signal to the QSPI module to be tested; the first monitor collects the excitation signal output by the driver and sends the excitation signal to the reference model; the second monitor collects the processed data of the QSPI module to be tested and sends the data to the comparator; and the comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and outputting a verification result. The invention applies UVM verification methodology, adopts randomized test, takes coverage rate as guidance and realizes automatic comparison.
Drawings
The present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
FIG. 1 is a schematic diagram of the structure of a QSPI verification system based on UVM according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of a QSPI verification method based on UVM according to a second embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be further described below with reference to the accompanying drawings, but the present invention is not limited to these embodiments.
Example one
The present embodiment proposes a QSPI verification system based on UVM, as shown in fig. 1, which includes a stimulus generator, a driver, a first monitor, a second monitor, and a scoreboard including a reference model and a comparator. The excitation generator is used for generating various types of randomized data packets according to the test cases under the constraint condition and sending the randomized data packets to the driver; the driver is used for converting the randomized data packet into an excitation signal which can be processed by the QSPI module to be tested and sending the excitation signal to the QSPI module to be tested; the first monitor is used for collecting the excitation signal output by the driver and sending the excitation signal to the reference model; the second monitor is used for collecting the data processed by the QSPI module to be tested and sending the data to the comparator; and the comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and outputting a verification result.
The test case calls default _ sequence through uvm _ config _ db set (), starts the excitation generator sequence, executes task or function in main _ phase to control QSPI bus, carries out read-write operation and function coverage rate of randomized data to the register, compares the read-write data, and ensures the correctness and completeness of function.
The TOP layer declares the interface QSPI _ interface, instantiates the QSPI module to be tested and the test case, establishes the connection between the QSPI module to be tested and the test case verification environment through the interface, and transmits the interface to the component driver, the first monitor and the second monitor through uvm _ config _ db: _ set () function.
The whole verification system is started through a run _ test () function, test cases are transmitted in makefile through UVM _ TESTNAME, the verification system instantiates the class according to the name of the specified test case by using a factory mechanism, and then program execution defined in each phase is executed in sequence according to a phase mechanism in UVM.
The comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and calculating the coverage rate: if the coverage rate reaches one hundred percent, judging that the result is that the verification is passed; and if the coverage rate does not reach one hundred percent, judging that the verification is failed.
In the present embodiment, the accuracy of the verification is ensured by the calculation of the coverage.
Example two
Based on the QSPI verification system based on the UVM in the first embodiment, correspondingly, in terms of a method, the second embodiment provides a QSPI verification method based on the UVM, as shown in fig. 2, and specifically includes the following steps:
s1: the excitation generator generates various types of randomized data packets according to the test cases under the constraint condition and sends the randomized data packets to the driver;
s2: the driver converts the randomized data packet into an excitation signal which can be processed by the QSPI module to be tested and sends the excitation signal to the QSPI module to be tested;
s3: the first monitor collects the excitation signal output by the driver and sends the excitation signal to the reference model;
s4: the second monitor collects the processed data of the QSPI module to be tested and sends the data to the comparator;
s5: and the comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and outputting a verification result.
In an embodiment, the test case name of the test case is specified after UVM _ TESTNAME of makefile, and the corresponding test case instance is automatically instantiated according to the specified test case name by using a factory mechanism.
In an embodiment, the comparing unit is configured to compare the data processed by the QSPI module to be tested with the data output by the reference model, and output the verification result, where the comparing unit is configured to:
comparing the data processed by the QSPI module to be tested with the data output by the reference model and calculating the coverage rate: if the coverage rate reaches one hundred percent, judging that the result is that the verification is passed; and if the coverage rate does not reach one hundred percent, judging that the verification is failed.
The technical solution and the technical effect based on the present embodiment are the same as those of the hardware embodiment, and therefore are not described again.
Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.
Claims (8)
1. A QSPI verification system based on UVM comprising a stimulus generator, a driver, a first monitor, a second monitor and a scoreboard, the scoreboard comprising a reference model and a comparator;
the excitation generator is used for generating various types of randomized data packets according to the test cases under the constraint condition and sending the randomized data packets to the driver;
the driver is used for converting the randomized data packet into an excitation signal which can be processed by the QSPI module to be tested and sending the excitation signal to the QSPI module to be tested;
the first monitor is used for collecting the excitation signal output by the driver and sending the excitation signal to the reference model;
the second monitor is used for collecting the data processed by the QSPI module to be tested and sending the data to the comparator;
and the comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and outputting a verification result.
2. The QSPI verification system based on UVM of claim 1, wherein the test case name of said test case is specified after UVM _ TESTNAME of makefile, and the corresponding test case instance is automatically instantiated according to the specified test case name by using factory mechanism.
3. A UVM-based QSPI verification system in accordance with claim 1 further including an agent for completing an integrated packaging of the driver, stimulus generator, first monitor and second monitor.
4. A UVM based QSPI validation system according to claim 3 wherein the integrated packaging of the broker, reference model, scoreboard is done in a bus system environment, with communication between each other via TLM mechanisms.
5. The QSPI verification system based on UVM of claim 1, wherein said comparator is used to compare the data processed by QSPI module under test with the data output by reference model and calculate the coverage:
if the coverage rate reaches one hundred percent, judging that the result is that the verification is passed;
and if the coverage rate does not reach one hundred percent, judging that the verification is failed.
6. A QSPI verification method based on UVM is characterized by comprising the following steps:
the excitation generator generates various types of randomized data packets according to the test cases under the constraint condition and sends the randomized data packets to the driver;
the driver converts the randomized data packet into an excitation signal which can be processed by the QSPI module to be tested and sends the excitation signal to the QSPI module to be tested;
the first monitor collects the excitation signal output by the driver and sends the excitation signal to the reference model;
the second monitor collects the processed data of the QSPI module to be tested and sends the data to the comparator;
and the comparator is used for comparing the data processed by the QSPI module to be tested with the data output by the reference model and outputting a verification result.
7. The QSPI verification method based on UVM of claim 6, wherein the test case name of said test case is specified after UVM _ TESTNAME of makefile, and the corresponding test case instance is automatically instantiated according to the specified test case name by using factory mechanism.
8. The QSPI verification method based on UVM of claim 6, wherein said comparator for comparing the data processed by the QSPI module under test with the data output by the reference model and outputting the verification result comprises:
comparing the data processed by the QSPI module to be tested with the data output by the reference model and calculating the coverage rate:
if the coverage rate reaches one hundred percent, judging that the result is that the verification is passed;
and if the coverage rate does not reach one hundred percent, judging that the verification is failed.
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CN113157269A (en) * | 2021-06-10 | 2021-07-23 | 上海齐感电子信息科技有限公司 | Verification system and verification method thereof |
CN113486625A (en) * | 2021-06-29 | 2021-10-08 | 海光信息技术股份有限公司 | Chip verification method and verification system |
CN114374514A (en) * | 2022-01-04 | 2022-04-19 | 电子科技大学 | UVM-based ECDSA verification system and method |
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CN103530216A (en) * | 2013-10-12 | 2014-01-22 | 江苏华丽网络工程有限公司 | PCIE verification method based on UVM |
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Cited By (4)
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CN113157269A (en) * | 2021-06-10 | 2021-07-23 | 上海齐感电子信息科技有限公司 | Verification system and verification method thereof |
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CN113486625A (en) * | 2021-06-29 | 2021-10-08 | 海光信息技术股份有限公司 | Chip verification method and verification system |
CN114374514A (en) * | 2022-01-04 | 2022-04-19 | 电子科技大学 | UVM-based ECDSA verification system and method |
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