CN112532430A - PCIe bandwidth allocation method, device and storage medium - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/08—Configuration management of networks or network elements
- H04L41/0896—Bandwidth or capacity management, i.e. automatically increasing or decreasing capacities
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0016—Inter-integrated circuit (I2C)
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0026—PCI express
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Abstract
The invention provides a PCIe bandwidth allocation method, a PCIe bandwidth allocation device and a storage medium, belongs to the technical field of servers, and solves the technical problem of inflexible PCIe bandwidth allocation in the prior art. The method comprises the following steps: the BMC acquires bandwidth setting information; the BMC sends the bandwidth setting information to the PCH; the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to a register in the PCH; and the register acquires the bandwidth allocation information and allocates the bandwidth.
Description
Technical Field
The present invention relates to the technical field of servers, and in particular, to a PCIe bandwidth allocation method, apparatus, and storage medium.
Background
The development of server technology is changing day by day, and competition is more and more violent, and user's experience is also more and more important, therefore, server product is more and more high to the requirement of the flexibility ratio of configuration, and who can be more nimble satisfy customer's various demands, who just can occupy the dominant position in the market.
The PCIe bus technology is a universal high-speed serial bus technology, and is widely applied to an X86 architecture, and is used to expand and connect high-speed peripheral devices and enrich functions of servers, where different PCIe devices have different bandwidth requirements according to different designs and operating modes, and the commonly used bandwidths are X4, X8, and X16, but PCIe resources are limited for the entire system. Taking the purley platform CPU as an example, there are only 3 PCIe ports in total, and each port is a bandwidth of X16. Therefore, under the condition of limited PCIe bandwidth, how to flexibly design and allocate PCIe bandwidth resources to adapt to various requirements is a problem that needs to be researched and solved urgently.
Disclosure of Invention
The invention aims to provide a PCIe bandwidth allocation method, which solves the technical problem of inflexible PCIe bandwidth allocation in the prior art.
In a first aspect, the PCIe bandwidth allocation method provided in the present invention is applied to a server, where the server includes: BMC (Baseboard Manager Controller) and PCH (Platform Controller Hub), the method comprises the following steps:
the BMC acquires bandwidth setting information;
the BMC sends the bandwidth setting information to the PCH;
the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to a register in the PCH;
and the register acquires the bandwidth allocation information and allocates the bandwidth.
Further, the server further includes: CPLD (programmable logic device), the step that the BMC obtains the bandwidth setting information includes:
and acquiring the bandwidth setting information in the CPLD.
Further, the server also comprises a dial switch and an expander chip;
before the step of obtaining the bandwidth setting information, the BMC further includes:
the Expander chip generates bandwidth setting information according to the bandwidth configuration of the dial switch;
the CPLD acquires bandwidth setting information.
Further, the step of acquiring the bandwidth setting information by the BMC includes:
acquiring a bandwidth setting option selected by a user;
and generating bandwidth setting information according to the bandwidth setting options.
Further, after the step of obtaining bandwidth allocation information and allocating the bandwidth by the register, the method further includes:
comparing the bandwidth allocation information with the previous bandwidth allocation information, and judging whether the bandwidth allocation information changes or not;
if yes, restarting the server;
if not, the process is ended.
Further, after the step of obtaining bandwidth allocation information and allocating the bandwidth by the register, the method further includes:
and sending prompt information for restarting the server to the user.
In a second aspect, the present invention further provides a PCIe bandwidth allocation apparatus, applied in a server, including: CPLD, BMC, PCH;
the BMC acquires bandwidth setting information;
the BMC sends bandwidth setting information to the PCH;
the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to a register in the PCH;
and the register acquires bandwidth allocation information and allocates the bandwidth.
Further, the server also comprises a dial switch and an expander chip;
the expander chip generates bandwidth setting information according to the bandwidth configuration of the dial switch;
and the CPLD acquires bandwidth setting information.
Furthermore, the server also comprises an interactive interface, and a user selects a bandwidth setting option through the interactive interface;
the BMC acquires a bandwidth setting option selected by a user;
and the BMC generates bandwidth setting information according to the bandwidth setting option.
In a third aspect, the invention also provides a computer readable storage medium having stored thereon machine executable instructions which, when invoked and executed by a processor, cause the processor to perform any of the methods described above.
According to the PCIe bandwidth allocation method provided by the invention, the bandwidth setting information is obtained through the BMC component, the BMC sends the bandwidth setting information to the PCH, the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to the register in the PCH, and the register allocates the bandwidth according to the bandwidth allocation information. The bandwidth allocation is completed in the mode, the bandwidth allocation efficiency is improved, bandwidth allocation in the prior art is avoided by using a riser or changing BIOS settings to perform bandwidth allocation, hardware or software resources are saved, and manpower and hardware purchase cost are saved.
Accordingly, the PCIe bandwidth allocation apparatus and the computer-readable storage medium provided in the embodiments of the present invention also have the above technical effects.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a PCIe bandwidth allocation method according to an embodiment of the present invention;
fig. 2 is a first detailed flowchart of a PCIe bandwidth allocation method according to an embodiment of the present invention;
fig. 3 is a detailed flowchart of a PCIe bandwidth allocation method according to an embodiment of the present invention;
fig. 4 is a schematic diagram of a PCIe bandwidth allocation apparatus according to an embodiment of the present invention.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings, and it is apparent that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "comprising" and "having," and any variations thereof, as referred to in embodiments of the present invention, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements but may alternatively include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The embodiment of the invention provides a PCIe bandwidth allocation method, which is applied to a server, wherein the server comprises the following steps: CPLD, BMC, PCH, as shown in FIG. 1, the method comprises the following steps:
s11: the BMC acquires bandwidth setting information;
s12: the BMC sends the bandwidth setting information to the PCH;
s13: the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to a register in the PCH;
s14: and the register acquires the bandwidth allocation information and allocates the bandwidth.
According to the PCIe bandwidth allocation method provided by the invention, the bandwidth setting information is obtained through the BMC component, the BMC sends the bandwidth setting information to the PCH, the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to the register in the PCH, and the register allocates the bandwidth according to the bandwidth allocation information. The bandwidth allocation is completed in the mode, the bandwidth allocation efficiency is improved, bandwidth allocation in the prior art is avoided by using a riser or changing BIOS settings to perform bandwidth allocation, hardware or software resources are saved, and manpower and hardware purchase cost are saved.
As shown in fig. 2, in a possible implementation, the step of acquiring, by the BMC, bandwidth setting information includes:
s211: and acquiring bandwidth setting information in a register in the CPLD.
And acquiring the bandwidth setting information in the CPLD through the BMC, knowing the bandwidth demand information of the external component and providing a data basis for subsequent bandwidth allocation.
As shown in fig. 2, in one possible embodiment, the server further includes a dial switch, an expander chip;
before the step of obtaining the bandwidth setting information, the BMC further includes:
s201: the Expander chip generates bandwidth setting information according to the bandwidth configuration of the dial switch;
s202: the CPLD acquires bandwidth setting information.
Through the steps, the dial switch is manually operated, the dial switch is toggled and adjusted to the corresponding bandwidth configuration, and the expander chip generates corresponding bandwidth setting information according to the switch combination of the dial switch and transmits the corresponding bandwidth setting information to the CPLD.
As shown in fig. 3, in a possible implementation, the step of acquiring, by the BMC, bandwidth setting information includes:
s311: acquiring a bandwidth setting option selected by a user;
s312: and generating bandwidth setting information according to the bandwidth setting options.
In the above steps, the user can select different bandwidth allocation requirements according to the options, and different options generate different bandwidth setting information and provide a data basis for subsequent allocation.
As shown in fig. 2, in a possible implementation, after the step of obtaining bandwidth allocation information and allocating a bandwidth, the method further includes:
s251: comparing the bandwidth allocation information with the previous bandwidth allocation information, and determining whether the bandwidth allocation information changes, if so, executing step S252, otherwise, executing step S253;
s252: restarting the server;
s253: and ending the process.
If the bandwidth allocation changes, the machine needs to be restarted to complete the scheme of new bandwidth allocation.
As shown in fig. 3, in a possible implementation, after the step of obtaining bandwidth allocation information and allocating a bandwidth, the method further includes:
s35: and sending prompt information for restarting the server to the user.
In this step, when the user readjusts the bandwidth allocation scheme, the system sends a prompt to the user to restart the server, so that the server is restarted to complete bandwidth allocation.
The PCIe bandwidth allocation method provided in the embodiment of the present invention includes the following specific implementation manners:
the PCIe bandwidth allocation method provided by the embodiment of the invention is applied to a server, and also relates to a dial switch, an IIC expander chip, a CPLD, a BMC and a PCH;
as shown in fig. 4, one IIC expander is externally attached to the CPLD chip for extending the IO interface and saving the consumption of the IO interface of the CPLD chip, each three pins of the externally attached IIC expander correspond to one PCIe port, and different dial switch combinations correspond to different bandwidth allocation modes, as follows:
| switch combination | Bandwidth allocation method |
| 000 | X4X4X4X4 |
| 001 | X4X4X8 |
| 010 | X8X4X4 |
| 011 | X8X8 |
| 100 | X16 |
The other end of the IIC expander is connected with the CPLD and further connected with the BMC, and the BMC is connected with the PCH through an LPC bus.
The method comprises the following steps that a worker adjusts different combinations through a toggle switch to adjust a required bandwidth allocation scheme, and a CPLD determines bandwidth setting information on a corresponding port by reading a value of a pin of a corresponding IIC expander and stores the bandwidth setting information in a register; the BMC sends the bandwidth setting information to the PCH by reading the bandwidth setting information in the CPLD, the PCH sends the bandwidth setting information to a register in the PCH, and the register completes the bandwidth allocation according to the bandwidth allocation information.
After the bandwidth allocation is completed, the BMC may compare the current bandwidth allocation scheme with the previous bandwidth allocation scheme, and if the current bandwidth allocation scheme is different from the previous bandwidth allocation scheme, restart the server to complete the final bandwidth allocation.
Corresponding to another method, the server is also provided with an interactive interface, a worker selects a corresponding bandwidth configuration option from pull-down menu options of the interactive interface, after the selection is completed, the BMC generates bandwidth setting information and sends the information to the PCH, the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to the register to complete bandwidth allocation, and meanwhile, a restart prompt is sent to a user to restart the server to complete final bandwidth allocation.
An embodiment of the present invention further provides a PCIe bandwidth allocation apparatus, which is applied to a server, and includes: CPLD, BMC, PCH;
the BMC acquires bandwidth setting information;
the BMC sends bandwidth setting information to the PCH;
the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to a register in the PCH;
and the register acquires bandwidth allocation information and allocates the bandwidth.
In a possible embodiment, the server further comprises a dial switch and an expander chip;
the expander chip generates bandwidth setting information according to the bandwidth configuration of the dial switch;
and the CPLD acquires bandwidth setting information.
In a possible implementation manner, the server further comprises an interactive interface, and a user selects a bandwidth setting option through the interactive interface;
the BMC acquires a bandwidth setting option selected by a user;
and the BMC generates bandwidth setting information according to the bandwidth setting option.
In accordance with the above method, embodiments of the present invention also provide a computer readable storage medium storing machine executable instructions, which when invoked and executed by a processor, cause the processor to perform the steps of the above method.
The apparatus provided by the embodiment of the present invention may be specific hardware on the device, or software or firmware installed on the device, etc. The device provided by the embodiment of the present invention has the same implementation principle and technical effect as the method embodiments, and for the sake of brief description, reference may be made to the corresponding contents in the method embodiments without reference to the device embodiments. It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the foregoing systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative, and for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
For another example, the division of the unit is only one division of logical functions, and there may be other divisions in actual implementation, and for another example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments provided by the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.
The functions, if implemented in the form of software functional units and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: various media capable of storing program codes, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk, or an optical disk.
Finally, it should be noted that: the above-mentioned embodiments are only specific embodiments of the present invention, which are used for illustrating the technical solutions of the present invention and not for limiting the same, and the protection scope of the present invention is not limited thereto, although the present invention is described in detail with reference to the foregoing embodiments, those skilled in the art should understand that: any person skilled in the art can modify or easily conceive the technical solutions described in the foregoing embodiments or equivalent substitutes for some technical features within the technical scope of the present disclosure; and the modifications, changes or substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention. Are intended to be covered by the scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (10)
1. A PCIe bandwidth allocation method is applied to a server, and the server comprises the following steps: BMC and PCH, the method comprises the following steps:
the BMC acquires bandwidth setting information;
the BMC sends the bandwidth setting information to the PCH;
the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to a register in the PCH;
and the register acquires the bandwidth allocation information and allocates the bandwidth.
2. The PCIe bandwidth allocation method of claim 1, wherein the server further comprises: CPLD, the step that BMC obtains bandwidth setting information includes:
and acquiring the bandwidth setting information in the CPLD.
3. The PCIe bandwidth allocation method of claim 2, wherein the server further comprises a dial switch, an expander chip;
before the step of obtaining the bandwidth setting information, the BMC further includes:
the Expander chip generates bandwidth setting information according to the bandwidth configuration of the dial switch;
the CPLD acquires bandwidth setting information.
4. The PCIe bandwidth allocation method of claim 1, wherein the step of the BMC obtaining the bandwidth setting information comprises:
acquiring a bandwidth setting option selected by a user;
and generating bandwidth setting information according to the bandwidth setting options.
5. The PCIe bandwidth allocation method of claim 1, wherein after the step of obtaining bandwidth allocation information and allocating bandwidth by the register, the method further comprises:
comparing the bandwidth allocation information with the previous bandwidth allocation information, and judging whether the bandwidth allocation information changes or not;
if yes, restarting the server;
if not, the process is ended.
6. The PCIe bandwidth allocation method of claim 1, wherein after the step of obtaining bandwidth allocation information and allocating bandwidth by the register, the method further comprises:
and sending prompt information for restarting the server to the user.
7. The PCIe bandwidth allocation device is applied to a server and comprises the following components: CPLD, BMC, PCH;
the BMC acquires bandwidth setting information;
the BMC sends bandwidth setting information to the PCH;
the PCH generates bandwidth allocation information according to the bandwidth setting information and sends the bandwidth allocation information to a register in the PCH;
and the register acquires bandwidth allocation information and allocates the bandwidth.
8. The PCIe bandwidth allocation apparatus of claim 7, wherein the server further comprises a dial switch and an expander chip;
the expander chip generates bandwidth setting information according to the bandwidth configuration of the dial switch;
and the CPLD acquires bandwidth setting information.
9. The PCIe bandwidth allocation apparatus of claim 7, wherein the server further comprises an interactive interface through which a user selects a bandwidth setting option;
the BMC acquires a bandwidth setting option selected by a user;
and the BMC generates bandwidth setting information according to the bandwidth setting option.
10. A computer readable storage medium having stored thereon machine executable instructions which, when invoked and executed by a processor, cause the processor to execute the method of any of claims 1 to 6.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113472576A (en) * | 2021-06-30 | 2021-10-01 | 苏州浪潮智能科技有限公司 | Bandwidth allocation method of OCP network card and related device |
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| CN107608926A (en) * | 2017-08-18 | 2018-01-19 | 郑州云海信息技术有限公司 | One kind supports PCIE bandwidth automatic switching control equipment and method based on server |
| CN211505789U (en) * | 2019-12-11 | 2020-09-15 | 苏州浪潮智能科技有限公司 | PCIE board card testing arrangement |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107608926A (en) * | 2017-08-18 | 2018-01-19 | 郑州云海信息技术有限公司 | One kind supports PCIE bandwidth automatic switching control equipment and method based on server |
| CN211505789U (en) * | 2019-12-11 | 2020-09-15 | 苏州浪潮智能科技有限公司 | PCIE board card testing arrangement |
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| CN113472576A (en) * | 2021-06-30 | 2021-10-01 | 苏州浪潮智能科技有限公司 | Bandwidth allocation method of OCP network card and related device |
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