CN112532185A - Dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization - Google Patents
Dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization Download PDFInfo
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- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
- H03F1/0205—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers
- H03F1/0288—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in transistor amplifiers using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers
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Abstract
The invention discloses a dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization, which comprises a coupler, a carrier amplifying circuit, a peak value amplifying circuit, an irregular structure carrier dual-mode output matching network, an irregular structure peak value dual-mode output matching network and a combining load. The upper path signal output end of the coupler is sequentially connected with a carrier phase compensation line, a carrier input matching network, a carrier transistor and a carrier dual-mode output matching network in the carrier amplification circuit; the lower signal output end of the coupler is sequentially connected with a peak phase compensation line, a peak input matching network, a peak transistor and a peak dual-mode output matching network in the peak amplifying circuit. The output ends of the carrier amplifying circuit and the peak value amplifying circuit are directly connected with the combined load. The Doherty power amplifier is designed by adopting a dual-mode matching network optimization method based on a reflection coefficient circle and combining an irregular structure, so that the broadband and high-efficiency working characteristics are realized.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization.
Background
For ever-increasing high transmission data rate demands, high peak-to-average ratio and broadband modulation signals are commonly used in mobile communication networks (5G) such as the fifth generation and future wireless communication systems. In order to efficiently amplify these signals in the power back-off range, Doherty power amplifiers have received great attention in both academic and industrial areas due to their significant efficiency enhancement and ease of configuration. In order to improve the optimization efficiency of the output matching network, the strategy of selecting the optimization objective function of the output matching network of the conventional Doherty power amplifier is to determine an impedance error value according to an irregular-shaped impedance region similar to an ellipse obtained by load pulling, but it is difficult to fully utilize the load pulling impedance region. Therefore, further research on the Doherty power amplifier impedance optimization strategy and optimization method is of great significance.
At present, the Doherty power amplifier structure is commonly adopted in the industry and academia to enhance the efficiency of the power amplifier when backing off the power. A structural block diagram of a conventional Doherty power amplifier is shown in fig. 1, a 35 Ω impedance transformation line with a length of λ/4 is used for transforming a standard load impedance of 50 Ω into 25 Ω, a power divider divides an input signal into two paths and simultaneously enters a main-path power amplifier and a sub-path power amplifier, the λ/4 impedance transformation line and a carrier compensation line fully load-modulate the Doherty power amplifier, and a peak compensation line ensures that the peak amplifier is in an open-circuit state when not turned on, so that the back-off efficiency of the power amplifier is improved. However, the compensation lines used in conventional designs introduce additional phase dispersion and transmission loss, which is detrimental to the Doherty power amplifierThe amplifier realizes broadband and high-efficiency operation. Meanwhile, the traditional amplifier output matching uses a rule matching structure, so that the improvement of the performance of an output matching network is limited. Further, the target impedance region obtained based on the optimization objective function of the absolute value of the impedance error is shown in fig. 2. In the output matching network optimization process of the Doherty power amplifier, in order to obtain the optimal load impedance Z required by the power amplifier tubeoptLoad traction simulation is usually adopted, and meanwhile, a corresponding optimization objective function needs to be set, and the load impedance of the load traction simulation is optimized to a required load impedance area so as to achieve corresponding output power and efficiency. In the conventional design method, a simple optimization objective function based on an absolute value of an impedance error is usually adopted, and an obtained target impedance area is shown in fig. 2.
In summary, research on the Doherty power amplifier with the conventional regular structure shows that the λ/4 impedance transformation line adopted in the conventional Doherty power amplifier realizes load modulation, and the output matching network of the Doherty power amplifier can only realize impedance matching in a saturation mode during design, so that impedance matching requirements during power back-off cannot be met, and the efficiency of back-off power is reduced. The above problem can be ameliorated by compensation lines, but they introduce additional phase dispersion, limiting the operating bandwidth. Meanwhile, the existing target impedance strategy and topological structure have the limitation on bandwidth, and the requirement of the optimized design of the Doherty power amplifier is difficult to meet. Therefore, the dual-mode matching irregular structure Doherty power amplifier based on the reflection coefficient circle optimization has very important research value and significance for achieving high back-off efficiency and expanding working bandwidth.
Disclosure of Invention
The invention aims to provide a dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization, which realizes high-efficiency operation of the Doherty amplifier under the condition of expanding bandwidth.
In order to solve the technical problems, the invention provides a dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization, which improves the success rate of output matching network optimization, thereby expanding the bandwidth under the condition of ensuring the rollback efficiency, and adopts the following specific technical scheme:
a dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization comprises a coupler (10), a carrier amplification circuit (20), an irregular structure carrier dual-mode output matching network (30), a peak amplification circuit (40), an irregular structure peak dual-mode output matching network (50) and a combining load (60); the output ends of the upper path signal and the lower path signal of the coupler (10) are respectively connected with the input ends of the carrier amplification circuit (20) and the peak amplification circuit (40); the carrier amplification circuit (20) is formed by sequentially connecting a carrier phase compensation line (201), a carrier input matching network (202), a carrier transistor (203) and an irregular structure carrier dual-mode output matching network (30) in series; the peak value amplifying circuit (40) is formed by sequentially connecting a peak value phase compensation line (401), a peak value input matching network (402), a peak value transistor (403) and a peak value dual-mode output matching network (50) with an irregular structure in series; and the output ends of the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) are directly connected with a combiner load (60).
Furthermore, the carrier phase compensation line (201) and the peak phase compensation line (401) are microstrip lines, and both adopt quarter-wave lines; and adjusting the phase difference of the upper path signal and the lower path signal respectively to ensure that the phases of the two paths of signals at the output are the same, wherein the carrier input matching network (202) and the peak input matching network (402) adopt a step impedance matching structure.
Furthermore, the optimal load impedance required by the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) is obtained by an impedance optimization method module based on a reflection coefficient circle, the method module is mainly based on the microwave network theory, and supposing that any two impedances A and B exist on a complex impedance plane in a Smith chart, the corresponding reflection coefficient gamma can be calculated according to the impedance values of A and BABSelecting itOne of the impedance points A is used as a circle center, the modulus of the reflection coefficient gamma is used as a radius, the phase angle theta is changed between 0 pi and 2 pi, an equal reflection coefficient circle of the other impedance point B can be drawn, and the modulus of any impedance in the circle and the reflection coefficient of the impedance point A are smaller than the modulus of the reflection coefficient gammaABI, so that in the optimization process, only the current impedance value and the center position Z of the target load impedance area are calculatedoptThe reflection coefficient module value is compared with a set value, whether the impedance value meets the requirement of an optimization target or not can be judged, and therefore the success rate of output matching network optimization is improved.
Further, the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) adopt a dual-mode impedance matching technology module, the technology module is that when an input signal is low, the Doherty power amplifier is in a low-power mode, the irregular structure carrier dual-mode output matching network (30) needs to complete impedance matching of combining load impedance at a combining point to load impedance at a drain of the carrier amplification circuit (20), and meanwhile, the irregular structure peak dual-mode output matching network (50) needs to convert output impedance of the peak amplification circuit (40) in the low-power mode to output impedance of the peak amplification circuit (40) at the combining point; when the input signal is increased to the maximum, the Doherty power amplifier is in a saturation mode, and the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) need to match the output impedance in the saturation mode to the optimal load impedance respectively; therefore, the impedance matching requirements in low power and saturated power are met, and the Doherty power amplifier is ensured to realize high back-off efficiency.
Further, the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) are optimally designed based on an irregular structure module with a plane grid discrete shape, and the structure module is a structure which is easy to realize in a plane irregular structure of a radio frequency circuit, the structure breaks the constraint of the conventional circuit topology, the design space of the output matching network is discretized into rectangular sub-grids in the design, each sub-grid is described by 0 or 1, thereby the binary matrix code of the design space can be generated, when the actual circuit grid of the output matching network is discretely divided, the size of the sub-grid can be determined according to the actual design requirement and the circuit space, therefore, the design freedom degree is large, the structure configuration is flexible, and the design requirement of the high-performance power amplifier is met.
Compared with the prior art, the technical scheme of the invention has the following beneficial effects:
(1) the invention can improve the success rate of the optimal impedance required by the output matching network. The traditional high-efficiency Doherty power amplifier usually adopts load traction simulation to obtain the optimal load impedance required by a power amplifier tube, the target impedance area is approximate to a trapezoid, and the impedance area obtained by load traction is difficult to be fully utilized.
(2) The invention realizes high rollback efficiency. Compared with the traditional Doherty power amplifier output matching network optimization method, the method only considers impedance matching in a saturation mode generally and does not consider the impedance matching requirement in a low-power mode. The invention can realize high efficiency in power back-off and saturation modes, so that the Doherty power amplifier meets impedance matching in low-power and saturation power modes.
(3) The invention has high freedom degree of structural design and can effectively expand the bandwidth of the power amplifier. The matching network of the traditional Doherty power amplifier is mostly designed in a regular shape structure, the structure configuration is not flexible enough, and the further improvement of the performance of the power amplifier is limited. In comparison, the irregular structure of the plane grid discrete shape has high degree of freedom in design, breaks through the constraint of the conventional circuit topology, and can effectively improve the performance of the power amplifier.
Drawings
Fig. 1 is a block diagram of a conventional Doherty power amplifier.
Fig. 2 is a diagram of a target impedance region obtained by an optimization objective function based on an absolute value of an impedance error.
Fig. 3 is a structural block diagram of a dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization according to the invention.
FIG. 4 is a graph of the impedance range corresponding to the impedance optimization objective function based on the reflection coefficient circle of the present invention.
Fig. 5 is a schematic diagram of a dual-mode matching circuit of the Doherty power amplifier of the present invention.
Fig. 6 is a diagram illustrating the evaluation process of the improved Doherty power amplifier output matching network of the present invention.
Fig. 7(a) is a diagram showing an encoding format of an irregular structure 0-1 of the planar mesh discrete shapes of the present invention, and fig. 7(b) is a diagram showing an actual circuit format of an irregular structure of the planar mesh discrete shapes of the present invention.
Fig. 8 is a flowchart of an irregular structure matching network optimization method according to the present invention.
Fig. 9 is a diagram of the Doherty output matching network to be optimized in the embodiment of the present invention.
Fig. 10(a) is a graph showing a variation of an objective function mean value with an optimization algebra in the main output matching network optimization operation in the frequency band of 1.7-2.9GHz according to the embodiment of the present invention, and fig. 10(b) is a graph showing a variation of an objective function mean value with an optimization algebra in the auxiliary output matching network optimization operation in the frequency band of 1.7-2.9GHz according to the embodiment of the present invention.
Fig. 11(a) is a diagram of an impedance simulation result in a frequency band of 1.7-2.9GHz according to the embodiment of the present invention, and fig. 11(b) is a diagram of an optimized output matching network in a frequency band of 1.7-2.9GHz according to the embodiment of the present invention.
Fig. 12 is a schematic structural diagram of a wideband Doherty power amplifier designed in the embodiment of the present invention at a frequency band of 1.7-2.9 GHz.
Fig. 13(a) is a photograph of a real object of the optimized Doherty power amplifier at the frequency band of 1.7-2.9GHz in the embodiment of the present invention, and fig. 13(b) is a diagram of a test result of the optimized Doherty power amplifier at the frequency band of 1.7-2.9GHz in the embodiment of the present invention.
Fig. 14 shows the efficiency and gain of the Doherty power amplifier measured at different frequencies in the 1.7-2.9GHz band according to the embodiment of the present invention, as a function of the output power.
In the figure: the coupler 10, the carrier amplifying circuit 20, the carrier phase compensation line 201, the carrier input matching network 202, the carrier transistor 203, the irregular structure carrier dual-mode output matching network 30, the peak amplifying circuit 40, the peak phase compensation line 401, the peak input matching network 402, the peak transistor 403, the irregular structure peak dual-mode output matching network 50, and the combining load 60.
Detailed Description
The technical scheme of the invention is explained in detail in the following with the accompanying drawings.
Fig. 2 is a diagram of a target impedance region obtained by an optimization objective function based on an absolute value of an impedance error. Optimum load impedance Z required for power amplifier tubeoptUsually obtained by load pulling simulation, in order to be expressed as an optimization objective function used in an optimization algorithm, the central position of a target load impedance area is generally selected as a target impedance value ZoptWherein Z isopt＝Ropt+jXopt. After the allowable resistance and reactance error values are selected, an objective function as shown in equations (1) and (2) may be set to constrain the optimized impedance values.
Wherein R isLAnd XLRespectively the impedance Z of the designed circuitLP is an error value set according to the load traction impedance range. In the actual broadband matching network optimization design, in order to reduce the number of optimization targets, F can be selectedR(ZL) And FX(ZL) The larger of which is taken as the optimization objective function for a certain frequency.
The expression (1) shows that the corresponding value range of the real part (resistance) of the optimized impedance is (R)opt-ρ,Ropt+ rho), the expression (2) shows that the value range corresponding to the imaginary part (resistance) of the optimized impedance is (X)opt-ρ,Xopt+ ρ). The above regions are represented in a Smith chart2, respectively. Target function F corresponding to resistance and reactance in load impedance after optimizationR(ZL) And FX(ZL) When less than 1, it is said to have fallen into ZoptWithin an approximately rectangular area that is centered. Therefore, under the condition that the error value rho is properly selected, after the optimization objective function is adopted, the load impedance can be restricted to a target impedance area obtained by load traction. However, it can also be found from the figure that if the region constrained by the optimization objective function based on the absolute value of the impedance error is much smaller than the target impedance region, there will be impedance values that do not satisfy the convergence condition of the optimization target but satisfy the requirements of the load traction power and efficiency. Therefore, the above method causes a reduction in the optimization efficiency and success rate in the actual power amplifier design, especially in the broadband design.
Fig. 1 or 3 is a structural block diagram of a dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization, which includes a coupler (10), a carrier amplification circuit (20), an irregular structure carrier dual-mode output matching network (30), a peak amplification circuit (40), an irregular structure peak dual-mode output matching network (50), and a combining load (60); the method is characterized in that: an upper path signal output end of the coupler (10) is sequentially connected with a carrier phase compensation line (201), a carrier input matching network (202), a carrier transistor (203) and a carrier dual-mode output matching network (30) in a carrier amplification circuit; the down-link signal output end of the coupler (10) is sequentially connected with a peak phase compensation line (401), a peak input matching network (402), a peak transistor (403) and a peak dual-mode output matching network (50) in the peak amplification circuit; and the output ends of the carrier amplifying circuit (20) and the peak amplifying circuit (40) are directly connected with a combiner load (60).
In the above-mentioned irregular structure Doherty power amplifier, a carrier phase compensation line (201) and a peak phase compensation line (401) are provided between the coupler (10) and the carrier input matching network (202) and the peak input matching network (402), and phase differences of the upper and lower signals are respectively adjusted to make the phases of the two signals at the output identical, wherein the carrier input matching network (202) and the peak input matching network (402) are designed by adopting a step impedance matching structure.
In the irregular-structure Doherty power amplifier, the irregular-structure carrier dual-mode output matching network (30) and the irregular-structure peak dual-mode output matching network (50) obtain the required optimal load impedance through an impedance optimization method module based on a reflection coefficient circle, the success rate of the optimal impedance required by the output matching network is improved, and therefore the bandwidth is effectively expanded. The method module is mainly based on the microwave network theory, supposing that any two impedances A and B exist on a complex impedance plane in a Smith chart, and the corresponding reflection coefficient gamma can be calculated by the impedance values of A and BABSelecting one of the impedance points A as a circle center, taking the modulus of the reflection coefficient gamma as a radius, and changing the phase angle theta between 0 and 2 pi to draw an equal reflection coefficient circle of the other impedance point B, wherein the modulus of any impedance in the circle and the reflection coefficient of the impedance point A are both smaller than the modulus of the reflection coefficient gammaABI, so that in the optimization process, only the current impedance value and the center position Z of the target load impedance area are calculatedoptThe reflection coefficient module value is compared with a set value, whether the impedance value meets the requirement of an optimization target or not can be judged, and therefore the success rate of output matching network optimization is improved.
In the amplifier with the irregular structure, the carrier dual-mode output matching network (30) with the irregular structure and the peak dual-mode output matching network (50) with the irregular structure adopt a dual-mode impedance matching technology, so that the impedance matching requirements in low-power and saturated power modes can be met, and the Doherty amplifier is ensured to realize high back-off efficiency. In the module adopting the dual-mode impedance matching technology, when an input signal is low, the Doherty power amplifier is in a low-power mode, the irregular-structure carrier dual-mode output matching network (30) needs to complete impedance matching of combining a load impedance at a combining point to a load impedance at the drain of the carrier amplifying circuit (20), and meanwhile, the irregular-structure peak dual-mode output matching network (50) needs to convert the output impedance of the peak amplifying circuit (40) in the low-power mode to the output impedance of the peak amplifying circuit (40) at the combining point; when the input signal is increased to the maximum, the Doherty power amplifier is in a saturation mode, and the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) need to match the output impedance in the saturation mode to the optimal load impedance respectively; therefore, the impedance matching requirements in low power and saturated power are met, and the Doherty power amplifier is ensured to realize high back-off efficiency.
In the amplifier with irregular structure, the carrier dual-mode output matching network (30) with irregular structure and the peak dual-mode output matching network (50) with irregular structure are optimally designed based on the irregular structure with a plane grid discrete shape, the optimal design module is a structure which is easy to realize in the plane irregular structure of the radio frequency circuit, the structure breaks the constraint of the conventional circuit topology, the design space of the output matching network is discretized into rectangular sub-grids in the design, each sub-grid is described by 0 or 1, thereby the binary matrix code of the design space can be generated, when the actual circuit grid of the output matching network is discretely divided, the size of the sub-grid can be determined according to the actual design requirement and the circuit space, therefore, the design freedom degree is large, the structure configuration is flexible, and the design requirement of the high-performance power amplifier is met.
The purpose of the invention is: a dual-mode matching network Doherty amplifier based on reflection coefficient circle optimization is used for achieving that the Doherty power amplifier can expand bandwidth under the condition of guaranteeing high back-off efficiency.
In order to achieve the effect, the invention provides an impedance optimization method based on a reflection coefficient circle, which can fully utilize a target impedance area obtained by load traction and improve the success rate of optimization of an output matching network. Aiming at two modes of peculiar low power and saturation of the Doherty power amplifier, a dual-mode matching network optimization method based on a reflection coefficient circle is provided, so that the optimized output matching network meets impedance matching required in the two modes, a non-regular structure in a plane grid discrete shape is adopted for design, the design of the power amplifier is more flexible, the performance of the power amplifier is further improved, and finally, the improved optimization algorithm is combined to optimize the Doherty power amplifier so as to widen the bandwidth of the Doherty power amplifier.
FIG. 4 is a graph of the impedance range corresponding to the impedance optimization objective function based on the reflection coefficient circle of the present invention. Different from the traditional target impedance area, the invention selects the inscribed circle thereof as the optimization target area according to the characteristics of the shape of the target load impedance area, and provides an impedance optimization target function based on the reflection coefficient circle.
The proposed objective function is explained below by taking fig. 4 as an example. Load impedance ZaIs a point on the reflection coefficient circle inscribed in the target impedance region, ZoptAnd Z* optThe center position impedance of the target load impedance region and the conjugate impedance thereof are respectively. From ZaAnd ZoptThe reflection coefficient Γ may be calculatedaAs shown in formula (3). With ZoptUsing the reflection coefficient modulus | gamma as the center of circleaThe radius is defined as an inscribed equal reflection coefficient circle as shown in fig. 4, and the impedance value is shown in formula (4). According to the load impedance Z in the optimization processLAnd ZoptModulus and gamma of the resulting reflection coefficientaAnd | the relation can be used for making an impedance optimization objective function, as shown in the formula (5). When function value FΓ(ZL) When the impedance value is less than 1, the optimized impedance value falls into a preselected equal reflection coefficient circle, and the requirement of a target load impedance area is further met.
As can be seen from fig. 4, the load impedances in the obtained iso-reflection coefficient circles are all located in the target load impedance area, and the coverage range is larger than that of the rectangle obtained by the conventional objective function, which shows that the proposed method can more effectively utilize the result obtained by load pulling, thereby improving the efficiency and success rate of optimization.
Fig. 5 is a schematic diagram of a dual-mode matching circuit of the Doherty power amplifier. In order to achieve high efficiency in the power back-off and saturation modes, the Doherty power amplifier needs to satisfy impedance matching in the low-power and saturation modes. ZC_lowAnd ZC1_lowThe load impedance of the main amplifier at the drain and combining point of the power amplifier tube, ZP_outAnd ZP1_outThe output impedances of the auxiliary amplifier at the drain of the power amplifier tube and the combining point are respectively represented. ZC_sat、ZC1_sat、ZP_satAnd ZP1_satRespectively representing the load impedance of the main/auxiliary amplifier at different reference planes. ZCPIs the load impedance of the combining point.
In order to meet the requirements, the main road irregular output matching network needs to respectively complete ZC1_low＝ZCPTo a specific impedance ZC_lowImpedance matching and ZC1_satTo the optimum load impedance ZC_satIs matched. The output impedance Z needs to be respectively completed by the auxiliary path irregular output matching networkP_outConversion to ZP1_outAnd ZP1_satConversion to optimum load impedance and ZP_sat. Therefore, the Doherty power amplifier meets the requirement of impedance matching, improves the efficiency in saturation and back-off, and realizes wider working bandwidth.
Fig. 6 is a diagram illustrating the evaluation process of the improved Doherty power amplifier output matching network of the present invention. For a broadband Doherty power amplifier, the evaluation process and the objective function of the multi-objective optimization method need to be improved. Compared with the original method, the simulation of the output impedance in the low-power mode is added in the process of calling HFSS simulation software for modeling analysis.
In the improved evaluation process, the result of the output matching network in the low-power and saturation modes is obtained through simulation, so the objective function also needs to consider the results in the two modes. For the main amplifier in the Doherty power amplifier, the constraint condition of the reflection coefficient circle at saturation and low power needs to be satisfied at the same time, so an optimized objective function shown by the following formula can be selected:
wherein, C in the subscript represents main amplifier, sat and low represent saturation and low power modes, respectively, L represents load impedance, | Γa_C_satI represents the reflection coefficient modulus in the saturation mode, ZL_C_satAnd ZL_C_lowRepresenting the load impedance in the saturated and low power modes, Z, respectivelyopt_C_satAnd Z* opt_C_satRespectively representing the optimum load impedance in saturation mode and its conjugate impedance, Zopt_C_lowAnd Z* opt_C_lowRespectively, the optimal load impedance and its conjugate impedance in the low power mode. In order to express the relation of the reflection coefficient circles under two modes by using the same objective function, the larger value of the reflection coefficient target under the two modes of saturation and low power is set as an objective function FΓ_C. Thus, when F is optimizedΓ_CWhen the value is less than 1, the objective function value in the two modes is also less than 1, and the corresponding load impedance falls into a preset reflection coefficient circle, so that the impedance requirement of load traction in the two modes of saturation and low power is met.
For the optimization of the output matching network of the auxiliary circuit amplifier, generally speaking, the output impedance Z when the power amplifier tube is cut offP_outUsually complex and its real part is much smaller than the imaginary part, so it can be considered approximately as a pure reactance. If the output matching network is lossless, Z is matchedP1_outWill also be an approximately pure reactance. To avoid power leakage to the main amplifier, Z is typically requiredP1_outGreater than a certain reactance value. Thus, the optimal objective function considering the auxiliary amplifier in both modes can be written as:
where in the subscript P denotes a secondary amplifier, sat denotes a saturation mode, out denotes an output mode at low power, γ is a selected output reactance threshold, Im denotes an imaginary part of an impedance, L denotes a load impedance, | Γa_P_satI represents the reflection coefficient modulus in the saturation mode, ZL_P_satRepresenting the load impedance in saturation mode, Zopt_P_satAnd Z* opt_P_satRespectively, the optimum load impedance in saturation mode and its conjugate impedance. When optimized FΓ_PWhen the value is less than 1, the objective function value in the two modes is also less than 1, the load impedance corresponding to saturation falls within a preset reflection coefficient circle, and the output impedance of the auxiliary amplifier at low power is greater than a threshold value gamma, so that the requirements on the output matching network of the auxiliary amplifier in the two modes are met.
Fig. 7(a) is a diagram showing an encoding format of an irregular structure 0-1 of the planar mesh discrete shapes of the present invention, and fig. 7(b) is a diagram showing an actual circuit format of an irregular structure of the planar mesh discrete shapes of the present invention. After the above work is completed, an irregular structure of a plane grid discrete shape is introduced, and the Doherty power amplifier is designed. The irregular structure of the plane grid discrete shape is a structure which is easy to realize and has large design freedom degree in the plane irregular structure of the radio frequency circuit. Fig. 7(a) is a 0-1 coding form diagram, in which an output matching network design space is discretized into rectangular-shaped sub-grids in the design, and each sub-grid is described by 0 or 1, so that a binary matrix code of the design space can be generated, and the 0-1 code can characterize the circuit characteristics of each sub-grid space. Fig. 7(b) is a diagram of an actual circuit format, in which 1 indicates that the mesh region is made of a metal material, and 0 indicates that no metal is attached.
FIG. 8 is a flow chart of a method for optimizing an irregular structure matching network according to the present invention. For the optimization design of the power amplifier, firstly, the indexes of bandwidth, efficiency and the like of the Doherty power amplifier are determined, a transistor is selected, an input matching network IMN is designed, secondly, requirements are put forward for S parameters and load impedance of an output matching network OMN, the requirements are optimized, the irregular structure of a plane grid discrete shape is determined, the parameters of an optimization algorithm are initialized, the optimization design is completed, then a bias circuit is designed, and finally, an ADS is used for simulating the designed circuit, processing a real object and testing and verifying the designed circuit. As can be seen from fig. 8, the irregular structure of the planar mesh discrete shape is selected, the design part of the output matching network is improved by using the multi-objective optimization algorithm, and the objective function result is compared with the fitness requirement by using the performance indexes such as the S parameter, the load impedance and the like of the HFSS software full-wave simulation discrete structure. The multi-objective optimization algorithm program in the whole process is realized through programming, the grid type discrete structure code of the output matching network is output to HFSS simulation software through calling script files, the structure modeling and simulation of the output matching network are completed, and results such as S parameters, load impedance and the like are returned to the algorithm program to complete the optimization process.
An example is listed below.
In this embodiment, the operating frequency of the Doherty power amplifier is 1.7-2.9GHz, and the carrier power amplifier tube 203 and the peak power amplifier tube 403 both adopt a CREE GaN HEMT power amplifier tube CGH 40010F. The carrier amplifier tube 203 is biased in class AB and the peak amplifier tube 403 is biased in class C. The power ratio of the two paths of output signals is 1:1 by adopting a 3dB 90-degree coupler.
Fig. 9 is a diagram of the output matching network of the Doherty power amplifier to be optimized in the embodiment of the present invention, which respectively shows an irregular structure main output matching network and an irregular structure auxiliary output matching network. The area surrounded by the red dotted line in the figure is the optimized design range of the output matching network, a 20 × 16 grid type discrete structure is adopted, the left side is a network input end and is connected with the drain electrode of the power amplification tube, and the right side is an output end and is connected with a 50 Ω load. In order to simplify the calculation amount during optimization, the optimization area of the grid type discrete structure in the auxiliary output matching network is set to be similar to that of the main output matching network, and in order to meet the phase relation, a transmission line with the characteristic impedance of 50 omega is adopted between the optimization area of the auxiliary output matching network and the output end (combination point). The microstrip matching network is modeled and simulated in the HFSS, and the result is output to an optimization algorithm program for individual fitness evaluation.
According to the proposed dual-mode matching network optimization method based on the reflection coefficient circle, aiming at the lowest frequency, the center frequency and the highest frequency in a designed frequency band 1.7-2.9GHz, the optimization objective function of the irregular main path output matching network is determined as follows:
wherein, FΓ_C_1.7GHz、FΓ_C_2.3GHzAnd FΓ_C_2.9GHzOptimization objectives 1, 2 and 3 of the matching network are output for the main path in the optimization program, respectively.
In a similar way, the optimal objective function of the output matching network of the auxiliary amplifier at 3 frequencies can be determined as follows:
wherein, the optimized target condition in saturation mode is selected to be consistent with the main output matching network, and the output impedance Z is output at low powerP1_outThe threshold for the imaginary part (reactance) is chosen to be 50. FΓ_P_1.7GHz、FΓ_P_2.3GHzAnd FΓ_P_2.9GHzOptimization objectives 1, 2, and 3 of the matching network are output for the side roads in the optimizer, respectively.
Fig. 10(a) is a graph showing a variation of an objective function mean value with an optimization algebra in the main output matching network optimization operation in the frequency band of 1.7-2.9GHz according to the embodiment of the present invention, and fig. 10(b) is a graph showing a variation of an objective function mean value with an optimization algebra in the auxiliary output matching network optimization operation in the frequency band of 1.7-2.9GHz according to the embodiment of the present invention. In fig. 10, the line with an open square represents the objective function mean of the optimization target 1, the line with a solid dot represents the objective function mean of the optimization target 2, and the black line with an open triangle represents the objective function mean of the optimization target 3. As can be seen from fig. 10, after 50 generations of optimization, the objective function values in the main road and the auxiliary road output matching network optimization can both be less than 1, and the optimization requirements are met. Meanwhile, the convergence speed of the optimization objective function value of the optimization objective 1 is slightly lower than that of the other two frequencies. The process of comparing the main path optimization and the auxiliary path optimization shows that the optimization target of the auxiliary path output matching network is looser in low power, so that the convergence speed of the target function is higher than the optimization speed of the main path output matching network, and the final convergence value can be approached after about 10 generations of optimization.
Fig. 11(a) is a diagram of an impedance simulation result in a frequency band of 1.7-2.9GHz according to the embodiment of the present invention, and fig. 11(b) is a diagram of an optimized output matching network in a frequency band of 1.7-2.9GHz according to the embodiment of the present invention. As can be seen from fig. 11(a), compared with the circle with equal reflection coefficient in the low power and saturation states, the load impedance of the optimized main/auxiliary output matching network in the two states is within the reflection coefficient circle, and the power and efficiency index requirements obtained by load traction can be met. In addition, the absolute values of the reactances in the output impedance of the auxiliary output matching network are all larger than the set threshold value in the low power state.
Fig. 12 is a schematic structural diagram of a wideband Doherty power amplifier designed in the embodiment of the present invention at a frequency band of 1.7-2.9 GHz. After the main path/auxiliary path is designed and completed by adopting a dual-mode matching network optimization method based on a reflection coefficient circle, an input matching network is designed by adopting a step impedance matching structure so as to cover the required 1.7-2.9GHz working bandwidth. Meanwhile, since the phase responses of the main and auxiliary amplifiers are different in a wide frequency range, a 3dB 90 ° coupler is used as an input divider instead of the Wilkinson power divider in the existing design to ensure an appropriate phase relationship between output currents. On the basis of the circuit design, the broadband Doherty power amplifier adopting the irregular structure output matching network in the plane grid discrete shape is designed.
Fig. 13(a) is a photograph of a real object of the optimized Doherty power amplifier at the frequency band of 1.7-2.9GHz in the embodiment of the present invention, and fig. 13(b) is a diagram of a test result of the optimized Doherty power amplifier at the frequency band of 1.7-2.9GHz in the embodiment of the present invention. The physical design adopts Wolfspeed CGH40010F GaN HEMT power amplifier tube to process 1.7-2.9GHz broadband Doherty power amplifier, and the used medium substrate is in epsilonrTaconic RF35 board 3.55, h 30 mil. For convenience, an Anaren X3C22E1-03S 3dB 90 ° coupler was used as the input power splitter. In fig. 13, the red line with solid squares represents the line of the relationship between efficiency and frequency at saturation of the present embodiment, the blue line with solid dots represents the line of the relationship between efficiency and frequency that can be achieved by the 6dB power back-off of the present embodiment, the blue line with open dots represents the line of the relationship between gain and frequency that can be achieved by the 6dB power back-off of the present embodiment, and the red line with open squares represents the line of the relationship between gain and frequency at saturation of the present embodiment. It can be seen that at 6dB back-off power, the efficiency is in the range of 49% -59%, the maximum gain is about 13.5dB, and the gain ripple is less than 3 dB. For the saturated mode, the corresponding efficiency is between 57% and 68% and the gain is about 10 dB.
Fig. 14 shows the efficiency and gain of the Doherty power amplifier measured at different frequencies in the 1.7-2.9GHz band according to the embodiment of the present invention, as a function of the output power. In fig. 14, the blue line with solid triangles represents the efficiency of 1.7GHz and 2.4GHz and the gain-output power line of the present embodiment, the blue line with open triangles represents the efficiency of 2.0GHz and 2.7GHz and the gain-output power line of the present embodiment, the black line with solid squares represents the efficiency of 1.8GHz and 2.5GHz and the gain-output power line of the present embodiment, the black line with open squares represents the efficiency of 2.1GHz and 2.8GHz and the gain-output power line of the present embodiment, the red line with solid dots represents the efficiency of 1.9GHz and 2.6GHz and the gain-output power line of the present embodiment, and the red line with open circles represents the efficiency of 2.2GHz and 2.9GHz and the gain-output power line of the present embodiment. It can be seen from the figure that in the frequency range of 1.7 to 2.9GHz, the saturated output power of the amplifier is more than 43.5dBm, the efficiency curve has a relatively obvious Doherty operating characteristic, and the overall efficiency is relatively high. In addition, the gain, the output power and the efficiency of the power amplifier can keep better consistency on the whole working frequency band, and 53 percent of relative working bandwidth is realized.
Claims (5)
1. A dual-mode matching irregular structure Doherty power amplifier based on reflection coefficient circle optimization is characterized by comprising a coupler (10), a carrier amplification circuit (20), an irregular structure carrier dual-mode output matching network (30), a peak amplification circuit (40), an irregular structure peak dual-mode output matching network (50) and a combining load (60); the output ends of the upper path signal and the lower path signal of the coupler (10) are respectively connected with the input ends of the carrier amplification circuit (20) and the peak amplification circuit (40); the carrier amplification circuit (20) is formed by sequentially connecting a carrier phase compensation line (201), a carrier input matching network (202), a carrier transistor (203) and an irregular structure carrier dual-mode output matching network (30) in series; the peak value amplifying circuit (40) is formed by sequentially connecting a peak value phase compensation line (401), a peak value input matching network (402), a peak value transistor (403) and a peak value dual-mode output matching network (50) with an irregular structure in series; and the output ends of the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) are directly connected with a combiner load (60).
2. The Doherty power amplifier based on the reflection coefficient circle optimization of claim 1 and having the dual-mode matching irregular structure, wherein: the carrier phase compensation line (201) and the peak phase compensation line (401) are microstrip lines, the phase difference of the upper path signal and the lower path signal is adjusted respectively, the phases of the two paths of signals at the output are the same, and the carrier input matching network (202) and the peak input matching network (402) adopt a step impedance matching structure.
3. The Doherty power amplifier based on the reflection coefficient circle optimization of claim 1 and having the dual-mode matching irregular structure, wherein: the optimal load impedance required by the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) is obtained by an impedance optimization method module based on a reflection coefficient circle, the method module is mainly based on the microwave network theory, and supposing that any two impedances A and B exist on a complex impedance plane in a Smith chart, the corresponding reflection coefficient gamma can be calculated according to the impedance values of A and BABSelecting one of the impedance points A as a circle center, taking the modulus of the reflection coefficient gamma as a radius, and changing the phase angle theta between 0 and 2 pi to draw an equal reflection coefficient circle of the other impedance point B, wherein the modulus of any impedance in the circle and the reflection coefficient of the impedance point A are both smaller than the modulus of the reflection coefficient gammaABI, so that in the optimization process, only the current impedance value and the center position Z of the target load impedance area are calculatedoptThe reflection coefficient module value is compared with a set value, whether the impedance value meets the requirement of an optimization target or not can be judged, and therefore the success rate of output matching network optimization is improved.
4. The Doherty power amplifier based on reflection coefficient circle optimization of the dual-mode matching irregular structure of claim 2, wherein: the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) adopt a dual-mode impedance matching technology, when an input signal is low, the Doherty power amplifier is in a low-power mode, the irregular structure carrier dual-mode output matching network (30) needs to complete impedance matching of combining load impedance at a combining point to load impedance at the drain of the carrier amplification circuit (20), and meanwhile the irregular structure peak dual-mode output matching network (50) needs to convert output impedance of the peak amplification circuit (40) in the low-power mode to output impedance of the peak amplification circuit (40) at the combining point; when the input signal increases to the maximum, the Doherty power amplifier is in a saturation mode, and the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) need to respectively match the output impedance in the saturation mode to the optimal load impedance.
5. The Doherty power amplifier based on the reflection coefficient circle optimization of claim 1 and having the dual-mode matching irregular structure, wherein: the irregular structure carrier dual-mode output matching network (30) and the irregular structure peak dual-mode output matching network (50) are optimally designed based on an irregular structure module in a plane grid discrete shape, the structure module disperses an output matching network design space into sub-grids in a rectangular shape in design, each sub-grid is described by 0 or 1, therefore, binary matrix codes of the design space can be generated, and when the actual circuit grid of the output matching network is discretely divided, the size of the sub-grids is determined according to actual design requirements and circuit space.
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