CN112520686A - MEMS microphone wafer level packaging structure - Google Patents
MEMS microphone wafer level packaging structure Download PDFInfo
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- CN112520686A CN112520686A CN202011564115.5A CN202011564115A CN112520686A CN 112520686 A CN112520686 A CN 112520686A CN 202011564115 A CN202011564115 A CN 202011564115A CN 112520686 A CN112520686 A CN 112520686A
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 16
- 239000000758 substrate Substances 0.000 claims abstract description 142
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 120
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 120
- 239000010703 silicon Substances 0.000 claims abstract description 120
- 229910000679 solder Inorganic materials 0.000 claims description 29
- 238000007789 sealing Methods 0.000 claims description 10
- 238000010586 diagram Methods 0.000 description 4
- 238000000034 method Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012536 packaging technology Methods 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 230000005236 sound signal Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/04—Networks or arrays of similar microstructural devices
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0032—Packages or encapsulation
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R19/00—Electrostatic transducers
- H04R19/04—Microphones
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B2201/00—Specific applications of microelectromechanical systems
- B81B2201/02—Sensors
- B81B2201/0257—Microphones or microspeakers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04R—LOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
- H04R2201/00—Details of transducers, loudspeakers or microphones covered by H04R1/00 but not provided for in any of its subgroups
- H04R2201/003—Mems transducers or their use
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Signal Processing (AREA)
- Pressure Sensors (AREA)
- Micromachines (AREA)
Abstract
The embodiment of the invention provides a wafer-level packaging structure of an MEMS microphone, which comprises: the device comprises a first silicon substrate, a second silicon substrate and an ASIC chip; the first silicon substrate is hermetically connected with the second silicon substrate; the ASIC chip is arranged on one side of the second silicon substrate far away from the first silicon substrate; the second silicon substrate comprises a first area and a second area surrounding the first area; the first region includes a plurality of blind holes; the first silicon substrate comprises a through hole area, and the through hole area is arranged opposite to the first area; a back electrode and a vibrating diaphragm are arranged on one side, adjacent to the second silicon substrate, of the first silicon substrate, the back electrode and the vibrating diaphragm at least cover the through hole area, and the back electrode is arranged on one side, adjacent to the second silicon substrate, of the vibrating diaphragm; the back electrode is electrically connected with the ASIC chip through a first lead arranged in the second area, and the vibrating diaphragm is electrically connected with the ASIC chip through a second lead arranged in the second area. The MEMS microphone wafer-level packaging structure provided by the embodiment of the invention can reduce the packaging area of the MEMS microphone and meet the requirement of the market on the miniaturization packaging of the MEMS microphone.
Description
Technical Field
The invention relates to the field of MEMS microphones, in particular to a wafer-level packaging structure of an MEMS microphone.
Background
The MEMS microphone is a microphone manufactured based on MEMS technology, converts voice signals into electric signals, and is widely applied to mobile phones, computers, cameras, video cameras and smart home products. The MEMS microphone has good high-temperature resistance effect and can withstand the high-temperature test of a surface assembly process. The existing MEMS microphone structure is formed by a cavity body formed by a circuit board and a shell to be a package of the MEMS microphone, a bonding pad can be arranged on the outer surface of the circuit board and used for fixing the MEMS microphone and electrically connected to an external circuit, an MEMS acoustic chip and an ASIC chip are arranged in the cavity body, the ASIC chip at least comprises a bias voltage end, an input end, an output end, a power supply end and a grounding end, one electrode of the MEMS acoustic chip is electrically connected with the input end of the ASIC chip, the other electrode of the MEMS acoustic chip is electrically connected with the bias voltage end of the ASIC chip, and a sound hole which penetrates through the inside and the outside of the cavity body and is used for receiving an external sound signal is arranged on.
The packaging technology widely adopted by the existing MEMS microphone cannot meet the requirement of product miniaturization.
Disclosure of Invention
The MEMS microphone wafer-level packaging structure provided by the embodiment of the invention can reduce the packaging area of the MEMS microphone and meet the requirement of the market on the miniaturization packaging of the MEMS microphone.
The embodiment of the invention provides a wafer-level packaging structure of an MEMS microphone, which comprises: the device comprises a first silicon substrate, a second silicon substrate and an ASIC chip;
the first silicon substrate is hermetically connected with the second silicon substrate;
the ASIC chip is arranged on one side of the second silicon substrate far away from the first silicon substrate;
the second silicon substrate comprises a first area and a second area surrounding the first area; the first region comprises a plurality of blind holes;
the first silicon substrate includes a via region disposed opposite the first region; a back electrode and a vibrating diaphragm are arranged on one side, adjacent to the second silicon substrate, of the first silicon substrate, the back electrode and the vibrating diaphragm at least cover the through hole area, and the back electrode is arranged on one side, adjacent to the second silicon substrate, of the vibrating diaphragm; the back electrode is electrically connected with the ASIC chip through a first lead arranged in the second area, and the diaphragm is electrically connected with the ASIC chip through a second lead arranged in the second area.
Optionally, the first silicon substrate further includes a first seal ring, and the second silicon substrate further includes a second seal ring; the first sealing ring and the second sealing ring are arranged oppositely; the first silicon substrate and the second silicon substrate are welded through the first sealing ring and the second sealing ring to form sealing connection.
Optionally, the second region of the second silicon substrate includes a first through hole and a second through hole; the first through hole and the second through hole respectively penetrate through the second silicon substrate; the first lead penetrates through the first through hole to be connected with the ASIC chip, and the second lead penetrates through the second through hole to be connected with the ASIC chip.
Optionally, one side of the second silicon substrate, which is away from the first silicon substrate, further includes a first reverse side ball-mounting substrate, a second reverse side ball-mounting substrate, a first solder ball, a second solder ball, a third lead, and a fourth lead;
the first solder balls are arranged on the surface of the first reverse side ball-planting substrate far away from the second silicon substrate, and the second solder balls are arranged on the surface of the second reverse side ball-planting substrate far away from the second silicon substrate;
the third lead is electrically connected with the first reverse side ball-planting substrate and the ASCI chip respectively, and the fourth lead is electrically connected with the second reverse side ball-planting substrate and the ASCI chip respectively.
Optionally, the second silicon substrate further includes a first insulating layer and a second insulating layer;
the first insulating layer is arranged on the side wall of the first through hole and the side wall of the second through hole and used for insulating the first lead and the second lead from the second silicon substrate;
the second insulating layer is arranged on one side, away from the insulating layer, of the first lead and the second lead, and the first through hole and the second through hole are filled with the second insulating layer respectively.
Optionally, the second insulating layer is a solder resist layer.
Optionally, the first silicon substrate includes a third insulating layer, and the third insulating layer is respectively disposed on the sidewall of the through hole region, a side of the back electrode away from the second silicon substrate, and a side of the diaphragm close to the second silicon substrate.
Optionally, the ASIC chip includes a first conductive pin and a second conductive pin; the first conductive pin is electrically connected with the first lead; the second conductive pin is electrically connected with the second lead.
Optionally, the first silicon substrate and the second silicon substrate have the same shape and cross-sectional size.
Optionally, the first silicon substrate includes a fifth lead and a sixth lead; the fifth lead is respectively connected with the back pole and the first lead; the sixth lead is respectively connected with the diaphragm and the second lead.
According to the wafer-level packaging structure of the MEMS microphone provided by the embodiment of the invention, the first silicon substrate, the second silicon substrate and the ASIC chip are sequentially stacked, the back electrode and the ASIC chip are respectively connected with the two ends of the first lead, and the diaphragm and the ASIC chip are respectively connected with the two ends of the second lead to ensure the normal work of the MEMS microphone.
Drawings
Fig. 1 is a schematic structural diagram of a first silicon substrate of a wafer level package structure of an MEMS microphone according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a second silicon substrate of a wafer level package structure of a MEMS microphone according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of an ASIC chip of a MEMS microphone wafer level package structure according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a wafer level package structure of a MEMS microphone according to an embodiment of the present invention.
Detailed Description
The embodiments of the present invention will be described in further detail with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of and not restrictive on the broad invention. It should be further noted that, for convenience of description, only some structures, not all structures, relating to the embodiments of the present invention are shown in the drawings.
Fig. 1 is a schematic structural view of a first silicon substrate of an MEMS microphone wafer-level package structure according to an embodiment of the present invention, fig. 2 is a schematic structural view of a second silicon substrate of an MEMS microphone wafer-level package structure according to an embodiment of the present invention, fig. 3 is a schematic structural view of an ASIC chip of an MEMS microphone wafer-level package structure according to an embodiment of the present invention, and fig. 4 is a schematic structural view of an MEMS microphone wafer-level package structure according to an embodiment of the present invention. Referring to fig. 1, fig. 2, fig. 3 and fig. 4, a wafer level package structure of a MEMS microphone according to an embodiment of the present invention includes: a first silicon substrate 110, a second silicon substrate 120, and an ASIC chip 130; the first silicon substrate 110 is hermetically connected with the second silicon substrate 120; the ASIC chip 130 is disposed on a side of the second silicon substrate 120 away from the first silicon substrate 110; the second silicon substrate 120 includes a first region and a second region surrounding the first region; the first region includes a plurality of blind holes 20; the first silicon substrate 110 includes a via region 10, the via region 10 being disposed opposite the first region; a back electrode 11 and a diaphragm 12 are arranged on one side of the first silicon substrate 110 adjacent to the second silicon substrate 120, the back electrode 11 and the diaphragm 12 at least cover the through hole region 10, and the back electrode 11 is arranged on one side of the diaphragm 12 adjacent to the second silicon substrate 120; the back electrode 11 is electrically connected to the ASIC chip 130 through a first lead 21 disposed in the second region, and the diaphragm 12 is electrically connected to the ASIC chip 130 through a second lead 22 disposed in the second region.
Specifically, referring to fig. 1 and 4, a distance of several micrometers exists between the diaphragm 12 and the back electrode 11 in the first silicon substrate 110 to form a capacitor 13, when sound is emitted from the outside, a sound pressure signal is sensed by the diaphragm 12 through the through hole region 10 of the first silicon substrate 110, the diaphragm 12 vibrates, so that a distance between the diaphragm 12 and the back electrode 11 changes, and the capacitor 13 changes, and the ASIC chip 130 receives a change in capacitance through the first lead 21 and the second lead 22, converts the change in capacitance 13 into a change in voltage signal, and then amplifies the change in voltage signal and outputs the change. Referring to fig. 2, the first region has a plurality of blind holes 20, the plurality of blind holes 20 form an acoustic cavity, so as to ensure that the signal-to-noise ratio of the MEMS microphone can meet the use requirement, the depth of the blind holes 20 is not greater than the depth of the silicon substrate, so as to increase the mechanical strength of the wafer-level package structure of the MEMS microphone, and the signal-to-noise ratio of the MEMS microphone changes when the depth of the blind holes 20 changes, that is, the signal-to-noise ratio of the MEMS microphone can be adjusted within a certain range through the package process parameters. The material of the diaphragm 12 may be silicon material, and the material of the back electrode 11 may be silicon nitride. The blind via 20 is formed by dry etching, and a straight via process is employed, which can reduce the size of the upper opening of the via, thereby ensuring that there is sufficient space for wiring on the surface of the second silicon substrate 120. The back electrode 11 is also provided with a plurality of small holes.
According to the wafer-level packaging structure of the MEMS microphone provided by the embodiment of the invention, the first silicon substrate 110, the second silicon substrate 120 and the ASIC chip 130 are sequentially stacked, the back electrode 11 and the ASIC chip 130 are respectively connected with two ends of the first lead 21, and the diaphragm 12 and the ASIC chip 130 are respectively connected with two ends of the second lead 22 to ensure that the MEMS microphone normally works.
Optionally, with continued reference to fig. 1, 2, and 4, the first silicon substrate 110 further includes a first seal ring 14, and the second silicon substrate 120 further includes a second seal ring 23; the first seal ring 14 is arranged opposite to the second seal ring 23; the first silicon substrate 110 and the second silicon substrate 120 are welded through the first seal ring 14 and the second seal ring 23 to form a sealed connection.
Specifically, the first seal ring 14 and the second seal ring 23 function to prevent the sound pressure signal from leaking out of the MEMS microphone wafer level package structure. The first seal ring 14 and the second seal ring 23 are connected by soldering with solder 40, whereby the first silicon substrate 110 and the second silicon substrate 120 are stacked and hermetically connected.
Optionally, with continued reference to fig. 2 and 4, the second region of the second silicon substrate 120 includes a first via 24 and a second via 25; the first through hole 24 and the second through hole 25 respectively penetrate through the second silicon substrate 120; the first lead 21 penetrates the first through hole 24 to be connected to the ASIC chip 130, and the second lead 22 penetrates the second through hole 25 to be connected to the ASIC chip 130.
Specifically, disposing the first and second leads 21 and 22 in the first and second through holes 24 and 25, respectively, can reduce the area of the wiring on the surface of the second silicon substrate 120, and can also ensure that the second silicon substrate 120 has enough space for wiring. The first lead 21 and the second lead 22 are connected to the ASIC chip 130 by solder 40.
Optionally, with continued reference to fig. 2 and fig. 4, the side of the second silicon substrate 120 away from the first silicon substrate 110 further includes a first reverse-side ball-mounting substrate 26, a second reverse-side ball-mounting substrate 27, a first solder ball 28, a second solder ball 29, a third lead, and a fourth lead; the first solder ball 28 is disposed on the surface of the first reverse side ball-planted substrate 26 away from the second silicon substrate 120, and the second solder ball 29 is disposed on the surface of the second reverse side ball-planted substrate 27 away from the second silicon substrate 120; the third lead is electrically connected to the first reverse-side ball-mounted substrate 26 and the ASCI chip 130, respectively, and the fourth lead is electrically connected to the second reverse-side ball-mounted substrate 27 and the ASCI chip 130, respectively.
Specifically, the first solder ball 27 and the second solder ball 28 are used for connecting an external device and receiving signals transmitted by the external device or transmitting some signals to the external device, and the first reverse-side ball-mounting substrate 26 and the second reverse-side ball-mounting substrate 27 are used for connecting the first solder ball 28 and the second solder ball 29, respectively. The first solder balls 28 are electrically connected to the ASCI chip 130 through third leads, and the second solder balls 29 are electrically connected to the ASCI chip 130 through fourth leads.
It should be noted that the third and fourth leads are not shown in the drawings, and are not intended to limit the present invention, and the third and fourth leads may be disposed in any manner as long as the third lead is electrically connected to the first reverse ball-mounted substrate and the ASCI chip, and the fourth lead is electrically connected to the second reverse ball-mounted substrate and the ASCI chip, respectively.
Optionally, with continued reference to fig. 2 and 4, the second silicon substrate 120 further includes a first insulating layer 30 and a second insulating layer 31; a first insulating layer 30 is provided on sidewalls of the first via hole 24 and sidewalls of the second via hole 25 for insulating the first and second lead lines 21 and 22 from the second silicon substrate 120; the second insulating layer 31 is disposed on the sides of the first lead 21 and the second lead 22 away from the insulating layer, and the first through hole 24 and the second through hole 25 are filled with the second insulating layer 31.
Specifically, the first insulating layer 30 is further disposed on a side of the second silicon substrate 120 away from the ASCI chip, and the first insulating layer 30 is used for preventing signals transmitted by the first lead 21 and the second lead 22 from being input into the second silicon substrate 120 and causing signal loss. The second insulating layer 31 fills the first through hole 24 and the second through hole 25 after the first lead 21 and the second lead 22 are completely manufactured.
Optionally, the second insulating layer is a solder resist layer.
Specifically, the solder cannot be fixed to the solder resist layer, and the solder resist layer functions to prevent the solder from forming a conductive loop with the first lead 21 or the second lead 22 after falling on the first through hole and the second through hole.
Optionally, with continuing reference to fig. 1 and 4, the first silicon substrate 110 includes a third insulating layer 15, and the third insulating layer 15 is respectively disposed on the sidewall of the through hole region 10, the side of the back electrode 11 away from the second silicon substrate 120, and the side of the diaphragm 12 close to the second silicon substrate 120.
Specifically, the third insulating layer 15 functions to prevent signals transmitted by the back electrode 11 and the diaphragm 12 from being transmitted into the first silicon substrate 110.
Optionally, with continued reference to fig. 3 and 4, the ASIC chip 130 includes a first conductive pin 131 and a second conductive pin 132; the first conductive pin 131 is electrically connected to the first lead 21; the second conductive pin 132 is electrically connected to the second lead 22.
Specifically, the ASIC chip 130 is stacked on the second silicon substrate 120, and receives signals transmitted through the first lead 21 and the second lead 22 via the first conductive lead 131 and the second conductive lead 132, respectively. Or transmits power signals to the first and second leads 21 and 22 through the first and second conductive pins 131 and 132, respectively.
Optionally, the first silicon substrate and the second silicon substrate have the same shape and cross-sectional dimensions.
Specifically, the shapes and the cross-sectional dimensions of the first silicon substrate and the second silicon substrate are the same, so that the volume of the MEMS microphone wafer-level packaging structure can be further reduced, the MEMS microphone wafer-level packaging structure can be developed and manufactured in a miniaturized manner, and the requirement of the market on miniaturization of MEMS microphone products can be met.
Alternatively, with continued reference to fig. 1 and 4, the first silicon substrate 110 includes a fifth lead 16 and a sixth lead 17; the fifth lead 16 is connected to the back electrode 11 and the first lead 21, respectively; the sixth lead 17 is connected to the diaphragm 12 and the second lead 22, respectively.
Specifically, the fifth lead 16 is connected to the first lead 21 through solder 40, the sixth lead 17 is also connected to the second lead 22 through solder 40, the fifth lead 16 is used for transmitting the power signal transmitted by the first lead 21 to the back electrode 11, and the sixth lead 17 is used for transmitting the capacitance change detected by the diaphragm 12 to the second lead 22.
It should be noted that the foregoing is only a preferred embodiment of the present invention and the technical principles applied. Those skilled in the art will appreciate that the embodiments of the present invention are not limited to the specific embodiments described herein, and that various obvious changes, adaptations, and substitutions are possible, without departing from the scope of the embodiments of the present invention. Therefore, although the embodiments of the present invention have been described in more detail through the above embodiments, the embodiments of the present invention are not limited to the above embodiments, and many other equivalent embodiments may be included without departing from the concept of the embodiments of the present invention, and the scope of the embodiments of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A wafer level packaging structure of a MEMS microphone is characterized by comprising: the device comprises a first silicon substrate, a second silicon substrate and an ASIC chip;
the first silicon substrate is hermetically connected with the second silicon substrate;
the ASIC chip is arranged on one side of the second silicon substrate far away from the first silicon substrate;
the second silicon substrate comprises a first area and a second area surrounding the first area; the first region comprises a plurality of blind holes;
the first silicon substrate includes a via region disposed opposite the first region; a back electrode and a vibrating diaphragm are arranged on one side, adjacent to the second silicon substrate, of the first silicon substrate, the back electrode and the vibrating diaphragm at least cover the through hole area, and the back electrode is arranged on one side, adjacent to the second silicon substrate, of the vibrating diaphragm; the back electrode is electrically connected with the ASIC chip through a first lead arranged in the second area, and the diaphragm is electrically connected with the ASIC chip through a second lead arranged in the second area.
2. The MEMS microphone wafer level package structure of claim 1, wherein the first silicon substrate further comprises a first seal ring, the second silicon substrate further comprises a second seal ring; the first sealing ring and the second sealing ring are arranged oppositely; the first silicon substrate and the second silicon substrate are welded through the first sealing ring and the second sealing ring to form sealing connection.
3. The MEMS microphone wafer level package structure of claim 2, wherein the second region of the second silicon substrate comprises a first via and a second via; the first through hole and the second through hole respectively penetrate through the second silicon substrate; the first lead penetrates through the first through hole to be connected with the ASIC chip, and the second lead penetrates through the second through hole to be connected with the ASIC chip.
4. The MEMS microphone wafer level package structure of claim 3, wherein the side of the second silicon substrate away from the first silicon substrate further comprises a first reverse side ball-bonded substrate, a second reverse side ball-bonded substrate, a first solder ball, a second solder ball, a third lead and a fourth lead;
the first solder balls are arranged on the surface of the first reverse side ball-planting substrate far away from the second silicon substrate, and the second solder balls are arranged on the surface of the second reverse side ball-planting substrate far away from the second silicon substrate;
the third lead is electrically connected with the first reverse side ball-planting substrate and the ASCI chip respectively, and the fourth lead is electrically connected with the second reverse side ball-planting substrate and the ASCI chip respectively.
5. The MEMS microphone wafer level package structure of claim 3, wherein the second silicon substrate further comprises a first insulating layer and a second insulating layer;
the first insulating layer is arranged on the side wall of the first through hole and the side wall of the second through hole and used for insulating the first lead and the second lead from the second silicon substrate;
the second insulating layer is arranged on one side, away from the insulating layer, of the first lead and the second lead, and the first through hole and the second through hole are filled with the second insulating layer respectively.
6. The MEMS microphone wafer level package structure of claim 5, wherein the second insulating layer is a solder resist layer.
7. The MEMS microphone wafer level package structure of claim 1, wherein the first silicon substrate comprises a third insulating layer, and the third insulating layer is disposed on a sidewall of the through hole region, a side of the back electrode away from the second silicon substrate, and a side of the diaphragm close to the second silicon substrate.
8. The MEMS microphone wafer level package structure of claim 1, wherein the ASIC chip comprises a first conductive pin and a second conductive pin; the first conductive pin is electrically connected with the first lead; the second conductive pin is electrically connected with the second lead.
9. The MEMS microphone wafer level package structure of claim 1, wherein the first silicon substrate and the second silicon substrate are the same size in shape and cross-section.
10. The MEMS microphone wafer level package structure of claim 1, wherein the first silicon substrate comprises a fifth lead and a sixth lead; the fifth lead is respectively connected with the back pole and the first lead; the sixth lead is respectively connected with the diaphragm and the second lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011564115.5A CN112520686A (en) | 2020-12-25 | 2020-12-25 | MEMS microphone wafer level packaging structure |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202011564115.5A CN112520686A (en) | 2020-12-25 | 2020-12-25 | MEMS microphone wafer level packaging structure |
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| CN112520686A true CN112520686A (en) | 2021-03-19 |
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| CN202011564115.5A Pending CN112520686A (en) | 2020-12-25 | 2020-12-25 | MEMS microphone wafer level packaging structure |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113891200A (en) * | 2021-09-24 | 2022-01-04 | 青岛歌尔智能传感器有限公司 | Packaging structure of microphone |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1574302A (en) * | 2003-06-04 | 2005-02-02 | 株式会社瑞萨科技 | Semiconductor device |
| US20120093346A1 (en) * | 2009-04-29 | 2012-04-19 | Epcos Ag | Mems microphone |
| CN205283816U (en) * | 2015-12-25 | 2016-06-01 | 歌尔声学股份有限公司 | MEMS microphone chip and MEMS microphone |
| CN107089640A (en) * | 2017-05-02 | 2017-08-25 | 歌尔股份有限公司 | A kind of MEMS chip and preparation method |
| CN214528129U (en) * | 2020-12-25 | 2021-10-29 | 华景科技无锡有限公司 | MEMS microphone wafer level packaging structure |
-
2020
- 2020-12-25 CN CN202011564115.5A patent/CN112520686A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1574302A (en) * | 2003-06-04 | 2005-02-02 | 株式会社瑞萨科技 | Semiconductor device |
| US20120093346A1 (en) * | 2009-04-29 | 2012-04-19 | Epcos Ag | Mems microphone |
| CN205283816U (en) * | 2015-12-25 | 2016-06-01 | 歌尔声学股份有限公司 | MEMS microphone chip and MEMS microphone |
| CN107089640A (en) * | 2017-05-02 | 2017-08-25 | 歌尔股份有限公司 | A kind of MEMS chip and preparation method |
| CN214528129U (en) * | 2020-12-25 | 2021-10-29 | 华景科技无锡有限公司 | MEMS microphone wafer level packaging structure |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113891200A (en) * | 2021-09-24 | 2022-01-04 | 青岛歌尔智能传感器有限公司 | Packaging structure of microphone |
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