CN112513824A - 一种内存交织方法及装置 - Google Patents

一种内存交织方法及装置 Download PDF

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Publication number
CN112513824A
CN112513824A CN201880096144.8A CN201880096144A CN112513824A CN 112513824 A CN112513824 A CN 112513824A CN 201880096144 A CN201880096144 A CN 201880096144A CN 112513824 A CN112513824 A CN 112513824A
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memory
capacity
configuration information
channel
access
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CN201880096144.8A
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CN112513824B (zh
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信恒超
夏晶
曾红义
陈挚睿
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Huawei Technologies Co Ltd
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Huawei Technologies Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0844—Multiple simultaneous or quasi-simultaneous cache accessing
    • G06F12/0846—Cache with multiple tag or data arrays being simultaneously accessible
    • G06F12/0851—Cache with interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0646—Configuration or reconfiguration
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
    • G06F12/0607—Interleaved addressing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1016—Performance improvement

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Storage Device Security (AREA)
  • Communication Control (AREA)

Abstract

一种内存交织方法及装置，涉及计算机领域，解决了采用两个交织窗口和交织算法对访问进行交织时出现不同的地址空间的访存性能的差异的问题。具体方案为：根据N个配置信息将访问容量划分为P份部分访问容量，P份部分访问容量的大小相同，N个配置信息为N个内存通道的配置信息，一个配置信息对应一个内存通道，配置信息用于指示内存通道映射的容量份数，N个内存通道中至少一个内存通道映射两份容量，N表示内存通道的总数，N为大于或等于2的整数；根据配置映射表将P份部分访问容量映射到N个内存通道，配置映射表用于指示容量与内存通道的映射关系。本方法及装置用于内存交织的过程中。

Description

PCT国内申请，说明书已公开。

Claims (10)

  1. PCT国内申请，权利要求书已公开。
CN201880096144.8A 2018-07-31 2018-07-31 一种内存交织方法及装置 Active CN112513824B (zh)

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PCT/CN2018/097807 WO2020024113A1 (zh) 2018-07-31 2018-07-31 一种内存交织方法及装置

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CN112513824A true CN112513824A (zh) 2021-03-16
CN112513824B CN112513824B (zh) 2024-04-09

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US (1) US20210149804A1 (zh)
EP (1) EP3822796B1 (zh)
CN (1) CN112513824B (zh)
WO (1) WO2020024113A1 (zh)

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CN115344506A (zh) * 2022-10-19 2022-11-15 瀚博半导体(上海)有限公司 内存地址的映射方法、内存访问方法和装置、芯片、设备

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* Cited by examiner, † Cited by third party
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CN113791822B (zh) * 2021-11-15 2022-04-12 沐曦集成电路(上海)有限公司 多内存通道的内存存取装置、方法和数据处理设备

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US20150082002A1 (en) * 2013-09-19 2015-03-19 Jorge E. Parra Dynamic heterogeneous hashing functions in ranges of system memory addressing space
CN104854572A (zh) * 2012-12-10 2015-08-19 高通股份有限公司 用于对具有不对称存储组件的存储子系统中的存储进行动态地分配的系统和方法
CN105452986A (zh) * 2013-08-08 2016-03-30 高通股份有限公司 用于具有选择性功率或性能优化的内存通道交织的系统和方法
CN105518632A (zh) * 2013-09-27 2016-04-20 高通股份有限公司 用于存储器交错的可配置扩展函数
CN105612501A (zh) * 2013-10-03 2016-05-25 高通股份有限公司 用于跨越具有非对称存储容量的多通道存储器架构对数据均匀交织的系统和方法
US20170371812A1 (en) * 2016-06-27 2017-12-28 Qualcomm Incorporated System and method for odd modulus memory channel interleaving

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US8407433B2 (en) * 2007-06-25 2013-03-26 Sonics, Inc. Interconnect implementing internal controls
US9141541B2 (en) * 2013-09-20 2015-09-22 Advanced Micro Devices, Inc. Nested channel address interleaving
CN104750557B (zh) * 2013-12-27 2018-07-03 华为技术有限公司 一种内存管理方法和内存管理装置
CN105446911B (zh) * 2014-05-29 2018-05-25 展讯通信（上海）有限公司 终端设备的内存访问控制方法与装置
CN106155912A (zh) * 2015-04-14 2016-11-23 扬智科技股份有限公司 多通道存储器与其存储器存取方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104854572A (zh) * 2012-12-10 2015-08-19 高通股份有限公司 用于对具有不对称存储组件的存储子系统中的存储进行动态地分配的系统和方法
CN105452986A (zh) * 2013-08-08 2016-03-30 高通股份有限公司 用于具有选择性功率或性能优化的内存通道交织的系统和方法
US20150082002A1 (en) * 2013-09-19 2015-03-19 Jorge E. Parra Dynamic heterogeneous hashing functions in ranges of system memory addressing space
CN105518632A (zh) * 2013-09-27 2016-04-20 高通股份有限公司 用于存储器交错的可配置扩展函数
CN105612501A (zh) * 2013-10-03 2016-05-25 高通股份有限公司 用于跨越具有非对称存储容量的多通道存储器架构对数据均匀交织的系统和方法
US20170371812A1 (en) * 2016-06-27 2017-12-28 Qualcomm Incorporated System and method for odd modulus memory channel interleaving

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN115344506A (zh) * 2022-10-19 2022-11-15 瀚博半导体(上海)有限公司 内存地址的映射方法、内存访问方法和装置、芯片、设备
CN115344506B (zh) * 2022-10-19 2023-06-16 瀚博半导体(上海)有限公司 内存地址的映射方法、内存访问方法和装置、芯片、设备

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Publication number Publication date
EP3822796A1 (en) 2021-05-19
CN112513824B (zh) 2024-04-09
EP3822796B1 (en) 2023-01-18
US20210149804A1 (en) 2021-05-20
WO2020024113A1 (zh) 2020-02-06
EP3822796A4 (en) 2021-07-21

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