CN112506003A - Mask optimization method, mask optimization system and electronic equipment - Google Patents
Mask optimization method, mask optimization system and electronic equipment Download PDFInfo
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- CN112506003A CN112506003A CN202011314970.0A CN202011314970A CN112506003A CN 112506003 A CN112506003 A CN 112506003A CN 202011314970 A CN202011314970 A CN 202011314970A CN 112506003 A CN112506003 A CN 112506003A
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/68—Preparation processes not covered by groups G03F1/20 - G03F1/50
- G03F1/70—Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/36—Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
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Abstract
The present invention relates to the field of integrated circuit mask design, and more particularly, to a mask optimization method, a mask optimization system, and an electronic device. The method comprises the following steps: s1, providing a mask layout including at least one mask pattern, and dividing the mask layout into a plurality of region blocks, wherein at least part of the region blocks include at least one mask pattern; s2, calculating all line segments of each mask pattern in the area block and line segments around the line segments respectively to obtain and record a characteristic value corresponding to each line segment; s3, counting the characteristic values of all the area blocks, classifying the area blocks based on the characteristic values, selecting the area blocks needing to be optimized to be execution blocks based on the classification result, and distinguishing the characteristic values of line segments of the mask graph among all the execution blocks; and S4, optimizing the execution block, recording the optimization result, and performing global optimization on the mask layout based on the optimization result, wherein the optimization on the mask layout based on the steps can well reduce the operation amount and improve the optimization efficiency.
Description
[ technical field ] A method for producing a semiconductor device
The present invention relates to the field of integrated circuit mask design, and in particular, to a mask optimization method, a mask optimization system, and an electronic device.
[ background of the invention ]
Photolithography is the most important process in modern very large scale integrated circuit manufacturing, namely, an important means for transferring the design pattern of the integrated circuit on the mask to the silicon wafer by a photolithography machine. When the design pattern of the integrated circuit on the mask is imaged on a silicon chip through a projection objective of a photoetching machine, the diffraction phenomenon of light is gradually obvious along with the smaller characteristic size of the pattern on the mask. When some high-order diffracted light cannot participate in imaging due to the limitation of the aperture of the optical system of the projection objective, the imaging on a silicon wafer generates the phenomena of deformation and indistinguishable graph. This phenomenon is called Optical Proximity Effect (Optical Proximity Effect). In order to improve the imaging resolution and the imaging quality, one can realize the correction of the optical Proximity effect, namely OPC (optical Proximity correction), by optimizing the pattern on the mask. As feature sizes decrease, often a large number of mask patterns are included throughout the layout, often reaching the hundreds of millions, and OPC cannot simultaneously correct layout patterns that contain hundreds of millions. Usually, the whole layout is divided into small areas for respective OPC, and then the results of the small areas are assembled into a complete result. The complete layout is often divided into hundreds of thousands of small areas, and the OPC time is long even if parallel computation is used.
[ summary of the invention ]
The invention provides a mask optimization method, a mask optimization system and electronic equipment, aiming at overcoming the technical problem of longer optimization time in the process of optimizing a mask at present.
In order to solve the above technical problems, the present invention provides a technical solution: a mask optimization method, comprising the steps of: s1, providing a mask layout including at least one mask pattern, and dividing the mask layout into a plurality of region blocks, wherein at least part of the region blocks include at least one mask pattern, and the mask pattern is a polygon and includes a plurality of enclosed line segments; s2, calculating all line segments of each mask pattern in the area block and line segments around the line segments respectively to obtain and record a characteristic value corresponding to each line segment of each mask pattern; s3, counting the characteristic values of all line segments in all the area blocks, classifying the area blocks based on the characteristic values, selecting the area blocks needing to be optimized to be execution blocks based on the classification result, and distinguishing the characteristic values of the line segments of the mask graph among all the execution blocks; and S4, optimizing the execution block, recording the optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, and performing global optimization on the mask layout based on the optimization result.
Preferably, the method for optimizing the mask further comprises the steps of: s10, dividing the line segment of the mask pattern which exceeds the preset length into at least two line segments; the length of the segmented line segment is set according to a preset length range; the step S10 is between the step S1 and the step S2.
Preferably, the step S3 specifically includes the following steps: s31, classifying the area blocks with the same characteristic values of all the line segments into a category; s32, selecting one area block among the area blocks of each category to obtain the execution block; and S33, counting the types of the characteristic values of all the line segments of the execution blocks to obtain the arrangement sequence of the types from large to small, and sequentially selecting the execution blocks for optimization according to the sequence from large to small until the union of the characteristic values of all the line segments included by all the execution blocks is equal to the union of the characteristic values of all the line segments included by all the area blocks.
Preferably, in step S4, an optimization rule is established based on the feature values corresponding to the line segments in the execution block and the corresponding optimization results, and the mask layout is globally optimized based on the optimization rule.
Preferably, in the step S1, the area block is a square with a preset side length range.
Preferably, the preset side length ranges are as follows: 10-100 μm.
Preferably, in the step S2, the characteristic value is at least a function of the position, length and direction of all the surrounding line segments.
Preferably, a line segment whose feature value needs to be calculated is defined as Sj, the feature value is a, and Si is a line segment around the line segment Sj, then a is calculated by the following hash function:
si (x, y) is the relative coordinate of the line segment Si around the line segment Sj with the midpoint of the line segment Sj as the origin, Sil is the length of the line segment Si, and SiD is the relative value of the line segment Si with respect to the direction of the line segment Sj.
In order to solve the above technical problem, the present invention further provides a mask optimization system, including a partitioning module: the device comprises a mask layout, a control unit and a processing unit, wherein the mask layout is used for inputting a mask layout comprising at least one mask pattern, and dividing the mask layout into a plurality of region blocks, at least part of the region blocks comprise at least one mask pattern, and the mask pattern is a polygon and comprises a plurality of enclosed line segments; a characteristic value calculation module: the mask graph calculation device is used for calculating all line segments of each mask graph in the area block and line segments around the line segments, and obtaining and recording a characteristic value corresponding to each line segment of each mask graph; a screening module: the characteristic values of all line segments in all the area blocks are counted, the area blocks are classified based on the characteristic values, the area blocks needing to be optimized are selected to be defined as execution blocks based on the classification result, and the characteristic values of the line segments of the mask graph among all the execution blocks are different; an optimization module: and the optimization module is used for optimizing the execution block, recording an optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, and performing global optimization on the mask layout based on the optimization result.
In order to solve the above technical problem, the present invention also provides an electronic device, which includes one or more processors; a storage device to store one or more programs that, when executed by the one or more processors, cause the one or more processors to implement the mask optimization method as described above.
Compared with the prior art, the mask optimization method and the electronic equipment provided by the invention have the following beneficial effects:
a mask optimization method, comprising the steps of: s1, providing a mask layout comprising at least two mask patterns, and dividing the mask layout into a plurality of region blocks, wherein at least part of the region blocks comprise at least two mask patterns, and the mask patterns are in a multi-line segment shape; s2, calculating all line segments of each mask pattern in the area block and line segments around the line segments respectively to obtain and record a characteristic value corresponding to each line segment of each mask pattern; s3, counting characteristic values in all the area blocks, classifying the area blocks based on the characteristic values, selecting the area blocks needing to be optimized to be execution blocks based on the classification result, and distinguishing the characteristic values of line segments of the mask graph among all the execution blocks; and S4, optimizing the execution block, recording the optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, globally optimizing the mask layout based on the optimization result, selecting the region block with the different characteristic values as the execution block according to the calculated characteristic values of the line segments of the mask graph when the optimization is executed for the first time, optimizing the mask graph in the execution block first without simultaneously optimizing all the region blocks, reducing the calculation amount well, improving the optimization speed, and after the primary optimization is completed, applying the obtained optimization result to other region blocks which are not optimized according to the same characteristic values in the same optimization mode, so as to perform global optimization on the mask layout, thereby reducing the calculation amount well and improving the optimization efficiency.
In step S4, the types of feature values of all line segments of the execution block are counted to obtain an arrangement order of the types from large to small, and the execution blocks are sequentially selected from large to small to be optimized until the union of the feature values of all line segments included in all the execution blocks is equal to the union of the feature values of all line segments included in all the region blocks, and the greater the types of feature values are, the more complicated the environment in which the mask pattern in the execution block is located is represented.
In step S4, an optimization rule is established based on the feature values corresponding to the line segments in the execution block and the corresponding optimization results, the mask layout is globally optimized based on the optimization rule, and after the optimization rule is established, the optimization of the mask patterns in other region blocks has a rule that is searchable, thereby avoiding errors in the optimization process, improving the accuracy of the optimization, and simultaneously protecting the optimization rule.
The mask optimization system and the electronic equipment provided by the invention have the same beneficial effects as the method.
[ description of the drawings ]
FIG. 1 is a schematic flow chart of a mask optimization method according to a first embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a mask layout provided in the first embodiment of the present invention;
FIG. 3 is an enlarged schematic view of region M of FIG. 2;
FIG. 4 is an enlarged partial schematic view of FIG. 3;
FIG. 5 is an enlarged partial schematic view of FIG. 4;
FIG. 6 is a schematic view of surrounding line segments associated with one line segment of a mask pattern in the first embodiment of the present invention;
fig. 7 is a detailed flowchart of step S3 in the first embodiment of the present invention;
fig. 8 is a detailed flowchart of step S3 in a variation of the first embodiment of the present invention;
FIG. 9 is a block diagram of a mask optimization system provided in a second embodiment of the present invention;
fig. 10 is a block schematic diagram of an electronic device provided in a third embodiment of the invention;
FIG. 11 is a schematic block diagram of a computer system suitable for use with a server implementing an embodiment of the invention.
[ detailed description ] embodiments
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Referring to fig. 1, a first embodiment of the invention provides a mask optimization method, which includes the following steps:
s1, providing a mask layout including at least one mask pattern, and dividing the mask layout into a plurality of region blocks, wherein at least part of the region blocks include at least one mask pattern, and the mask pattern is a polygon and includes a plurality of enclosed line segments;
s2, calculating all line segments of each mask pattern in the area block and line segments around the line segments respectively to obtain and record a characteristic value corresponding to each line segment of each mask pattern;
s3, counting the characteristic values of all line segments in all the area blocks, classifying the area blocks based on the characteristic values, selecting the area blocks needing to be optimized to be execution blocks based on the classification result, and distinguishing the characteristic values of the line segments of the mask graph among all the execution blocks; and
and S4, optimizing the execution block, recording an optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, and performing global optimization on the mask layout based on the optimization result.
Typically, the mask pattern is in the form of a strip-shaped structure, typically a rectangular block-shaped structure. In some other embodiments, the mask pattern may have other shapes, which depend on the specific shape of the initial mask, such as trapezoid, irregular polygon, regular polygon, etc.
In step S1, the whole mask layout is usually divided into smaller blocks of regions in order to improve the speed and accuracy of mask optimization. Since only a part of the region on the layout includes the mask pattern, the mask pattern may not be included in a part of the region block in the divided region block. In practice, the mask pattern is optimized during the optimization, and therefore, the area block not including the mask pattern will not be involved in the optimization calculation. It should be noted that the divided region block may include a complete mask pattern or a partial region of a mask pattern.
Referring to fig. 2, in step S1, the area blocks are squares with a predetermined side length range, such as N areas in the figure, which are area blocks divided according to a predetermined size. It should be noted that fig. 2 is only an example, and the layout of the mask patterns of the actual mask layout is relatively more complicated and the size of the mask patterns is relatively larger. As can be seen from fig. 2, the region M is darker in color (black portion) which represents that the mask pattern is included therein. In some specific embodiments, the preset side length range is: 10-100 μm. Optionally, the preset side length range may also be: 10-20 μm, 20-30 μm, 30-60 μm, 60-80 μm, or 80-100 μm. Or the preset side length range can also be as follows: 15 μm, 25 μm, 40 μm, 55 μm, 60 μm, 85 μm or 95 μm.
Referring to fig. 3, fig. 3 is a schematic diagram illustrating an enlarged partial area selected from fig. 2. In order to better show the shape of the mask pattern in the area block including the mask pattern, the area O of the selected portion in fig. 3 is enlarged.
Referring to fig. 4 and 5, fig. 4 is a partial view of the enlarged schematic view in fig. 3, after enlargement, the region O included therein can be seen, fig. 5 is a schematic view of the partial region O1 in the selective inclusion region O in fig. 4, and then further enlargement is performed, as shown in fig. 5, the selected region O2 is a partial region of the region O1 after enlargement, and in this region, the mask pattern corresponds to the strip-shaped region T in the drawing.
In the above step S2, calculation is performed on all the line segments of each mask pattern in the area block and the line segments around them, respectively, and a feature value corresponding to each line segment of each mask pattern is obtained and recorded. In this step, the characteristic value is at least a function of the position, length and direction with respect to all the surrounding line segments. Defining a line segment needing to calculate a characteristic value as Sj, wherein the characteristic value is corresponding to a, Si is a line segment around the line segment Sj, and then a is calculated by the following hash function:
si (x, y) is the relative coordinate of the line segment Si around the line segment Sj with the midpoint of the line segment Sj as the origin, Sil is the length of the line segment Si, and SiD is the relative value of the line segment Si with respect to the direction of the line segment Sj.
In this step, it is necessary to define: the periphery of the line segment Sj is defined to include the line segment Sj, to be connected with the line segment Sj, and to be adjacent to the line segment Sj.
Generally, the corresponding length of the edges or line segments surrounding the synthesized mask pattern is relatively long, and in the actual optimization process, the line segments need to be segmented before the optimization can be performed. Therefore, as a variation, the method for optimizing a mask further comprises the steps of: s10, dividing the line segment of the mask pattern which exceeds the preset length into at least two line segments;
the length of the segmented line segment is set according to a preset length range; the step S10 is between the step S1 and the step S2. In this step, all line segments do not need to be segmented, and the segmentation is performed only when the length of the line segment exceeds a preset length.
Referring to fig. 6, in order to better show how the feature value is calculated, an example is given to describe the calculation of the feature value of each line segment for better clarity. Fig. 6 includes 3 mask patterns X, each of which is a square, and a dividing point is placed in the middle of each square to divide the square to obtain a line segment with a shorter length. The shape of which is merely an example. For example, one of the mask patterns X S1 is selected as a line segment whose feature value needs to be calculated, and the surrounding line segments include the other 7 line segments of the mask pattern where the line segment S1 is located, which correspond to reference numerals S2 to S8 in the drawings; and also 16 line segments of the mask pattern adjacent to the mask pattern, corresponding to reference numerals S9-S24 in the drawing. Wherein the mask pattern adjacent to the mask pattern may be a mask pattern within a set vertical distance range. For example, in fig. 6, two mask patterns are adjacent to the line segment S1, and there are 24 line segments around the line segment S1, so that the eigenvalue a is summed with functions of the position, length, and direction associated with the 24 line segments. The periphery of the line segment S1 is defined to include the line segment S1.
Due to the optical properties, the same imaging results can be obtained for the same mask pattern area. For a circuit, the same function tends to appear as the same pattern in the layout. In the same layout, particularly the layout of a storage type chip, a plurality of graphs which appear repeatedly exist, if only one representative is selected to perform OPC optimization on the graph area which appears repeatedly, and the result is applied to the full layout, the number of area blocks for performing OPC optimization during initial calculation is reduced, so that the time of overall OPC optimization is reduced, and the calculation amount is reduced.
Based on this, in step S3, feature values in all the region blocks are counted, the region blocks are classified based on the feature values, the region blocks requiring optimization execution are selected as execution blocks based on the classification result, and feature values of line segments of the mask pattern are differentiated between all the execution blocks. That is, in this step, the region blocks with the same characteristic value are selected, only one region block with the same characteristic value is selected for OPC optimization, and after a preliminary result is obtained, the optimization result is applied to the full mask layout, so that the calculation amount can be reduced well, and the optimization rate can be increased.
Referring to fig. 7, the step S3 specifically includes the following steps:
s31, classifying the area blocks with the same characteristic values of all the line segments into a category;
s32, selecting one area block among the area blocks of each category to obtain the execution block.
In step S31, for example, the characteristic value of one of the area blocks is: 1, 1, 1, 3; the characteristic values of the other region block are: 1, 1, 1, 3; the two area blocks are considered to be the same area block and should be classified as one category. If the characteristic value of the other area block is: 1, 1, 1, 4, then the two regions are not considered to be the same region block and should not be classified as a category.
Referring to fig. 8, the step S3 further includes the following steps:
and S33, counting the types of the characteristic values of all the line segments of the execution blocks to obtain an arrangement sequence of the types from large to small, and sequentially selecting the execution blocks for optimization according to the sequence from large to small until the union of the characteristic values of all the line segments included in all the execution blocks is equal to the union of the characteristic values of all the line segments included in all the area blocks.
In this step, the characteristic values of different execution blocks are different, for example, the characteristic values of two area blocks are as follows: 1, 1, 1, 4 and 1, 1, 4, 5, the number of species is 2 and 3, respectively.
In step S4, the execution block is optimized, the optimization result corresponding to the line segment of the mask pattern corresponding to each feature value is recorded, and the mask layout is globally optimized based on the optimization result.
In this step, the optimization of the execution blocks may specifically be based on the arrangement order, and the execution blocks are sequentially selected from a large order to a small order for optimization until a union of feature values of all line segments included in all execution blocks is equal to a union of feature values of all line segments included in all region blocks. When the types of the characteristic values in a certain execution block are more, the execution block is complex in environment and plays an important role in optimizing the whole mask layout, so that the execution block with more types of the characteristic values is optimized, the optimization speed can be well improved, optimization omission of a certain characteristic value can be avoided, and the optimization accuracy is improved.
In step S4, an optimization rule is established based on the feature values corresponding to the line segments in the execution block and the corresponding optimization results, and the mask layout is globally optimized based on the optimization rule. After the optimization rule is established, the rule can be stored, and when the same layout is related in the future, the layout can be optimized according to the stored rule.
Referring to fig. 9, a mask optimization system 200 for performing the mask optimization method according to the first embodiment of the present invention includes the following modules:
the dividing module 201: the device comprises a mask layout, a control unit and a processing unit, wherein the mask layout is used for inputting a mask layout comprising at least one mask pattern, and dividing the mask layout into a plurality of region blocks, at least part of the region blocks comprise at least one mask pattern, and the mask pattern is a polygon and comprises a plurality of enclosed line segments;
the eigenvalue calculation module 202: the mask graph calculation device is used for calculating all line segments of each mask graph in the area block and line segments around the line segments, and obtaining and recording a characteristic value corresponding to each line segment of each mask graph;
the screening module 203: the characteristic values of all line segments in all the area blocks are counted, the area blocks are classified based on the characteristic values, the area blocks needing to be optimized are selected to be defined as execution blocks based on the classification result, and the characteristic values of the line segments of the mask graph among all the execution blocks are different;
the optimization module 204: and the optimization module is used for optimizing the execution block, recording an optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, and performing global optimization on the mask layout based on the optimization result.
Referring to fig. 10, a third embodiment of the invention provides an electronic device 300, which includes one or more processors 301;
a storage device 302 for storing one or more programs,
when executed by the one or more processors 301, cause the one or more processors 301 to implement the mask optimization method as provided by the first embodiment.
Referring now to FIG. 11, a block diagram of a computer system 800 suitable for use with a terminal device/server implementing an embodiment of the present invention is shown. The terminal device/server shown in fig. 11 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present application.
As shown in fig. 11, the computer system 800 includes a Central Processing Unit (CPU)801 that can perform various appropriate actions and processes in accordance with a program stored in a Read Only Memory (ROM)802 or a program loaded from a storage section 808 into a Random Access Memory (RAM) 803. In the RAM 803, various programs and data necessary for the operation of the system 800 are also stored. The CPU 801, ROM 802, and RAM 803 are connected to each other via a bus 804. An input/output (I/O) interface 805 is also connected to bus 804.
The following components are connected to the I/O interface 805: an input portion 806 including a keyboard, a mouse, and the like; an output section 807 including a signal such as a Cathode Ray Tube (CRT), a Liquid Crystal Display (LCD), and the like, and a speaker; a storage portion 808 including a hard disk and the like; and a communication section 809 including a network interface card such as a LAN card, a modem, or the like. The communication section 809 performs communication processing via a network such as the internet. A drive 810 is also connected to the I/O interface 805 as needed. A removable medium 811 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, or the like is mounted on the drive 810 as necessary, so that a computer program read out therefrom is mounted on the storage section 808 as necessary.
According to an embodiment of the present disclosure, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising program code for performing the method illustrated in the flow chart. In such an embodiment, the computer program can be downloaded and installed from a network through the communication section 809 and/or installed from the removable medium 811. The computer program performs the above-described functions defined in the method of the present invention when executed by the Central Processing Unit (CPU) 801. It should be noted that the computer readable medium of the present invention can be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units described in the embodiments of the present invention may be implemented by software or hardware. As another aspect, the present invention also provides a computer-readable medium, which may be contained in the apparatus described in the above embodiments; or may be present separately and not assembled into the device.
The computer readable medium carries one or more programs, and when the one or more programs are executed by the apparatus, the apparatus performs step S1, providing a mask layout including at least two mask patterns, and dividing the mask layout into a plurality of region blocks, at least some of the region blocks including at least two mask patterns, where the mask patterns are in a multi-line segment shape and include a plurality of enclosed line segments; s2, calculating all line segments of each mask pattern in the area block and line segments around the line segments respectively to obtain and record a characteristic value corresponding to each line segment of each mask pattern; s3, counting characteristic values in all the area blocks, classifying the area blocks based on the characteristic values, selecting the area blocks needing to be optimized to be execution blocks based on the classification result, and distinguishing the characteristic values of line segments of the mask graph among all the execution blocks; and S4, optimizing the execution block, recording the optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, and performing global optimization on the mask layout based on the optimization result.
Compared with the prior art, the mask optimization method and the electronic equipment provided by the invention have the following beneficial effects:
a mask optimization method, comprising the steps of: s1, providing a mask layout comprising at least two mask patterns, and dividing the mask layout into a plurality of region blocks, wherein at least part of the region blocks comprise at least two mask patterns, and the mask patterns are in a multi-line segment shape; s2, calculating all line segments of each mask pattern in the area block and line segments around the line segments respectively to obtain and record a characteristic value corresponding to each line segment of each mask pattern; s3, counting characteristic values in all the area blocks, classifying the area blocks based on the characteristic values, selecting the area blocks needing to be optimized to be execution blocks based on the classification result, and distinguishing the characteristic values of line segments of the mask graph among all the execution blocks; and S4, optimizing the execution block, recording the optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, globally optimizing the mask layout based on the optimization result, selecting the region block with the different characteristic values as the execution block according to the calculated characteristic values of the line segments of the mask graph when the optimization is executed for the first time, optimizing the mask graph in the execution block first without simultaneously optimizing all the region blocks, reducing the calculation amount well, improving the optimization speed, and after the primary optimization is completed, applying the obtained optimization result to other region blocks which are not optimized according to the same characteristic values in the same optimization mode, so as to perform global optimization on the mask layout, thereby reducing the calculation amount well and improving the optimization efficiency.
In step S4, the types of feature values of all line segments of the execution block are counted to obtain an arrangement order of the types from large to small, and the execution blocks are sequentially selected from large to small to be optimized until the union of the feature values of all line segments included in all the execution blocks is equal to the union of the feature values of all line segments included in all the region blocks, and the greater the types of feature values are, the more complicated the environment in which the mask pattern in the execution block is located is represented.
In step S4, an optimization rule is established based on the feature values corresponding to the line segments in the execution block and the corresponding optimization results, the mask layout is globally optimized based on the optimization rule, and after the optimization rule is established, the optimization of the mask patterns in other region blocks has a rule that is searchable, thereby avoiding errors in the optimization process, improving the accuracy of the optimization, and simultaneously protecting the optimization rule.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents and improvements made within the spirit of the present invention are intended to be included within the scope of the present invention.
Claims (10)
1. A mask optimization method, comprising the steps of:
s1, providing a mask layout including at least one mask pattern, and dividing the mask layout into a plurality of region blocks, wherein at least part of the region blocks include at least one mask pattern, and the mask pattern is a polygon and includes a plurality of enclosed line segments;
s2, calculating all line segments of each mask pattern in the area block and line segments around the line segments respectively to obtain and record a characteristic value corresponding to each line segment of each mask pattern;
s3, counting the characteristic values of all line segments in all the area blocks, classifying the area blocks based on the characteristic values, selecting the area blocks needing to be optimized to be execution blocks based on the classification result, and distinguishing the characteristic values of the line segments of the mask graph among all the execution blocks; and
and S4, optimizing the execution block, recording an optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, and performing global optimization on the mask layout based on the optimization result.
2. The mask optimization method of claim 1, wherein: the mask optimization method further comprises the following steps: s10, dividing the line segment of the mask pattern which exceeds the preset length into at least two line segments;
the length of the segmented line segment is set according to a preset length range; the step S10 is between the step S1 and the step S2.
3. The mask optimization method of claim 1, wherein: the step S3 specifically includes the following steps:
s31, classifying the area blocks with the same characteristic values of all the line segments into a category;
s32, selecting one area block among the area blocks of each category to obtain the execution block; and
and S33, counting the types of the characteristic values of all the line segments of the execution blocks to obtain an arrangement sequence of the types from large to small, and sequentially selecting the execution blocks for optimization according to the sequence from large to small until the union of the characteristic values of all the line segments included in all the execution blocks is equal to the union of the characteristic values of all the line segments included in all the area blocks.
4. The mask optimization method of claim 1, wherein: in step S4, an optimization rule is established based on the feature values corresponding to the line segments in the execution block and the corresponding optimization results, and the mask layout is globally optimized based on the optimization rule.
5. The mask optimization method of claim 1, wherein: in the above step S1, the area block is a square with a preset side length range.
6. The mask optimization method of claim 5, wherein: the preset side length range is as follows: 10-100 μm.
7. The mask optimization method of claim 1, wherein: in the above step S2, the feature value is a function of at least the position, length, and direction of all the line segments around.
8. The mask optimization method of claim 7, wherein: defining a line segment needing to calculate a characteristic value as Sj, wherein the characteristic value is corresponding to a, Si is a line segment around the line segment Sj, and then a is calculated by the following hash function:
si (x, y) is the relative coordinate of the line segment Si around the line segment Sj with the midpoint of the line segment Sj as the origin, Sil is the length of the line segment Si, and SiD is the relative value of the line segment Si with respect to the direction of the line segment Sj.
9. A mask optimization system, characterized by: comprises that
A dividing module: the device comprises a mask layout, a control unit and a processing unit, wherein the mask layout is used for inputting a mask layout comprising at least one mask pattern, and dividing the mask layout into a plurality of region blocks, at least part of the region blocks comprise at least one mask pattern, and the mask pattern is a polygon and comprises a plurality of enclosed line segments;
a characteristic value calculation module: the mask graph calculation device is used for calculating all line segments of each mask graph in the area block and line segments around the line segments, and obtaining and recording a characteristic value corresponding to each line segment of each mask graph;
a screening module: the characteristic values of all line segments in all the area blocks are counted, the area blocks are classified based on the characteristic values, the area blocks needing to be optimized are selected to be defined as execution blocks based on the classification result, and the characteristic values of the line segments of the mask graph among all the execution blocks are different;
an optimization module: and the optimization module is used for optimizing the execution block, recording an optimization result corresponding to the line segment of the mask graph corresponding to each characteristic value, and performing global optimization on the mask layout based on the optimization result.
10. An electronic device, characterized in that: comprising one or more processors;
storage means for storing one or more programs which, when executed by the one or more processors, cause the one or more processors to carry out a mask optimization method according to any one of claims 1 to 8.
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| CN202011314970.0A CN112506003A (en) | 2020-11-20 | 2020-11-20 | Mask optimization method, mask optimization system and electronic equipment |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113378507A (en) * | 2021-06-01 | 2021-09-10 | 中科晶源微电子技术（北京）有限公司 | Mask data cutting method and device, equipment and storage medium |
| WO2023137952A1 (en) * | 2022-01-19 | 2023-07-27 | 深圳晶源信息技术有限公司 | Layout splitting method and apparatus suitable for double lithography technology, and electronic device |
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2020
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113378507A (en) * | 2021-06-01 | 2021-09-10 | 中科晶源微电子技术（北京）有限公司 | Mask data cutting method and device, equipment and storage medium |
| CN113378507B (en) * | 2021-06-01 | 2023-12-05 | 中科晶源微电子技术（北京）有限公司 | Mask data cutting method and device, equipment and storage medium |
| WO2023137952A1 (en) * | 2022-01-19 | 2023-07-27 | 深圳晶源信息技术有限公司 | Layout splitting method and apparatus suitable for double lithography technology, and electronic device |
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