CN112463230B - Program running method and device, electronic equipment and storage medium - Google Patents

Program running method and device, electronic equipment and storage medium Download PDF

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Publication number
CN112463230B
CN112463230B CN202011326245.5A CN202011326245A CN112463230B CN 112463230 B CN112463230 B CN 112463230B CN 202011326245 A CN202011326245 A CN 202011326245A CN 112463230 B CN112463230 B CN 112463230B
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program
address
scattered
data
memory
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CN112463230A (en
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王敏
请求不公布姓名
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Zhejiang Geoforcechip Technology Co Ltd
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Zhejiang Geoforcechip Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4403—Processor initialisation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The application provides a program running method and device, electronic equipment and storage medium, wherein the method comprises the following steps: loading a scattered program table stored in the read-only memory to a designated address of the random access memory; determining the scattered program addresses corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs, and jumping to the scattered program addresses; copying the data of the target address in the flash memory to the designated address of the random access memory. The above scheme loads the scattered program table stored in ROM to the appointed address of RAM, and copies the data of target address in FALSH to the appointed address of RAM, so the data of the appointed address of RAM is changed, namely the code in ROM address is changed, thus the problems of program error and high version-changing cost caused by program unable to be modified in ROM can be solved.

Description

Program running method and device, electronic equipment and storage medium
Technical Field
The present application relates to the field of chip technologies, and in particular, to a program running method and apparatus, an electronic device, and a computer readable storage medium.
Background
ROM (Read-Only Memory) is a short for Read-Only Memory, which is a solid-state semiconductor Memory that can Only Read data stored in advance. ROM is mainly composed of address decoder, memory bank, readout line and readout amplifier, etc. its stored data is stable, and the stored data will not change after power-off, and its structure is simple, and its use is convenient, so that it is commonly used for storing various fixed programs and data.
Typically, ROM is used to store all programs related to the underlying layer (e.g., power-up initialization), which are not visible to the user application. When the program is streamed, the program code is loaded to the ROM in a mask mode, so that the program in the ROM cannot be modified, and if errors occur in the mask process, huge loss can be caused because the program in the ROM runs in error; if the BUG (error in the computer program) in the program is found to be updated, the updating is needed in a mode of changing the edition, and the cost is low.
Disclosure of Invention
The embodiment of the application provides a program running method for solving the problem caused by the fact that programs in ROM cannot be modified
The embodiment of the application provides a program running method, which comprises the following steps:
loading a scattered program table stored in the read-only memory to a designated address of the random access memory;
determining the scattered program addresses corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs, and jumping to the scattered program addresses;
copying the data of the target address in the flash memory to the designated address of the random access memory.
In one embodiment, before the loading the hash table stored in the read-only memory to the specified address of the random access memory, the method further comprises:
after receiving the power-on signal, an initialized pre-program is executed.
In an embodiment, the determining, according to the scattered program addresses corresponding to different processing programs, the scattered program address corresponding to the data modification program, and jumping to the scattered program address, includes:
searching a scattered program address corresponding to the data modification program stored in the flash memory by using a table look-up instruction;
loading the scattered program address into a pointer and resetting an accumulator;
and directly turning to the data modification program corresponding to the scattered program address by using the jump instruction.
In an embodiment, the determining, according to the scattered program addresses corresponding to different processing programs, the scattered program address corresponding to the data modification program includes:
loading a starting address of the flash memory;
loading the starting address of the scattered program to a pointer;
obtaining an address offset corresponding to a data modification program stored in the flash memory through table lookup;
and loading the address offset into the pointer to obtain the scattered program address formed by adding the address offset to the scattered program starting address.
In an embodiment, after the copying the data of the target address in the flash memory to the specified address of the random access memory, the method further comprises:
and when receiving a call instruction of the designated address in the random access memory, executing the data copied into the random access memory.
The embodiment of the application also provides a program running device, which comprises:
the program loading module is used for loading the scattered program table stored in the read-only memory to the appointed address of the random access memory;
the program jump module is used for determining the scattered program address corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs and jumping to the scattered program address;
and the data modification module is used for copying the data of the target address in the flash memory to the designated address of the random access memory.
In an embodiment, the device further comprises:
and the initialization module is used for executing an initialized pre-program after receiving the power-on signal.
In one embodiment, the program jump module includes:
the searching unit is used for searching the scattered program address corresponding to the data modification program stored in the flash memory by using the table searching instruction;
the zero clearing unit is used for loading the scattered program address into the pointer and zero clearing the accumulator;
and the jump unit is used for directly turning to the data modification program corresponding to the scattered program address by utilizing the jump instruction.
The embodiment of the application also provides electronic equipment, which comprises:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to perform the program running method described above.
The embodiment of the application also provides a computer readable storage medium storing a computer program executable by a processor to perform the above program running method.
According to the technical scheme provided by the embodiment of the application, the scattered program table stored in the ROM is loaded to the appointed address of the RAM, so that when the execution call instruction accesses the appointed address of the RAM, the scattered program table is equivalent to the code of the CPU unit in the corresponding address of the execution ROM, and the data of the target address in the FALSH is copied to the appointed address of the RAM, so that the data of the appointed address of the RAM is changed, namely the code in the ROM address is equivalent to the data of the RAM, and the problems of program error and high version changing cost caused by the incapability of modifying programs in the ROM can be solved.
Drawings
In order to more clearly illustrate the technical solution of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below.
FIG. 1 is a schematic diagram of a chip according to an embodiment of the present application;
FIG. 2 is a schematic diagram of partitioning a memory unit according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
FIG. 4 is a flowchart of a program running method according to an embodiment of the present application;
FIG. 5 is a detailed flowchart of step S420 in the corresponding embodiment of FIG. 4;
FIG. 6 is a block diagram of a program execution device according to an embodiment of the present application;
FIG. 7 is a block diagram of a program jump module in the corresponding embodiment of FIG. 6.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the accompanying drawings in the embodiments of the present application.
Like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
Fig. 1 is a schematic structural diagram of a chip according to an embodiment of the present application. As shown in fig. 1, the chip 10 mainly includes the following basic units: a CPU (Central Processing Unit ) unit 11, a storage unit 12, a high-speed hardware algorithm unit 13, an io interface 14, and the like. CPU 11 is a general-purpose MCU core, such as MSP430, CORTEX-M0, etc., for internal control and operation of chip 10. The storage unit 12 includes a data storage unit 121 (RAM) and a program storage unit 122 (including ROM, FLASH).
RAM (random access memory ) runs memory, and CPU unit 11 can be directly accessed, and read and write speeds are very fast, but cannot be stored with power down. Mainly for storing temporary data such as input data of the high-speed hardware algorithm unit 13 or data generated during the running of the program of the chip 10. ROM (read only memory) can be used for storing BOOT (BOOT up) programs, and can be used for power down storage, read only memory and write only memory.
FLASH memory (FLASH memory) may be stored powered down, readable and writable for storing software data within the chip 10. The high-speed hardware algorithm unit 13 is used for implementing hardware of complex security authentication algorithm, such as encryption and decryption modules of AEA, AES, DES, etc. The chip 10 may communicate with a host computer through an IO interface 14.
In one embodiment, the CPU unit 11 may execute the method provided in the embodiment of the present application, and load the hash table stored in the rom into the specified address of the ram; determining the scattered program addresses corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs, and jumping to the scattered program addresses; copying the data of the target address in the flash memory to the designated address of the random access memory.
Because the scattered program table stored in the ROM is loaded to the appointed address of the RAM, when the execution call instruction accesses the appointed address of the RAM, the scattered program table is equivalent to the code of the CPU unit in the corresponding address of the execution ROM, and because the data of the target address in the FALSH is copied to the appointed address of the RAM, the data of the appointed address of the RAM is changed, namely the code in the ROM address is equivalent to the change, the problems of program errors and high reprinting cost caused by the fact that programs in the ROM cannot be modified can be solved.
Fig. 2 is a schematic diagram of the partitioning of the memory unit 12. Wherein the ROM and Flash together form a program storage area. The flash area stores data and a very small number of programs therein, and the ROM area stores a core program, the two areas being addressed separately. The addresses start addressing from 0000 and the addresses of the ROM area may be 0000-8000.
Fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application. The electronic device 100 may be used to execute the program running method provided by the embodiment of the present application. As shown in fig. 3, the electronic device 100 includes: one or more processors 102, one or more memories 104 storing processor-executable instructions. Wherein the processor is configured to execute the program running method provided in the following embodiments of the present application.
The processor 102 may be a gateway, an intelligent terminal, or a device comprising a Central Processing Unit (CPU), an image processing unit (GPU), or other form of processing unit having data processing capabilities and/or instruction execution capabilities, may process data from other components in the electronic device 100, and may control other components in the electronic device 100 to perform desired functions.
The memory 104 may include one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. The volatile memory may include, for example, random Access Memory (RAM) and/or cache memory (cache), and the like. The non-volatile memory may include, for example, read Only Memory (ROM), hard disk, flash memory, and the like. One or more computer program instructions may be stored on the computer readable storage medium that can be executed by the processor 102 to implement the program execution method described below. Various applications and various data, such as various data used and/or generated by the applications, may also be stored in the computer readable storage medium.
In one embodiment, the electronic device 100 shown in FIG. 3 may further include an input device 106, an output device 108, and a data acquisition device 110, which are interconnected by a bus system 112 and/or other forms of connection mechanisms (not shown). It should be noted that the components and structures of the electronic device 100 shown in fig. 3 are exemplary only and not limiting, as the electronic device may have other components and structures as desired.
The input device 106 may be a device used by a user to input instructions and may include one or more of a keyboard, mouse, microphone, touch screen, and the like. The output device 108 may output various information (e.g., images or sounds) to the outside (e.g., a user), and may include one or more of a display, a speaker, and the like. The data acquisition device 110 may acquire images of the subject and store the acquired images in the memory 104 for use by other components. The data acquisition device 110 may be a camera, for example.
In an embodiment, the various devices in the exemplary electronic apparatus for implementing the program running method of the embodiment of the present application may be integrated, or may be distributed, such as integrating the processor 102, the memory 104, the input device 106 and the output device 108, and separately setting the data acquisition device 110.
In an embodiment, an example electronic device for implementing the program running method of the embodiment of the present application may be implemented as a smart terminal such as a smart phone, a tablet computer, a smart watch, a vehicle-mounted device, or the like.
The embodiment of the present application also provides a computer-readable storage medium storing a computer program executable by a processor to perform a program running method described below.
Fig. 4 is a flowchart of a program running method according to an embodiment of the present application. As shown in fig. 4, the method comprises the steps of: S410-S430.
Step S410: the hash table stored in the read-only memory is loaded to a specified address of the random access memory.
Table 1 is an exemplary scatter program table. For example, a scatter program table may be loaded to RAM address 0XC00D 1 ～0XC00D x . The original address of the scattered program table is ROM address 0X00Y 1 ～0X00Y x . Thus, when executing CALL instruction CALL CXXX to access RAM, the CPU will execute code in the corresponding ROM address (02 XX). That is, modifying the code of the RAM corresponds to modifying the code of the ROM.
As shown in the following Table, execute C00D 1 Code that jumps to address 1 and executes C00D 2 The code jumps to address 2. The change of the execution code may change the address of the jump, thereby changing the program being executed. How the code of the RAM address is changed is described in detail below.
Table 1 is an exemplary scatter gather table
Step S420: determining the scattered program addresses corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs, and jumping to the scattered program addresses;
the jump program address is the jump program address. As shown in table 2 below, the processing program may be a data copy function between ROM and RAM, a data copy function between RAM and Flash, or a function of a configuration register.
Table 2 is an example of a handler corresponding to a scattered program address
As can be seen from table 2, when the address of the forwarding program is addr2, the corresponding processing program may have the function of copying the data of the flash target address to the designated address of the RAM. To distinguish, a process program embodying this function may be referred to as a data modification program, with the corresponding scattered program address addr2. And jumping to addr2 to execute the data modification program.
In one embodiment, a scattered program using a diverted address table may be designed in the ROM program, and during scattered diversion, a table lookup instruction is used to find the scattered address corresponding to the data modification program stored in the flash memory, i.e. the corresponding diverted address is found by table lookup; loading the scattered program address into a pointer and resetting an accumulator A; and then directly turning to a data modification program corresponding to the scattered program address by using a jump instruction JMP@A+DPTR. Thereafter, the program can be modified by executing the data.
Step S430: copying the data of the target address in the flash memory to the designated address of the random access memory.
The step S430 is a function of the data modification program. And jumping to addr2, and copying the data of the Flash target address to the appointed address of the RAM by the executed data modification program.
In one embodiment, the data of the Flash destination address is copied to RAM, and the RAM address may be 0XC00D 1 ～0XC00D x Any of the ranges. In this way, when the next CALL instruction CALL CXXX accesses RAM, the code executed by the CPU is changed, and different functions can be executed.
Taking Table 1 as an example, assume ROM address 0X00Y 1 Code 02 00EE, execute CALL C00D 1 The specific operation is as follows: PC jumps to address l_00EE (i.e., address 1), l_00EE may be a program address header containing some function; after the above steps, the data of RAM address 0XC00D1 can be changed to 0XN 1 M 1 Address 0XC00D 2 The data of (2) may become 0XP 1 Q 1 The execution of CALL C00D1 specifically operates as: PC jump address L_N 1 M 1 P 1 Q 1 (i.e., address 1 changes), L_N 1 M 1 P 1 Q 1 The address may be a program of another function and may be pre-reserved by the developer. Therefore, a developer can easily change the function of the ROM program by rewriting the data of the FLASH without re-customizing the mask, so that the cost is saved, and the flexibility is high.
In an embodiment, after the step S430, the method provided in the embodiment of the present application further includes: and when receiving a call instruction of the designated address in the random access memory, executing the data copied into the random access memory.
For example, assume that step S410 loads a hash table into RAM address 0XC00D 1 ～0XC00D x Then the specified address may be 0XC00D 1 ～0XC00D x . When receiving access 0XC00D 1 ～0XC00D x When the calling instruction of any address is executed, the code corresponding to the address is executed. The code corresponding to the address may be data copied by Flash into RAM. Therefore, the data in the RAM can be changed by changing the data in the Flash, and the function of changing the ROM program is further realized.
In an embodiment, before the step S310, the method provided in the embodiment of the present application further includes: after receiving the power-on signal, an initialized pre-program is executed.
After the chip in the device is powered on, the pre-program in the ROM is executed first, and the pre-program has the function of initialization.
In one embodiment, as shown in fig. 5, the step S420 specifically includes the following steps S421 to S424:
step S421: the starting address of the flash memory is loaded.
Step S422: the scattered procedure start address is loaded to a pointer.
Step S423: and obtaining the address offset corresponding to the data modification program stored in the flash memory through table lookup.
Step S424: and loading the address offset into the pointer to obtain the scattered program address formed by adding the address offset to the scattered program starting address.
The Flash is stored with a steering address table, and different offsets correspond to different handler functions. For example, offset B corresponds to a data modification procedure. And loading a start address of the scattered program to a pointer (DPTR), and reading an address offset B in Flash to obtain the scattered program address @ DPTR+B. So that the data modification procedure can then be performed by jumping to the scattered procedure address @ DPTR + B. The data modification program can specify the target address of the flash and the formulated address of the RAM, and copy the data of the flash target address to the specified address of the RAM.
The following are embodiments of the apparatus of the present application, which may be used to perform the above-described program execution method embodiments of the present application. For details not disclosed in the apparatus embodiments of the present application, please refer to the program running method embodiments of the present application.
FIG. 6 is a block diagram of a program execution device according to an embodiment of the present application, as shown in FIG. 6, the device includes: program loading module 610, program jumping module 620, and data modification module 630.
Program loading module 610 is configured to load the scattered program table stored in the rom into the specified address of the ram.
Program jump module 620, configured to determine a scattered program address corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs, and jump to the scattered program address.
The data modifying module 630 is configured to copy the data of the target address in the flash memory to the specified address of the random access memory.
In an embodiment, the apparatus further includes: and the initialization module is used for executing an initialized pre-program after receiving the power-on signal.
In one embodiment, as shown in fig. 7, the program jump module 620 specifically includes: a search unit 621, a clear unit 622, and a skip unit 623.
A searching unit 621, configured to search the scattered program address corresponding to the data modification program stored in the flash memory using a table look-up instruction;
a clearing unit 622, configured to load the scattered program address into a pointer, and clear the accumulator;
a jump unit 623 for directly steering the data modification program corresponding to the scattered program address by using a jump instruction.
The implementation process of the functions and roles of each module in the above device is specifically shown in the implementation process of the corresponding steps in the above program running method, and will not be described herein again.
In the several embodiments provided in the present application, the disclosed apparatus and method may be implemented in other manners. The apparatus embodiments described above are merely illustrative, for example, of the flowcharts and block diagrams in the figures that illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, functional modules in the embodiments of the present application may be integrated together to form a single part, or each module may exist alone, or two or more modules may be integrated to form a single part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored on a computer readable storage medium. Based on this understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method of the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.

Claims (9)

1. A program running method, characterized by comprising:
loading a scattered program table stored in a read-only memory to a designated address of a random access memory, wherein the scattered program table comprises a jump address;
determining the scattered program addresses corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs, and jumping to the scattered program addresses corresponding to the data modification program, wherein the scattered program addresses are the jump addresses;
the data modification program copies the code of the target address in the flash memory to the appointed address of the random access memory;
wherein, the determining the scattered program address corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs comprises:
loading a starting address of the flash memory;
loading a scattered program starting address to a pointer;
obtaining an address offset corresponding to a data modification program stored in the flash memory through table lookup;
and loading the address offset into the pointer to obtain the scattered program address formed by adding the address offset to the scattered program starting address.
2. The method of claim 1, wherein prior to loading the hash table stored in read-only memory into the specified address of random access memory, the method further comprises:
after receiving the power-on signal, an initialized pre-program is executed.
3. The method of claim 1, wherein determining the hash program address corresponding to the data modification program according to the hash program address corresponding to the different processing program, and jumping to the hash program address, comprises:
searching a scattered program address corresponding to the data modification program stored in the flash memory by using a table look-up instruction;
loading the scattered program address into a pointer and resetting an accumulator;
and directly turning to the data modification program corresponding to the scattered program address by using the jump instruction.
4. The method of claim 1, wherein after copying the data of the target address in the flash memory to the specified address of the random access memory, the method further comprises:
and when receiving a call instruction of the designated address in the random access memory, executing the data copied into the random access memory.
5. A program running apparatus, comprising:
the program loading module is used for loading the scattered program table stored in the read-only memory to the appointed address of the random access memory;
the program jump module is used for determining the scattered program address corresponding to the data modification program according to the scattered program addresses corresponding to different processing programs and jumping to the scattered program address;
and the data modification module is used for copying the data of the target address in the flash memory to the designated address of the random access memory.
6. The apparatus of claim 5, wherein the apparatus further comprises:
and the initialization module is used for executing an initialized pre-program after receiving the power-on signal.
7. The apparatus of claim 5, wherein the program jump module comprises:
the searching unit is used for searching the scattered program address corresponding to the data modification program stored in the flash memory by using the table searching instruction;
the zero clearing unit is used for loading the scattered program address into the pointer and zero clearing the accumulator;
and the jump unit is used for directly turning to the data modification program corresponding to the scattered program address by utilizing the jump instruction.
8. An electronic device, the electronic device comprising:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to perform the program running method of any one of claims 1-4.
9. A computer readable storage medium, characterized in that the storage medium stores a computer program executable by a processor to perform the program running method of any one of claims 1-4.
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