CN112463230A - Program operation method and device, electronic equipment and storage medium - Google Patents

Program operation method and device, electronic equipment and storage medium Download PDF

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Publication number
CN112463230A
CN112463230A CN202011326245.5A CN202011326245A CN112463230A CN 112463230 A CN112463230 A CN 112463230A CN 202011326245 A CN202011326245 A CN 202011326245A CN 112463230 A CN112463230 A CN 112463230A
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program
address
scatter
data
memory
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CN112463230B (en
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王敏
其他发明人请求不公开姓名
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Zhejiang Geoforcechip Technology Co Ltd
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Zhejiang Geoforcechip Technology Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
    • G06F12/023—Free address space management
    • G06F12/0238—Memory management in non-volatile memory, e.g. resistive RAM or ferroelectric memory
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4403—Processor initialisation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

The application provides a program running method and device, electronic equipment and a storage medium, wherein the method comprises the following steps: loading a scatter program table stored in a read-only memory to a designated address of a random access memory; determining a scatter-transfer program address corresponding to a data modification program according to scatter-transfer program addresses corresponding to different processing programs, and jumping to the scatter-transfer program address; and copying the data of the target address in the flash memory to the designated address of the random access memory. The scheme loads the scatter program table stored in the ROM to the designated address of the RAM, and copies the data of the target address in the FALSH to the designated address of the RAM, so that the data of the designated address of the RAM is changed, namely the code in the ROM address is changed, and the problems of program error and high version change cost caused by incapability of modifying the program in the ROM can be solved.

Description

Program operation method and device, electronic equipment and storage medium
Technical Field
The present application relates to the field of chip technologies, and in particular, to a program running method and apparatus, an electronic device, and a computer-readable storage medium.
Background
A ROM (Read-Only Memory) is a short for Read-Only Memory, and is a solid-state semiconductor Memory capable of reading Only data stored in advance. The ROM is mainly composed of an address decoder, a memory bank, a read-out line, a read-out amplifier and the like, stored data is stable, the stored data can not be changed after power failure, the structure is simple, the use is convenient, and therefore the ROM is commonly used for storing various fixed programs and data.
Typically, the ROM is used to store all programs associated with the underlying layers (e.g., power-up initialization), which are not visible to the user applications. When the tape-out is carried out, the program code is loaded to the ROM in a mask mode, so that the program in the ROM cannot be modified, and huge loss can be brought in case of errors in the mask process and errors in the operation of the program in the ROM; if a BUG (error in a computer program) in the program is found to need to be upgraded, the BUG needs to be carried out in a mode of revising, and the cost is high.
Disclosure of Invention
The embodiment of the application provides a program running method for solving the problem caused by incapability of modifying programs in a Read Only Memory (ROM)
The embodiment of the application provides a program running method, which comprises the following steps:
loading a scatter program table stored in a read-only memory to a designated address of a random access memory;
determining a scatter-transfer program address corresponding to a data modification program according to scatter-transfer program addresses corresponding to different processing programs, and jumping to the scatter-transfer program address;
and copying the data of the target address in the flash memory to the designated address of the random access memory.
In one embodiment, before the loading the scatterer table stored in the read-only memory to the designated address of the random access memory, the method further comprises:
after receiving the power-on signal, the initialized pre-program is executed.
In an embodiment, the determining, according to the scatter program addresses corresponding to different processing programs, a scatter program address corresponding to a data modification program, and jumping to the scatter program address includes:
using a table lookup instruction to search a scatter program address corresponding to a data modification program stored in the flash memory;
loading the scattered program address into a pointer and resetting an accumulator;
and directly turning to a data modification program corresponding to the scatter program address by using a jump instruction.
In an embodiment, the determining the scatter program address corresponding to the data modification program according to the scatter program addresses corresponding to different processing programs includes:
loading a starting address of the flash memory;
loading the starting address of the scatter-transfer program to a pointer;
acquiring an address offset corresponding to a data modification program stored in the flash memory through table lookup;
and loading the address offset into the pointer to obtain a scatter program address formed by the start address of the scatter program and the address offset.
In one embodiment, after copying the data of the target address in the flash memory to the designated address of the random access memory, the method further comprises:
executing the data copied into the random access memory when a call instruction of the specified address in the random access memory is received.
An embodiment of the present application further provides a program running apparatus, including:
the program loading module is used for loading the scatter program table stored in the read-only memory to the designated address of the random access memory;
the program skipping module is used for determining a scatter-transfer program address corresponding to a data modification program according to scatter-transfer program addresses corresponding to different processing programs and skipping to the scatter-transfer program address;
and the data modification module is used for copying the data of the target address in the flash memory to the designated address of the random access memory.
In one embodiment, the apparatus further comprises:
and the initialization module is used for executing the initialized pre-program after receiving the power-on signal.
In one embodiment, the program jump module comprises:
the searching unit is used for searching a scatter program address corresponding to the data modification program stored in the flash memory by using a table searching instruction;
the zero clearing unit is used for loading the scattered program address into a pointer and clearing the accumulator;
and the jump unit is used for directly steering the data modification program corresponding to the scattered program address by using a jump instruction.
An embodiment of the present application further provides an electronic device, where the electronic device includes:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to execute the program execution method.
The embodiment of the application also provides a computer readable storage medium, wherein the storage medium stores a computer program, and the computer program can be executed by a processor to complete the program running method.
According to the technical scheme provided by the embodiment of the application, the scatter program table stored in the ROM is loaded to the designated address of the RAM, so that when the calling instruction is executed to access the designated address of the RAM, the scatter program table is equivalent to the code of the CPU unit in the address corresponding to the ROM, and because the data of the target address in the FALSH is copied to the designated address of the RAM, the data of the designated address of the RAM is changed, namely the code in the ROM address is changed, and therefore the problems of program errors and high version change cost caused by incapability of modifying programs in the ROM can be solved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required to be used in the embodiments of the present application will be briefly described below.
Fig. 1 is a schematic structural diagram of a chip provided in an embodiment of the present application;
FIG. 2 is a schematic diagram of a partition of a memory unit according to an embodiment of the present application;
fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application;
fig. 4 is a flowchart illustrating a program running method according to an embodiment of the present application;
FIG. 5 is a detailed flowchart of step S420 in the corresponding embodiment of FIG. 4;
fig. 6 is a block diagram of a program execution device according to an embodiment of the present application;
fig. 7 is a block diagram of a program jump module in the corresponding embodiment of fig. 6.
Detailed Description
The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.
Like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
Fig. 1 is a schematic structural diagram of a chip according to an embodiment of the present disclosure. As shown in fig. 1, the chip 10 mainly includes the following basic units: a CPU (Central Processing Unit) Unit 11, a storage Unit 12, a high-speed hardware algorithm Unit 13, an IO interface 14, and the like. The CPU unit 11 is a general MCU core, such as MSP430, CORTEX-M0, etc., and is used for internal control and operation of the chip 10. The storage unit 12 includes a data storage unit 121(RAM) and a program storage unit 122 (including ROM, FLASH).
The RAM (random access memory) runs a memory, the CPU unit 11 can directly access the memory, and the read/write speed is very high, but the memory cannot be powered down. Mainly used for storing temporary data, such as input data of the high-speed hardware arithmetic unit 13 or data generated in the program operation of the chip 10. A ROM (read only memory) memory, which can store data in a power-off manner, can only read data and cannot write data, and can be used for storing a BOOT program.
The FLASH memory can be stored in power-off mode, and can be read and written, and can be used for storing software data in the chip 10. The high-speed hardware algorithm unit 13 is used for hardware implementation of a complex security authentication algorithm, such as an encryption and decryption module of AEA, AES, DES, and the like. The chip 10 can communicate with a host computer through an IO interface 14.
In an embodiment, the CPU unit 11 may execute the method provided in the embodiment of the present application, and load the scatter program table stored in the rom to the designated address of the ram; determining a scatter-transfer program address corresponding to a data modification program according to scatter-transfer program addresses corresponding to different processing programs, and jumping to the scatter-transfer program address; and copying the data of the target address in the flash memory to the designated address of the random access memory.
Because the scatter program table stored in the ROM is loaded to the designated address of the RAM, when the calling instruction is executed to access the designated address of the RAM, the CPU unit is equivalent to the code in the corresponding address of the ROM, and because the data of the target address in the FALSH is copied to the designated address of the RAM, the data of the designated address of the RAM, namely the code in the address of the ROM, is changed, so that the problems of program error and high version change cost caused by the fact that the program in the ROM cannot be modified can be solved.
Fig. 2 is a schematic diagram of the partition of the memory unit 12. Wherein, ROM and Flash form the program memory area together. The flash area stores data and a very small amount of programs therein, and the ROM area stores a kernel program, which are separately addressed. The address is addressed from 0000, and the address of the ROM area may be 0000-.
Fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present application. The electronic device 100 may be configured to execute the program running method provided in the embodiment of the present application. As shown in fig. 3, the electronic device 100 includes: one or more processors 102, and one or more memories 104 storing processor-executable instructions. Wherein, the processor is configured to execute the program running method provided by the following embodiments of the application.
The processor 102 may be a gateway, or may be an intelligent terminal, or may be a device including a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), or other form of processing unit having data processing capability and/or instruction execution capability, and may process data of other components in the electronic device 100, and may control other components in the electronic device 100 to perform desired functions.
The memory 104 may include one or more computer program products that may include various forms of computer-readable storage media, such as volatile memory and/or non-volatile memory. The volatile memory may include, for example, Random Access Memory (RAM), cache memory (cache), and/or the like. The non-volatile memory may include, for example, Read Only Memory (ROM), hard disk, flash memory, etc. On which one or more computer program instructions may be stored that may be executed by processor 102 to implement the program execution methods described below. Various applications and various data, such as various data used and/or generated by the applications, may also be stored in the computer-readable storage medium.
In one embodiment, the electronic device 100 shown in FIG. 3 may also include an input device 106, an output device 108, and a data acquisition device 110, which may be interconnected via a bus system 112 and/or other form of connection mechanism (not shown). It should be noted that the components and structure of the electronic device 100 shown in fig. 3 are exemplary only, and not limiting, and the electronic device may have other components and structures as desired.
The input device 106 may be a device used by a user to input instructions and may include one or more of a keyboard, a mouse, a microphone, a touch screen, and the like. The output device 108 may output various information (e.g., images or sounds) to the outside (e.g., a user), and may include one or more of a display, a speaker, and the like. The data acquisition device 110 may acquire an image of a subject and store the acquired image in the memory 104 for use by other components. Illustratively, the data acquisition device 110 may be a camera.
In an embodiment, the devices in the example electronic device for implementing the program running method of the embodiment of the present application may be integrally disposed, or may be disposed in a decentralized manner, such as integrally disposing the processor 102, the memory 104, the input device 106 and the output device 108, and disposing the data acquisition device 110 separately.
In an embodiment, an example electronic device for implementing the program running method of the embodiment of the present application may be implemented as a smart terminal such as a smart phone, a tablet computer, a smart watch, an in-vehicle device, and the like.
Embodiments of the present application also provide a computer-readable storage medium, which stores a computer program, where the computer program is executable by a processor to perform the program running method described below.
Fig. 4 is a flowchart illustrating a program running method according to an embodiment of the present application. As shown in fig. 4, the method comprises the steps of: S410-S430.
Step S410: and loading the scatter program table stored in the read-only memory to a specified address of the random access memory.
Table 1 is an exemplary scatter program table. For example, a scatter program table may be loaded into RAM address 0XC00D1～0XC00Dx. The original address of the scatter program table is ROM address 0X00Y1～0X00Yx. Therefore, when a CALL instruction CALL CXXX is executed to access the RAM, the CPU executes the code (02 XX) in the corresponding ROM address. That is, modifying the code of the RAM is equivalent to modifying the code of the ROM.
Execution of C00D, as shown in the following Table1Code, jump to Address 1, execution C00D2The code jumps to address 2. Therefore, the jump address can be changed by changing the execution code, thereby changing the executed program. How the code for the RAM address is changed is described in detail below.
Table 1 is an exemplary scatter plot
Figure BDA0002793670260000081
Step S420: determining a scatter-transfer program address corresponding to a data modification program according to scatter-transfer program addresses corresponding to different processing programs, and jumping to the scatter-transfer program address;
the scatter program address is the jump program address. As shown in table 2 below, the handler may be a data copy function between the ROM and the RAM, a data copy function between the RAM and the Flash, and a function of a configuration register.
Table 2 is an example of a handler corresponding to a scatter program address
Figure BDA0002793670260000091
As can be seen from table 2, when the address of the scatter program is addr2, the function of the corresponding handler may be to copy the data of the flash target address to the specified address of the RAM. For differentiation, the handler for this particular function may be referred to as a data modifier, with the corresponding scatterer address addr 2. Jumping to addr2, the data modification program may be executed.
In one embodiment, a scatter program using a turning address table may be designed in the ROM program, and during scatter, a table lookup instruction is used to find a scatter program address corresponding to the data modification program stored in the flash memory, that is, a corresponding turning address is found by table lookup; loading the scattered program address into a pointer, and clearing an accumulator A; and then directly forwarding to a data modification program corresponding to the address of the scatter-transfer program by using a jump instruction JMP @ A + DPTR. Thereafter, the program may be modified by executing the data.
Step S430: and copying the data of the target address in the flash memory to the designated address of the random access memory.
Step S430 is the function of the data modification program. And jumping to addr2, and executing a data modification program, namely copying data of the Flash target address to a specified address of the RAM.
In one embodiment, data for Flash target addresses is copied to RAM, which may be 0XC00D1～0XC00DxAny of the ranges. Thus, when the instruction CAL is called next timeWhen L CXXX accesses RAM, the code executed by the CPU is changed, and different functions can be executed.
Taking Table 1 as an example, assume ROM address 0X00Y1Has code of 0200 EE, executes CALL C00D1The specific operation is as follows: the PC jump address L _00EE (namely address 1), L _00EE may be a program address head containing some function; after the above steps, the data of the RAM address 0XC00D1 can become 0XN1M1Address 0XC00D2Can become 0XP1Q1Executing CALL C00D1, which specifically operates as follows: PC jump address L _ N1M1P1Q1(i.e., address 1 changed), L _ N1M1P1Q1The address may be a program of another function and may be reserved in advance by the developer. Therefore, a developer can easily change the functions of the ROM program by rewriting the FLASH data without customizing the mask again, thereby saving the cost and having strong flexibility.
In an embodiment, after the step S430, the method provided in the embodiment of the present application further includes: executing the data copied into the random access memory when a call instruction of the specified address in the random access memory is received.
For example, assume step S410 loads a scatter program table into RAM address 0XC00D1～0XC00DxThen the specified address may be 0XC00D1～0XC00Dx. When receiving access 0XC00D1～0XC00DxWhen the calling instruction of any address is received, the code corresponding to the address is executed. The code corresponding to the address may be data copied into the RAM by Flash. Therefore, the data in the RAM can be changed by changing the data in the Flash, and the function of changing the ROM program is further realized.
In an embodiment, before the step S310, the method provided in the embodiment of the present application further includes: after receiving the power-on signal, the initialized pre-program is executed.
After the chip in the device is powered on, the front end program in the ROM is executed firstly, and the front end program plays the function of initialization.
In an embodiment, as shown in fig. 5, the step S420 specifically includes the following steps S421 to S424:
step S421: the start address of the flash memory is loaded.
Step S422: and loading the starting address of the scatter program to a pointer.
Step S423: and acquiring the address offset corresponding to the data modification program stored in the flash memory by looking up a table.
Step S424: and loading the address offset into the pointer to obtain a scatter program address formed by the start address of the scatter program and the address offset.
Wherein, a steering address table is stored in Flash, and different offsets correspond to different processing program functions. For example, offset B corresponds to the data modification program. And loading the starting address of the scatter-and-forward program to a pointer (DPTR), reading the address offset B in Flash, and obtaining the address @ DPTR + B of the scatter-and-forward program. So that a jump can then be made to the diverger address @ DPTR + B for executing the data modification program. The data modification program can specify the target address of the flash and the specified address of the RAM, and copy the data of the target address of the flash to the specified address of the RAM.
The following is an embodiment of the apparatus of the present application, which can be used to execute the above-mentioned embodiment of the program running method of the present application. For details that are not disclosed in the embodiments of the apparatus of the present application, please refer to the embodiments of the program running method of the present application.
Fig. 6 is a block diagram of a program execution device according to an embodiment of the present application, and as shown in fig. 6, the program execution device includes: a program loading module 610, a program jumping module 620, and a data modification module 630.
And a program loading module 610, configured to load the scatter program table stored in the read only memory to a specified address of the random access memory.
And the program skipping module 620 is configured to determine a scatter program address corresponding to the data modification program according to the scatter program addresses corresponding to different processing programs, and skip to the scatter program address.
And a data modification module 630, configured to copy the data at the target address in the flash memory to the specified address of the random access memory.
In an embodiment, the apparatus further includes: and the initialization module is used for executing the initialized pre-program after receiving the power-on signal.
In an embodiment, as shown in fig. 7, the program jumping module 620 specifically includes: a lookup unit 621, a clear unit 622, and a jump unit 623.
The searching unit 621 is configured to search, by using a table lookup instruction, a scatter program address corresponding to the data modification program stored in the flash memory;
a zero clearing unit 622, configured to load the scatter program address into a pointer and zero the accumulator;
and the jump unit 623 is used for directly turning to the data modification program corresponding to the scatter program address by using a jump instruction.
The implementation process of the functions and actions of each module in the device is specifically described in the implementation process of the corresponding step in the program running method, and is not described herein again.
In the embodiments provided in the present application, the disclosed apparatus and method can be implemented in other ways. The apparatus embodiments described above are merely illustrative, and for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.

Claims (10)

1. A program execution method, comprising:
loading a scatter program table stored in a read-only memory to a designated address of a random access memory;
determining a scatter-transfer program address corresponding to a data modification program according to scatter-transfer program addresses corresponding to different processing programs, and jumping to the scatter-transfer program address;
and copying the data of the target address in the flash memory to the designated address of the random access memory.
2. The method of claim 1, wherein prior to said loading the scatterer table stored in the read-only memory to a specified address of the random access memory, the method further comprises:
after receiving the power-on signal, the initialized pre-program is executed.
3. The method as claimed in claim 1, wherein the determining a scatter-transfer program address corresponding to a data modification program according to scatter-transfer program addresses corresponding to different processing programs, and jumping to the scatter-transfer program address comprises:
using a table lookup instruction to search a scatter program address corresponding to a data modification program stored in the flash memory;
loading the scattered program address into a pointer and resetting an accumulator;
and directly turning to a data modification program corresponding to the scatter program address by using a jump instruction.
4. The method of claim 1, wherein determining the hash program address corresponding to the data modification program according to the hash program addresses corresponding to different processing programs comprises:
loading a starting address of the flash memory;
loading the starting address of the scatter-transfer program to a pointer;
acquiring an address offset corresponding to a data modification program stored in the flash memory through table lookup;
and loading the address offset into the pointer to obtain a scatter program address formed by the start address of the scatter program and the address offset.
5. The method of claim 1, wherein after copying data of a target address in the flash memory to a specified address of the random access memory, the method further comprises:
executing the data copied into the random access memory when a call instruction of the specified address in the random access memory is received.
6. A program execution device characterized by comprising:
the program loading module is used for loading the scatter program table stored in the read-only memory to the designated address of the random access memory;
the program skipping module is used for determining a scatter-transfer program address corresponding to a data modification program according to scatter-transfer program addresses corresponding to different processing programs and skipping to the scatter-transfer program address;
and the data modification module is used for copying the data of the target address in the flash memory to the designated address of the random access memory.
7. The apparatus of claim 6, further comprising:
and the initialization module is used for executing the initialized pre-program after receiving the power-on signal.
8. The apparatus of claim 6, wherein the program jump module comprises:
the searching unit is used for searching a scatter program address corresponding to the data modification program stored in the flash memory by using a table searching instruction;
the zero clearing unit is used for loading the scattered program address into a pointer and clearing the accumulator;
and the jump unit is used for directly steering the data modification program corresponding to the scattered program address by using a jump instruction.
9. An electronic device, characterized in that the electronic device comprises:
a processor;
a memory for storing processor-executable instructions;
wherein the processor is configured to perform the program execution method of any one of claims 1 to 5.
10. A computer-readable storage medium, characterized in that the storage medium stores a computer program executable by a processor to perform the program execution method of any one of claims 1 to 5.
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CN114125902A (en) * 2021-11-30 2022-03-01 上海移远通信技术股份有限公司 WWAN equipment and configuration method, device and storage medium thereof
CN114546733A (en) * 2022-02-22 2022-05-27 南京金阵微电子技术有限公司 Firmware loading method, chip and electronic equipment
CN116149742A (en) * 2023-04-17 2023-05-23 苏州萨沙迈半导体有限公司 Chip, chip starting method and computer readable storage medium
CN117170753A (en) * 2023-08-18 2023-12-05 新汽有限公司 Program processing method, program processing device, vehicle, and storage medium

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