CN112435954B - Wafer carrier processing method and wafer carrier - Google Patents
Wafer carrier processing method and wafer carrier Download PDFInfo
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- CN112435954B CN112435954B CN202011337895.XA CN202011337895A CN112435954B CN 112435954 B CN112435954 B CN 112435954B CN 202011337895 A CN202011337895 A CN 202011337895A CN 112435954 B CN112435954 B CN 112435954B
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- wafer carrier
- substrate
- polymer material
- wafer
- polymeric material
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- 238000003672 processing method Methods 0.000 title claims abstract description 10
- 239000000969 carrier Substances 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims description 52
- 239000002861 polymer material Substances 0.000 claims description 46
- 239000000463 material Substances 0.000 claims description 39
- 238000000034 method Methods 0.000 claims description 24
- 239000004205 dimethyl polysiloxane Substances 0.000 claims description 15
- 229920000435 poly(dimethylsiloxane) Polymers 0.000 claims description 15
- -1 polydimethylsiloxane Polymers 0.000 claims description 15
- 239000003795 chemical substances by application Substances 0.000 claims description 13
- 239000002904 solvent Substances 0.000 claims description 13
- 235000013870 dimethyl polysiloxane Nutrition 0.000 claims 3
- 238000004519 manufacturing process Methods 0.000 abstract description 4
- 125000006850 spacer group Chemical group 0.000 description 7
- 239000010408 film Substances 0.000 description 5
- 238000005498 polishing Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000000243 solution Substances 0.000 description 3
- 238000005299 abrasion Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 1
- 230000004308 accommodation Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229920006254 polymer film Polymers 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
The invention provides a wafer carrier and a processing method thereof. The processing method of the wafer carrier comprises the following steps: providing a wafer carrier, wherein the wafer carrier comprises a first surface, a second surface opposite to the first surface and a side surface adjacent to the first surface and the second surface; a planar layer is formed on at least one of the first surface and the second surface of the wafer carrier. According to the embodiment of the invention, the thickness of the wafer carrier can be compensated by manufacturing the flat layer on the surface of the wafer carrier, so that the thicknesses of the wafer carriers are relatively uniform, and the quality of the wafer is improved.
Description
Technical Field
The present invention relates to the field of semiconductor processing technologies, and in particular, to a wafer carrier and a processing method of the wafer carrier.
Background
In the semiconductor processing process, a wafer needs to be polished on two sides, and in the process of polishing on two sides, the wafer is usually arranged in a wafer carrier, and then the wafer is polished on two sides by using a polishing pad. However, the thickness of the wafer carrier is not uniform, and the wafer carrier may be worn during use, which may cause the thickness of the wafer carrier to change, and a plurality of wafer carriers may be used during one polishing process, and the thickness difference of the wafer carriers may affect the quality of the wafer.
Disclosure of Invention
The embodiment of the invention provides a wafer carrier processing method and a wafer carrier, which are used for solving the problem that the thickness difference of the wafer carrier can influence the quality of a wafer.
In a first aspect, an embodiment of the present invention provides a method for processing a wafer carrier, including the following steps:
providing a wafer carrier, wherein the wafer carrier comprises a first surface, a second surface opposite to the first surface and a side surface adjacent to the first surface and the second surface;
a planar layer is formed on at least one of the first surface and the second surface of the wafer carrier.
In some embodiments, the forming a planar layer on at least one of the first surface and the second surface of the wafer carrier includes:
providing a die, wherein the die comprises a first substrate, and a containing groove matched with the wafer carrier is formed in the first substrate;
disposing the wafer carrier in the receiving slot;
injecting a polymeric material into the receiving slot;
a planar layer is formed on at least one of the first surface and the second surface of the wafer carrier by the polymeric material.
In some embodiments, the polymeric material includes polydimethylsiloxane, a curing agent, and a solvent, wherein the parts by weight of polydimethylsiloxane, curing agent, and solvent are 1-2:1-2:15.
In some embodiments, the parts by weight of polydimethylsiloxane, curative, and solvent are 1:1:10.
In some embodiments, the mold is provided with an overflow trough extending to the opening of the accommodating trough;
the injecting of the polymeric material into the receiving groove includes:
injecting a polymeric material into the holding tank at a rate of 5 to 100 milliliters per second;
stopping injecting the polymer material in case the polymer material covers the wafer carrier;
and standing until the polymer material no longer flows out of the overflow trough.
In some embodiments, the method further comprises, after the standing until the polymeric material no longer flows out of the isopipe:
standing the wafer carrier in the mold at 20 to 40 ℃ for 15 to 30 hours to cure the polymer material;
and taking out the wafer carrier from the die, wherein at least one of the first surface and the second surface of the wafer carrier is attached with the cured polymer material.
In some embodiments, the mold further comprises a second substrate having a shape that matches the shape of the receiving groove;
after the standing until the polymeric material no longer flows out of the isopipe, the method further comprises:
the second substrate and the first substrate are matched;
controlling the second substrate to move towards the direction close to the first substrate, and enabling the distance between the first substrate and the second substrate to be a preset distance value;
the forming a planar layer on at least one of the first surface and the second surface of the wafer carrier by the polymeric material includes:
and taking the cured polymer material which is positioned on at least one of the first surface and the second surface of the wafer carrier as the flat layer.
In some embodiments, the mold further comprises a spacer pin located between the first and second substrates, the spacer pin for controlling a relative distance between the first and second substrates.
In some embodiments, the forming a planar layer on at least one of the first surface and the second surface of the wafer carrier by the polymeric material includes:
and mechanically releasing the cured polymeric material located on at least one of the first surface and the second surface, wherein the polymeric film remaining on at least one of the first surface and the second surface forms the planar layer after the polymeric material is released.
In a second aspect, an embodiment of the present invention provides a wafer carrier, which is processed by the method for processing a wafer carrier according to any one of the first aspect.
According to the embodiment of the invention, the thickness of the wafer carrier can be compensated by manufacturing the flat layer on the surface of the wafer carrier, so that the thicknesses of the wafer carriers are relatively uniform, and the quality of the wafer is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the description of the embodiments of the present invention will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for processing a wafer carrier according to an embodiment of the present invention;
FIG. 2 is a schematic view of a wafer carrier according to an embodiment of the invention;
fig. 3 is a schematic view of another structure of a wafer carrier according to an embodiment of the invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The invention provides a processing method of a wafer carrier.
As shown in fig. 1, in one embodiment, the method comprises the steps of:
step 101: providing a wafer carrier, wherein the wafer carrier comprises a first surface, a second surface opposite to the first surface and a side surface adjacent to the first surface and the second surface;
step 102: a planar layer is formed on at least one of the first surface and the second surface of the wafer carrier.
As shown in fig. 2, a schematic structure of a wafer carrier 100 is shown. The wafer carrier 100 is typically made of metal, for example, may be made of stainless steel or the like. The wafer carrier 100 is provided with the accommodating hole 200, in the use process, a wafer is placed in the accommodating hole 200, then the wafer carrier 100 is arranged between two grinding pads, the outer circumference 110 of the wafer carrier 100 is of a gear structure, in the grinding process, the gear structure on the outer circumference 110 is meshed with the driving device, in this way, the wafer carrier 100 rotates under the driving of the driving device, and accordingly, the wafer carrier 100 moves relatively with the grinding pads positioned on two sides of the wafer carrier 100, and double-sided grinding of the wafer positioned in the accommodating hole 200 is achieved.
The technical solution of the present embodiment may be for a wafer carrier that has been produced and not yet used, or for a wafer carrier that has been used.
It should be appreciated that there may be some variation in thickness of the wafer carrier that has not been used due to processing and other factors. However, the wafer carriers used for a long time may have a certain abrasion, and the abrasion of different degrees may also cause the difference in thickness between the wafer carriers. When wafer carriers of different thickness are used on the same double-sided polishing apparatus, there may be a difference in contact force between the wafer on each wafer carrier and the polishing pad, thereby affecting the uniformity of wafer polishing.
As shown in fig. 3, in the embodiment of the present invention, the planarization layer 110 is formed on the surface of the wafer carrier 100, and specifically, the planarization layer 110 may be formed on the first surface of the wafer carrier 100, or may be formed on the second surface of the wafer carrier 100, or may be formed on both the first surface and the second surface of the wafer carrier 100.
According to the embodiment of the invention, the thickness of the wafer carrier can be compensated by manufacturing the flat layer on the surface of the wafer carrier, so that the thicknesses of the wafer carriers are relatively uniform, and the quality of the wafer is improved.
In some embodiments, the step 102 includes:
providing a die, wherein the die comprises a first substrate, and a containing groove matched with the wafer carrier is formed in the first substrate;
disposing the wafer carrier in the receiving slot;
injecting a polymeric material into the receiving slot;
a planar layer is formed on at least one of the first surface and the second surface of the wafer carrier by the polymeric material.
In this embodiment, the flat layer is manufactured using a prefabricated mold. The die comprises a first substrate, a first accommodating groove is basically formed in the first substrate, when the die is implemented, a wafer carrier is arranged in the accommodating groove, then polymer material is injected into the accommodating groove, after the polymer material is solidified, a flat layer positioned on the surface of the wafer carrier is formed, wherein the surface of the wafer carrier refers to the first surface or the second surface of the wafer carrier, namely, two round surfaces of the wafer carrier provided with accommodating holes in fig. 2.
In one embodiment, a flat layer is required to be manufactured on both surfaces of the wafer carrier, and an overflow groove extending to the opening of the accommodating groove is formed in the mold, in this embodiment, the depth of the accommodating groove is greater than the thickness of the wafer carrier, and the distance between the overflow groove and the bottom of the accommodating groove is also greater than the thickness of the wafer carrier.
In this embodiment, the step of injecting the polymer material into the receiving groove includes:
injecting a polymeric material into the holding tank at a rate of 5 to 100 milliliters per second;
stopping injecting the polymer material in case the polymer material covers the wafer carrier;
and standing until the polymer material no longer flows out of the overflow trough.
The injection rate of the polymer material is controlled in this embodiment to be 5-100 ml/s so that the polymer material can fill the possible gap between the first substrate and the wafer carrier. After the polymeric material completely covers the wafer carrier, the injection of the polymeric material is stopped and allowed to stand for a period of time to facilitate sufficient contact of the polymeric material with the wafer carrier. If the wafer carrier is exposed after standing, it is necessary to continue injecting the polymeric material until it covers the wafer carrier, and if the wafer carrier is completely covered, the subsequent processing is continued after no more flow from the overflow launder.
In some embodiments, only a planar layer needs to be made on one surface of the wafer carrier, and the polymeric material need only submerge one surface of the wafer carrier when the polymeric material is injected into the receiving groove.
In some embodiments, the method further comprises:
standing the wafer carrier in the mold at 20 to 40 ℃ for 15 to 30 hours to cure the polymer material;
and taking out the wafer carrier from the die, wherein at least one of the first surface and the second surface of the wafer carrier is attached with the cured polymer material.
In this embodiment, the polymer material may be naturally cured under conventional conditions, and in other embodiments, the curing of the polymer material may be accelerated by heating, illumination, etc. according to the nature of the polymer material used, which is not further limited and described herein.
The curing temperature in this embodiment is controlled to 20 to 40 degrees celsius, and for example, in summer, curing can be performed at room temperature, contributing to cost saving. The standing time is controlled to 15 to 30 hours, for example, about 24 hours.
In some embodiments, the planar layer is formed directly from the cured polymeric material.
In this embodiment, the mold further includes a second substrate, and a shape of the second substrate matches a shape of the receiving groove.
After standing until the polymeric material no longer flows from the isopipe, the method further comprises:
the second substrate and the first substrate are matched;
controlling the second substrate to move towards the direction close to the first substrate, and enabling the distance between the first substrate and the second substrate to be a preset distance value;
the forming a planar layer on at least one of the first surface and the second surface of the wafer carrier by the polymeric material includes:
is positioned on at least one of the first surface and the second surface of the wafer carrier, and the cured polymeric material acts as the planar layer.
In this embodiment, after the polymer material is left standing until the polymer material no longer flows out of the overflow groove, it can be ensured that the polymer material completely covers the wafer carrier, at this time, the first substrate and the second substrate are aligned, and the distance between the first substrate and the second substrate is controlled to be a preset distance value, so that, after the polymer material is cured, the total thickness of the plurality of wafer carriers attached with the polymer material obtained by the method is equal, and equal to the preset distance value, thereby improving the thickness uniformity between different wafer carriers.
In one embodiment, to ensure that excess polymer material can overflow during the process of aligning the first substrate and the second substrate, an overflow aperture may be formed in the second substrate, and the position of the overflow aperture may correspond to the overflow channel, so that excess polymer material can be discharged from the overflow aperture to the overflow channel when the first substrate and the second substrate are aligned.
The overflow port can be provided with a pressure valve which is opened when the pressure reaches a preset pressure threshold value, so that the polymer material reaches enough pressure before overflowing through the overflow port, and the gap between the wafer carrier and the die is fully filled, the wafer carrier and the polymer material are fully contacted, and the manufacturing effect of the flat layer is improved.
In some embodiments, the relative position between the first substrate and the second substrate is controlled by a stop pin, in particular, the mold further comprises a stop pin, the stop pin being located between the first substrate and the second substrate, the stop pin being used to control the relative distance between the first substrate and the second substrate.
The limiting pin can provide a plurality of limiting pins with different lengths, and also can provide limiting pins with adjustable lengths, so that the processing requirements of wafer carriers required to be used in the wafer processing process with different specifications are met.
In the use, fix this spacer pin on first base plate, the accommodation hole on its fixed position corresponds the wafer carrier, when first base plate and second base plate are relative, because this spacer pin's existence, can realize spacing effect for the distance between first base plate and the second base plate equals the height of spacer pin, thereby the thickness sum of the flat layer that makes wafer carrier and solidification back formation equals the height of this spacer pin, and this spacer pin's height can set up as required, does not further limit and describe here.
In some embodiments, a thin film of polymeric material remaining after the polymeric material is peeled off is utilized as the planarizing layer.
In this embodiment, the forming a planar layer on at least one of the first surface and the second surface of the wafer carrier by the polymer material includes:
and mechanically stripping the polymeric material located on at least one of the first surface and the second surface, wherein the film of polymeric material remaining on at least one of the first surface and the second surface forms the planar layer after the polymeric material is stripped.
In this embodiment, the cured polymer material is peeled off from the surface of the wafer carrier, and it should be understood that mechanical peeling is unable to completely remove the cured polymer material, and in the case of a polymer material including polydimethylsiloxane, the siloxane bond and the carrier surface in the polydimethylsiloxane can form stable chemical bonds, and mechanical peeling is unable to break such chemical bonds. Therefore, after the solidified polymer material is stripped, a layer of polymer material film with very small thickness is still formed on the surface of the wafer carrier, and the polymer material film is used as a flat layer, and the hardness of the polymer material film is smaller than that of the wafer carrier, so that the thickness of the wafer carrier can be compensated through the flat layer, the thickness difference between different carriers is reduced, and the double-sided grinding effect of the wafer is improved.
In some embodiments of the present invention, the polymeric material used comprises polydimethylsiloxane, specifically, the polymeric material is obtained by mixing polydimethylsiloxane, curing agent and solvent in a weight fraction ratio of 1-2:1-2:15. The curing agent may be selected from suitable curing agents according to the related art, and the solvent may be selected from organic solvents such as absolute ethyl alcohol.
In one embodiment, the ratio of the polydimethylsiloxane, the curing agent and the solvent is 1:1:15 by weight; in another embodiment, the ratio of the polydimethylsiloxane, the curing agent, and the solvent by weight fraction is 2:2:15; in yet another embodiment, the polydimethylsiloxane, curing agent, and solvent are present in a weight fraction of 1:1:10. After the polydimethylsiloxane, the curing agent and the solvent are proportioned according to the proportion, the mixture is stirred uniformly and injected into a die when needed.
Through testing, the polymer materials formed by the ratio of the polydimethylsiloxane, the curing agent and the solvent in the above embodiments can form a polymer film layer as a flat layer on the surface of the wafer carrier.
The embodiment of the invention also provides a wafer carrier, which is obtained by processing the wafer carrier by the processing method of any one of the above steps.
Because the wafer carrier in this embodiment includes all the technical solutions of the embodiments of the wafer carrier processing method, at least all the technical effects described above can be achieved, and the description thereof is omitted herein.
The foregoing is merely illustrative embodiments of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art can easily think about variations or substitutions within the technical scope of the present invention, and the invention should be covered. Therefore, the protection scope of the invention is subject to the protection scope of the claims.
Claims (8)
1. A method of processing a wafer carrier, comprising the steps of:
providing a wafer carrier, wherein the wafer carrier comprises a first surface, a second surface opposite to the first surface and a side surface adjacent to the first surface and the second surface;
forming a planarization layer on at least one of the first surface and the second surface of the wafer carrier, the planarization layer for compensating for a thickness of the wafer carrier so that the thicknesses of the plurality of wafer carriers are relatively uniform;
the forming a planarization layer on at least one of the first surface and the second surface of the wafer carrier includes:
providing a die, wherein the die comprises a first substrate, and a containing groove matched with the wafer carrier is formed in the first substrate;
disposing the wafer carrier in the receiving slot;
injecting a polymer material into the accommodating groove, wherein the polymer material comprises polydimethylsiloxane, a curing agent and a solvent, and the weight parts of the polydimethylsiloxane, the curing agent and the solvent are 1-2:1-2:15;
a planar layer is formed on at least one of the first surface and the second surface of the wafer carrier by the polymeric material.
2. The method of claim 1, wherein the polydimethyl siloxane, curing agent, and solvent are present in a weight ratio of 1:1:10.
3. The method of processing a wafer carrier according to claim 1 or 2, wherein the mold is provided with an overflow groove extending to an opening of the accommodating groove;
the injecting of the polymeric material into the receiving groove includes:
injecting a polymer material into the accommodating groove at a speed of 5-100 milliliters per second;
stopping injecting the polymer material in case the polymer material covers the wafer carrier;
and standing until the polymer material no longer flows out of the overflow trough.
4. A method of processing a wafer carrier as claimed in claim 3, wherein said method further comprises, after said standing until polymeric material no longer flows from said overflow trough:
standing the wafer carrier in the mold at 20 to 40 ℃ for 15 to 30 hours to cure the polymer material;
and taking out the wafer carrier from the die, wherein at least one of the first surface and the second surface of the wafer carrier is attached with the cured polymer material.
5. The method of processing a wafer carrier of claim 4, wherein the mold further comprises a second substrate having a shape that matches the shape of the receiving slot;
after the standing until the polymeric material no longer flows out of the isopipe, the method further comprises:
the second substrate and the first substrate are matched;
controlling the second substrate to move towards the direction close to the first substrate, and enabling the distance between the first substrate and the second substrate to be a preset distance value;
the forming a planar layer on at least one of the first surface and the second surface of the wafer carrier by the polymeric material includes:
and taking the cured polymer material which is positioned on at least one of the first surface and the second surface of the wafer carrier as the flat layer.
6. The method of processing a wafer carrier of claim 5, wherein the mold further comprises a stop pin positioned between the first substrate and the second substrate, the stop pin being configured to control a relative distance between the first substrate and the second substrate.
7. The method of processing a wafer carrier of claim 4, wherein the forming a planar layer on at least one of the first surface and the second surface of the wafer carrier by the polymeric material comprises:
and mechanically releasing the cured polymeric material located on at least one of the first surface and the second surface, wherein the polymeric film remaining on at least one of the first surface and the second surface forms the planar layer after the polymeric material is released.
8. Wafer carrier, characterized in that it is processed by the processing method of a wafer carrier according to any one of claims 1 to 7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011337895.XA CN112435954B (en) | 2020-11-25 | 2020-11-25 | Wafer carrier processing method and wafer carrier |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011337895.XA CN112435954B (en) | 2020-11-25 | 2020-11-25 | Wafer carrier processing method and wafer carrier |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112435954A CN112435954A (en) | 2021-03-02 |
| CN112435954B true CN112435954B (en) | 2024-01-26 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011337895.XA Active CN112435954B (en) | 2020-11-25 | 2020-11-25 | Wafer carrier processing method and wafer carrier |
Country Status (1)
| Country | Link |
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| CN (1) | CN112435954B (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB996989A (en) * | 1961-08-31 | 1965-06-30 | Siemens Ag | A process for the surface treatment of a semi-conductor unit |
| WO2006115039A1 (en) * | 2005-04-20 | 2006-11-02 | Shin-Etsu Handotai Co., Ltd. | Carrier for double side polishing apparatus, and double side polishing apparatus and double side polishing method using such carrier |
| CN101541477A (en) * | 2006-11-21 | 2009-09-23 | 3M创新有限公司 | Lapping carrier and method |
| JP2015009315A (en) * | 2013-06-28 | 2015-01-19 | Hoya株式会社 | Grinding/polishing carrier, and method for manufacturing glass substrate for magnetic disk |
| CN104903053A (en) * | 2013-01-29 | 2015-09-09 | 信越半导体株式会社 | Carrier for double-side polishing apparatus and double-side polishing method for wafer |
| CN104968473A (en) * | 2013-02-13 | 2015-10-07 | 信越半导体株式会社 | Method for manufacturing carrier for double-sided polishing device and double-sided wafer polishing method |
| JP2019186490A (en) * | 2018-04-16 | 2019-10-24 | 株式会社Sumco | Carrier, carrier manufacturing method, carrier evaluation method, and semiconductor wafer polishing method |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070184662A1 (en) * | 2004-06-23 | 2007-08-09 | Komatsu Denshi Kinzoku Kabushiki Kaisha | Double-side polishing carrier and fabrication method thereof |
-
2020
- 2020-11-25 CN CN202011337895.XA patent/CN112435954B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB996989A (en) * | 1961-08-31 | 1965-06-30 | Siemens Ag | A process for the surface treatment of a semi-conductor unit |
| WO2006115039A1 (en) * | 2005-04-20 | 2006-11-02 | Shin-Etsu Handotai Co., Ltd. | Carrier for double side polishing apparatus, and double side polishing apparatus and double side polishing method using such carrier |
| CN101541477A (en) * | 2006-11-21 | 2009-09-23 | 3M创新有限公司 | Lapping carrier and method |
| CN104903053A (en) * | 2013-01-29 | 2015-09-09 | 信越半导体株式会社 | Carrier for double-side polishing apparatus and double-side polishing method for wafer |
| CN104968473A (en) * | 2013-02-13 | 2015-10-07 | 信越半导体株式会社 | Method for manufacturing carrier for double-sided polishing device and double-sided wafer polishing method |
| JP2015009315A (en) * | 2013-06-28 | 2015-01-19 | Hoya株式会社 | Grinding/polishing carrier, and method for manufacturing glass substrate for magnetic disk |
| JP2019186490A (en) * | 2018-04-16 | 2019-10-24 | 株式会社Sumco | Carrier, carrier manufacturing method, carrier evaluation method, and semiconductor wafer polishing method |
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| Publication number | Publication date |
|---|---|
| CN112435954A (en) | 2021-03-02 |
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