CN112435922A - Method for etching cantilever beam on CSOI - Google Patents
Method for etching cantilever beam on CSOI Download PDFInfo
- Publication number
- CN112435922A CN112435922A CN202011264661.7A CN202011264661A CN112435922A CN 112435922 A CN112435922 A CN 112435922A CN 202011264661 A CN202011264661 A CN 202011264661A CN 112435922 A CN112435922 A CN 112435922A
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- Prior art keywords
- etching
- layer
- insulating layer
- csoi
- cantilever beam
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- 238000005530 etching Methods 0.000 title claims abstract description 40
- 238000000034 method Methods 0.000 title claims abstract description 19
- 239000000463 material Substances 0.000 claims abstract description 18
- 239000002131 composite material Substances 0.000 claims abstract description 11
- 230000007704 transition Effects 0.000 claims abstract description 11
- 235000012431 wafers Nutrition 0.000 claims abstract description 11
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 10
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 10
- 239000010703 silicon Substances 0.000 claims abstract description 10
- 238000004519 manufacturing process Methods 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims abstract description 6
- 238000000059 patterning Methods 0.000 claims abstract description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 22
- 239000000377 silicon dioxide Substances 0.000 claims description 11
- 235000012239 silicon dioxide Nutrition 0.000 claims description 9
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 239000010410 layer Substances 0.000 description 56
- 239000000758 substrate Substances 0.000 description 10
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 238000002604 ultrasonography Methods 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81B—MICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
- B81B7/00—Microstructural systems; Auxiliary parts of microstructural devices or systems
- B81B7/0009—Structural features, others than packages, for protecting a device against environmental influences
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00134—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems comprising flexible or deformable structures
- B81C1/0015—Cantilevers
Abstract
The invention relates to a semiconductor manufacturing process, in particular to a method for etching a cantilever beam on a CSOI, which comprises the following steps: providing a group of silicon wafers as a first insulating layer, and manufacturing a cavity structure on the surface of the first insulating layer; bonding a composite layer consisting of a transition layer and a second insulating layer on the surface of the first insulating layer; depositing materials on the surface of the composite layer in sequence to form a structural layer; etching the structural layer, the second insulating layer and the transition layer from top to bottom at any position in the range of the target etching area to form a plurality of vent holes so that the outside is connected with the cavity; and carrying out patterning etching on the original target etching area to finally form a target structure. According to the method, the plurality of small vent holes are etched in the target etching range of the CSOI structure layer to eliminate the pressure difference formed between the internal vacuum cavity and the external atmospheric pressure, and then the preset etching is carried out, so that the cantilever beam cannot be locally damaged due to overlarge internal and external pressure difference in the etching process, and the yield of devices is improved.
Description
Technical Field
The invention relates to a semiconductor manufacturing process, in particular to a method for etching a cantilever beam on a CSOI.
Background
CSOI, also known as Cavity Silicon-On-insulator, i.e. Silicon On an insulating substrate with a Cavity, On which a corresponding material is deposited may form a target structure, e.g. an ultrasound transducer fabricated On a substrate with a Cavity enabling a specific function. However, in the process of manufacturing the device, due to the low pressure inside the cavity, a large pressure difference is formed between the external environment and the cavity, the upper surface of the CSOI is subjected to the pressure caused by the atmospheric pressure, so that the upper surface layer is pressed inwards, and then the material layer deposited on the CSOI is uneven. Secondly, when the cantilever beam is etched in the cavity structure, the problem of local damage at the etching position due to the internal and external pressure difference can occur, and the yield of the device is reduced.
Disclosure of Invention
The invention aims to provide a method for etching a cantilever beam on a CSOI, which has the advantages of smooth structure layer, simple and convenient preparation process and easy adjustment.
The scheme adopted by the invention for realizing the purpose is as follows: a method for etching a cantilever beam on a CSOI comprises the following steps:
step 1: providing a group of silicon wafers as a first insulating layer, and manufacturing a cavity structure on the surface of the first insulating layer;
step 2: bonding a composite layer consisting of a transition layer and a second insulating layer on the surface of the first insulating layer;
and step 3: depositing materials on the surface of the composite layer in sequence to form a structural layer;
and 4, step 4: etching the structural layer, the second insulating layer and the transition layer from top to bottom at any position in the range of the target etching area to form a plurality of vent holes so that the outside is connected with the cavity;
and 5: and carrying out patterning etching on the original target etching area to finally form a target structure.
Preferably, the step 1 further comprises the following operations: and filling silicon dioxide in the cavity until the surface of the first insulating layer is kept flat.
The surface of the first insulating layer silicon substrate is flat by pre-burying silicon dioxide, a flat first insulating layer/transition layer/second insulating layer substrate is formed after a composite layer is bonded, materials are uniformly deposited on the flat surface, the structural layer is kept flat, and the actually processed device can be reduced to an ideal condition to the maximum extent. The pre-buried silicon dioxide is released during etching.
Preferably, in step 1, the cross-sectional shape of the cavity is any polygon, circle or ellipse.
Preferably, in step 3, the structural layer is a mixed layer deposited with any material.
Preferably, the structural layer is a sandwich structural layer formed by electrodes/piezoelectric materials/electrodes or a piezoelectric bimorph structural layer formed by electrodes/piezoelectric materials/electrodes.
Preferably, in the step 4, the vent hole has an arbitrary shape.
The invention has the following advantages and beneficial effects:
according to the method, a plurality of small vent holes are etched in the target etching range of the CSOI structure layer to eliminate the pressure difference formed between the internal vacuum cavity and the external atmospheric pressure, and then the preset etching is carried out according to the mask plate, so that the cantilever beam cannot be locally damaged due to overlarge internal and external pressure difference in the etching process, and the yield of devices is improved.
Drawings
Fig. 1 is a schematic structural view of a device having a cavity structure referred to in example 1;
FIG. 2 is a schematic structural view of a vent hole etched according to example 1;
FIG. 3 is a top view of FIG. 2;
FIG. 4 is a schematic structural view of an etching target region involved in example 1;
fig. 5 is a top view of fig. 4.
FIG. 6 is a schematic structural view of a group of silicon wafers having a cavity structure as referred to in example 2;
fig. 7 is a schematic structural view of a group of silicon wafers whose surfaces are planarized by embedding silicon dioxide according to embodiment 2;
FIG. 8 is a schematic structural view of a wafer substrate formed by bonding a composite layer on a silicon wafer according to embodiment 2;
FIG. 9 is a schematic structural view of a structural layer formed by depositing a material on a wafer substrate according to embodiment 2;
FIG. 10 is a schematic structural view of a process for releasing silica involved in example 2;
FIG. 11 is a schematic view showing a structure after completion of release of silica as referred to in example 2;
the meanings of the marks in the above figures are as follows:
1 wafer substrate, 2 cavities, 3 target etching areas, 4 structural layers, 5 first insulating layers, 6 transition layers, 7 second insulating layers, 8 silicon dioxide and 9 vent holes
Detailed Description
The following examples are provided to further illustrate the present invention for better understanding, but the present invention is not limited to the following examples.
Example 1
1-5, a method of etching a cantilever beam on a CSOI, comprising the steps of:
step 1: providing a group of silicon wafers as a first insulating layer 5, and manufacturing a cavity 2 structure on the surface of the first insulating layer 5;
step 2: bonding a composite layer consisting of a transition layer 6 and a second insulating layer 7 on the surface of the first insulating layer 5 to form a wafer substrate 1 together;
and step 3: depositing materials on the surface of the composite layer in sequence to form a structural layer 4;
and 4, step 4: etching the structural layer 4, the second insulating layer 7 and the transition layer 6 from top to bottom at any position in the range of the target etching area 3 to form a plurality of vent holes 9 so as to connect the outside with the cavity 2;
and 5: and carrying out patterning etching on the original target etching area 3 to finally form a target structure.
In other embodiments, the first insulating layer 5 with the structure of the cavity 2 may also be prepared directly.
In this embodiment, the cross-sectional shape of the cavity 2 is a circle, and in other embodiments, the cross-sectional shape of the cavity 2 may be any polygon or ellipse, and may be set as needed.
In this embodiment, the structural layer 4 is a sandwich structural layer 4 formed by an electrode/a piezoelectric material/an electrode, in other embodiments, the structural layer 4 is a mixed layer deposited with any material, or may be a piezoelectric bimorph structural layer 4 formed by an electrode/a piezoelectric material/an electrode, and the configuration is according to actual needs.
In this embodiment, in the step 4, the vent hole may have any shape, and the cavity may be communicated with the atmosphere.
Example 2
As shown in fig. 1 to 6, the present embodiment is different from embodiment 1 in that:
in the step 1, the following operations are further included: the cavity 2 is filled with silicon dioxide 8 until the surface of the cavity is kept flat with the surface of the first insulating layer 5.
The silicon substrate surface of the first insulating layer 5 is flat by pre-burying the silicon dioxide 8, a flat substrate of the first insulating layer 5/the transition layer 6/the second insulating layer 7 is formed after a composite layer is bonded, materials are uniformly deposited on the flat surface, the structural layer 4 is obtained to keep flatness, and the actually processed device can restore the ideal situation to the maximum extent. The pre-buried silicon dioxide 8 is released during etching.
While the foregoing is directed to the preferred embodiment of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
Claims (6)
1. A method for etching a cantilever beam on a CSOI is characterized by comprising the following steps:
step 1: providing a group of silicon wafers as a first insulating layer, and manufacturing a cavity structure on the surface of the first insulating layer;
step 2: bonding a composite layer consisting of a transition layer and a second insulating layer on the surface of the first insulating layer;
and step 3: depositing materials on the surface of the composite layer in sequence to form a structural layer;
and 4, step 4: etching the structural layer, the second insulating layer and the transition layer from top to bottom at any position in the range of the target etching area to form a plurality of vent holes so that the outside is connected with the cavity;
and 5: and carrying out patterning etching on the original target etching area to finally form a target structure.
2. The method of claim 1, wherein the step of etching the cantilever beam on the CSOI comprises: in the step 1, the following operations are further included: and filling silicon dioxide in the cavity until the surface of the first insulating layer is kept flat.
3. The method of claim 1, wherein the step of etching the cantilever beam on the CSOI comprises: in the step 1, the cross section of the cavity is in any polygon, circle or ellipse.
4. The method of claim 1, wherein the step of etching the cantilever beam on the CSOI comprises: in the step 3, the structural layer is a mixed layer for depositing any material.
5. The method of claim 4, wherein the step of etching the cantilever beam on the CSOI comprises: the structural layer is a sandwich structural layer formed by electrodes/piezoelectric materials/electrodes or a piezoelectric bimorph structural layer formed by the electrodes/piezoelectric materials/electrodes.
6. The method of claim 1, wherein the step of etching the cantilever beam on the CSOI comprises: in the step 4, the vent holes are in any shapes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011264661.7A CN112435922A (en) | 2020-11-11 | 2020-11-11 | Method for etching cantilever beam on CSOI |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011264661.7A CN112435922A (en) | 2020-11-11 | 2020-11-11 | Method for etching cantilever beam on CSOI |
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| Publication Number | Publication Date |
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| CN112435922A true CN112435922A (en) | 2021-03-02 |
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| CN202011264661.7A Pending CN112435922A (en) | 2020-11-11 | 2020-11-11 | Method for etching cantilever beam on CSOI |
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Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030032293A1 (en) * | 2001-08-07 | 2003-02-13 | Korean Institute Of Science And Technology | High sensitive micro-cantilever sensor and fabricating method thereof |
| US20040145344A1 (en) * | 2001-10-19 | 2004-07-29 | Bushong William C. | Method and apparatus for regulating charging of electrochemical cells |
| US20050009299A1 (en) * | 2003-03-31 | 2005-01-13 | Takashi Wada | Method of manufacturing a semiconductor device |
| EP1542323A2 (en) * | 2003-11-28 | 2005-06-15 | Dehn + Söhne Gmbh + Co Kg | Overvoltage protection device, based on spark gaps, comprising at least two main electrodes arranged in an enclosed housing |
| JP2006101005A (en) * | 2004-09-28 | 2006-04-13 | Toshiba Corp | Thin-film piezoelectric resonator and manufacturing method thereof, and method for manufacturing high-frequency circuit package body |
| US20070037311A1 (en) * | 2005-08-10 | 2007-02-15 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of microelectromechanical system |
| US20170155038A1 (en) * | 2015-11-30 | 2017-06-01 | Sabic Global Technologies, B.V. | Methods and Systems for Making Piezoelectric Cantilever Actuators |
| CN110602616A (en) * | 2019-08-28 | 2019-12-20 | 武汉大学 | High-sensitivity MEMS piezoelectric microphone |
| CN111174951A (en) * | 2020-01-06 | 2020-05-19 | 武汉大学 | Piezoelectric sensor and preparation method thereof |
-
2020
- 2020-11-11 CN CN202011264661.7A patent/CN112435922A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030032293A1 (en) * | 2001-08-07 | 2003-02-13 | Korean Institute Of Science And Technology | High sensitive micro-cantilever sensor and fabricating method thereof |
| US20040145344A1 (en) * | 2001-10-19 | 2004-07-29 | Bushong William C. | Method and apparatus for regulating charging of electrochemical cells |
| US20050009299A1 (en) * | 2003-03-31 | 2005-01-13 | Takashi Wada | Method of manufacturing a semiconductor device |
| EP1542323A2 (en) * | 2003-11-28 | 2005-06-15 | Dehn + Söhne Gmbh + Co Kg | Overvoltage protection device, based on spark gaps, comprising at least two main electrodes arranged in an enclosed housing |
| JP2006101005A (en) * | 2004-09-28 | 2006-04-13 | Toshiba Corp | Thin-film piezoelectric resonator and manufacturing method thereof, and method for manufacturing high-frequency circuit package body |
| US20070037311A1 (en) * | 2005-08-10 | 2007-02-15 | Semiconductor Energy Laboratory Co., Ltd. | Manufacturing method of microelectromechanical system |
| US20170155038A1 (en) * | 2015-11-30 | 2017-06-01 | Sabic Global Technologies, B.V. | Methods and Systems for Making Piezoelectric Cantilever Actuators |
| CN110602616A (en) * | 2019-08-28 | 2019-12-20 | 武汉大学 | High-sensitivity MEMS piezoelectric microphone |
| CN111174951A (en) * | 2020-01-06 | 2020-05-19 | 武汉大学 | Piezoelectric sensor and preparation method thereof |
Non-Patent Citations (1)
| Title |
|---|
| 何凯旋;黄斌;段宝明;宋东方;郭群英;: "MEMS悬浮结构深反应离子刻蚀保护方法对比研究", 传感技术学报, no. 02, 15 February 2016 (2016-02-15), pages 52 - 57 * |
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