CN112434774B - Demodulation circuit of electronic tag and electronic tag - Google Patents
Demodulation circuit of electronic tag and electronic tag Download PDFInfo
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- CN112434774B CN112434774B CN202011313999.7A CN202011313999A CN112434774B CN 112434774 B CN112434774 B CN 112434774B CN 202011313999 A CN202011313999 A CN 202011313999A CN 112434774 B CN112434774 B CN 112434774B
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- 229910044991 metal oxide Inorganic materials 0.000 description 4
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- 239000004065 semiconductor Substances 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 3
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 239000013256 coordination polymer Substances 0.000 description 2
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Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/06—Clock generators producing several clock signals
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07773—Antenna details
- G06K19/07775—Antenna details the antenna being on-chip
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D30/00—Reducing energy consumption in communication networks
- Y02D30/70—Reducing energy consumption in communication networks in wireless communication networks
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- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computer Networks & Wireless Communication (AREA)
- General Engineering & Computer Science (AREA)
- Near-Field Transmission Systems (AREA)
Abstract
The invention discloses a demodulation circuit of an electronic tag and the electronic tag. The demodulation circuit includes: the device comprises an amplitude modulation module, a modulation depth clamping module, a switch module, a clock detection module and a digital processing module; the control end of the amplitude modulation module is electrically connected with the output end of the digital processing module and is used for receiving the modulation signal output by the digital processing module so as to carry out amplitude modulation on the waveform of the antenna module; the modulation depth clamping module is connected between the amplitude modulation module and the antenna module; the control end of the switch module is electrically connected with the antenna module, the first end of the switch module is electrically connected with the input end of the clock detection module, and the second end of the switch module is connected with a reference signal; the output end of the clock detection module is electrically connected with the input end of the digital processing module, and the clock detection module is used for outputting demodulation signals. The invention realizes that only the instruction groove of the reader-writer is demodulated, and the return modulation of the electronic tag is not demodulated.
Description
Technical Field
The embodiment of the invention relates to an electronic tag technology, in particular to a demodulation circuit of an electronic tag and the electronic tag.
Background
In most of the existing electronic tag low-frequency communication protocols, after the electronic tag finishes powering up in the field of the reader, the electronic tag returns a modulated data frame in a cyclic and reciprocating manner, and the electronic tag stops returning the data frame until an instruction groove sent by the reader is detected, and enters a mode of receiving instructions. This communication scheme is called TTF (Tag Talk First).
In this mode, if the conventional antenna end carrier envelope demodulation mode is used for demodulating the instruction, the instruction of the reader-writer and the return modulation signal of the electronic tag cannot be distinguished, and because the instruction groove of the reader-writer and the return modulation signal of the electronic tag can both enable the waveform of the antenna end to appear in the groove, the waveform can be resolved by the envelope demodulator.
Disclosure of Invention
The invention provides a demodulation circuit of an electronic tag and the electronic tag, which are used for realizing that only an instruction groove of a reader-writer is demodulated, and return modulation of the electronic tag is not demodulated.
In a first aspect, an embodiment of the present invention provides a demodulation circuit of an electronic tag, where the electronic tag includes an antenna module, and the demodulation circuit includes: the device comprises an amplitude modulation module, a modulation depth clamping module, a switch module, a clock detection module and a digital processing module;
The control end of the amplitude modulation module is electrically connected with the output end of the digital processing module and is used for receiving the modulation signal output by the digital processing module so as to carry out amplitude modulation on the waveform of the antenna module;
the modulation depth clamping module is connected between the amplitude modulation module and the antenna module and used for clamping waveforms of the antenna module;
the control end of the switch module is electrically connected with the antenna module, the first end of the switch module is electrically connected with the input end of the clock detection module, and the second end of the switch module is connected with a reference signal;
the input end of the clock detection module is connected with a pull-up level signal, the output end of the clock detection module is electrically connected with the input end of the digital processing module, and the clock detection module is used for outputting a demodulation signal according to the signal input by the input end of the clock detection module;
the output end of the digital processing module is electrically connected with the control end of the amplitude modulation module, and the digital processing module is used for continuously or stopping outputting the modulation signal according to the demodulation signal input by the input end of the digital processing module.
Optionally, the modulation depth clamp module includes a first modulation depth clamp unit; the first end of the first modulation depth clamping unit is electrically connected with the antenna module, the control end of the first modulation depth clamping unit is electrically connected with the first end of the first modulation depth clamping unit, and the second end of the first modulation depth clamping unit is electrically connected with the first end of the amplitude modulation module; and a second end of the amplitude modulation module is connected with the reference signal.
Optionally, the switch module includes a first switch unit; the control end of the first switch unit is electrically connected with the antenna module, the first end of the first switch unit is electrically connected with the input end of the clock detection module, and the second end of the first switch unit is connected with the reference signal.
Optionally, the clock detection module includes a first clock detection unit; the input end of the first clock detection unit is electrically connected with the first output end of the first switch unit, and the output end of the first clock detection unit is electrically connected with the input end of the digital processing module.
Optionally, the antenna module includes a first antenna unit and a second antenna unit with a differential structure; the modulation depth clamping module comprises a first modulation depth clamping unit and a second modulation depth clamping unit; the first end of the first modulation depth clamping unit is electrically connected with the first antenna unit, the control end of the first modulation depth clamping unit is electrically connected with the first end of the first modulation depth clamping unit, and the second end of the first modulation depth clamping unit is electrically connected with the first end of the amplitude modulation module; the first end of the second modulation depth clamp unit is electrically connected with the second antenna unit, the control end of the second modulation depth clamp unit is electrically connected with the first end of the second modulation depth clamp unit, and the third end of the second modulation depth clamp is electrically connected with the second end of the amplitude modulation module.
Optionally, the switch module includes a first switch unit and a second switch unit; the control end of the first switch unit is electrically connected with the first antenna unit, the first end of the first switch unit is electrically connected with the first input end of the clock detection module, and the second end of the first switch unit is electrically connected with the second antenna unit; the control end of the second switch unit is electrically connected with the second antenna unit, the first end of the second switch unit is electrically connected with the second input end of the clock detection module, and the second end of the second switch unit is electrically connected with the first antenna unit.
Optionally, the clock detection module includes a first clock detection unit and a second clock detection unit, an input end of the first clock detection unit is electrically connected with a first end of the first switch unit, and an output end of the first clock detection unit is electrically connected with an input end of the digital processing module; the input end of the second clock detection unit is electrically connected with the first end of the second switch unit, and the output end of the second clock detection unit is electrically connected with the input end of the digital processing module.
Optionally, the demodulation circuit of the electronic tag further includes: a hysteresis module;
the first end of the hysteresis module is electrically connected with the power supply, the second end of the hysteresis module is electrically connected with the input end of the clock detection module, and the control end of the hysteresis module is electrically connected with the output end of the clock detection module and is used for increasing the conducting voltage of the switch module when the control end receives the demodulation signal.
Optionally, the demodulation circuit of the electronic tag further includes: an amplitude clamping module;
the first end of the amplitude clamping module is electrically connected with the antenna module, the second end of the amplitude clamping module is electrically connected with the control end of the switch module, and the third end of the amplitude clamping module is connected with the reference signal for clamping the waveform of the antenna module.
In a second aspect, an embodiment of the present invention further provides an electronic tag, where the electronic tag includes the demodulation circuit of the electronic tag according to the first aspect, and further includes an antenna module.
According to the invention, by setting the amplitude modulation module and the modulation depth clamping module, when the returned modulation signal is at a high level, the amplitude of the waveform of the antenna module is the threshold voltage of the modulation depth clamping module. When the reader-writer does not send the instruction groove and the returned modulation signal is at a high level, the amplitude of the waveform of the antenna module is clamped by the modulation depth clamping module to be the threshold voltage of the modulation depth clamping module, so that the switch module is in a conducting state, and the clock detection module can output a demodulation signal to be at a high level according to the low level signal of the reference signal, so that the demodulation signal at the low level cannot be demodulated when the electronic tag returns to the modulation signal. When the reader sends the instruction groove, no matter the returned modulation signal is high level or low level, the waveform of the antenna module is low level, so that the switch module is in a cut-off state, the clock detection module cannot acquire the reference signal, but acquires the pull-up level signal, and the demodulation signal is output as the low level signal after being overturned by the clock detection module, so that the instruction groove of the reader is demodulated. The problems that the command grooves of the reader-writer and the return modulation signals of the electronic tag can lead the wave forms of the antenna end to be provided with grooves and can be solved by the envelope demodulator are solved, and the effects that only the command grooves are demodulated and the return modulation signals are not demodulated are achieved.
Drawings
Fig. 1 is a schematic diagram of a demodulation circuit of an electronic tag according to the present invention;
fig. 2 is a schematic structural diagram of a demodulation circuit of another electronic tag according to the present invention;
FIG. 3 is a schematic diagram of a clock detection module according to the present invention;
fig. 4 is a schematic structural diagram of a demodulation circuit of another electronic tag according to the present invention;
fig. 5 is a schematic structural diagram of an electronic tag according to the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Fig. 1 is a schematic structural diagram of a demodulation circuit of an electronic tag according to an embodiment of the present invention, where the embodiment is applicable to a signal demodulation situation of the electronic tag, and referring to fig. 1, the electronic tag includes an antenna module, and the demodulation circuit of the electronic tag includes: an amplitude modulation module 110, a modulation depth clamp module 120, a switch module 130, a clock detection module 140, and a digital processing module 150; the control end A1 of the amplitude modulation module 110 is electrically connected to the output end B1 of the digital processing module, and is configured to receive the modulated signal output by the digital processing module 150 to perform amplitude modulation on the waveform of the antenna module 200; the modulation depth clamping module 120 is connected between the amplitude modulation module 110 and the antenna module 200, and is used for clamping waveforms of the antenna module 200; the control end C1 of the switch module 130 is electrically connected with the antenna module 200, the first end C2 of the switch module 130 is electrically connected with the input end D1 of the clock detection module 140, and the second end C3 of the switch module 130 is connected with a reference signal; the input end D1 of the clock detection module 140 is connected to the pull-up level signal 301, the output end D2 of the clock detection module 140 is electrically connected to the input end B2 of the digital processing module 150, and the clock detection module 140 is configured to output a demodulation signal according to a signal input by the input end thereof; the output terminal B1 of the digital processing module 150 is electrically connected to the control terminal A1 of the amplitude modulation module 110, and the digital processing module 150 is configured to continuously or stop outputting the modulated signal according to the demodulation signal input at the input terminal B2 thereof.
Wherein, the electronic tag is also called radio frequency tag, transponder or data carrier; the electronic tag and the reader-writer realize the space (non-contact) coupling of radio frequency signals through a coupling element; and in the coupling channel, energy transmission and data exchange are realized according to the time sequence relation. The amplitude modulation module 110 is configured to receive a return modulation signal of the electronic tag, perform amplitude modulation on a waveform of the antenna module 200 according to the return modulation signal, where the amplitude modulation module 110 may be, for example, a transistor, and when the return modulation signal is at a low level, the amplitude modulation module 110 is in an off state and does not perform amplitude modulation on a waveform of the antenna end, and when the return modulation signal is at a high level, the amplitude modulation module 110 is in an on state and performs amplitude modulation on the waveform of the antenna end. The modulation depth clamp module 120 may clamp the waveform of the antenna module 200, the modulation depth clamp module 120 may be a transistor, for example, when the returned modulation signal is at a high level, the amplitude modulation module 110 is in a conducting state, and since the control terminal and the first terminal of the modulation depth clamp module 120 are electrically connected to the antenna module 200, the modulation depth clamp module 120 is conducted only when the waveform of the antenna module 200 is greater than the threshold voltage of the modulation depth clamp module 120, so that the amplitude of the waveform of the antenna module 200 is clamped at the threshold voltage of the modulation depth clamp module 120. So that the amplitude of the waveform of the antenna module 200 is the threshold voltage of the modulation depth clamp module 120 when the returned modulation signal is high. When the returned modulated signal is low, the antenna module 200 waveform is a high signal.
The switch module 130 is turned on when the waveform of the antenna module 200 is at a high level, and turned off when the waveform of the antenna module 200 is at a low level. And the voltage required when the switching module 130 is on is less than the threshold voltage of the modulation depth clamp module 120. When the switch module 130 is in a conducting state, the input end of the clock detection module 140 is pulled down to be at a low level by the reference signal 160, for example, the reference signal 160 is grounded, at this time, the input end of the clock detection module 140 inputs a low level signal, the output end of the clock detection module 140 can output a demodulation signal at a first level at this time, when the digital processing module 150 receives the demodulation signal at the first level, it is determined that the waveform voltage of the antenna module 200 is higher, that is, no instruction groove exists, and the digital processing module 150 can continuously output the modulation signal, so that the electronic tag sends data to the reader-writer through the antenna module 200; when the switch module 130 is in the off state, the input end of the clock detection module 140 is a pull-up level signal 301, and the pull-up level signal 301 is, for example, a high level signal, and the pull-up level signal 301 may be, for example, implemented by a P-type MOS transistor (metal oxide semiconductor (metal oxide semiconductor, MOS)) pulled up to a power supply through a pull-up current source, and the pull-up level signal 301 may also be implemented by other ways, which are not limited herein. At this time, the voltage at the input end of the clock detection module 140 is pulled up, the output end of the clock detection module 140 outputs a demodulation signal of the second level, the digital processing module receives the demodulation signal of the second level, and determines that the waveform voltage of the antenna module is lower at this time, that is, it is possible that the reader-writer sends the instruction groove, at this time, the digital processing module 150 stops outputting the modulation signal, so as to prevent the waveform of the modulation signal on the antenna module 200 from interfering with the analysis instruction groove. The first level and the second level are opposite in polarity, for example, the first level is a high level, the second level is a low level, or the first level may be a low level, and the second level may be a high level.
Specifically, when the reader/writer does not send the command slot and the returned modulation signal is at a high level, the amplitude of the waveform of the antenna module 200 is clamped by the modulation depth clamping module 120 to be the threshold voltage of the modulation depth clamping module 120, so that the switch module 130 is in a conductive state, and the clock detection module 140 can output the demodulation signal as a high level according to the low level signal of the reference signal 160. When the reader/writer does not transmit the command slot and the returned modulation signal is at a low level, the waveform of the antenna module 200 is at a high level, so that the switch module 130 is in a conductive state, and the clock detection module 140 may output the demodulation signal as a high level according to the low level signal of the reference signal 160. When the reader/writer sends the command slot, no matter the returned modulation signal is high level or low level, the waveform of the antenna module 200 is low level, so that the switch module 130 is in the cut-off state, the clock detection module 140 cannot acquire the reference signal 160, but acquires the pull-up level signal 301, the demodulation signal is output as the low level signal after being turned over by the clock detection module 140, at this time, the digital processing module stops outputting the modulation signal, and the waveform of the modulation signal on the antenna module is prevented from interfering the analysis command slot, so as to demodulate the command slot of the reader/writer. The effect of demodulating only the instruction groove and not the return modem is achieved.
According to the technical scheme, the amplitude modulation module and the modulation depth clamping module are arranged, so that when a returned modulation signal is at a high level, the amplitude of the waveform of the antenna module is the threshold voltage of the modulation depth clamping module. When the reader-writer does not send the instruction groove and the returned modulation signal is at a high level, the amplitude of the waveform of the antenna module is clamped by the modulation depth clamping module to be the threshold voltage of the modulation depth clamping module, so that the switch module is in a conducting state, and the clock detection module can output a demodulation signal to be at a high level according to the low level signal of the reference signal, so that the demodulation signal at the low level cannot be demodulated when the electronic tag returns to the modulation signal. When the reader-writer sends the command groove, no matter the returned modulation signal is high level or low level, the waveform of the antenna module is low level, so that the switch module is in a cut-off state, the clock detection module cannot acquire the reference signal, but acquires the pull-up high level signal 301, the demodulation signal is output as the low level signal after being overturned by the clock detection module, and at the moment, the digital processing module stops outputting the modulation signal, and the waveform of the modulation signal on the antenna module is prevented from interfering the analysis command groove, so that the command groove of the reader-writer is demodulated. The problems that the command grooves of the reader-writer and the return modulation signals of the electronic tag can lead the wave forms of the antenna end to be provided with grooves and can be solved by the envelope demodulator are solved, and the effects that only the command grooves are demodulated and the return modulation signals are not demodulated are achieved.
Optionally, fig. 2 is a schematic structural diagram of a demodulation circuit of another electronic tag according to an embodiment of the present invention, referring to fig. 2, a modulation depth clamping module 120 includes a first modulation depth clamping unit 121; the first end E1 of the first modulation depth clamping unit 121 is electrically connected to the antenna module 200, the control end E2 of the first modulation depth clamping unit 121 is electrically connected to the first end E1 of the first modulation depth clamping unit 121, and the second end E3 of the first modulation depth clamping unit 121 is electrically connected to the first end A2 of the amplitude modulation module 110; a second end of the amplitude modulation module 110 accesses the reference signal 160.
The modulation depth clamping module 120 may include a first modulation depth clamping unit 121, and the first modulation depth clamping unit 121 may be, for example, a MOS transistor, and when the returned modulation signal is at a high level, the first modulation depth clamping unit 121 is in a conductive state, and since the control terminal and the first terminal of the first modulation depth clamping unit 121 are electrically connected to the antenna module 200, the first modulation depth clamping unit is only turned on when the waveform of the antenna module 200 is greater than the threshold voltage of the first modulation depth clamping unit, so that the amplitude of the waveform of the antenna module 200 is clamped at the threshold voltage of the first modulation depth clamping unit. So that the amplitude of the waveform of the antenna module 200 is the threshold voltage of the first modulation depth clamp unit when the returned modulation signal is high.
Alternatively, referring to fig. 2, the switching module 130 includes a first switching unit 131; the control end of the first switching unit 131 is electrically connected to the antenna module 200, the first end of the first switching unit 131 is electrically connected to the input end D1 of the clock detection module 140, and the second end of the first switching unit 131 is connected to the reference signal 160.
Specifically, the switch module 130 may include a first switch unit 131, where the first switch unit 131 may be, for example, a MOS transistor, and the first switch unit 131 is turned on when the waveform of the antenna module 200 is at a high level and turned off when the waveform of the antenna module 200 is at a low level. And the voltage required when the first switching unit 131 is turned on is less than the threshold voltage of the modulation depth clamp module 120. When the first switching unit 131 is in the on state, the clock detection module 140 may output the demodulation signal to a high level according to the low level signal of the reference signal 160. When the return modulation signal is at a high level, the groove signal cannot be demodulated, and the effect of not demodulating the return modulation signal is achieved. By way of example, the reference signal 160 may be ground.
When the reader/writer does not transmit the command groove and the returned modulation signal is at a high level, the amplitude of the waveform of the antenna module 200 is clamped by the modulation depth clamp module 120 to the threshold voltage of the modulation depth clamp module 120, so that the first switch unit 131 is in a conductive state, and the clock detection module 140 can output the demodulation signal as a high level according to the low level signal of the reference signal 160. When the reader/writer does not transmit the command groove and the returned modulation signal is low, the waveform of the antenna module 200 is high, so that the first switch unit 131 is in a conductive state, and the clock detection module 140 may output the demodulation signal as high according to the low signal of the reference signal 160. When the reader/writer sends the command slot, no matter the returned modulation signal is high level or low level, the waveform of the antenna module 200 is low level, so that the switch module 130 is in the cut-off state, the clock detection module 140 cannot acquire the reference signal 160, but acquires the pull-up level signal 301, the demodulation signal is output as the low level signal after being turned over by the clock detection module 140, at this time, the digital processing module stops outputting the modulation signal, and the waveform of the modulation signal on the antenna module is prevented from interfering the analysis command slot, so as to demodulate the command slot of the reader/writer. The effect of demodulating only the instruction groove and not the return modem is achieved.
Optionally, referring to fig. 2, the clock detection module 140 includes a first clock detection unit 141; an input terminal of the first clock detection unit 141 is electrically connected to a first output terminal of the first switching unit 131, and an output terminal of the first clock detection unit 141 is electrically connected to an input terminal B2 of the digital processing module 150.
Specifically, the clock detection module 140 includes a first clock detection unit 141, referring to fig. 3, fig. 3 is a schematic structural diagram of a clock detection module provided by the present invention, where the first clock detection unit 141 includes at least one flip-flop, when the waveform of the antenna module 200 is at a high level, the switch module 130 is turned on, so that the input terminal of the clock detection module 140 is at a low level, the outputs Q of the TFF flip-flop and the DFF flip-flop are set to 0, and the demodulation signal is at a high level. When the waveform of the antenna module 200 is at a low level, the switch module 130 is turned off, the input terminal of the clock detection module 140 is at a high level, the TFF flip-flop and the DFF flip-flop start to operate normally, and the count clock 143 is divided by the TFF flip-flops of multiple stages and transferred to the subsequent stage. If the input of the clock detection module 140 remains at the high level for a period of time exceeding the preset time Toff, so that the D terminal remains at the high level when the rising edge occurs at the CP terminal of the DFF flip-flop, the demodulation signal is turned to the low level, thereby demodulating the command slot. The length of Toff is determined by the frequency of the count clock 143 and the number of stages of the TFF flip-flop. If the input of the clock detection block 140 remains high for less than Toff, the CP of the DFF flip-flop has been reset to 0 just before the rising edge, and the demodulation signal remains high. The digital processing module 150 maintains the mode of cycling back to the data frame in the TTF mode when a low level of the demodulation signal is not received. When the low level of the first demodulated signal is received, the digital processing module 150 immediately stops returning the data frame. When the first low level of the demodulation signal jumps back to the high level, the digital processing module 150 starts to cycle back to the synchronous modulation signal according to the code rate of the instruction, which is characterized in that the instruction slot partially coincides with the high level of the synchronous modulation signal. The first switching unit 131 is turned on when the waveform of the antenna module 200 is at a high level and turned off when the waveform of the antenna module 200 is at a low level. And the voltage required when the first switching unit 131 is turned on is less than the threshold voltage of the modulation depth clamp module 120. When the first switch unit 131 is in the on state, the first clock detection unit 141 may acquire the low level signal of the reference signal 160, and through the first clock detection unit 141, the signal is turned to be a high level signal, and the demodulated signal may be output as a high level signal.
When the reader/writer does not transmit the command groove and the returned modulation signal is at a high level, the amplitude of the waveform of the antenna module 200 is clamped by the modulation depth clamp module 120 to the threshold voltage of the modulation depth clamp module 120, so that the first switch unit 131 is in a conductive state, and the first clock detection unit 141 may output the demodulation signal as a high level according to the low level signal of the reference signal 160. When the reader/writer does not transmit the command groove and the returned modulation signal is low, the waveform of the antenna module 200 is high, so that the first switch unit 131 is in a conductive state, and the first clock detection unit 141 may output the demodulation signal as high according to the low signal of the reference signal 160. When the reader/writer sends the command slot, the waveform of the antenna module 200 is low no matter the returned modulation signal is high or low, so that the switch module 130 is in the off state, the first clock detection unit 141 cannot acquire the reference signal 160, but acquires the pull-up level signal, and the demodulation signal is output as the low level signal after being turned over by the first clock detection unit 141, so as to demodulate the command slot of the reader/writer. The effect of demodulating only the instruction groove and not the return modem is achieved.
Optionally, referring to fig. 4, fig. 4 is a schematic structural diagram of a demodulation circuit of another electronic tag according to an embodiment of the present invention, where the antenna module 200 includes a first antenna unit 210 and a second antenna unit 220 with a differential structure; the modulation depth clamp module 120 includes a first modulation depth clamp unit 121 and a second modulation depth clamp unit 122; a first end of the first modulation depth clamping unit 121 is electrically connected to the first antenna unit 210, a control end of the first modulation depth clamping unit 121 is electrically connected to the first end of the first modulation depth clamping unit 121, and a second end of the first modulation depth clamping unit 121 is electrically connected to the first end of the amplitude modulation module 110; the first end of the second modulation depth clamp unit 122 is connected to the second antenna unit 220, the control end of the second modulation depth clamp unit 122 is electrically connected to the first end of the second modulation depth clamp unit 122, and the third end of the second modulation depth clamp 122 is electrically connected to the second end of the amplitude modulation module 110.
The modulation depth clamp module 120 may include a first modulation depth clamp unit 121 and a second modulation depth clamp unit 122, and the first modulation depth clamp unit 121 and the second modulation depth clamp unit 122 may be, for example, MOS transistors (metal oxide semiconductor (metal oxide semiconductor, MOS)). When the returned modulation signal is at a high level, the first modulation depth clamp unit 121 is in an on state, and since both the control terminal and the first terminal of the first modulation depth clamp unit 121 are electrically connected to the first antenna unit 210, the first modulation depth clamp unit 121 is turned on only when the waveform of the first antenna unit 210 is greater than the threshold voltage of the first modulation depth clamp unit, thus clamping the amplitude of the waveform of the first antenna unit 210 at the threshold voltage of the first modulation depth clamp unit. So that the amplitude of the waveform of the first antenna element 210 is the threshold voltage of the first modulation depth clamp element when the returned modulation signal is high. When the returned modulation signal is at a high level, the second modulation depth clamp unit 122 is in an on state, and since the control terminal and the first terminal of the second modulation depth clamp unit 122 are both electrically connected to the second antenna unit 220, the second modulation depth clamp unit 122 is turned on only when the waveform of the second antenna unit 220 is greater than the threshold voltage of the second modulation depth clamp unit 122, so that the amplitude of the waveform of the second antenna unit 220 is clamped at the threshold voltage of the second modulation depth clamp unit 122. So that the amplitude of the waveform of the second antenna element 220 is the threshold voltage of the second modulation depth clamp unit 122 when the returned modulation signal is at a high level. Therefore, when the return modulation signal is at a high level, the groove signal is not demodulated, and the effect of not demodulating the return modulation signal is achieved.
Alternatively, referring to fig. 4, the switching module 130 includes a first switching unit 131 and a second switching unit 132; the control end of the first switch unit 131 is electrically connected to the first antenna unit 210, the first end of the first switch unit 131 is electrically connected to the first input end of the clock detection module 140, and the second end of the first switch unit 131 is electrically connected to the second antenna unit 220; the control end of the second switch unit is electrically connected to the second antenna unit 220, the first end of the second switch unit 132 is electrically connected to the second input end of the clock detection module 140, and the second end of the second switch unit 132 is electrically connected to the first antenna unit 210.
Specifically, the switch module 130 includes a first switch unit 131 and a second switch unit 132, and the first switch unit 131 and the second switch unit 132 may be, for example, MOS transistors. The first switching unit 131 is turned on when the waveform of the first antenna unit 210 is at a high level, and turned off when the waveform of the first antenna unit 210 is at a low level. And the voltage required when the first switching unit 131 is turned on is less than the threshold voltage of the modulation depth clamp module 120. When the first switching unit 131 is in the on state, the clock detection module 140 may output the demodulation signal to a high level according to the low level signal of the second antenna unit 220. The second switching unit 132 is turned on when the waveform of the second antenna unit 220 is at a high level, and turned off when the waveform of the second antenna unit 220 is at a low level. And the voltage required when the second switching unit 132 is turned on is less than the threshold voltage of the modulation depth clamp module 120. When the second switching unit 132 is in the on state, the clock detection module 140 may output the demodulation signal to a high level according to the low level signal of the first antenna unit 210. When the return modulation signal is at a high level, the groove signal is not demodulated, and the effect of not demodulating the return modulation signal is achieved.
Alternatively, referring to fig. 4, the clock detection module 140 includes a first clock detection unit 141 and a second clock detection unit 142, an input terminal of the first clock detection unit 141 is electrically connected to a first terminal of the first switching unit 131, and an output terminal of the first clock detection unit 141 is electrically connected to an input terminal of the digital processing module 150; an input terminal of the second clock detection unit 142 is electrically connected to the first terminal of the second switch unit 132, and an output terminal of the second clock detection unit 142 is electrically connected to an input terminal of the digital processing module 150.
Specifically, the clock detection module 140 includes a first clock detection unit 141 and a second clock detection unit 142, where the first clock detection unit 141 includes at least one flip-flop, and the second clock detection unit 142 includes at least one flip-flop. The first switching unit 131 is turned on when the waveform of the first antenna unit 210 is at a high level, and turned off when the waveform of the antenna module 200 is at a low level. And the voltage required when the first switching unit 131 is turned on is less than the threshold voltage of the modulation depth clamp module 120. When the first switch unit 131 is in the on state, the first clock detection unit 141 may acquire the low level signal of the second antenna unit 220, and the signal is turned to the high level signal through the first clock detection unit 141, so as to output the demodulated signal as the high level signal. The second switching unit 132 is turned on when the waveform of the second antenna unit 220 is at a high level, and turned off when the waveform of the second antenna unit 220 is at a low level. And the voltage required when the second switching unit 132 is turned on is less than the threshold voltage of the modulation depth clamp module 120. When the second switch unit 132 is in the on state, the second clock detection unit 142 may obtain the low level signal of the first antenna unit 210, and through the second clock detection unit 142, the signal is inverted to the high level signal, i.e. the demodulated signal is output as the high level signal. When the return modulation signal is at a high level, the groove signal is not demodulated, and the effect of not demodulating the return modulation signal is achieved.
Optionally, referring to fig. 2 and 4, the demodulation circuit of the electronic tag further includes a hysteresis module 170; the first end of the hysteresis module 170 is electrically connected to the power supply 300, the second end of the hysteresis module 170 is electrically connected to the input end of the clock detection module 140, and the control end of the hysteresis module 170 is electrically connected to the output end of the clock detection module 140, so as to increase the turn-on voltage of the switch module when the control end receives the demodulation signal.
For example, referring to fig. 2, the hysteresis module 170 includes a first hysteresis current 171 and a first hysteresis unit 172. A first end of the first hysteresis current 171 is electrically connected to the power supply 300, a second end of the first hysteresis current 171 is electrically connected to a first end of the first hysteresis unit 172, a control end of the first hysteresis unit 172 is electrically connected to an output end of the clock detection module 140, and a second end of the first hysteresis unit 172 is electrically connected to a second end of the clock detection module. When the reader/writer sends the command slot, the waveform of the first antenna unit 210 is low no matter the returned modulation signal is high or low, so that the switch module 130 is in the off state, the clock detection module 140 cannot acquire the second antenna unit 220, and the clock detection module 140 acquires the high signal of the pull-up level signal 301, so that the output demodulation signal is low. The first hysteresis unit 172 may be, for example, a P-type transistor, when the demodulation signal is at a low level, the first hysteresis unit 172 is turned on, the first hysteresis current 171 is turned on, and hysteresis is added, so that the switch module 130 needs a higher voltage to be turned on, misconduction of noise to the switch module 130 is inhibited, and when the reader/writer sends the instruction groove, the demodulation signal is at a low level, thereby demodulating the instruction signal.
It should be noted that, the power supply 300 may supply power to all the modules, and all the modules need to be grounded.
For example, referring to fig. 4, the hysteresis module 170 includes a first hysteresis current 171, a first hysteresis unit 172, a second hysteresis current 174, and a second hysteresis unit 175. A first end of the first hysteresis current 171 is electrically connected to the power supply 300, a second end of the first hysteresis current 171 is electrically connected to a first end of the first hysteresis unit 172, a control end of the first hysteresis unit 172 is electrically connected to an output end of the first clock detection unit 141, and a second end of the first hysteresis unit 172 is electrically connected to a second end of the first clock detection unit 141. The first end of the second hysteresis current 174 is electrically connected to the power supply 300, the second end of the second hysteresis current 174 is electrically connected to the first end of the second hysteresis unit 175, the control end of the second hysteresis unit 175 is electrically connected to the output end of the second clock detection unit 142, and the second end of the second hysteresis unit 175 is electrically connected to the second end of the second clock detection unit 142. When the reader/writer sends the command slot, the waveform of the first antenna unit 210 is low no matter the returned modulation signal is high or low, so that the switch module 130 is in the off state, the clock detection module 140 cannot acquire the second antenna unit 220, and the clock detection module 140 acquires the high signal of the pull-up level signal 301, so that the output demodulation signal is low. The first hysteresis unit 172 may be, for example, a P-type transistor, when the demodulation signal is at a low level, the first hysteresis unit 172 is turned on, the first hysteresis current 171 is turned on, and hysteresis is added, so that the switch module 130 needs a higher voltage to be turned on, misconduction of noise to the switch module 130 is inhibited, and when the reader/writer sends the instruction groove, the demodulation signal is at a low level, thereby demodulating the instruction signal.
Optionally, referring to fig. 2 and 4, the demodulation circuit of the electronic tag further includes an amplitude clamping module 180; the first end of the amplitude clamping module 180 is electrically connected with the antenna module 200, the second end of the amplitude clamping module 180 is electrically connected with the control end of the switch module, and the third end of the amplitude clamping module is connected with a reference signal for clamping waveforms of the antenna module.
For example, referring to fig. 2, the amplitude clamping module 180 includes a first resistor R1 and a first amplitude clamping unit 181, a first end of the first resistor R1 is electrically connected to the antenna module 200, and a second end of the first resistor R1 is electrically connected to a control end of the first amplitude clamping unit 181. A first end of the first amplitude clamping unit 181 is electrically connected to the control end of the first amplitude clamping unit 181, and a second end of the first amplitude clamping unit 181 is electrically connected to the reference signal 160. The reference signal 160 may be, for example, ground. The first resistor R1 may clip the waveform of the antenna module 200, and protect the first amplitude clamping unit 181 from breakdown due to an excessively high input voltage, and the first amplitude clamping unit 181 may be, for example, a transistor, and may clamp the waveform of the antenna module 200, so that the amplitude of the waveform of the antenna module 200 is limited above the conduction threshold of the first amplitude clamping unit 181, so that the switch module 130 may be turned on.
For example, referring to fig. 4, the amplitude clamping module 180 includes a first resistor R1, a first amplitude clamping unit 181, a second resistor R2, and a second amplitude clamping unit 182. A first end of the first resistor R1 is electrically connected to the first antenna unit 210, and a second end of the first resistor R1 is electrically connected to the control end of the first amplitude clamping unit 181. The first end of the first amplitude clamping unit 181 is electrically connected to the control end of the first amplitude clamping unit 181, and the second end of the first amplitude clamping unit 181 is grounded. The first end of the second resistor R2 is electrically connected to the second antenna unit 220, and the second end of the second resistor R2 is electrically connected to the control end of the second amplitude clamping unit 182. The first end of the second amplitude clamping unit 182 is electrically connected to the control end of the second amplitude clamping unit 182, and the second end of the second amplitude clamping unit 182 is grounded. The second antenna unit 220 may be, for example, a second antenna module. The first resistor R1 may clip the waveform of the first antenna unit 210, and protect the first amplitude clamping unit 181 from breakdown due to an excessively high input voltage, and the first amplitude clamping unit 181 may be, for example, a transistor, and may clamp the waveform of the first antenna unit 210, and limit the waveform amplitude of the first antenna unit 210 above the conduction threshold of the first amplitude clamping unit 181, so that the switch module 130 may be turned on. The second resistor R2 may clip the waveform of the second antenna unit 220, and protect the second amplitude clamping unit 182 from breakdown due to an excessively high input voltage, and the second amplitude clamping unit 182 may be, for example, a transistor, and may clamp the waveform of the second antenna unit 220, and limit the waveform amplitude of the second antenna unit 220 above the conduction threshold of the second amplitude clamping unit 182, so that the switch module 130 may be turned on.
Optionally, referring to fig. 2 and 4, the demodulation circuit of the electronic tag further includes a buffer module 190. A first end of the buffer module 190 is electrically connected to a first end of the switch module 130, and a second end of the buffer module 190 is electrically connected to an input end of the clock detection module 140.
Illustratively, referring to fig. 2, the buffer module 190 includes a first buffer 191, a first end of the first buffer 191 is electrically connected to a first end of the first switching unit 131 of the switching module 130, and a second end of the first buffer 191 is electrically connected to an input end of the first clock detection unit 141 of the clock detection module 140. The first buffer 191 may shape the obtained reference signal to obtain a clock signal.
Illustratively, referring to fig. 4, the buffer module 190 includes a first buffer 191 and a second buffer 192, a first end of the first buffer 191 is electrically connected to a first end of the first switching unit 131 of the switching module 130, and a second end of the first buffer 191 is electrically connected to an input of the first clock detection unit 141 of the clock detection module 140. A first end of the second buffer 192 is electrically connected to a first end of the second switching unit 132 of the switching module 130, and a second end of the second buffer 192 is electrically connected to an input end of the second clock detection unit 142 of the clock detection module 140. The first buffer 191 and the second buffer 192 may shape the obtained reference signal to obtain a clock signal.
Optionally, referring to fig. 2 and 4, the demodulation circuit of the electronic tag further includes a rectifying circuit 400. Referring to fig. 2, a first end of the rectifying circuit 400 is electrically connected to the antenna module 200, a second end of the rectifying circuit 400 is electrically connected to the power source 300, and a third end of the rectifying circuit 400 is connected to the reference signal 160. Referring to fig. 4, a first end of the rectifying circuit 400 is electrically connected to the antenna module 200, a second end of the rectifying circuit 400 is electrically connected to the power source 300, a third end of the rectifying circuit 400 is connected to the reference signal 160, and a fourth end of the rectifying circuit 400 is grounded.
Specifically, the rectifier circuit is a circuit that converts ac power into dc power, and can convert ac power with a low voltage output from the ac voltage-reducing circuit into unidirectional pulsating dc power, so that the rectifier circuit 400 can convert a power supply signal into a pulse signal with a high level and a low level.
According to the technical scheme, the amplitude modulation module and the modulation depth clamping module are arranged, so that when a returned modulation signal is at a high level, the amplitude of the waveform of the antenna module is the threshold voltage of the modulation depth clamping module. When the reader-writer does not send the instruction groove and the returned modulation signal is at a high level, the amplitude of the waveform of the antenna module is clamped by the modulation depth clamping module to be the threshold voltage of the modulation depth clamping module, so that the switch module is in a conducting state, and the clock detection module can output a demodulation signal to be at a high level according to the low level signal of the reference signal, so that the demodulation signal at the low level cannot be demodulated when the electronic tag returns to the modulation signal. When the reader sends the instruction groove, no matter the returned modulation signal is high level or low level, the waveform of the antenna module is low level, so that the switch module is in a cut-off state, the clock detection module cannot acquire the reference signal, but acquires the pull-up level signal, and the demodulation signal is output as the low level signal after being overturned by the clock detection module, so that the instruction groove of the reader is demodulated. The problems that the command grooves of the reader-writer and the return modulation signals of the electronic tag can lead the wave forms of the antenna end to be provided with grooves and can be solved by the envelope demodulator are solved, and the effects that only the command grooves are demodulated and the return modulation signals are not demodulated are achieved.
Fig. 5 is a schematic structural diagram of an electronic tag according to an embodiment of the present invention, where the embodiment is applicable to signal demodulation of the electronic tag, and referring to fig. 5, the demodulation circuit 100 of the electronic tag according to any of the foregoing embodiments of the electronic tag further includes a first antenna unit 210 and a second antenna unit 220.
By providing the demodulation circuit 100 of the electronic tag, when the reader/writer does not transmit the instruction groove and the returned modulation signal is at a high level, the demodulation circuit 100 of the electronic tag outputs the demodulation signal at a high level. When the reader/writer does not transmit the instruction groove and the returned modulation signal is at a low level, the demodulation circuit 100 of the electronic tag outputs a demodulation signal at a high level. When the reader/writer transmits the instruction groove, the demodulation circuit 100 of the electronic tag outputs a demodulation signal as a low level signal regardless of whether the returned modulation signal is a high level or a low level, thereby demodulating the instruction groove of the reader/writer. The method realizes that the low-level demodulation signal can be demodulated only when the reader sends the instruction groove, and the low-level demodulation signal can not be demodulated when the electronic tag returns the modulation signal. The effect of demodulating only the instruction groove and not the return modem is achieved.
The electronic tag provided in this embodiment includes the demodulation circuit of the electronic tag in the above embodiment, and the implementation principle and the technical effect of the electronic tag provided in this embodiment are similar to those of the above embodiment, and are not repeated here.
Note that the above is only a preferred embodiment of the present invention and the technical principle applied. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, while the invention has been described in connection with the above embodiments, the invention is not limited to the embodiments, but may be embodied in many other equivalent forms without departing from the spirit or scope of the invention, which is set forth in the following claims.
Claims (10)
1. A demodulation circuit of an electronic tag, the electronic tag including an antenna module, the demodulation circuit comprising: the device comprises an amplitude modulation module, a modulation depth clamping module, a switch module, a clock detection module and a digital processing module;
the control end of the amplitude modulation module is electrically connected with the output end of the digital processing module and is used for receiving the modulation signal output by the digital processing module so as to carry out amplitude modulation on the waveform of the antenna module;
The modulation depth clamping module is connected between the amplitude modulation module and the antenna module and used for clamping waveforms of the antenna module;
the control end of the switch module is electrically connected with the antenna module, the first end of the switch module is electrically connected with the input end of the clock detection module, and the second end of the switch module is connected with a reference signal;
the input end of the clock detection module is connected with a pull-up level signal, the output end of the clock detection module is electrically connected with the input end of the digital processing module, and the clock detection module is used for outputting a demodulation signal according to the signal input by the input end of the clock detection module;
the output end of the digital processing module is electrically connected with the control end of the amplitude modulation module, and the digital processing module is used for continuously or stopping outputting the modulation signal according to the demodulation signal input by the input end of the digital processing module.
2. The demodulation circuit of an electronic tag as recited in claim 1, wherein the modulation depth clamp module comprises a first modulation depth clamp unit; the first end of the first modulation depth clamping unit is electrically connected with the antenna module, the control end of the first modulation depth clamping unit is electrically connected with the first end of the first modulation depth clamping unit, and the second end of the first modulation depth clamping unit is electrically connected with the first end of the amplitude modulation module; and a second end of the amplitude modulation module is connected with the reference signal.
3. The demodulation circuit of an electronic tag as recited in claim 2, wherein the switching module comprises a first switching unit; the control end of the first switch unit is electrically connected with the antenna module, the first end of the first switch unit is electrically connected with the input end of the clock detection module, and the second end of the first switch unit is connected with the reference signal.
4. A demodulation circuit of an electronic tag as claimed in claim 3, wherein the clock detection module comprises a first clock detection unit; the input end of the first clock detection unit is electrically connected with the first output end of the first switch unit, and the output end of the first clock detection unit is electrically connected with the input end of the digital processing module.
5. The demodulation circuit of an electronic tag as recited in claim 1, wherein the antenna module comprises a first antenna element and a second antenna element of differential structure; the modulation depth clamping module comprises a first modulation depth clamping unit and a second modulation depth clamping unit; the first end of the first modulation depth clamping unit is electrically connected with the first antenna unit, the control end of the first modulation depth clamping unit is electrically connected with the first end of the first modulation depth clamping unit, and the second end of the first modulation depth clamping unit is electrically connected with the first end of the amplitude modulation module; the first end of the second modulation depth clamp unit is electrically connected with the second antenna unit, the control end of the second modulation depth clamp unit is electrically connected with the first end of the second modulation depth clamp unit, and the third end of the second modulation depth clamp is electrically connected with the second end of the amplitude modulation module.
6. The demodulation circuit of an electronic tag as recited in claim 5, wherein the switching module comprises a first switching unit and a second switching unit; the control end of the first switch unit is electrically connected with the first antenna unit, the first end of the first switch unit is electrically connected with the first input end of the clock detection module, and the second end of the first switch unit is electrically connected with the second antenna unit; the control end of the second switch unit is electrically connected with the second antenna unit, the first end of the second switch unit is electrically connected with the second input end of the clock detection module, and the second end of the second switch unit is electrically connected with the first antenna unit.
7. The demodulation circuit of the electronic tag according to claim 6, wherein the clock detection module comprises a first clock detection unit and a second clock detection unit, an input end of the first clock detection unit is electrically connected with a first end of the first switch unit, and an output end of the first clock detection unit is electrically connected with an input end of the digital processing module; the input end of the second clock detection unit is electrically connected with the first end of the second switch unit, and the output end of the second clock detection unit is electrically connected with the input end of the digital processing module.
8. The demodulation circuit of an electronic tag as recited in claim 1, further comprising: a hysteresis module;
the first end of the hysteresis module is electrically connected with the power supply, the second end of the hysteresis module is electrically connected with the input end of the clock detection module, and the control end of the hysteresis module is electrically connected with the output end of the clock detection module and is used for increasing the conducting voltage of the switch module when the control end receives the demodulation signal.
9. The demodulation circuit of an electronic tag as recited in claim 1, further comprising: an amplitude clamping module;
the first end of the amplitude clamping module is electrically connected with the antenna module, the second end of the amplitude clamping module is electrically connected with the control end of the switch module, and the third end of the amplitude clamping module is connected with the reference signal for clamping the waveform of the antenna module.
10. An electronic tag, characterized by comprising the demodulation circuit of the electronic tag according to any one of claims 1-9, and further comprising an antenna module.
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| CN202011313999.7A CN112434774B (en) | 2020-11-20 | 2020-11-20 | Demodulation circuit of electronic tag and electronic tag |
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| CN202011313999.7A CN112434774B (en) | 2020-11-20 | 2020-11-20 | Demodulation circuit of electronic tag and electronic tag |
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| CN112434774B true CN112434774B (en) | 2023-10-31 |
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