CN112421575A

CN112421575A - Electromagnetic stirring variable frequency power supply fault shutdown protection method and device

Info

Publication number: CN112421575A
Application number: CN202011145303.4A
Authority: CN
Inventors: 汪亮; 邹志强; 唐赛; 朱晶亮; 肖红; 陈浪; 刘勇; 付昊东; 王文宇; 袁鹏
Original assignee: Zhongke Electric Co ltd
Current assignee: Zhongke Electric Co ltd
Priority date: 2020-10-23
Filing date: 2020-10-23
Publication date: 2021-02-26

Abstract

The invention provides a fault shutdown protection method and device for an electromagnetic stirring variable frequency power supply. The electromagnetic stirring variable frequency power supply comprises an alternating current contactor, a three-phase bridge rectifier and a three-phase full-bridge inverter which are sequentially connected, wherein each bridge arm of the three-phase full-bridge inverter is provided with a first IGBT and a second IGBT which are connected in series in the same direction and are respectively positioned on an upper bridge arm and a lower bridge arm, the first IGBT and the second IGBT of the ith bridge arm are mutually connected to form the inversion output of the ith bridge arm of the electromagnetic stirring variable frequency power supply, and i =1,2 and 3; the fault shutdown protection method comprises the following steps: if any fault of short circuit fault, overcurrent fault and overvoltage fault occurs in the electromagnetic stirring variable frequency power supply, a first level is provided for the control end of each first IGBT, a second level is provided for the control end of each second IGBT, and the first level and the second level are respectively high level and low level or respectively low level and high level.

Description

Electromagnetic stirring variable frequency power supply fault shutdown protection method and device

Technical Field

The invention relates to an abnormal shutdown protection method of a variable frequency power supply under a fault condition, in particular to a shutdown protection method and device of an electromagnetic stirring special variable frequency power supply for an electromagnetic stirring load with a heavy inductive property such as an electromagnetic stirrer and the like under emergency faults such as short circuit, overcurrent and overvoltage.

Background

The special variable frequency power supply for electromagnetic stirring belongs to the field of frequency converters, the main circuit topological structure is as shown in the following figure 1, the topological structure is the same as that of a main circuit of a general voltage type frequency converter, and the main circuit topological structure adopts an AC-DC-AC main circuit (the front end adopts uncontrollable rectification of a diode, and the rear end adopts three full-bridge arm IGBT inversions).

For the fault of the electromagnetic stirring variable frequency power supply:

(1) the short-circuit fault means that the IGBT digital driver or driving core detects the voltage V between the collector and the emitter of the IGBT_CEExceeding a certain threshold;

(2) the overcurrent fault refers to the condition that the load of the electromagnetic stirrer generates an interphase short circuit or a ground short circuit;

(3) the overvoltage fault is that the voltage at two ends of a capacitor in an energy storage capacitor unit in the electromagnetic stirring variable frequency power supply exceeds a preset voltage threshold.

The load of the electromagnetic stirrer needs two-phase or three-phase low-frequency (1-16Hz) alternating current of hundreds of amperes or even thousands of amperes to supply power, because the electromagnetic stirrer needs to flow such large current, so that huge heat is generated at a coil of the electromagnetic stirrer, so that the coil cooling in the electromagnetic stirrer generally adopts water circulation cooling, although the stirrer coil needs to be cooled by pure water, the water used on site is difficult to meet the requirement of highly purified water, and the water impurity and heavy metal content in the water are high, so that the power supply of the electromagnetic stirrer often has emergency faults such as overcurrent; the electromagnetic stirring variable frequency power supply is a heavy inductive load, although the electromagnetic stirring variable frequency power supply works by supplying power with a low-frequency alternating current power supply, the power factor is still not about 30% high, the electromagnetic stirring variable frequency power supply does not undergo a soft shutdown process during emergency fault shutdown, the electromagnetic stirring stirrer can feed the energy in the inductor in the coil back to the electrolytic capacitor again after the emergency shutdown, an energy consumption loop is added in the main circuit in order to prevent the electrolytic capacitor from being broken down to damage an IGBT power device and the electrolytic capacitor due to overvoltage during energy feedback, when the voltage of the energy storage electrolytic capacitor of the direct current bus reaches a certain value, the IGBT7 is started, the energy of the electrolytic capacitor forms a loop through a resistor R3 and the IGBT7, and the traditional electromagnetic stirring variable frequency power supply main circuit is shown as the following figure.

The electromagnetic stirrer is used as an inductive load, when the variable frequency power supply of the electromagnetic stirrer has an emergency fault, the variable frequency power supply immediately stops outputting, a soft shutdown process like normal shutdown does not exist, meanwhile, the energy stored in a coil in the electromagnetic stirrer needs to be discharged to a loop for releasing the energy in the coil, the traditional method is to block all IGBTs of an upper bridge arm and a lower bridge arm of an inverter part, so the energy in the coil can only flow from diodes which are connected with the IGBTs in an anti-parallel mode to charge an electrolytic capacitor, when the voltage value in the electrolytic capacitor reaches a set overvoltage threshold value, the discharging IGBT7 is turned on to consume the energy in the electrolytic capacitor in a resistor R3, the resistor generates heat to cause huge heat release, the temperature in the variable frequency power supply cabinet is easy to rise due to long-term frequent release, the normal service life of main electronic components in the variable frequency power supply cabinet is seriously reduced, and because the, the size of the variable frequency power supply can be increased, difficulty is brought to structural design, a set of heat dissipation system needs to be added for the bleeder resistor, and complexity of the heat dissipation system of the variable frequency power supply is increased; in another method without adding the bleeder resistor R3 and the bleeder IGBT7, PWM rectification is adopted, when the electrolytic capacitor reaches the overvoltage threshold, the front end PWM rectification part is operated in an active inversion state, and energy in the electrolytic capacitor is fed back to the power grid, although the method does not need to bleed the resistor and the bleeder IGBT, no heat is released and no structural design difficulty is increased, the method needs to add the incoming line inductors L _ a, L _ b and L _ c at the incoming line end of the main power supply and change the uncontrolled rectifying diode into the PWM rectifying IGBT, which greatly increases the hardware cost of the system and the complexity of the system, as shown in fig. 2.

When the electromagnetic stirring variable frequency power supply is shut down in an emergency fault, if all the IGBT of the inversion part is blocked and shut off, the energy stored by the electromagnetic stirrer is fed back to the variable frequency power supply from all the freewheeling diodes of the IGBT of the inversion part, at the moment, the electromagnetic stirrer is not the load of the variable frequency power supply any more, but becomes a three-phase power supply of electromagnetic stirring variable frequency, and uncontrolled rectification is carried out through the freewheeling diodes of the IGBT; assuming that the phase difference between the U, V two phases of the electromagnetic stirrer is the largest at the moment of shutdown due to an emergency fault, and the U-phase voltage U _ U is greater than the V-phase voltage U _ V, the main circuit of the rectification circuit is the circuit shown in fig. 3,

U_U'-V'＝R_u*i_u'+V_F1+V_DC-Link+V_F4+ R _ v i _ v' (formula 1)

R _ U is the equivalent resistance of the U-phase coil, i _ U 'is the current of the U-phase coil, R _ V is the equivalent resistance of the V-phase coil, i _ V' is the current of the V-phase coil, V_F1Free wheeling diode drop, V, for IGBT1_F4Free wheeling diode drop, V, for IGBT4_DC-LinkThe voltage value of the electrolytic capacitor of the direct current bus is shown in the formula, and the U-V two-phase voltage U of the electromagnetic stirrer at the moment_U'-V'Greater than the DC bus voltage, and the current is maximum at i _ U 'and i _ v' especially at the emergency shutdown moment, so that U is in the moment_U'-V'The voltage difference is the largest, and the overlarge voltage difference between U and V can exceed the rated withstand voltage of the stirrer, so that the turn-to-turn withstand voltage between turns in the stirrer coil and the insulation of the coil to the shell can be damaged, and the electromagnetic stirrer is short-circuited.

Disclosure of Invention

The invention provides a fault shutdown protection method and device for an electromagnetic stirring variable frequency power supply, aiming at solving the problem that the electromagnetic stirrer can be damaged by turning off all IGBTs when the existing electromagnetic stirring variable frequency power supply fails.

In order to solve the technical problems, the invention adopts the technical scheme that: the electromagnetic stirring variable frequency power supply fault shutdown protection method comprises an alternating current contactor, a three-phase full-bridge rectifier and a three-phase full-bridge inverter which are sequentially connected, wherein each bridge arm of the three-phase full-bridge inverter is provided with a first IGBT and a second IGBT which are connected in series in the same direction and are respectively positioned on an upper bridge arm and a lower bridge arm, the first IGBT and the second IGBT of the ith bridge arm are mutually connected to form the inverter output of the ith bridge arm of the electromagnetic stirring variable frequency power supply, and i is 1,2 and 3; the fault shutdown protection method is characterized by comprising the following steps: if any fault of short circuit fault, overcurrent fault and overvoltage fault occurs in the electromagnetic stirring variable frequency power supply, a first level is provided for the control end of each first IGBT, a second level is provided for the control end of each second IGBT, and the first level and the second level are respectively high level and low level or respectively low level and high level.

In the invention, when any fault of short circuit fault, overcurrent fault and overvoltage fault occurs, only the upper bridge arm is turned off (all the first IGBTs are turned off and all the second IGBTs are turned on) or only the lower bridge arm is turned off (all the first IGBTs are turned on and all the second IGBTs are turned off), so that the overvoltage between U, V, W three phases in the electromagnetic stirrer especially in emergency fault can be obviously reduced, and the condition of overvoltage between turns of the electromagnetic stirrer coil is avoided.

In the above technical solution, the operation of providing the first level for the control terminal of each first IGBT and providing the second level for the control terminal of each second IGBT is earlier than the operation of turning off the ac contactor.

According to the invention, the operation of disconnecting the alternating current contactor is carried out later, so that the incoming line alternating current contactor can be disconnected under the condition of light load when an emergency fault occurs, the possibility of sticking the contact of the alternating current contactor is eliminated, and the service life of the alternating current contactor can be greatly prolonged.

In the above technical solution, the method for protecting against a shutdown further includes: the ac contactor is turned off earlier than the down time of the water circulation cooling system for electromagnetic stirring. Because the electromagnetic stirrer is provided with the water circulation cooling system, the energy in the electromagnetic stirrer (especially a coil) is radiated by just utilizing the original water circulation system of the electromagnetic stirrer, and the water circulation cooling system is controlled to be shut down later, so that the adaptability of the electromagnetic stirring power supply to the environment is greatly improved.

The invention also provides an electromagnetic stirring variable frequency power supply fault shutdown protection device, wherein the electromagnetic stirring variable frequency power supply comprises an alternating current contactor, a three-phase bridge rectifier and a three-phase full-bridge inverter which are sequentially connected, each bridge arm of the three-phase full-bridge inverter is provided with a first IGBT and a second IGBT which are connected in series in the same direction and are respectively positioned on an upper bridge arm and a lower bridge arm, the first IGBT and the second IGBT of the ith bridge arm are mutually connected to form the inversion output of the ith bridge arm of the electromagnetic stirring variable frequency power supply, i is 1,2 and 3, and the electromagnetic stirring variable frequency power supply further comprises a controller with 3 pulse width modulation signal output ends;

characterized in that the fail-safe protection device comprises a first logic gate circuit, 3 second logic gate circuits, 3 inverters Uc₁、 Uc₂、……、Uc₃；

The output end of the short-circuit fault detection circuit and/or the output end of the over-current fault detection circuit and/or the output end of the over-voltage fault detection circuit of the electromagnetic stirring variable frequency power supply are respectively and electrically connected with the input end of a first logic gate circuit, the output end of the first logic gate circuit and the ith pulse width modulation signal output end of a controller are respectively and correspondingly electrically connected with two input ends of an ith second logic gate circuit, the output end of the ith second logic gate circuit is electrically connected with a first IGBT control end of an ith bridge arm or a second IGBT control end of the ith bridge arm, and the output end of the ith second logic gate circuit is electrically connected with a second IGBT control end of the ith bridge arm or a first IGBT control end of the ith bridge arm through an ith inverter Uc_iElectrically connecting;

the first logic gate circuit has a structure such that: when no short-circuit fault, no overcurrent fault or no overvoltage fault occurs, the first logic gate circuit outputs a first level, otherwise, the first logic gate circuit outputs a second level;

the structure of the second logic gate circuit is that: when short-circuit fault, overcurrent fault and overvoltage fault do not occur, the output level state of the ith second logic gate circuit is the same as the level state of the ith pulse width modulation signal of the controller, otherwise, each second logic gate circuit outputs a second level, and the first level and the second level are respectively high level and low level or respectively low level and high level.

In the invention, when any fault of short-circuit fault, overcurrent fault and overvoltage fault occurs, the first logic gate circuit outputs the second level, the second level is output through the ith second logic gate circuit, the output end of the ith second logic gate circuit is electrically connected with the first IGBT control end or the second IGBT control end of the ith bridge arm, and the output end of the ith second logic gate circuit is electrically connected with the second IGBT control end or the first IGBT control end of the ith bridge arm through the ith inverter Uc_iAnd the first IGBT control end and the second IGBT control end are electrically connected, so that opposite levels can be provided for the first IGBT control end and the second IGBT control end, and only the upper bridge arm is turned off (all the first IGBTs are turned off and all the second IGBTs are turned on) or only the lower bridge arm is turned off (all the first IGBTs are turned on and all the second IGBTs are turned off), so that the overvoltage between U, V, W three phases in the electromagnetic stirrer especially in emergency fault can be obviously reduced, and the overvoltage condition between turns of the electromagnetic stirrer coil is avoided.

Further, the fault shutdown protection device further comprises a third logic gate circuit, an output end of the first logic gate circuit and an IO interface end of the controller are respectively and correspondingly electrically connected with two input ends of the third logic gate circuit, an output end of the third logic gate circuit is electrically connected with a control end of the ac contactor, and the third logic gate circuit has a structure that: if the first logic gate circuit outputs the first level, the coil of the alternating current contactor is in a power-on state, and otherwise, the coil of the alternating current contactor is in a power-off state.

In the invention, the third logic gate circuit is arranged, so that when no short-circuit fault, no overcurrent fault or no overvoltage fault occurs, the coil of the alternating current contactor is in an electrified state, the corresponding three-phase switches of the alternating current contactor are all closed, and when any fault occurs, the coil of the alternating current contactor is in a power-off state, and the corresponding three-phase switches of the alternating current contactor are all opened. Because the alternating current contactor is a mechanical switch, the first logic gate circuit and the second logic gate circuit on each IGBT controlled path are electronic circuits, and the IGBTs are electronic switches, the invention utilizes different turn-off or turn-off delay time of the electronic switches and the mechanical switches to achieve the purpose that an incoming line main contactor (the alternating current contactor) is turned off under the condition of light load when an emergency fault occurs, the possibility that the contact of the main contactor is turned off under heavy load and is stuck due to electric spark arcing is avoided, and the service life of the main contactor can be greatly prolonged.

Furthermore, the fault shutdown protection device further comprises a relay, two ends of a coil of the relay are respectively and correspondingly electrically connected with the output end of the third logic gate circuit and the ground, a pair of normally open contacts of the relay are respectively and electrically connected with one end of an alternating current contactor coil and the positive end of an alternating current contactor power supply, and the other end of the alternating current contactor coil is electrically connected with the negative end of the alternating current contactor power supply.

In the invention, the third logic gate circuit is generally supplied with low-voltage direct current, and the alternating current contactor is generally supplied with alternating current power, so the on-off control of the output level of the third logic gate circuit on the alternating current contactor is realized through a relay coil.

Further, the first logic gate circuit, the ith second logic gate circuit and the third logic gate circuit are respectively a logic and gate Un₁And logic and gate Ua_iAND logic AND gate Un₂(ii) a Or

The first logic gate circuit and the ith second logic gate circuit are respectively a logic NAND gate Un₃Logical OR gate Ub_iThe third logic gate circuit comprises a logic AND gate Un₄Inverter Un₅Said logic NAND gate Un₃Through an inverter Un₅AND logic AND gateUn₄One input end of the controller is electrically connected with the logic AND gate Un₄Is electrically connected to the other input terminal of the logic and gate Un₄The output of which is the output of the third logic gate circuit.

Further, the short-circuit fault detection circuit, the overcurrent fault detection circuit and the overvoltage fault detection circuit have the structure that:

the level output by the short-circuit fault detection circuit when a short-circuit fault occurs, the level output by the overcurrent fault detection circuit when an overcurrent fault occurs, and the level output by the overvoltage fault detection circuit when an overvoltage fault occurs are the same as a first level or a second level, and the level output by the short-circuit fault detection circuit when a short-circuit fault does not occur, the level output by the overcurrent fault detection circuit when an overcurrent fault does not occur, and the level output by the overvoltage fault detection circuit when an overvoltage fault does not occur are the same as a second level or a first level.

Furthermore, the overcurrent fault detection circuit comprises 3 overcurrent fault detection units, the ith overcurrent fault detection unit comprises a current measurement device U101-i for measuring the output current of the ith bridge arm of the electromagnetic stirring variable frequency power supply, a current/voltage conversion unit U102-i, a voltage absolute value unit U103-i, an analog switch U105-i and an integrating circuit U106-i, the current measurement device U101-i, the current/voltage conversion unit U102-i and the voltage absolute value unit U103-i are sequentially and electrically connected, two connecting ends of the analog switch U105-i are respectively and correspondingly and electrically connected with the output end of the voltage absolute value unit U103-i and the input end of the integrating circuit U106-i, and the output end of the integrating circuit U106-i is connected with an inverter U107-i;

each overcurrent fault detection unit also comprises a first voltage comparison unit, the output end of the current/voltage conversion unit U102-i or the output end of the voltage absolute value unit U103-i is electrically connected to the input end of the first voltage comparison unit of the ith overcurrent fault detection unit, the output end of the first voltage comparison unit of the ith overcurrent fault detection unit is electrically connected with the gating end of the analog switch U105-i, and the structure of the first voltage comparison unit of the ith overcurrent fault detection unit is such that: when the output value of the current/voltage conversion unit U102-i is not less than a preset negative threshold voltage V-and not more than a preset positive threshold voltage V +, the first voltage comparison unit of the ith overcurrent fault detection unit outputs a low level, otherwise, the first voltage comparison unit of the ith overcurrent fault detection unit outputs a high level, and the absolute values of V + and V-are equal;

the output end of the inverter U107-i is electrically connected to the ith input end of the AND circuit U108, and the output end of the AND circuit U108 is the output end of the overcurrent fault detection circuit; i is 1,2, 3.

In the invention, if the current detected by the current measuring device U101-i of one overcurrent fault detection unit continuously exceeds a set threshold value within a certain time, the first voltage comparison unit outputs a high level, so that the analog switch U105-i is always kept in a closed state within a certain time, and the integrating circuit U106-i continuously integrates, and when the output of the integrating circuit exceeds the threshold value, the inverter U107-i is turned over, so that whether a short-circuit fault occurs or not can be determined through the level acquired by the level acquisition unit. If the current detected by the current measuring device U101-i is an abnormal value which lasts for a short time only, the analog switch U105-i is opened after being closed for a short time only, and the output of the integrating circuit cannot be accumulated to a level which enables the inverter U107-i to overturn, so that the output of the inverter U107-i cannot be changed, and misjudgment is avoided. The short-circuit fault detection circuit is realized by adopting an analog circuit, the collected current data does not need to be sent to a microprocessor for comparison and judgment in real time, the task burden of the microprocessor does not need to be increased, and the judgment error caused by the output of a voltage comparator due to occasional external interference can be avoided by adopting an integrating circuit.

Further, the output end of the absolute voltage value unit U103-i is electrically connected to the input end of the first voltage comparison unit of the ith overcurrent fault detection unit, the first voltage comparison unit of the ith overcurrent fault detection unit comprises a voltage comparator U1041-i, the non-inverting input end and the inverting input end of the voltage comparator U1041-i are electrically connected to the output end of the absolute voltage value unit U103-i and the first reference voltage terminal Vref1, respectively, and the voltage value of the first reference voltage terminal Vref1 is equal to V +; or

The output end of the current/voltage conversion unit U102-i is electrically connected to the input end of a first voltage comparison unit of the ith overcurrent fault detection unit, the first voltage comparison unit of the ith overcurrent fault detection unit comprises a voltage comparator U1041-i, a voltage comparator U1042-i and a logic OR gate U1043-i, the non-inverting input end of the voltage comparator U1041-i, the inverting input end of the voltage comparator U1042-i, the output end of the current/voltage conversion unit U102-i and the input end of the voltage absolute value unit U103-i are electrically connected with each other, the inverting input end of the voltage comparator U1041-i and the non-inverting input end of the voltage comparator U1042-i are respectively and electrically connected with a first reference voltage end Vref1 and a second reference voltage end Vref2, the voltage value and the voltage value of the first reference voltage end Vref1 are, The voltage values of the second reference voltage terminal Vref2 are respectively equal to V + and V-, the output terminals of the voltage comparators U1041-i and the output terminals of the voltage comparators U1042-i are respectively and correspondingly connected with two input terminals of a logic or gate U1043-i, and the output terminal of the logic or gate U1043-i is the output terminal of the first voltage comparison unit of the ith overcurrent fault detection unit.

Further, the electromagnetic stirring variable frequency power supply comprises an electrolytic capacitor module connected between two ends of the bridge arm;

the overvoltage fault detection circuit comprises a voltage sensor U1091 and a voltage comparator U1092, wherein a positive input end and a negative input end of the voltage sensor U1091 are electrically connected with two ends of an electrolytic capacitor module respectively, an inverting input end and an non-inverting input end of the comparator U1092 are electrically connected with an output end of the voltage sensor U1091 and a third reference voltage end Vref3 correspondingly, and an output end of the voltage comparator U1092 is an output end of the overvoltage fault detection circuit.

Because the electrolytic capacitor is positioned in the strong current part, namely the overvoltage fault detection circuit is mainly positioned in the strong current part, and the first logic gate circuit is a weak current part, the voltage sensor can realize input and output isolation, thereby avoiding the interference of the noise of a strong current signal to the subsequent weak current part.

Further, each IGBT of the three-phase full-bridge inverter is defined as an IGBT₁、IGBT₂、IGBT₃、IGBT₄、IGBT₅、IGBT₆(ii) a The short-circuit fault detection circuit comprises 6 short-circuit fault detection units, 6 first isolation transmission units and an AND gate circuit U112, wherein the input end and the output end of each first isolation transmission unit are not grounded together;

the jth short-circuit fault detection unit comprises a comparator U1101_jCurrent source U1102_jReference voltage source U1103_jCapacitor C1101_jDiode D1101_j；

The comparator U1101_jInverting input terminal and capacitor C1101_jOne terminal, current source U1102_jAnode, diode D1101_jThe anodes being electrically connected to each other, diode D1101_jCathode and IGBT_jIs electrically connected with the collector of the current source U1102_jCathode and IGBT_jSupply voltage terminal VCC_jElectrically connecting;

the comparator U1101_jNon-inverting input terminal and reference voltage source U1103_jThe positive electrode is electrically connected;

the reference voltage source U1103_jNegative electrode and capacitor C1101_jThe other ends of the two insulated gate bipolar transistors are connected with the IGBT_jThe emitter of (2) is electrically connected;

the comparator U1101_jThe output end is the output end of the jth short-circuit fault detection unit;

the output end of the jth short-circuit fault detection unit passes through the jth first isolation transmission unit U1104_jThe output end of the AND gate circuit U112 is the output end of the short-circuit fault detection circuit; j is 1,2, … …, 6.

By detecting IGBT_jVCE (C)_jVoltage to detect IGBT_jWhether it is a short circuit. When IGBT_jWhen not short-circuited, the collector voltage does not exceed the threshold VCC_jAt this time, the diode D1101_jIs turned on, at this time, the capacitor C1101_jDiode D1101 charged only to the saturation conduction voltage drop of IGBT_jSum of forward conduction voltage drop, saturation conduction voltage drop of IGBT, diode D1101_jThe sum of forward conduction voltage drops is less than the reference voltage source U1103_jMagnitude, i.e. ratio, of positive electrode voltageComparator U1101_jThe voltage of the in-phase input end is larger than that of the reverse-phase input end, and the output end outputs high level. When IGBT_jAt short circuit, the collector voltage exceeds the threshold value VCC_jAt this time, the diode D1101_jOff when the capacitor C1101_jIs charged to be larger than a reference voltage source U1103_jVoltage value of, i.e. comparator U1101_jThe voltage of the in-phase input end is smaller than that of the reverse-phase input end, and the output end of the comparator outputs low level. Since each IGBT is positioned in a strong current part, namely the short-circuit fault detection circuit is mainly positioned in the strong current part, and the first logic gate circuit is a weak current part at first, the interference of the noise of a strong current signal to the subsequent weak current part is avoided by arranging the first isolation transmission unit.

The invention has the advantages and positive effects that:

1. the electronic switch and the mechanical switch are controlled by the same fault signal at the same moment, and the different turn-off or turn-off delay time of the electronic switch and the mechanical switch is utilized to achieve the purpose that the incoming line main contactor is turned off under the condition of light load when in emergency fault, so that the possibility of adhesion caused by electric spark arcing when the contact of the main contactor is turned off under heavy load is avoided, and the service life of the main contactor can be greatly prolonged;

2. the proposal provided by the invention can obviously reduce the overvoltage between U, V, W three phases in the electromagnetic stirrer especially in emergency failure, avoid the overvoltage condition between turns of the electromagnetic stirrer coil, and also can avoid the overvoltage condition of the energy storage capacitor of the variable frequency power supply caused by the energy feedback of the coil of the electrolytic capacitor in emergency failure;

3. the energy in the electromagnetic stirrer coil is consumed by using the self internal resistances R _ u, R _ v and R _ w of the electromagnetic stirrer, and the electromagnetic stirrer is provided with a set of complete water circulation cooling system, so that the original water circulation system of the electromagnetic stirrer is just used for heat dissipation, and the water circulation cooling system is controlled to be shut down later, so that the adaptability of the electromagnetic stirring power supply to the environment is greatly improved.

Drawings

In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without inventive labor.

FIG. 1 is a schematic diagram of a main circuit of a conventional electromagnetic stirring variable frequency power supply;

FIG. 2 is a main circuit topology structure diagram of a PWM rectified electromagnetic stirring variable frequency power supply in the prior art;

FIG. 3 is a schematic diagram of the energy feedback main circuit of the electromagnetic stirrer for blocking 6 IGBTs of the inversion part in case of emergency failure in the prior art;

FIG. 4(a) is a feedback loop when the upper arm IGBT is completely turned off and the lower arm IGBT is completely turned on according to the embodiment of the invention;

FIG. 4(b) is a feedback loop when the upper arm IGBT is fully turned on and the lower arm IGBT is fully turned off according to the embodiment of the invention;

FIG. 5 is a schematic diagram of the circuit connection structure of the first implementation mode 1 of the first logic gate circuit, the 3 second logic gate circuits, the third logic gate circuit, the relay and the AC contactor according to the embodiment of the invention;

FIG. 6 is a schematic diagram of the circuit connection structure of the 2 nd implementation of the first logic gate circuit, the 3 second logic gate circuits, the third logic gate circuit, the relay and the AC contactor according to the embodiment of the invention;

FIG. 7 is a schematic circuit connection structure diagram of the 3 inverters and 3 IGBT control terminals of embodiment 1 of the present invention;

FIG. 8 is a schematic circuit connection structure diagram of the 2 nd implementation of 3 inverters and 3 IGBT control terminals according to the embodiment of the invention;

fig. 9 is a schematic circuit structure diagram of the 1 st implementation manner of the ith overcurrent fault detection unit which does not include the and circuit U108 according to the embodiment of the present invention;

fig. 10 is a schematic circuit structure diagram of the 2 nd implementation manner of the i-th overcurrent fault detection unit which does not include the and circuit U108 according to the embodiment of the present invention;

fig. 11 is a schematic diagram of a circuit connection structure of the and circuit U108;

fig. 12 is a schematic diagram of a waveform structure of the variable frequency power supply according to the embodiment of the present invention, in which the output of the variable frequency power supply is stopped for about 200ms first and then the main contact is disconnected;

FIG. 13 is a schematic circuit diagram of an over-voltage fault detection circuit according to an embodiment of the present invention;

fig. 14 is a schematic circuit diagram of a short-circuit fault detection circuit of an embodiment of the present invention, which does not include the and circuit U112;

fig. 15 is a schematic circuit configuration diagram of the and circuit U112 in the short-circuit fault detection circuit according to the embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

The invention provides a fault shutdown protection method for an electromagnetic stirring variable frequency power supply, wherein the electromagnetic stirring variable frequency power supply comprises an alternating current contactor 20, a three-phase full-bridge rectifier 30 and a three-phase full-bridge inverter 40 which are sequentially connected, the full-bridge inverter 40 is provided with 3 full-bridge inverter arms, each bridge arm is provided with a first IGBT and a second IGBT which are connected in series in the same direction and respectively positioned on an upper bridge arm and a lower bridge arm, the position where the first IGBT and the second IGBT of the ith bridge arm are mutually connected forms the inversion output of the ith bridge arm of the electromagnetic stirring variable frequency power supply, and i is 1,2 and 3; the fault shutdown protection method comprises the following steps: if any fault of short circuit fault, overcurrent fault and overvoltage fault occurs in the electromagnetic stirring variable frequency power supply, a first level is provided for the control end of each first IGBT, a second level is provided for the control end of each second IGBT, and the first level and the second level are respectively high level and low level or respectively low level and high level.

In the present invention, a voltage greater than 3.5V is defined as a high level, and a voltage less than 1.5V is defined as a low level.

The fail-safe method further comprises: the operation of supplying the control terminal of each first IGBT with the first level and supplying the control terminal of each second IGBT with the second level is performed earlier than the operation of opening the ac contactor 20 is performed.

In a preferred embodiment, the failsafe method further comprises: the ac contactor 20 is turned off earlier than the down time of the water circulation cooling system for electromagnetic stirring. Preferably, the water circulation cooling system is shut down after 3min to 10min of operation of the ac contactor 20 being opened.

The invention also provides an electromagnetic stirring variable frequency power supply fault shutdown protection device, wherein the electromagnetic stirring variable frequency power supply comprises an alternating current contactor 20, a three-phase full-bridge rectifier 30 and a three-phase full-bridge inverter 40 which are sequentially connected, the three-phase full-bridge inverter 40 is provided with 3 full-bridge inverter bridge arms, each bridge arm is provided with a first IGBT and a second IGBT which are connected in series in the same direction and respectively positioned on an upper bridge arm and a lower bridge arm, the first IGBT and the second IGBT of the ith bridge arm are mutually connected to form the inversion output of the ith bridge arm of the electromagnetic stirring variable frequency power supply, and i is 1,2 and 3, and the electromagnetic stirring variable frequency power supply further comprises a controller 10 with 3 pulse width modulation signal output ends;

The output end of the short-circuit fault detection circuit 400 and/or the output end of the over-current fault detection circuit 500 and/or the output end of the over-voltage fault detection circuit 600 of the electromagnetic stirring variable frequency power supply are respectively and electrically connected with the input end of a first logic gate circuit, the output end of the first logic gate circuit and the ith pulse width modulation signal output end of the controller 10 are respectively and correspondingly and electrically connected with the two input ends of an ith second logic gate circuit, the output end of the ith second logic gate circuit is electrically connected with the first IGBT control end or the second IGBT control end of an ith bridge arm, and the output end of the ith second logic gate circuit is electrically connected with the second IGBT control end or the first IGBT control end of the ith bridge armThrough the ith inverter Uc_iElectrically connecting; the first logic gate circuit has a structure such that: when no short-circuit fault, no overcurrent fault or no overvoltage fault occurs, the first logic gate circuit outputs a first level, otherwise, the first logic gate circuit outputs a second level;

the structure of the second logic gate circuit is that: when no short-circuit fault, no overcurrent fault or no overvoltage fault occurs, the output level of the ith second logic gate circuit is the same as the level of the ith pulse width modulation signal of the controller 10, otherwise, each second logic gate circuit outputs a second level, and the first level and the second level are respectively a high level and a low level or respectively a low level and a high level.

The fault shutdown protection device further comprises a third logic gate circuit, the output end of the first logic gate circuit and one IO interface end of the controller are respectively and correspondingly electrically connected with two input ends of the third logic gate circuit, the output end of the third logic gate circuit is electrically connected with the control end of the alternating current contactor, and the third logic gate circuit is structurally characterized in that: if the first logic gate circuit outputs the first level (i.e. when no short-circuit fault, no overcurrent fault, no overvoltage fault occurs), the coil of the ac contactor 20 is in the powered state, otherwise, the coil of the ac contactor 20 is in the powered state. The coils of the ac contactor 20 are in an energized state, the three-phase switches are all in a closed state, and in a de-energized state, the three-phase switches are all in an open state.

The fault shutdown protection device further comprises a relay 50, the two ends of a coil of the relay 50 are respectively and correspondingly electrically connected with the output end of the third logic gate circuit and the ground, a pair of normally open contacts of the relay 50 are respectively and electrically connected with one end of a coil of an alternating current contactor 20 and the positive end of a power supply of the alternating current contactor 20, and the other end of the coil of the alternating current contactor 20 is electrically connected with the negative end of the power supply of the alternating current contactor 20. The power supply of the ac contactor 20 can be electrically connected with 220V ac or 380V ac.

The first logic gate circuit, the ith second logic gate circuit and the third logic gate circuit are respectively a logic AND gate Un₁And logic and gate Ua_iAND logic AND gate Un₂(ii) a Or

The first logic gate circuit and the ith second logic gate circuit are respectively a logic NAND gate Un₃Logical OR gate Ub_iThe third logic gate circuit comprises a logic AND gate Un₄Inverter Un₅Said logic NAND gate Un₃Through an inverter Un₅AND logic AND gate Un₄Is electrically connected to one input terminal of the controller 10, and one IO interface terminal of the controller 10 is connected to the logic and gate Un₄Is electrically connected to the other input terminal of the logic and gate Un₄The output of which is the output of the third logic gate circuit.

When the first logic gate circuit is a logic and gate or a logic nand gate, the input ends of the first logic gate circuit, which are not connected to the output end of the short-circuit fault detection circuit 400, the output end of the over-current fault detection circuit 500, and the output end of the over-voltage fault detection circuit 600, may be all electrically connected to a high level.

The short-circuit fault detection circuit 400, the overcurrent fault detection circuit 500 and the overvoltage fault detection circuit 600 have the following structures:

the level output by the short-circuit fault detection circuit 400 when a short-circuit fault occurs, the level output by the overcurrent fault detection circuit 500 when an overcurrent fault occurs, and the level output by the overvoltage fault detection circuit 600 when an overvoltage fault occurs are the same as a first level or a second level, and the level output by the short-circuit fault detection circuit 400 when a short-circuit fault does not occur, the level output by the overcurrent fault detection circuit 500 when an overcurrent fault does not occur, and the level output by the overvoltage fault detection circuit 600 when an overvoltage fault does not occur are the same as a second level or a first level.

The invention relates to a protective measure adopted after an electromagnetic stirring power supply fails, wherein when a pulse is blocked when an emergency fault occurs in the electromagnetic stirring special variable frequency power supply, an upper bridge arm IGBT is specially and completely turned off, a lower bridge arm IGBT is completely turned on, or the upper bridge arm IGBT is completely turned on, and the lower bridge arm IGBT is completely turned off; the lower arm IGBT is turned on completely, for example, to form a circuit as shown in fig. 4(a) below.

U_U'-V'＝R_u*i_u'+V_{ce_IGBT2}+V_F4+ R _ v i _ v' (equation 2)

R _ U is the equivalent resistance of the U-phase coil, i _ U 'is the current of the U-phase coil, R _ V is the equivalent resistance of the V-phase coil, i _ V' is the current of the V-phase coil, V_{ce_IGBT2}Is the saturation conduction voltage drop, V, of the IGBT2_F4Is the freewheeling diode drop of the IGBT4,

the feedback loop is shown in fig. 4(b) when the upper arm IGBT is fully turned on and the lower arm IGBT is fully turned off.

U_U'-V'＝R_u*i_u'+V_F1+V_{ce_IGBT3}+ R _ v i _ v' (equation 3)

R _ U is the equivalent resistance of the U-phase coil, i _ U 'is the current of the U-phase coil, R _ V is the equivalent resistance of the V-phase coil, i _ V' is the current of the V-phase coil, V_F1Free wheeling diode drop, V, for IGBT1_{ce_IGBT3}Is the saturation conduction voltage drop of the IGBT 3.

Comparing the formula 2 and the formula 3 with the formula 1, it can be seen that in the technical scheme of the present invention, when only the upper bridge arm is turned off (all the first IGBTs are turned off and all the second IGBTs are turned on) or only the lower bridge arm is turned off (all the first IGBTs are turned on and all the second IGBTs are turned off), the voltage between the U, V two phases does not include one term of the voltage values at the two ends of the dc bus electrolytic capacitor module 60 in the formula when all the bridge arms are turned off, so that the voltage between two of the U, V, W three phases in the electromagnetic stirrer is significantly reduced, especially in case of an emergency fault, and the overvoltage between turns of the electromagnetic stirrer coil is avoided.

KM1 is AC contactor, KM2 is relay, KM2 relay contact is disconnected, KM1 coil loses power, then KM1 three contacts are disconnected, namely KM2 contact is used to control the coil of KM1 AC contactor to get power on and lose power.

The main contactor KM1 (alternating current contactor 20) at the forefront end in the figures 4(a) and 4(b) is also disconnected at the same time of blocking the pulse, and is disconnected with a main power supply to prevent secondary accidents, because the IGBT is blocked by adopting a logic gate circuit, the driving turn-off delay of the IGBT and the stopping output of the electromagnetic stirring variable frequency power supply are generally only about 10 us, the time is very short, and the speed is very high, however, the contactor KM1 belongs to a mechanical contact type switch, the contact turn-off delay is generally about 200ms, so that the driving pulse of the upper arm IGBT or the lower arm IGBT of the electromagnetic stirring variable frequency power supply is completely blocked when the contactor is disconnected, the electromagnetic stirring variable frequency power supply stops working, and the contactor is disconnected under very light load, so that the service life of the contactor can be greatly prolonged, and the actual effect is as shown in figure 12.

As can be seen from fig. 12, channel 1 is the average value of the absolute value of the current flowing through the contactor, and channel 2 is the inverter voltage waveform output of the variable frequency power supply. From fig. 12, it is apparent that the average value of the absolute value of the current is much larger when the inverter voltage is output from the variable frequency power supply. When the pulse is blocked (the upper bridge arm is switched off and the lower bridge arm is switched on, or the lower bridge arm is switched off and the upper bridge arm is switched on), the output of the variable frequency power supply is stopped, the average value of the absolute value (channel 1) of the current flowing through the contactor is immediately reduced, after more than 100 milliseconds, the main contactor is switched off, no current flows in the main contactor, and when the main contactor is switched off, the absolute value (channel 1) of the current flowing through the main contactor is very small.

Taking K as an example, fig. 5 shows a first logic gate circuit, K second logic gate circuits, K third logic gate circuits, a relay, and an ac contactor in embodiment 1: logic chip Un₁Three groups of three-input AND gate chips of NXP company, a 74HC11D chip with the model of NXP formula, and a chip Un₁The third, fourth and fifth pins of the three input terminals are respectively connected with emergency fault signals such as short-circuit fault, overcurrent fault and overvoltage fault, the logic levels of the short-circuit fault, the overcurrent fault and the overvoltage fault are all high levels when no fault exists normally, and Un₁The output of the sixth pin of (1) is high. The controller 10 may be a microprocessor chip, a single chip, an ARM, or a DSP chip, and outputs U, V, W three SPWM waveforms respectively using output comparison channels TIM _ CH _1, TIM _ CH _2, and TIM _ CH _3 of the microprocessor, wherein the voltage phase angle waveform of the U phase is U_u＝U_rX sin (ω x t), the voltage phase angle waveform of the V phase is

Voltage phase angle wave of W phaseIs shaped as

The output three-way pulse signals are SPWM _ U, SPWM _ V, SPWM _ W respectively connected with Ua₁、Ua₂、Ua₃An input terminal of, Un₁The 6 th pin is a fault signal output pin which is respectively connected with the Ua₁、Ua₂、Ua₃Of the other input terminal, Ua₁、Ua₂、Ua₃Can be a logic AND gate chip, the model can be 74HC1G08GV of NXP company, thus when 'short circuit fault', 'overcurrent fault' and 'overvoltage fault' are all normal, the chip Un₁Output high level, chip Ua₁、Ua₂、Ua₃Is mainly controlled by the respective 2 nd input terminal (i.e. Un)₁Output signal of) logic state control; ua₁、Ua₂、Ua₃The output of the inverter bridge arm is divided into two paths of SPWM signals through hardware, and because an electromagnetic stirring variable frequency power supply is of a voltage source type main circuit topological structure, in order to prevent the upper bridge arm and the lower bridge arm of the inverter bridge arm from being in direct connection with the IGBTs, dead time needs to be added between the upper bridge arm and the lower bridge arm. The diode D101, the resistor R104, the capacitor C101, the diode D102, the resistor R105, and the capacitor C102 generate a dead time of the U phase. The dead zone generating circuits of the V-phase and the W-phase are the same. Ud₁、Ud₂、……、Ud₆For 6 groups of drain open-drain output chips, Ud₁、 Ud₂、……、Ud₆The chip can be realized by 1 chip, namely the model can be 74AHCT07APW of NXP company. In order to improve the anti-interference capability of IGBT drive, the IGBT drivers are all driven by 15V logic level, and six groups of outputs of 6 groups of drain open-drain output chips are all pulled up to a 15V power supply. When more than one of three faults of short-circuit fault, overcurrent fault and overvoltage fault occurs to give out fault alarm, namely any fault signal of short-circuit fault, overcurrent fault and overvoltage fault is at low level, Un₁Is low, so that Ua₁、Ua₂、 Ua₃All output low level, thus when any one of short circuit fault, overcurrent fault and overvoltage faultWhen the above failure occurs, all of the SPWM _ IGBT1, SPWM _ IGBT3, and SPWM _ IGBT5 are kept at a low level all the time, and all of the SPWM _ IGBT2, SPWM _ IGBT4, and SPWM _ IGBT6 are kept at a high level all the time. The SPWM _ IGBT1, SPWM _ IGBT2, SPWM _ IGBT3, SPWM _ IGBT4, SPWM _ IGBT5 and SPWM _ IGBT6 are respectively connected with the IGBT1, the IGBT2, the IGBT3, the IGBT4, the IGBT5 and the IGBT 6in the figures 1-5, so that the lower bridge arm IGBT in the inverter bridge arm is completely switched on, and the upper bridge arm IGBT is completely switched off. One I/O port of the microprocessor is output to Un₂An input terminal of, Un₁The output 'fault signal' is connected to Un₂When Un is the other input terminal of₁When the output 'fault signal' is high, Un₂The level of the output pin is mainly controlled by the I/O pin of the microprocessor, and when the I/O port of the microprocessor outputs high level, Un₂The high level is output, so that the relay KM2 is electrified, the contact of the relay KM2 is closed to control the coil of the main contactor KM1 to be electrified, and when the I/O port of the microprocessor outputs the low level or Un₁When more than one of the three input pins is at low level, Un₂When the output is low level, the relay KM2 loses power, the contact of the relay KM2 is opened, and the coil of the main contactor KM1 loses power.

Fig. 6 shows a first logic gate circuit, K second logic gate circuits, a third logic gate circuit, a relay, and an ac contactor according to embodiment 2: logic chip Un₃Three groups of three-input NAND gate chips of NXP company, a 74HC10D chip with the model of NXP formula, and a chip Un₃The third, fourth and fifth pins of the three input terminals are respectively connected with emergency fault signals such as short-circuit fault, overcurrent fault and overvoltage fault, the logic levels of the short-circuit fault, the overcurrent fault and the overvoltage fault are all high levels when no fault exists normally, and Un₃The output of the sixth pin of (1) is low. The controller 10 may be a microprocessor chip, a single chip, an ARM, or a DSP chip, and outputs U, V, W three SPWM waveforms respectively using the output comparison channels TIM _ CH _1, TIM _ CH _2, and TIM _ CH _3 of the microprocessor, wherein the voltage phase angle waveform of the U phase is U phase_u＝U_rX sin (ω x t), the voltage phase angle waveform of the V phase is

The voltage phase angle waveform of the W phase is

The output three-way pulse signals are SPWM _ U, SPWM _ V, SPWM _ W respectively connected with Ub₁、Ub₂、Ub₃An input terminal of, Un₃The 6 th pin is a fault signal output pin which is respectively connected with Ub₁、Ub₂、Ub₃Of the other input, Ub₁、Ub₂、Ub₃Is a logic OR gate chip, so that when the short-circuit fault, the overcurrent fault and the overvoltage fault are all normal, Un₃Chip output is low, then chip Ub₁、Ub₂、 Ub₃The logic level state of the output pin is mainly controlled by the logic state of the 2 nd input end; ub₁、Ub₂、Ub₃The output of the inverter bridge arm is divided into two paths of SPWM signals through hardware, and because an electromagnetic stirring variable frequency power supply is of a voltage source type main circuit topological structure, in order to prevent the upper bridge arm and the lower bridge arm of the inverter bridge arm from being in direct connection with the IGBTs, dead time needs to be added between the upper bridge arm and the lower bridge arm. The diode D101, the resistor R104, the capacitor C101, the diode D102, the resistor R105, and the capacitor C102 generate a dead time of the U phase. The dead zone generating circuits of the V-phase and the W-phase are the same. Ud₁、Ud₂、……、 Ud₆For 6 groups of drain open-drain output chips, Ud₁、Ud₂、……、Ud₆The chip can be realized by 1 chip, namely the model can be 74AHCT07APW of NXP company. In order to improve the anti-interference capability of IGBT drive, the IGBT drivers are all driven by 15V logic level, and six groups of outputs of 6 groups of drain open-drain output chips are all pulled up to a 15V power supply. When more than one of three faults of short-circuit fault, overcurrent fault and overvoltage fault occurs to give out fault alarm, namely any fault signal of short-circuit fault, overcurrent fault and overvoltage fault is at low level, Un₃Is high so that Ub₁、Ub₂、Ub₃All output high levelThus, when any one or more of the "short-circuit fault", "overcurrent fault" and "overvoltage fault" occurs, all of the SPWM _ IGBT1, SPWM _ IGBT3, and SPWM _ IGBT5 are kept at a high level all the time, and all of the SPWM _ IGBT2, SPWM _ IGBT4, and SPWM _ IGBT6 are kept at a low level all the time. The SPWM _ IGBT1, SPWM _ IGBT2, SPWM _ IGBT3, SPWM _ IGBT4, SPWM _ IGBT5 and SPWM _ IGBT6 respectively drive the IGBTs at corresponding positions in the IGBT1, the IGBT2, the IGBT3, the IGBT4, the IGBT5 and the IGBT 6in the figures 1-5, so that the upper bridge arm IGBT in the inverter bridge arm is completely switched on, and the lower bridge arm IGBT is completely switched off. One I/O port of the microprocessor is output to Un₄An input terminal of, Un₃The output 'fault signal' passes through the NOT gate Un₅Then connected to Un₄When Un is the other input terminal of₃When the output 'fault signal' is low, Un₃The output is high, so that Un₄The level of the output pin is mainly controlled by the I/O pin of the microprocessor, and when the I/O port of the microprocessor outputs high level, Un₄The high level is output, so that the relay KM2 is electrified, the contact of the relay KM2 is closed to control the coil of the main contactor KM1 to be electrified, and when the I/O port of the microprocessor outputs the low level or Un₃When more than one of the input pins is at low level, Un₃The output is high, Un₅The output is low, Un₄When the output is low level, the relay KM2 loses power, the contact of the relay KM2 is opened, and the coil of the main contactor KM1 loses power.

Fig. 7 is a schematic diagram of a circuit connection structure of the 1 st embodiment of the K inverters and the K IGBT control terminals: the output end of the ith second logic gate circuit is electrically connected with the first IGBT control end of the ith bridge arm, and the output end of the ith second logic gate circuit and the second IGBT control end of the ith bridge arm are connected through an ith inverter Uc_iAnd (6) electrically connecting.

Fig. 8 is a schematic diagram of a circuit connection structure of the 2 nd embodiment of K inverters and K IGBT control terminals: the output end of the ith second logic gate circuit is electrically connected with the second IGBT control end of the ith bridge arm, and the output end of the ith second logic gate circuit and the first IGBT control end of the ith bridge arm are connected through an ith inverter Uc_iAnd (6) electrically connecting.

The electromagnetic stirring variable frequency power supply comprises an electrolytic capacitor module 60 connected between two ends of the bridge arm.

As shown in fig. 9 and 11, in a first embodiment of the over-current fault detection circuit 500, the over-current fault detection circuit 500 includes 3 over-current fault detection units, where 3 is the number of inverter full-bridge arms of the electromagnetic stirring frequency conversion power supply, an ith over-current fault detection unit includes a current measurement device U101-i for measuring an ith-phase output current of the electromagnetic stirring frequency conversion power supply, a current/voltage conversion unit U102-i, a voltage absolute value unit U103-i, an analog switch U105-i, and an integration circuit U106-i, the current measurement device U101-i, the current/voltage conversion unit U102-i, and the voltage absolute value unit U103-i are electrically connected in sequence, two connection terminals of the analog switch U105-i are electrically connected to an output terminal of the voltage absolute value unit U103-i and an input terminal of the integration circuit U106-i respectively, the output end of the integrating circuit U106-i is connected with an inverter U107-i;

the output end of the inverter U107-i is electrically connected to the ith input end of the AND circuit U108, and the output end of the AND circuit U108 is the output end of the over-current fault detection circuit 500; i is 1,2, 3.

The output end of the absolute voltage unit U103-i is electrically connected to the input end of a first voltage comparison unit of the ith overcurrent fault detection unit, the first voltage comparison unit of the ith overcurrent fault detection unit comprises a voltage comparator U1041-i, the non-inverting input end and the inverting input end of the voltage comparator U1041-i are electrically connected with the output end of the absolute voltage unit U103-i and a first reference voltage end Vref1 respectively, and the voltage value of the first reference voltage end Vref1 is equal to V +.

The electromagnetic stirring variable frequency power supply comprises a three-phase full-bridge rectifier 30, a three-phase full-bridge inverter 40 electrically connected with the output end of the three-phase full-bridge rectifier 30, and a pulse width modulation signal generation unit with 6 pulse width modulation signal output ends, wherein the three-phase full-bridge inverter 40 is provided with 3 bridge arms, each bridge arm is provided with two IGBTs connected in series in the same direction, and the pulse width modulation signal generation unit and the level acquisition unit are independently arranged or integrated in the pulse width modulation signal generation unit.

The current measuring devices U101-i may be current transformers. The current/voltage conversion unit U102-i may be a proportional amplification unit. The voltage absolute value unit U103-i can be a double-operational-amplifier full-wave rectification circuit. The integration circuits U106-i may be in-phase integration circuits. The ith over-current fault detection unit may include a pull-down resistor R9-i disposed between the input of the integration circuit U106-i and ground. The ith over-current fault detection unit may include a pull-down resistor R12-i disposed between the output of the integrating circuit U106-i and ground.

In one embodiment, the current/voltage conversion unit U102-i comprises an operational amplifier U1-i and a resistor R1-i, wherein a non-inverting input terminal of the operational amplifier U1-i and one end of a current transformer are electrically connected with each other, an inverting input terminal of the operational amplifier U1-i, the other end of the current transformer and one end of the resistor R1-i are electrically connected with each other, an output terminal of the operational amplifier U1-i and the other end of the resistor R1-i are electrically connected, and an output terminal of the operational amplifier U1-i is an output terminal of the current/voltage conversion unit U102-i.

In one embodiment, the full-wave rectification circuit of the ith overcurrent fault detection unit comprises an operational amplifier U2-i, an operational amplifier U3-i, a Schottky diode D4-i, a resistor R2-i, a resistor R3-i, a resistor R4-i, a resistor R5-i, a resistor R6-i, a seventh resistor R7-i and a resistor R8-i. One end of the resistor R2-i and one end of the resistor R4-i are electrically connected with the output end of the current/voltage conversion unit U102-i (preferably the output end of the operational amplifier U1-i). The inverting input end of the operational amplifier U2-i, the other end of the resistor R2-i, the second end of the Schottky diode D4-i and one end of the resistor R5-i are electrically connected with each other, the non-inverting input end of the operational amplifier U2-i is grounded through the resistor R3-i, the output end of the operational amplifier U2-i and the third end of the Schottky diode D4-i are electrically connected with each other, the first end of the Schottky diode D4-i, the other end of the resistor R5-i and one end of the resistor R6-i are electrically connected with each other, the inverting input end of the operational amplifier U3-i, the other end of the resistor R6-i, the other end of the resistor R4-i and one end of the resistor R8-i are electrically connected with each other, the non-inverting input end of the operational amplifier U3-i is grounded through the, The other ends of the resistors R8-i are electrically connected to each other. The output terminal of the operational amplifier U3-i is the output terminal of the full-wave rectification unit.

The inverting input of the voltage comparator U1041-i is electrically connected to a first reference voltage terminal Vref 1. The output end of the voltage absolute value unit U103-i, the non-inverting input end of the voltage comparator U1041-i and one connecting end of the analog switch U105-i are electrically connected with each other, and the output end of the voltage comparator U1041-i and the gating end of the analog switch U105-i are electrically connected with each other. The other connection terminal of the analog switch U105-i is electrically connected to the input terminal of the integrating circuit U106-i.

The integrating circuit U106-i comprises an operational amplifier U6-i, a resistor R9-i, a resistor R10-i, a resistor R11-i, a resistor R12-i, a capacitor C1-i and a capacitor C2-i.

The inverting input end of the operational amplifier U6-i, one end of the resistor R11-i and one end of the capacitor C2-i are electrically connected with each other, the non-inverting input end of the operational amplifier U6-i, one end of the resistor R10-i and one end of the capacitor C1-i are electrically connected with each other, and the output end of the operational amplifier U6-i, the other end of the capacitor C2-i and one end of the capacitor R12-i are electrically connected with each other. One end of the resistor R9-i is electrically connected with the other end of the resistor R10-i and is used as an input end of the integrating circuit U106-i. The output of the integrating circuit U106-i is the output of the operational amplifier U6-i. The other end of the resistor R9-i, the other end of the resistor R11-i, the other end of the resistor R12-i and the other end of the capacitor C1-i are all grounded. The pull-down resistor R12-i is used to discharge the amount of charge stored by the integrating capacitor C2-i of the integrating circuit U106-i when the analog switch is not turned on.

In a preferred embodiment, R1-i can be 1.538 Ω, R2-i, R3-i, R4-i, and R5-i can each be 10k Ω, R6-i can be 5k Ω, R7-i, R8-i, and R9-i can each be 10k Ω, R10-i, R11-i, and R12-i can each be 1k Ω, and C1-i, and C2-i can each be 4500 pF. The model numbers of D3-i and D4-i can be BAT 54S. U105-i may be model 74AHC1G 66. The pulse width modulation signal generating unit may be the controller 10. The controller 10 may be an MCU or DSP or FPGA.

The voltage of the first reference voltage terminal Vref1 is preferably 2.5V. The voltage of the second reference voltage terminal Vref2 is preferably-2.5V.

The first-class short circuit and the second-class short circuit can exceed rated current, the first-class short circuit is generally direct connection between bridge arms, and the loop inductance is generally lower than 100nH level, so that the current rate is increased quickly; the second type of short circuit is generally an interphase short circuit, as shown in fig. 3, the loop inductance is generally above the muh level, and the current rising rate is much slower than that of the first type of short circuit; because the first-class short-circuit current only flows through the IGBTs of the upper and lower bridge arms, the short-circuit current cannot pass through an U, V, W three-phase output power cable, and the current detection in the second-class short-circuit detection circuit does not detect the current, so that the second-class short-circuit does not play a role in protection; when the second-class short-circuit protection occurs, the current value of the second-class short-circuit protection does not reach the threshold value of the first-class short-circuit protection, so that the first-class short-circuit cannot play a protection role; the short-circuit protection of the first class and the short-circuit protection of the second class respectively play a protection role independently and do not conflict with each other. In the second type of short circuit, the load is present. The larger the inductance L value, the lower the rate of change of current at the same voltage and time, and thus the cable inductance can severely affect the current rise rate. In the scheme, a negative value is turned into a positive value through full-wave rectification, if the peak value is-3V, the negative value is turned into +3V after the full-wave rectification. In the scheme of the application, the state is kept after a few mu s after the current exceeds 150% of the rated current, and the situation is not a transient false alarm signal.

If the voltage of the positive input end of the U1041-i temporarily exceeds 2.5V due to interference, so that the output of the U1041-i is at a high level, and the voltage becomes a value smaller than 2.5V before reaching the integration time, in order to avoid the problem that the integration is continued on the basis of the temporary integration result in the next re-integration, so as to cause misjudgment, a resistor R12-i is added to the circuit, if the situation occurs, after the U105-i is turned off, because the pull-down resistor R9-i makes the input of the integration circuit U106-i be kept at a determined level, and the voltage accumulated in the capacitor C2-i is released and consumed through the R12-i.

TABLE 1 maximum rating in FF1400R12IP4 data sheet

The electromagnetic stirrer generally requires a low-frequency current with an effective current value of 400A-1000A, and in this embodiment, a square-round billet electromagnetic stirrer load with an effective ac value of 600A is taken as an example for explanation, and in the main circuit structure of the electromagnetic stirring power supply shown in the present invention, wherein the IGBT1, the IGBT2, the IGBT3, the IGBT4, the IGBT5 and the IGBT6 are selected from the IGBTs with model number FF1400R12IP4 of the company British flying 1400A1200V, the nominal rated current of the IGBT is the peak current which can be continuously and normally used for a long time under the junction temperature condition of 175 ℃, and the rated current can only last for 1ms when being 2 times of the rated peak current, in addition, the normal turn-off current of the IGBT is not more than twice of the rated current of the IGBT, the normal off-current for an IGBT model FF1400R12IP4 generally should not exceed 2800A, the time can only last about 10 mus when the rated peak current is 4-5 times, and a soft turn-off method is generally adopted when the rated current is 4-5 times. As described above, it is understood that the larger the peak value of the current flowing through the IGBT is, the shorter the duration that the IGBT can last. Table 1 is a detailed data sheet parameter in datasheet in FF1400R12IP 4.

The current sensor, the current transmitter, the current divider and the current transformer can detect the alternating current of several amperes to several tens of thousands of amperes, but in the embodiment of the invention, because 2-3 times of rated magnitude (the rated current effective value is 600A) of current needs to be detected when two types of short circuit faults occur, if the current sensor is adopted, the current sensor which can measure the rated current peak value of 2500A (600 multiplied by 1.414 multiplied by 3 is 2545) needs to be selected, so that the cost is high and the cost is increased; secondly, the current sensor with the peak value 2500A for no short-circuit fault detects the current with the rated effective value of 600A and the peak value of +/-850A (600 × 1.414 is 850A), which is too wasteful; the current sensor with the peak value of 2500A has huge volume and is inconvenient to mount and arrange on a structure; the current transmitter is not suitable for detecting short-circuit current and other quick response places because the response time is in the order of ms; the current divider can cause huge energy loss when detecting current, so that the conversion efficiency is reduced, and a weak current detection part needs to be in direct contact with strong current to cause large interference on a control system; therefore, in this embodiment, a current transformer with a rated current of 4000A is used, and an LM-0.5 type feedthrough current transformer (LM-0.5 current transformation ratio N4000: 5: 800, rated output capacity 30VA) from zhejiang zhentai is used.

When the current is considered to exceed 150% of rated load current, the short-circuit overcurrent fault threshold of the type two short circuits is considered to be reached, namely the starting threshold of the short-circuit current of the type two is I600 multiplied by 1.414 multiplied by 1.5 1272A (600 multiplied by 1.414 is the peak value of 600A effective value, corresponding to the fact that the output current exceeds 150% of rated output current), the precision of the general current transformer is about 2-3%, therefore, when the IGBT current is considered to flow to reach 1300A peak value, the IGBT reaches the fault detection threshold of the type two short circuits, and V-ref is calculated as the following formula (1300/800) multiplied by 1.538 multiplied by 2.5V (wherein 800 is converted from the current transmission ratio 4000: 5 of the current transformer, and 1.538 omega is the resistance value of the resistor R1-I in fig. 4 and 5);

in the fault detection circuit of the present invention, the current signal output by the current transformer is converted into a voltage signal through the resistor R1, for example, as shown in fig. 9, when the peak value flowing into the current transformer reaches 1300A at time T1 (point a), a voltage with V ═ 1300/800 × 1.538 ═ 2.5V is generated across the resistor R1-i, or the peak value flowing into the current transformer is-1300A, Ui ═ 1300/800 × 1.538 ═ 2.5V is calculated, and then a sine wave with peak value ± 2.5V (as shown in fig. 8, channel 3) is output to the output terminal of the operational amplifier U3-i through the full-wave rectification circuit, and a positive waveform with peak value of 2.5V and 0V is output (as shown in fig. 8, channel 1). Comparing the output voltage of the operational amplifier U3-i with the reference voltage Vref 1-2.5V, when the input current is greater than 1300A in the time T1-T2, the peak value of the absolute value of the voltage across the resistor R1-i is greater than 2.5V, i.e. the operational amplifierThe output peak value of the U3-i is larger than 2.5V, the comparator U1041-i outputs high level at the moment, the output high level of the comparator U1041-i is connected to the enabling end of the digital switching device U105-i, the digital switch is conducted at the moment, the output of the operational amplifier U3-i is connected to the non-inverting input end of the operational amplifier U6-i through the resistor R10-i at the moment, if the output value of the operational amplifier U3 is always larger than 2.5V within the time T1-T2, the current value detected by the current transformer is always larger than 1300A, and the output of the operational amplifier U6-i reaches the output value after the time T1-T2

(R10-i is R11-i, and C1-i is C2-i, where R is R10-i or R11-i, and C is C2-i or C1-i), when the resistance of R and the capacitance of C are constant, when the integral is carried out, the integral is carried out

Above a certain threshold, i.e.

Greater than V_TH，_highX R x C, i.e

Greater than inverter input V_TH，highAnd the threshold value is the minimum value, the U107-i level is inverted to output a low level, which indicates that the electromagnetic stirring variable frequency power supply does reach the condition of the second type short circuit, and the controller 10 determines that the electromagnetic stirring variable frequency power supply reaches the second type short circuit fault when detecting the low level. U108 may be implemented as a three-input AND logic chip, model number NXP 74HC 11D. And if any U107-i outputs a low level, the U108 also outputs the low level, and the output of the U108 directly blocks the IGBT of the inverter part of the electromagnetic stirring variable frequency power supply.

When U105-i is enabled, the voltage of VO3-i is equal to the voltage of U6 in-i.

The in-phase end of the operational amplifier is equal to the out-phase end V- ═ V + when in negative feedback;

then inverse transformation is carried out to obtain

When the digital switch U105-i is not enabled, the non-inverting input of the operational amplifier U6-i is pulled down to GND for the integrating circuit by R9-i, i.e., VO3 is 0V, according to the above formula, then VO6 is 0V, and the logic chip U107-i outputs a high level;

now, for example, the calculation:

in the first case, when the variable frequency power supply of the electromagnetic stirrer adopts an incoming line voltage to supply power for a three-phase 500VAC power supply, the voltage of a direct current bus is V after AC-DC rectification filtering conversion_DC-LinkAssuming that the phases are short-circuited between U, V in fig. 3, the inductance value of U, V short-circuit loop power cable is set to be 5 μ H, using the formula

One microsecond time current increment Δ I700V × 1 μ s/5 μ H140A, assuming V within 5 μ s_DC-Link700VDC is a constant value, 5 microseconds later, current increment Δ I is 5 × 140A is 700A, as shown in fig. 9, when the detected current reaches 1300A at time T1, two types of short-circuit integration circuits are started, VO3-I is 2.5V, when 5 microseconds later, the current reaches T2, I is 1300A + Δ I is 2000A, VO3-I is 3.845V at time T2, and we take R10 to 3.845VR11 is 1000 Ω, the capacitance values of C1-i and C2-i are 4500pF, when the current reaches 1300A at the time of T1, two types of short circuits occur, the integration circuit is started, and when the current reaches T2 after 5 microseconds, the integration circuit reaches the threshold value, namely VO6-i reaches 3.525V. U107-i is a logic chip, and the model is a 74HC04D chip of NXP company. VO6 is the output voltage of integrating circuit U106-i.

VO6 reaches a high level minimum threshold voltage V of U107-i (74HC04D powered with 5V voltage)_TH，high＝3.5V(V_TH，highIs the chip minimum high input threshold voltage of 74HC 04D) when the logic chip U107-i outputs a low. The integration pattern is schematically shown in fig. 9.

In the second situation, when the variable frequency power supply of the electromagnetic stirrer adopts an incoming line voltage to supply power for a three-phase 500VAC power supply, the voltage of a direct current bus is V after AC-DC rectification filtering conversion_DC-LinkAssuming that the inter-phase short circuit occurs between U, V in fig. 3 even though 700VDC, we take the minimum L of the inductance value of the power cable of the U, V short circuit loop to 35 μ H, and use the formula

One microsecond time current increment Δ I700V × 1 μ s/35 μ H20A, assuming V within 6.2 μ s_DC-Link700VDC is a constant value, after 6.2 microseconds, the current increment Δ I is 6.2 × 20A — 124A, as shown in fig. 9, when the detected current reaches 1300A at time T1, two types of short-circuit integration circuits are activated, at which time VO3-I is 2.5V, when the detected current reaches time T2 after 6.2 microseconds, the current reaches time I1300A + Δ I is 1424A, at time T2, VO3-I is 2.737V, we take R10 ═ R11 ═ 1000 Ω, the capacitance values of C1-I and C2-I are 4500pF, when the current reaches 1300A at time T1, two types of short-circuits occur, the integration circuit is activated, and at time T2 after 6.2 microseconds, the integration circuit reaches a threshold value, that is 6-I reaches 3.608V. U107-i is a logic chip with model number of NXP company 74HC04D chip. VO6 is the output voltage of integrating circuit U106-i.

When the formula

The larger the value of L in (1 us), the slower and smaller the rate of change Δ I of the current in 1us, the smaller the slope of the rise of a to B in the reaction graph in fig. 9, the longer the integration time required to reach the protection threshold; when the formula

The faster the rate of change of current Δ I within 1us, the smaller the value of L in (a), the greater the slope of the rise of a to B in the reaction chart 9, the shorter the integration time required to reach the protection threshold.

When the second type short-circuit fault occurs, the second type short-circuit integrating circuit is started, after a plurality of time integrals, VO6 reaches a threshold value, the logic chip U107-I outputs a low level, the low level directly blocks the inversion SPWM pulse modulation wave of the electromagnetic stirring variable-frequency power supply, and the electromagnetic stirring variable-frequency power supply stops working because the IGBT is at the maximum I at the moment_cHard turn-off under 2000A condition, IGBT turn-off current is rated turn-off current I under normal condition_cTwice as much as 848A (600A × 1.414 — 848A), however, at this time, I_c2000A does not reach 4-5 times rated current condition required by a protective desaturation state, an IGBT digital driver or an IGBT driving core does not start a soft turn-off process, the IGBT driver or the IGBT driving core is turned off at normal speed, and the turn-off spike voltage L × di/dt generated by the IGBT under 2000A is the turn-off generated by turn-off under rated 848A (600 × 1.414 ═ 848A)Peak voltage two times more V_DC-Link700VDC (as long as the off-time, the rate of change of current di is more than twice the normal off-current).

Therefore, only verification is performed in the scheme

When the turn-off current is maximum when the medium inductance L is minimum, that is, when the two-class short-circuit loop L is 5uH, the IGBT in the variable frequency power supply dedicated to the electromagnetic stirrer is turned off under 2000A, and the turn-off peak voltages L × di/dt and V are generated_DC-LinkThe sum is not enough to break down the IGBT (the voltage born between the collector and the emitter of the IGBT is less than 1200V), the present embodiment uses the existing variable frequency power supply module special for electromagnetic stirring to perform the test, the magnitude of the turn-off spike voltage is tested by using a single pulse experiment, and it can be known from the test that the maximum sum of the spike voltage generated when the IGBT in the electromagnetic stirring variable frequency power supply is turned off under 2000A and the dc bus voltage is only 1040V, which is obviously lower than the rated IGBT of 1200V in the embodiment; therefore, the 'class II short circuit' detection device can reliably and effectively detect the load short circuit fault of the electromagnetic stirrer and can ensure that the IGBT is reliably turned off under the conditions of safe current and voltage.

In the embodiment, U1-i, U2-i, U3-i and U6-i are operational amplifiers, OPA810IDT of TI company can be adopted as model numbers, high-speed comparator chips are U1041-i and U1042-i, and TLV3502AID of TI company can be adopted as model numbers.

The technical effects of the invention comprise:

1. the scheme has the advantages that the types and the number of the required components are small, and the components are all universal electronic components, so that the hardware cost of the scheme is very low;

2. in the scheme, except for the current transformer, other components are all components packaged by the surface mount device, so that only little physical space is needed;

3. in the scheme, any resource of the microcontroller is not required to be occupied before the second-class short-circuit fault occurs, so that the reliability of the control system is greatly improved;

4. according to the scheme, a hardware integrating circuit is adopted to detect the two types of short-circuit faults in a fault signal accumulation mode, and compared with a single threshold value in a severe electromagnetic interference environment where the electromagnetic stirring variable-frequency power supply is located, the robustness and accuracy of detection can be greatly improved.

5. In the scheme, the faster the rising rate of the current flowing during the second type short circuit is, the shorter the time required to reach the second type short circuit threshold value is, the slower the rising rate of the current flowing during the second type short circuit is, and the longer the time required to reach the second type short circuit threshold value is, which is very consistent with the service life characteristic of the IGBT mentioned above, namely when the second type short circuit protection plays a protection role, the large duration of the current flowing through the IGBT is short, and the small duration of the current flowing through the IGBT is long.

As shown in fig. 10, the second embodiment of the over-current fault detection circuit 500 differs from the first embodiment in that: the output end of the current/voltage conversion unit U102-i is electrically connected to the input end of a first voltage comparison unit of the ith overcurrent fault detection unit, the first voltage comparison unit of the ith overcurrent fault detection unit comprises a voltage comparator U1041-i, a voltage comparator U1042-i and a logic OR gate U1043-i, the non-inverting input end of the voltage comparator U1041-i, the inverting input end of the voltage comparator U1042-i, the output end of the current/voltage conversion unit U102-i and the input end of the voltage absolute value unit U103-i are electrically connected with each other, the inverting input end of the voltage comparator U1041-i and the non-inverting input end of the voltage comparator U1042-i are respectively and electrically connected with a first reference voltage end Vref1 and a second reference voltage end Vref2, the voltage value and the voltage value of the first reference voltage end Vref1 are, The voltage values of the second reference voltage terminal Vref2 are respectively equal to V + and V-, the output terminals of the voltage comparators U1041-i and the output terminals of the voltage comparators U1042-i are respectively and correspondingly connected with two input terminals of a logic or gate U1043-i, and the output terminal of the logic or gate U1043-i is the output terminal of the first voltage comparison unit of the ith overcurrent fault detection unit.

Fig. 13 is a schematic diagram illustrating one embodiment of an over-voltage fault detection circuit 600. The positive input end L + and the negative input end L-of the voltage sensor U1091 are electrically connected to two ends of the electrolytic capacitor module 60, respectively, the output end of the voltage sensor U1091 is electrically connected to the inverting input end of the comparator U1092, the non-inverting input end of the voltage comparator U1092 is connected to the third reference voltage terminal Vref3, and the output end of the voltage comparator U1092 is the output end of the overvoltage fault detection circuit 600 and is used for outputting an overvoltage fault signal. When the voltage of the direct current bus exceeds a certain threshold value, the output voltage Vout at the output end of the voltage sensor U1091 also exceeds a certain threshold value V-ref, so that the comparator U1092 outputs a low level and reports a voltage fault protection signal. The voltage sensor U1091 can be NCV 1-1200V.

Defining each IGBT of the three-phase full-bridge inverter 40 as an IGBT₁、IGBT₂、IGBT₃、IGBT₄、IGBT₅、IGBT₆。

As shown in fig. 14, the short-circuit fault detection circuit 400 includes 6 short-circuit fault detection units, 6 first isolation transmission units, and an and circuit U112; the jth short-circuit fault detection unit comprises a comparator U1101_jCurrent source U1102_jReference voltage source U1103_jCapacitor C1101_jDiode D1101_j(ii) a The comparator U1101_jInverting input terminal and capacitor C1101_jOne terminal, current source U1102_jAnode, diode D1101_jThe anodes being electrically connected to each other, diode D1101_jCathode and IGBT_jIs electrically connected with the collector of the current source U1102_jCathode and IGBT_jSupply voltage terminal VCC_jElectrically connecting; the comparator U1101_jNon-inverting input terminal and reference voltage source U1103_jThe positive electrode is electrically connected; the reference voltage source U1103_jNegative electrode and capacitor C1101_jThe other ends of the two insulated gate bipolar transistors are connected with the IGBT_jThe emitter of (2) is electrically connected; the comparator U1101_jThe output end is the output end of the jth short-circuit fault detection unit; the output end of the jth short-circuit fault detection unit passes through the jth first isolation transmission unit U1104 respectively_jThe jth input end of the and circuit U112 is connected, and the output end of the and circuit U112 is the output end of the short-circuit fault detection circuit 400; j is 1,2, … …, 6.

As shown in FIG. 14, the jth first isolated transmission listYuan U1104_jPreferably an opto-coupler isolation transmission unit.

As shown in fig. 14-15, when the IGBT_jWhen short-circuit protection is achieved, IGBT_jEntering a desaturated conduction state, at which time the IGBT_jCollector-emitter voltage VCE_jReaching DC bus voltage, IGBT in the upper diagram_jCollector voltage higher than VCC_jVoltage value of IGBT at this time_jPower supply terminal VCC_jCapacitor C1101 of constant current source telescope capacitor_jCharging the capacitor C1101 all the time_jTo VCC_jOnce the capacitor C1101 is charged_jIs greater than VREF, the comparator outputs a low level, and when the IGBT is in saturation conduction, the voltage VCE between the collector and the emitter of the IGBT is_jOnly about 2-3V, then the capacitor C1101_jUpper voltage of VCE_jAnd the conducting voltage drop of the diode is 0.7V, and the voltage value is smaller than VREF at the moment, so that the comparator outputs high level.

It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other.

The embodiments of the present invention have been described in detail, but the description is only for the preferred embodiments of the present invention and should not be construed as limiting the scope of the present invention. All equivalent changes and modifications made within the scope of the present invention should be covered by the present patent. After reading this disclosure, modifications of various equivalent forms of the present invention by those skilled in the art will fall within the scope of the present application, as defined in the appended claims. The embodiments and features of the embodiments of the present invention may be combined with each other without conflict.

Claims

1. The electromagnetic stirring variable frequency power supply fault shutdown protection method comprises an alternating current contactor (20), a three-phase full-bridge rectifier (30) and a three-phase full-bridge inverter (40) which are sequentially connected, wherein each bridge arm of the three-phase full-bridge inverter (40) is provided with a first IGBT and a second IGBT which are connected in series in the same direction and are respectively positioned on an upper bridge arm and a lower bridge arm, the first IGBT and the second IGBT of the ith bridge arm are mutually connected to form the inversion output of the ith bridge arm of the electromagnetic stirring variable frequency power supply, and i =1,2, 3;

the fault shutdown protection method is characterized by comprising the following steps: if any fault of a short-circuit fault, an overcurrent fault and an overvoltage fault occurs in the electromagnetic stirring variable frequency power supply, providing a first level for the control end of each first IGBT and providing a second level for the control end of each second IGBT, wherein the first level and the second level are respectively a high level and a low level or respectively a low level and a high level; the operation of supplying the control terminal of each first IGBT with the first level and supplying the control terminal of each second IGBT with the second level is performed earlier than the operation of opening the ac contactor (20).

2. The electromagnetic stirring variable frequency power supply fault shutdown protection method of claim 1, characterized in that: the fail-safe method further comprises: the operation of opening the ac contactor (20) is earlier than the down time of the water circulation cooling system for electromagnetic stirring.

3. The electromagnetic stirring variable frequency power supply fault shutdown protection device comprises an alternating current contactor (20), a three-phase full-bridge rectifier (30) and a three-phase full-bridge inverter (40) which are sequentially connected, wherein each bridge arm of the three-phase full-bridge inverter (40) is provided with a first IGBT and a second IGBT which are connected in series in the same direction and are respectively positioned on an upper bridge arm and a lower bridge arm, the first IGBT and the second IGBT of the ith bridge arm are mutually connected to form the inversion output of the ith bridge arm of the electromagnetic stirring variable frequency power supply, i =1,2 and 3, and the electromagnetic stirring variable frequency power supply further comprises a controller (10) with 3 pulse width modulation signal output ends;

characterized in that the fail-safe protection device comprises a first logic gate circuit, 3 second logic gate circuits, 3 inverters Uc₁、Uc₂、……、Uc₃；

The output end of a short-circuit fault detection circuit (400) and/or the output end of an overcurrent fault detection circuit (500) and/or the output end of an overvoltage fault detection circuit (600) of the electromagnetic stirring variable-frequency power supply are/is electrically connected with the input end of a first logic gate circuit, the output end of the first logic gate circuit and the ith pulse width modulation signal output end of a controller (10) are/is correspondingly and electrically connected with the two input ends of an ith second logic gate circuit, the output end of the ith second logic gate circuit is electrically connected with a first IGBT control end of an ith bridge arm or a second IGBT control end of the ith bridge arm, and the output end of the ith second logic gate circuit is electrically connected with a second IGBT control end of the ith bridge arm or a first IGBT control end of the ith bridge arm through an ith phase inverter Uc_iElectrically connecting;

the structure of the second logic gate circuit is that: when no short-circuit fault, no overcurrent fault or no overvoltage fault occurs, the output level state of the ith second logic gate circuit is the same as the level state of the ith pulse width modulation signal of the controller (10), otherwise, each second logic gate circuit outputs a second level, and the first level and the second level are respectively a high level and a low level or respectively a low level and a high level;

the fault shutdown protection device further comprises a third logic gate circuit, the output end of the first logic gate circuit and one IO interface end of the controller are respectively and correspondingly electrically connected with two input ends of the third logic gate circuit, the output end of the third logic gate circuit is electrically connected with the control end of the alternating current contactor, and the third logic gate circuit is structurally characterized in that: if the first logic gate circuit outputs the first level, the coil of the alternating current contactor (20) is in a power-on state, otherwise, the coil is in a power-off state.

4. The electromagnetic stirring variable frequency power supply fault shutdown protection device of claim 3, characterized in that: the fault shutdown protection device further comprises a relay (50), wherein the two ends of the coil of the relay (50) are respectively and correspondingly electrically connected with the output end of the third logic gate circuit and the ground, a pair of normally open contacts of the relay (50) are respectively and electrically connected with the positive end of the power supply of the alternating current contactor (20) and one end of the coil of the alternating current contactor (20), and the other end of the coil of the alternating current contactor (20) is electrically connected with the negative end of the power supply of the alternating current contactor (20).

5. The electromagnetic stirring variable frequency power supply fault shutdown protection device of claim 3, characterized in that: the first logic gate circuit, the ith second logic gate circuit and the third logic gate circuit are respectively a logic AND gate Un₁And logic and gate Ua_iAND logic AND gate Un₂(ii) a Or

The first logic gate circuit and the ith second logic gate circuit are respectively a logic NAND gate Un₃Logical OR gate Ub_iThe third logic gate circuit comprises a logic AND gate Un₄Inverter Un₅Said logic NAND gate Un₃Through an inverter Un₅AND logic AND gate Un₄Is electrically connected to one input terminal of the controller (10), and one IO interface terminal of the controller (10) is connected to the logic and gate Un₄Is electrically connected to the other input terminal of the logic and gate Un₄The output of which is the output of the third logic gate circuit.

6. The electromagnetic stirring variable frequency power supply fault shutdown protection device of claim 3, characterized in that: the short-circuit fault detection circuit (400), the overcurrent fault detection circuit (500) and the overvoltage fault detection circuit (600) are structurally such that:

the level output by the short-circuit fault detection circuit (400) when a short-circuit fault occurs, the level output by the overcurrent fault detection circuit (500) when an overcurrent fault occurs, and the level output by the overvoltage fault detection circuit (600) when an overvoltage fault occurs are the same as a first level or a second level, and the level output by the short-circuit fault detection circuit (400) when a short-circuit fault does not occur, the level output by the overcurrent fault detection circuit (500) when an overcurrent fault does not occur, and the level output by the overvoltage fault detection circuit (600) when an overvoltage fault does not occur are the same as a second level or a first level.

7. The electromagnetic stirring variable frequency power supply fault shutdown protection device of any one of claims 3-6, characterized in that: the overcurrent fault detection circuit (500) comprises 3 overcurrent fault detection units, the ith overcurrent fault detection unit comprises a current measurement device U101-i for measuring the output current of the ith bridge arm of the electromagnetic stirring variable frequency power supply, a current/voltage conversion unit U102-i, a voltage absolute value unit U103-i, an analog switch U105-i and an integrating circuit U106-i, the current measurement device U101-i, the current/voltage conversion unit U102-i and the voltage absolute value unit U103-i are sequentially and electrically connected, two connecting ends of the analog switch U105-i are respectively and correspondingly and electrically connected with the output end of the voltage absolute value unit U103-i and the input end of the integrating circuit U106-i, and the output end of the integrating circuit U106-i is connected with an inverter U107-i;

the output end of the inverter U107-i is electrically connected to the ith input end of the AND gate circuit U108, and the output end of the AND gate circuit U108 is the output end of the overcurrent fault detection circuit (500); i =1,2, 3.

8. The electromagnetic stirring variable frequency power supply fault shutdown protection device of claim 7, characterized in that: the output end of the voltage absolute value unit U103-i is electrically connected to the input end of a first voltage comparison unit of the ith overcurrent fault detection unit, the first voltage comparison unit of the ith overcurrent fault detection unit comprises a voltage comparator U1041-i, the non-inverting input end and the inverting input end of the voltage comparator U1041-i are respectively and electrically connected with the output end of the voltage absolute value unit U103-i and a first reference voltage end Vref1, and the voltage value of the first reference voltage end Vref1 is equal to V +; or

The output end of the current/voltage conversion unit U102-i is electrically connected to the input end of a first voltage comparison unit of the ith overcurrent fault detection unit, the first voltage comparison unit of the ith overcurrent fault detection unit comprises a voltage comparator U1041-i, a voltage comparator U1042-i and a logic OR gate U1043-i, the non-inverting input end of the voltage comparator U1041-i, the inverting input end of the voltage comparator U1042-i, the output end of the current/voltage conversion unit U102-i and the input end of the voltage absolute value unit U103-i are electrically connected with each other, the inverting input end of the voltage comparator U1041-i and the non-inverting input end of the voltage comparator U1042-i are respectively and correspondingly and electrically connected with a first reference voltage end Vref1 and a second reference voltage end Vref2, the voltage value of the first reference voltage end Vref1 and the voltage value of the second reference voltage end Vref2 are respectively equal to V +, (V +), And the output ends of the voltage comparators U1041-i and the output ends of the voltage comparators U1042-i are correspondingly connected with two input ends of a logic OR gate U1043-i respectively, and the output end of the logic OR gate U1043-i is the output end of a first voltage comparison unit of the ith overcurrent fault detection unit.

9. The electromagnetic stirring variable frequency power supply fault shutdown protection device of any one of claims 3-6, characterized in that: the electromagnetic stirring variable frequency power supply comprises an electrolytic capacitor module (60) connected between two ends of the bridge arm;

the overvoltage fault detection circuit (600) comprises a voltage sensor U1091 and a voltage comparator U1092, wherein a positive input end and a negative input end of the voltage sensor U1091 are electrically connected with two ends of an electrolytic capacitor module (60) respectively, an inverting input end and a non-inverting input end of the comparator U1092 are electrically connected with an output end of the voltage sensor U1091 and a third reference voltage end Vref3 correspondingly, and an output end of the voltage comparator U1092 is an output end of the overvoltage fault detection circuit (600).

10. The electromagnetic stirring variable frequency power supply fault shutdown protection device of any one of claims 3-6, characterized in that:

defining each IGBT of the three-phase full-bridge inverter (40) as an IGBT₁、IGBT₂、IGBT₃、IGBT₄、IGBT₅、IGBT₆；

The short-circuit fault detection circuit (400) comprises 6 short-circuit fault detection units, 6 first isolation transmission units and an AND gate circuit U112, wherein the input ends and the output ends of the first isolation transmission units are not grounded together;

the output end of the jth short-circuit fault detection unit passes through the jth first isolation transmission unit U1104_jIs connected to the jth input of an AND-gate circuit U112, which is an AND-gateThe output end of the circuit U112 is the output end of the short-circuit fault detection circuit (400); j =1,2, … …, 6.