CN112398210A - Dual-power supply system with current balance function and dual-power balance controller - Google Patents
Dual-power supply system with current balance function and dual-power balance controller Download PDFInfo
- Publication number
- CN112398210A CN112398210A CN201910739064.6A CN201910739064A CN112398210A CN 112398210 A CN112398210 A CN 112398210A CN 201910739064 A CN201910739064 A CN 201910739064A CN 112398210 A CN112398210 A CN 112398210A
- Authority
- CN
- China
- Prior art keywords
- transistor switch
- coupled
- power supply
- switch module
- dual
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000009977 dual effect Effects 0.000 claims abstract description 61
- 239000003990 capacitor Substances 0.000 claims description 34
- 230000000694 effects Effects 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 10
- 230000005669 field effect Effects 0.000 description 5
- 229910044991 metal oxide Inorganic materials 0.000 description 5
- 150000004706 metal oxides Chemical class 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- 230000008878 coupling Effects 0.000 description 3
- 238000010168 coupling process Methods 0.000 description 3
- 238000005859 coupling reaction Methods 0.000 description 3
- 230000007423 decrease Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000011664 signaling Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/34—Parallel operation in networks using both storage and other dc sources, e.g. providing buffering
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
Abstract
The invention relates to a power supply system, in particular to a dual-power supply system with current balance and a dual-power balance controller. The dual power supply system with current balancing comprises: a first transistor switch module, coupled to the first control terminal Drv1, the first power input terminal V1 and the system output terminal Vo1 of the dual power balance controller, for controlling the first power supply to provide a voltage to the system output terminal Vo 1; a second transistor switch module, coupled to the second control terminal Drv2, the second power input terminal V2 and the system output terminal Vo1 of the dual power balance controller, for controlling the second power supply to provide a voltage to the system output terminal Vo 1; the purpose of supplying power to a high-power load is achieved through a small number of transistor switches and a simple control circuit design, cost is saved, and the effect of saving energy during light load is achieved, so that the limitation of the prior art is overcome.
Description
Technical Field
The invention relates to a power supply system, in particular to a dual-power supply system with current balance and a dual-power balance controller.
Background
With the rise of electronic devices, the requirements on power supply systems are also increasing, and especially when power is supplied to a high-power load, a single power supply cannot meet the power requirements, so that two or more power supplies are required to supply power to the electronic devices at the same time. Because there may be a voltage difference between each group of power supplies, if different power supplies are directly short-circuited, a current back-flow phenomenon may occur.
As shown in fig. 1, the dual power supply system includes two sets of Buck converters, input ends of the Buck converters are respectively coupled to a first power voltage V1 and a second power voltage V2, output ends of the Buck converters are respectively coupled to an inductor, and the other end of the inductor is simultaneously coupled to an output voltage Vo, so as to superimpose V1 and V2 together and provide power to a load end.
However, in the conventional implementation, the number of Buck drivers in each group of Buck converters is relatively large, the requirements on the number and impedance of transistors are relatively high, and the number of inductors is also large, thereby resulting in high cost. In addition, the switching loss of the conventional dual power supply system under light load also causes the problem of no energy saving.
Disclosure of Invention
In view of the problems of the dual power supply system in the prior art, the invention provides a dual power supply system with current balance and a dual power balance controller, which achieve the purpose of supplying power to a high-power load through a small number of transistor switches and a simple control circuit design, save cost, and achieve the effect of saving energy during light load, thereby overcoming the limitations of the prior art.
According to the technical scheme provided by the invention, as the first aspect of the invention:
there is provided a dual power supply system with current balancing, the dual power supply system with current balancing comprising: the system comprises a first transistor switch module, a second transistor switch module and a dual-power balance controller;
the first transistor switch module is coupled with a first control terminal Drv1, a first power input terminal V1 and a system output terminal Vo1 of the dual power balance controller; for controlling the first power supply to provide a voltage to the system output Vo 1;
the second transistor switch module is coupled to a second control terminal Drv2, a second power input terminal V2 and a system output terminal Vo1 of the dual power balance controller, and is configured to control the second power supply to provide a voltage to the system output terminal Vo 1;
the dual-power balance controller is used for controlling the first control terminal Drv1 to output a first driving signal to the first transistor switch module according to a balance control signal, and controlling the second control terminal Drv2 to output a second driving signal to the second transistor switch module;
the first driving signal can control the first transistor switch module to be switched on or switched off, and the second driving signal can control the second transistor switch module to be switched on or switched off; and the first transistor switch module and the second transistor switch module are not turned on at the same time.
Further, the balance control signal is a frequency signal generated inside the dual power balance controller, or an external adjustable frequency signal.
Further, the frequency range of the balance control signal is: 10KHz to 100 KHz.
Further, if the voltage provided by the first power supply is not equal to the voltage provided by the second power supply, the first transistor switch module and the second transistor switch module respectively include two transistor switch tubes connected in series.
Further, the first transistor switch module includes a first transistor switch M1 and a third transistor switch M3, a source of the first transistor switch M1 is coupled to the first power input terminal V1, a drain of the first transistor switch M1 is coupled to a drain of the third transistor switch M3, a source of the third transistor switch M3 is coupled to the system output terminal Vo1, and a gate of the first transistor switch M1 and a gate of the third transistor switch M3 are both coupled to the first control terminal Drv 1;
the second transistor switch module comprises a second transistor switch M2 and a fourth transistor switch M4, a source of the second transistor switch M2 is coupled to the second power input terminal V2, a drain of the second transistor switch M2 is coupled to a drain of the fourth transistor switch M4, a source of the fourth transistor switch M4 is coupled to the system output terminal Vo1, and gates of the second transistor switch M2 and the fourth transistor switch M4 are coupled to the second control terminal Drv 2;
the system output Vo1 is connected to one end of an inductor L, and the other end of the inductor L is coupled to a load terminal Vo 2.
Further, if the voltage provided by the first power source is equal to the voltage provided by the second power source, the first transistor switch module and the second transistor switch module respectively include a transistor switch.
Further, the first transistor switch module includes a fifth transistor switch M5, a drain of the fifth transistor switch M5 is coupled to the first power input terminal V1, a source of the fifth transistor switch M5 is coupled to the system output terminal Vo1, and a gate of the fifth transistor switch M5 is coupled to the first control terminal Drv 1;
the second transistor switch module includes a sixth transistor switch M6, a drain of the sixth transistor switch M6 is coupled to the second power input terminal V2, a source of the sixth transistor switch M6 is coupled to the system output terminal Vo1, and a gate of the sixth transistor switch M6 is coupled to the second control terminal Drv 2.
Further, the first power input terminal V1 is coupled to one end of a first input capacitor Cv1, and the other end of the first input capacitor Cv1 is grounded; the second power input terminal V2 is coupled to one end of a second input capacitor Cv2, and the other end of the second input capacitor Cv2 is grounded.
Further, the dual power source balance controller includes:
the balance logic unit is used for generating a logic control signal to the logic driving unit according to the balance control signal;
the logic driving unit is coupled with the balance logic unit and used for outputting a first driving signal at a first control end Drv1 of the dual power supply balance controller according to the logic control signal; the second drive signal is output at the second control terminal Drv2 of the dual power balance controller.
As a second aspect of the present invention:
provided is a dual-power-supply balanced controller, including:
the balance logic unit is used for generating a logic control signal to the logic driving unit according to the balance control signal;
a logic driving unit, coupled to the balance logic unit, for outputting a first driving signal at the first control terminal Drv1 of the dual power balance controller according to the logic control signal; the second driving signal is output at the second control terminal Drv2 of the dual power balance controller according to the first aspect of the invention.
From the above, the dual power supply system with current balance and the dual power balance controller provided by the invention have the following advantages compared with the prior art: the invention can balance the current of two power supply modules under high switching frequency through simple control circuit design and a small amount of transistors, inductors and the like, provides stable voltage for high-power load, not only saves cost, but also can not generate the phenomenon of current back-flow even if larger voltage difference exists between different power supplies, does not influence the normal use of the power supply, and also realizes the effect of energy saving when in light load.
Drawings
Fig. 1 is a circuit block diagram of a conventional dual power supply system.
Fig. 2 is a schematic circuit diagram of a dual power supply system with current balancing according to a first embodiment of the present invention.
Fig. 3 is a waveform diagram of an output of the dual power supply system with current balancing shown in fig. 2.
FIG. 4 is a circuit diagram of a dual power supply system with current balancing according to a second embodiment of the present invention.
Fig. 5 is a waveform diagram of an output of the dual power supply system with current balancing shown in fig. 4.
FIG. 6 is a schematic circuit diagram of a preferred embodiment of a dual power balance controller.
10. The controller comprises a first transistor switch module, 20, a second transistor switch module, 30, a dual power supply balance controller.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to specific embodiments and the accompanying drawings. In which like parts are designated by like reference numerals. It should be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the following description refer to directions in the drawings. The terms "inner" and "outer" are used to refer to directions toward and away from, respectively, the geometric center of a particular component.
A dual power supply system with current balance is provided, which comprises a first transistor switch module 10, a second transistor switch module 20, a first power input terminal V1 for coupling with a first power source, a second power input terminal V2 for coupling with a second power source, a system output terminal Vo1 for coupling with a load, and a dual power balance controller 30;
the first transistor switch module 10, which has a control terminal coupled to the first control terminal Drv1 of the dual power source balanced controller 30, an input terminal coupled to the first power source input terminal V1, and an output terminal coupled to the system output terminal Vo1, is configured to control the first power source to provide a voltage to the system output terminal Vo1 according to the first driving signal output by the dual power source balanced controller 30;
the second transistor switch module 20 has a control terminal coupled to the second control terminal Drv2 of the dual power source balanced controller 30, an input terminal coupled to the second power source, and an output terminal coupled to the system output terminal Vo1, and is configured to control the second power source to provide a voltage to the system output terminal Vo1 according to the second driving signal output by the dual power source balanced controller 30;
the dual power balance controller 30 is configured to control the first control terminal Drv1 to output a first driving signal to the first transistor switch module 10 and control the second control terminal Drv2 to output a second driving signal to the second transistor switch module 20 according to a balance control signal;
the first driving signal can control the first transistor switch module 10 to be turned on or off, and the second driving signal can control the second transistor switch module 20 to be turned on or off; and the first transistor switch module and the second transistor switch module are not turned on at the same time, it should be explained that the first transistor switch module and the second transistor switch module are not turned on at the same time includes the following situations: the first case: the first transistor switch module 10 is turned on and the second transistor switch module 20 is turned off; the second case: the first transistor switch module 10 is turned off and the second transistor switch module 20 is turned on; the third situation: the first transistor switch module 10 and the second transistor switch module 20 are both off; an alternative embodiment is that the phases of the first driving signal and the second driving signal are opposite, and when the phases of the first driving signal and the second driving signal are opposite, the first transistor switch module 10 and the second transistor switch module 20 are turned on alternately.
As a first embodiment of the present invention:
if the voltage provided by the first power source is equal to the voltage provided by the second power source, the first transistor switch module 10 and the second transistor switch module 20 respectively include a transistor. Namely, it is
The first transistor switch module 10 includes a fifth transistor switch M5, a drain of the fifth transistor switch M5 is coupled to the first power input terminal V1, a source of the fifth transistor switch M5 is coupled to the system output terminal Vo1, and a gate of the fifth transistor switch M5 is coupled to the first control terminal Drv 1; the first control terminal Drv1 is capable of outputting a first driving signal to the fifth transistor M5, for controlling the on/off of the fifth transistor M5, so as to control the first power supply to provide a voltage to the system output Vo 1;
the second transistor switch module 20 includes a sixth transistor switch M6, a drain of the sixth transistor switch M6 is coupled to the second power input terminal V2, a source of the sixth transistor switch M6 is coupled to the system output terminal Vo1, and a gate of the sixth transistor switch M6 is coupled to the second control terminal Drv 2; the second control terminal Drv2 can output a second driving signal to the sixth transistor M6 for controlling the sixth transistor M6 to be turned on or off, so as to control the second power source to provide a voltage to the system output Vo 1.
In this embodiment, the first power input terminal V1 is coupled to one end of a first input capacitor Cv1, and the other end of the first input capacitor Cv1 is grounded; the second power input terminal V2 is coupled to one end of a second input capacitor Cv2, and the other end of the second input capacitor Cv2 is grounded.
In use of the first embodiment of the present invention, the system output Vo1 is coupled to the load terminal Vo2, a connection point of the system output Vo1 and the load terminal Vo2 is coupled to one end of the second output capacitor CVo2, and the other end of the second output capacitor CVo2 is grounded. The system output Vo1 is further coupled to the first output capacitor CVo1, although the first output capacitor CVo1 may not be connected. It should be noted that the capacitance of the second output capacitor CVo2 is greater than the capacitance of the first output capacitor CVo 1.
For the first embodiment of the present invention, the voltage provided by the first power supply and the voltage provided by the second power supply are equal, and the dual-power Balance controller 30 generates a first driving signal and a second driving signal according to a Balance control signal Balance, where the first driving signal is used to control the fifth transistor M5 to be turned on or off, and the second driving signal is used to control the sixth transistor M6 to be turned on or off; the Balance control signal Balance may be a frequency signal generated inside the dual power Balance controller 30, or may be an external adjustable frequency signal, and is used to control the switching frequency of the first driving signal and the second driving signal.
Referring to fig. 3, fig. 3 is a waveform diagram of an output of the dual power supply system with current balancing shown in fig. 2. When the Balance control signal Balance is at a low level, the first driving signal output by the first control terminal Drv1 is at a high level, and the second driving signal output by the second control terminal Drv2 is at a low level, so that the fifth transistor switch M5 is driven to be turned on by the first driving signal at the high level, and the sixth transistor switch M6 is controlled to be turned off by the second driving signal at the low level, so that the first power supply supplies power to the load. Conversely, when the Balance control signal Balance is at a high level, the first driving signal output by the first control terminal Drv1 is at a low level, and the second driving signal output by the second control terminal Drv2 is at a high level, so that the fifth transistor M5 is controlled by the first driving signal at the low level to be turned off, the sixth transistor M6 is controlled by the second driving signal at the high level to be turned on, and the load is supplied by the second power source. Therefore, the phases of the first driving signal and the second driving signal are opposite, so that the fifth transistor switch M5 and the sixth transistor switch M6 are turned on alternately in the time domain. Of course, the output waveform diagram is not limited to this, and the first driving signal may be at a high level and the second driving signal may be at a low level when the Balance control signal Balance is provided.
Because the frequency of the Balance control signal Balance can reach 10 KHz-100 KHz, and the high switching frequency ensures that the conducting time of the fifth transistor switch tube M5 and the sixth transistor switch tube M6 in the conducting period is very short, the first input capacitor Cv1 and the second input capacitor Cv2 can provide stable power supply voltage for the load; assuming that the input current of the load is 10A, the frequency of the Balance control signal Balance is 50KHz, and the duty ratios of the fifth transistor switch M5 and the sixth transistor switch M6 are both 1:1, the average current of the first current provided by the first power supply is about 5A, and the average current of the second current provided by the second power supply is about 5A. That is, in the dual power supply system, the first current provided when the first transistor switch module 10 is turned on and the second current provided when the second transistor switch module 20 is turned on are balanced by high frequency switching in the present embodiment. In addition, compared with the conventional technology, the number of Buck drivers, transistors and inductors in the dual-power balance controller 30 is reduced, and the requirement of the dual-power balance controller on the impedance of the transistors is not high, so that the cost is greatly saved.
It should be noted that the duty ratios of the fifth transistor M5 and the sixth transistor M6 are not limited to 1:1, and it is only necessary to satisfy that the sum of the on-time of the fifth transistor M5 and the on-time of the sixth transistor M6 in one period is equal to the on-time required by the load.
As a second embodiment of the present invention:
in the second embodiment of the present invention, the voltage provided by the first power source is not equal to the voltage provided by the second power source, and the first transistor switch module 10 and the second transistor switch module 20 respectively include two transistor switches connected in series. That is, the first transistor switch module 10 includes a first transistor switch M1 and a third transistor switch M3, the source of the first transistor switch M1 is coupled to the first power input terminal V1, the drain of the first transistor switch M1 is coupled to the drain of the third transistor switch M3, the source of the third transistor switch M3 is coupled to the system output terminal Vo1, and the gate of the first transistor switch M1 and the gate of the third transistor switch M3 are both coupled to the first control terminal Drv 1;
the second transistor switch module 20 includes a second transistor switch M2 and a fourth transistor switch M4, a source of the second transistor switch M2 is coupled to the second power input terminal V2, a drain of the second transistor switch M2 is coupled to a drain of the fourth transistor switch M4, a source of the fourth transistor switch M4 is coupled to the system output terminal Vo1, and gates of the second transistor switch M2 and the fourth transistor switch M4 are coupled to the second control terminal Drv 2.
In this embodiment, the first power input terminal V1 is coupled to one end of a first input capacitor Cv1, and the other end of the first input capacitor Cv1 is grounded; the second power input terminal V2 is coupled to one end of a second input capacitor Cv2, and the other end of the second input capacitor Cv2 is grounded.
In the second embodiment of the present invention, in use, the system output Vo1 is coupled to one end of an inductor L, the other end of the inductor L is coupled to the load terminal Vo2, a connection point of the inductor L and the load terminal Vo2 is coupled to one end of a second output capacitor CVo2, and the other end of the second output capacitor CVo2 is grounded. The system output Vo1 is coupled to the first output capacitor CVo1, although the first output capacitor CVo1 may not be connected. It should be explained that the inductor L has a characteristic that the inductor current cannot change abruptly, so that a stable power supply voltage can be provided to the load terminal Vo 2; the capacitance range of the first output capacitor Cvo1 is 1 uF-4.7 uF, the first output capacitor Cvo1 can provide current follow current for the inductor L during balanced switching, and the first transistor switch module 10 and the second transistor switch module 20 cannot generate the situation of current backflow after balanced switching due to the fact that the capacitance value of the capacitor is small.
Referring to fig. 5, fig. 5 is a waveform diagram of an output of the dual power supply system with current balancing shown in fig. 4. For example, but not limiting of, assume that the voltage (13V) provided by the first power supply is greater than the voltage (11V) provided by the second power supply. When the Balance control signal Balance is at a low level, the first driving signal output by the first control terminal Drv1 is at a high level, the second driving signal output by the second control terminal Drv2 is at a low level, so that the first driving signal at the high level controls the first transistor switch M1 and the third transistor switch M3 to be turned on, the second driving signal at the low level controls the second transistor switch M2 and the fourth transistor switch M4 to be turned off, the first power supply charges the first output capacitor CVo1, the voltage at the system output terminal Vo1 is quickly charged to be approximately equal to the voltage (13V) of the first power supply, and the inductor current gradually rises; when the Balance control signal Balance is at a high level, the first driving signal outputted by the first control terminal Drv1 is at a low level, the second driving signal outputted by the second control terminal Drv2 is at a high level, so that the first driving signal at the low level controls the first transistor switch M1 and the third transistor switch M3 to be turned off, the second driving signal at the high level controls the second transistor switch M2 and the fourth transistor switch M4 to be turned on, the first output capacitor CVo1 is discharged, the voltage at the system output terminal Vo1 is quickly discharged to be approximately equal to the voltage (11V) of the second power supply, and the inductor current gradually decreases. The inductor L and the second output capacitor CVo2 form a filter, so the output voltage of the load terminal Vo2 is about the average (12V) of the voltage of the first power source and the voltage of the second power source. In this embodiment, the first current I1 provided when the first transistor switch module 10 is turned on and the second current I2 provided when the second transistor switch module 20 is turned on are balanced in the dual power supply system by switching the high frequency.
The embodiment not only reduces the number of Buck drivers, transistors and inductors, saves cost, but also avoids the phenomenon of current back-flow even if larger voltage difference exists between different power supplies.
In the above embodiments, the type of the transistor switch is not limited to the embodiments described in the specification, and may be a transistor type known to those skilled in the art, such as an N-type metal oxide semiconductor field effect transistor (NMOS), a P-type metal oxide semiconductor field effect transistor (PMOS), a Bipolar Junction Transistor (BJT), an insulated gate transistor (IGBT), and the like.
Referring to fig. 6, fig. 6 is a circuit diagram of a dual power balance controller according to a preferred embodiment. Here, the transistor switch is an N-type metal oxide semiconductor field effect transistor (NMOS) as an example. The dual-power balance controller 30 includes a balance logic unit 301, a level shift unit 302, a logic driving unit 303, and a charge pump 304.
The Balance logic unit 301 is configured to receive a Balance control signal Balance, and generate a potential shift control signal CTRL according to the Balance control signal Balance, where the Balance control signal Balance may also be set inside the chip. Since the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are N-type metal oxide semiconductor field effect transistors (NMOS), the voltage of the first driving signal or the second driving signal must be higher than the voltage of the system output Vo1 when the first transistor M1, the second transistor M2, the third transistor M3 and the fourth transistor M4 are turned on (the voltage difference needs to be more than 4V to obtain a smaller impedance). The charge pump 304 provides a power voltage higher than the voltage (4V) of the system output Vo1, which can completely turn on the first transistor M1 and the third transistor M3 (or the second transistor M2 and the fourth transistor M4). The level shift unit 302 converts the low operating voltage of the Balance control signal Balance into the high operating voltage of the charge pump 304 according to the level shift control signal CTRL, and outputs a first driving signal through the first control terminal Drv1 of the logic driving unit 303 and a second driving signal through the second control terminal Drv2, thereby controlling the switching between the first transistor switch module 10 and the first transistor switch module 10. When the transistor switch is a P-type metal oxide semiconductor field effect transistor (PMOS), the level shifting unit 302 and the charge pump 304 can be omitted.
The dual power balance controller 30 may further include a detection unit, and when it is detected that the load is in a light load state, a control signal is generated to turn on any one of the first transistor switch module 10 and the second transistor switch module 20, and turn off the other one until the light load state is removed, so as to achieve the purpose of saving energy in light load.
In summary, the present invention balances the currents of the two power supply modules at a high switching frequency through a simple control circuit design and a small number of transistors, inductors, etc., to provide a stable voltage for a high power load, which not only saves the cost, but also does not generate the current back-flow phenomenon even if a large voltage difference exists between different power supplies, does not affect the normal use thereof, and also realizes the energy saving effect at light load.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A dual power supply system with current balancing, the dual power supply system with current balancing comprising: a first transistor switch module (10), a second transistor switch module (20) and a dual power supply balance controller (30);
the first transistor switch module (10) is coupled to a first control terminal Drv1, a first power input terminal V1 and a system output terminal Vo1 of a dual power balance controller (30), and is used for controlling the first power supply to provide voltage to the system output terminal Vo 1;
the second transistor switch module (20) is coupled to the second control terminal Drv2, the second power input terminal V2 and the system output terminal Vo1 of the dual power source balanced controller (30), and is used for controlling the second power source to provide voltage to the system output terminal Vo 1;
the dual power balance controller (30) is used for controlling the first control terminal Drv1 to output a first driving signal to the first transistor switch module (10) and controlling the second control terminal Drv2 to output a second driving signal to the second transistor switch module (20) according to a balance control signal;
the first driving signal can control the first transistor switch module (10) to be switched on or switched off, and the second driving signal can control the second transistor switch module (20) to be switched on or switched off; and the first transistor switch module and the second transistor switch module are not turned on at the same time.
2. The dual power supply system with current balancing as claimed in claim 1, wherein the balancing control signal is a frequency signal generated internally by the dual power balancing controller (30) or an externally adjustable frequency signal.
3. The dual power supply system with current balancing of claim 1, wherein the balancing control signal has a frequency range of: 10KHz to 100 KHz.
4. The dual power supply system with current balancing according to claim 1, wherein the first transistor switch module (10) and the second transistor switch module (20) respectively comprise two transistor switches connected in series if the voltage provided by the first power supply is not equal to the voltage provided by the second power supply.
5. The dual power supply system with current balancing of claim 4, wherein the first transistor switch module (10) comprises a first transistor switch M1 and a third transistor switch M3, wherein the source of the first transistor switch M1 is coupled to the first power input terminal V1, the drain of the first transistor switch M1 is coupled to the drain of the third transistor switch M3, the source of the third transistor switch M3 is coupled to the system output Vo1, and the gate of the first transistor switch M1 and the gate of the third transistor switch M3 are both coupled to the first control terminal Drv 1;
the second transistor switch module (20) comprises a second transistor switch M2 and a fourth transistor switch M4, a source of the second transistor switch M2 is coupled to the second power input terminal V2, a drain of the second transistor switch M2 is coupled to a drain of the fourth transistor switch M4, a source of the fourth transistor switch M4 is coupled to the system output terminal Vo1, and gates of the second transistor switch M2 and the fourth transistor switch M4 are coupled to the second control terminal Drv 2;
the system output Vo1 is connected to one end of an inductor L, and the other end of the inductor L is coupled to a load terminal Vo 2.
6. The dual power supply system with current balancing according to claim 1, wherein the first transistor switch module (10) and the second transistor switch module (20) each comprise a transistor switch if the voltage provided by the first power supply is equal to the voltage provided by the second power supply.
7. The dual power supply system with current balancing of claim 6, wherein the first transistor switch module (10) comprises a fifth transistor switch M5, a drain of the fifth transistor switch M5 is coupled to the first power input V1, a source of the fifth transistor switch M5 is coupled to the system output Vo1, and a gate of the fifth transistor switch M5 is coupled to the first control terminal Drv 1;
the second transistor switch module (20) includes a sixth transistor switch M6, a drain of the sixth transistor switch M6 is coupled to the second power input V2, a source of the sixth transistor switch M6 is coupled to the system output Vo1, and a gate of the sixth transistor switch M6 is coupled to the second control terminal Drv 2.
8. The dual power supply system with current balancing according to any one of claims 1 to 7, wherein the first power input terminal V1 is coupled to one end of a first input capacitor Cv1, and the other end of the first input capacitor Cv1 is grounded; the second power input terminal V2 is coupled to one end of a second input capacitor Cv2, and the other end of the second input capacitor Cv2 is grounded.
9. The dual power supply system with current balancing according to any one of claims 1 to 7, wherein the dual power balancing controller (30) comprises:
a balance logic unit (301) for generating a logic control signal to the logic driving unit (303) according to a balance control signal;
a logic driving unit (303), coupled to the balancing logic unit, for outputting a first driving signal at a first control terminal Drv1 of the dual power source balancing controller (30) according to a logic control signal; the second drive signal is output at a second control terminal Drv2 of the dual power balance controller (30).
10. A dual-supply balanced controller, comprising:
a balance logic unit (301) for generating a logic control signal to the logic driving unit (303) according to a balance control signal;
a logic driving unit (303), coupled to the balancing logic unit, for outputting a first driving signal at a first control terminal Drv1 of the dual power balance controller (30) according to any one of claims 1-7 according to a logic control signal; the second driving signal is output at the second control terminal Drv2 of the dual power balance controller (30) as claimed in any one of claims 1-7.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910739064.6A CN112398210B (en) | 2019-08-12 | 2019-08-12 | Dual power supply system with current balance and dual power balance controller |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910739064.6A CN112398210B (en) | 2019-08-12 | 2019-08-12 | Dual power supply system with current balance and dual power balance controller |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN112398210A true CN112398210A (en) | 2021-02-23 |
| CN112398210B CN112398210B (en) | 2024-04-05 |
Family
ID=74602154
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910739064.6A Active CN112398210B (en) | 2019-08-12 | 2019-08-12 | Dual power supply system with current balance and dual power balance controller |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112398210B (en) |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101771273A (en) * | 2008-12-31 | 2010-07-07 | 华硕电脑股份有限公司 | Current regulating device |
| CN102222976A (en) * | 2011-06-27 | 2011-10-19 | 深圳市英威腾电源有限公司 | Auxiliary power supply and power supply system for power system |
| CN102273036A (en) * | 2008-12-31 | 2011-12-07 | 凌力尔特有限公司 | Method and system for voltage independent power supply load sharing |
| US20130163297A1 (en) * | 2011-12-22 | 2013-06-27 | Vijay Gangadhar Phadke | Single phase redundant power supply systems for reducing phase current imbalances |
| CN109474060A (en) * | 2018-12-19 | 2019-03-15 | 电子科技大学中山学院 | Dual-power switching system and switching method |
-
2019
- 2019-08-12 CN CN201910739064.6A patent/CN112398210B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101771273A (en) * | 2008-12-31 | 2010-07-07 | 华硕电脑股份有限公司 | Current regulating device |
| CN102273036A (en) * | 2008-12-31 | 2011-12-07 | 凌力尔特有限公司 | Method and system for voltage independent power supply load sharing |
| CN102222976A (en) * | 2011-06-27 | 2011-10-19 | 深圳市英威腾电源有限公司 | Auxiliary power supply and power supply system for power system |
| US20130163297A1 (en) * | 2011-12-22 | 2013-06-27 | Vijay Gangadhar Phadke | Single phase redundant power supply systems for reducing phase current imbalances |
| CN109474060A (en) * | 2018-12-19 | 2019-03-15 | 电子科技大学中山学院 | Dual-power switching system and switching method |
Also Published As
| Publication number | Publication date |
|---|---|
| CN112398210B (en) | 2024-04-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2019120295A1 (en) | Power supply circuit, series power supply method and computing system thereof | |
| US20210050779A1 (en) | Drive circuit, drive method and integrated circuit thereof | |
| US7285941B2 (en) | DC-DC converter with load intensity control method | |
| US9853549B2 (en) | Boost-buck converting circuit, power management module and liquid crystal driving device | |
| US7911192B2 (en) | High voltage power regulation using two power switches with low voltage transistors | |
| CN101478243B (en) | Switch electric power circuit with wide inputting range | |
| US8294494B2 (en) | Triangular-wave generating circuit synchronized with an external circuit | |
| US10050532B2 (en) | DC-DC converter with pseudo ripple voltage generation | |
| US8076918B2 (en) | Multi-phase driving circuit with phase adjusting function | |
| US9413244B2 (en) | Voltage conversion circuit with voltage selection of transistor bulk | |
| US11652407B2 (en) | Switching capacitor converter and driving circuit | |
| US10103727B1 (en) | Power switch circuit and integrated circuit of power switch controller | |
| US20140070612A1 (en) | Converter Device | |
| US10447161B2 (en) | Inverting buck-boost power converter | |
| CN108012386B (en) | Control circuit, chip, method and switching device | |
| US7701264B2 (en) | Semiconductor output circuit | |
| US11205957B2 (en) | Boost converter | |
| US10079538B2 (en) | Bootstrap circuit for DC/DC converter | |
| CN110224576B (en) | Switching power conversion device and multi-stage switching power supply circuit therein | |
| CN102474182B (en) | Integrated circuit comprising voltage modulation circuitry and method therefor | |
| CN112398210B (en) | Dual power supply system with current balance and dual power balance controller | |
| US10122258B2 (en) | DC-DC converter with pull-up or pull-down current and associated control method | |
| TW202110059A (en) | Gate driving circuit, charge pump having the same, and chip | |
| US11929667B2 (en) | Switching converter and low-voltage startup circuit thereof | |
| US11489444B2 (en) | Switching converter and method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |